spi.c revision 1.19.2.1 1 1.19.2.1 thorpej /* $NetBSD: spi.c,v 1.19.2.1 2021/08/09 00:30:09 thorpej Exp $ */
2 1.1 gdamore
3 1.1 gdamore /*-
4 1.1 gdamore * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
5 1.1 gdamore * Copyright (c) 2006 Garrett D'Amore.
6 1.1 gdamore * All rights reserved.
7 1.1 gdamore *
8 1.1 gdamore * Portions of this code were written by Garrett D'Amore for the
9 1.1 gdamore * Champaign-Urbana Community Wireless Network Project.
10 1.1 gdamore *
11 1.1 gdamore * Redistribution and use in source and binary forms, with or
12 1.1 gdamore * without modification, are permitted provided that the following
13 1.1 gdamore * conditions are met:
14 1.1 gdamore * 1. Redistributions of source code must retain the above copyright
15 1.1 gdamore * notice, this list of conditions and the following disclaimer.
16 1.1 gdamore * 2. Redistributions in binary form must reproduce the above
17 1.1 gdamore * copyright notice, this list of conditions and the following
18 1.1 gdamore * disclaimer in the documentation and/or other materials provided
19 1.1 gdamore * with the distribution.
20 1.1 gdamore * 3. All advertising materials mentioning features or use of this
21 1.1 gdamore * software must display the following acknowledgements:
22 1.1 gdamore * This product includes software developed by the Urbana-Champaign
23 1.1 gdamore * Independent Media Center.
24 1.1 gdamore * This product includes software developed by Garrett D'Amore.
25 1.1 gdamore * 4. Urbana-Champaign Independent Media Center's name and Garrett
26 1.1 gdamore * D'Amore's name may not be used to endorse or promote products
27 1.1 gdamore * derived from this software without specific prior written permission.
28 1.1 gdamore *
29 1.1 gdamore * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
30 1.1 gdamore * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
31 1.1 gdamore * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 1.1 gdamore * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 1.1 gdamore * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
34 1.1 gdamore * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
35 1.1 gdamore * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
36 1.1 gdamore * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 1.1 gdamore * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38 1.1 gdamore * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 1.1 gdamore * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 1.1 gdamore * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
41 1.1 gdamore * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 1.1 gdamore */
43 1.1 gdamore
44 1.1 gdamore #include <sys/cdefs.h>
45 1.19.2.1 thorpej __KERNEL_RCSID(0, "$NetBSD: spi.c,v 1.19.2.1 2021/08/09 00:30:09 thorpej Exp $");
46 1.1 gdamore
47 1.1 gdamore #include "locators.h"
48 1.1 gdamore
49 1.1 gdamore #include <sys/param.h>
50 1.1 gdamore #include <sys/systm.h>
51 1.1 gdamore #include <sys/device.h>
52 1.10 mlelstv #include <sys/conf.h>
53 1.19.2.1 thorpej #include <sys/kmem.h>
54 1.5 rmind #include <sys/mutex.h>
55 1.5 rmind #include <sys/condvar.h>
56 1.1 gdamore #include <sys/errno.h>
57 1.1 gdamore
58 1.1 gdamore #include <dev/spi/spivar.h>
59 1.10 mlelstv #include <dev/spi/spi_io.h>
60 1.10 mlelstv
61 1.10 mlelstv #include "ioconf.h"
62 1.10 mlelstv #include "locators.h"
63 1.1 gdamore
64 1.1 gdamore struct spi_softc {
65 1.19.2.1 thorpej device_t sc_dev;
66 1.1 gdamore struct spi_controller sc_controller;
67 1.1 gdamore int sc_mode;
68 1.1 gdamore int sc_speed;
69 1.10 mlelstv int sc_slave;
70 1.1 gdamore int sc_nslaves;
71 1.1 gdamore struct spi_handle *sc_slaves;
72 1.19.2.1 thorpej kmutex_t sc_slave_state_lock;
73 1.10 mlelstv kmutex_t sc_lock;
74 1.10 mlelstv kcondvar_t sc_cv;
75 1.18 mlelstv kmutex_t sc_dev_lock;
76 1.10 mlelstv int sc_flags;
77 1.10 mlelstv #define SPIC_BUSY 1
78 1.10 mlelstv };
79 1.10 mlelstv
80 1.10 mlelstv static dev_type_open(spi_open);
81 1.10 mlelstv static dev_type_close(spi_close);
82 1.10 mlelstv static dev_type_ioctl(spi_ioctl);
83 1.10 mlelstv
84 1.10 mlelstv const struct cdevsw spi_cdevsw = {
85 1.10 mlelstv .d_open = spi_open,
86 1.10 mlelstv .d_close = spi_close,
87 1.10 mlelstv .d_read = noread,
88 1.10 mlelstv .d_write = nowrite,
89 1.10 mlelstv .d_ioctl = spi_ioctl,
90 1.10 mlelstv .d_stop = nostop,
91 1.10 mlelstv .d_tty = notty,
92 1.10 mlelstv .d_poll = nopoll,
93 1.10 mlelstv .d_mmap = nommap,
94 1.10 mlelstv .d_kqfilter = nokqfilter,
95 1.10 mlelstv .d_discard = nodiscard,
96 1.18 mlelstv .d_flag = D_OTHER | D_MPSAFE
97 1.1 gdamore };
98 1.1 gdamore
99 1.1 gdamore /*
100 1.1 gdamore * SPI slave device. We have one of these per slave.
101 1.1 gdamore */
102 1.1 gdamore struct spi_handle {
103 1.19.2.1 thorpej struct spi_softc *sh_sc; /* static */
104 1.19.2.1 thorpej struct spi_controller *sh_controller; /* static */
105 1.19.2.1 thorpej int sh_slave; /* static */
106 1.19.2.1 thorpej int sh_mode; /* locked by owning child */
107 1.19.2.1 thorpej int sh_speed; /* locked by owning child */
108 1.19.2.1 thorpej int sh_flags; /* ^^ slave_state_lock ^^ */
109 1.19.2.1 thorpej #define SPIH_ATTACHED __BIT(0)
110 1.19.2.1 thorpej #define SPIH_DIRECT __BIT(1)
111 1.1 gdamore };
112 1.1 gdamore
113 1.10 mlelstv #define SPI_MAXDATA 4096
114 1.10 mlelstv
115 1.1 gdamore /*
116 1.1 gdamore * API for bus drivers.
117 1.1 gdamore */
118 1.1 gdamore
119 1.1 gdamore int
120 1.1 gdamore spibus_print(void *aux, const char *pnp)
121 1.1 gdamore {
122 1.1 gdamore
123 1.1 gdamore if (pnp != NULL)
124 1.1 gdamore aprint_normal("spi at %s", pnp);
125 1.1 gdamore
126 1.1 gdamore return (UNCONF);
127 1.1 gdamore }
128 1.1 gdamore
129 1.1 gdamore
130 1.1 gdamore static int
131 1.3 xtraeme spi_match(device_t parent, cfdata_t cf, void *aux)
132 1.1 gdamore {
133 1.5 rmind
134 1.1 gdamore return 1;
135 1.1 gdamore }
136 1.1 gdamore
137 1.1 gdamore static int
138 1.19.2.1 thorpej spi_print_direct(void *aux, const char *pnp)
139 1.1 gdamore {
140 1.1 gdamore struct spi_attach_args *sa = aux;
141 1.1 gdamore
142 1.19.2.1 thorpej if (pnp != NULL) {
143 1.19.2.1 thorpej aprint_normal("%s%s%s%s at %s slave %d",
144 1.19.2.1 thorpej sa->sa_name ? sa->sa_name : "(unknown)",
145 1.19.2.1 thorpej sa->sa_clist ? " (" : "",
146 1.19.2.1 thorpej sa->sa_clist ? sa->sa_clist : "",
147 1.19.2.1 thorpej sa->sa_clist ? ")" : "",
148 1.19.2.1 thorpej pnp, sa->sa_handle->sh_slave);
149 1.19.2.1 thorpej } else {
150 1.1 gdamore aprint_normal(" slave %d", sa->sa_handle->sh_slave);
151 1.19.2.1 thorpej }
152 1.1 gdamore
153 1.19.2.1 thorpej return UNCONF;
154 1.1 gdamore }
155 1.1 gdamore
156 1.1 gdamore static int
157 1.19.2.1 thorpej spi_print(void *aux, const char *pnp)
158 1.1 gdamore {
159 1.19.2.1 thorpej struct spi_attach_args *sa = aux;
160 1.1 gdamore
161 1.19.2.1 thorpej aprint_normal(" slave %d", sa->sa_handle->sh_slave);
162 1.1 gdamore
163 1.19.2.1 thorpej return UNCONF;
164 1.1 gdamore }
165 1.1 gdamore
166 1.1 gdamore /*
167 1.19.2.1 thorpej * Direct and indrect for SPI are pretty similar, so we can collapse
168 1.19.2.1 thorpej * them into a single function.
169 1.12 tnn */
170 1.12 tnn static void
171 1.19.2.1 thorpej spi_attach_child(struct spi_softc *sc, struct spi_attach_args *sa,
172 1.19.2.1 thorpej int chip_select, cfdata_t cf)
173 1.12 tnn {
174 1.19.2.1 thorpej struct spi_handle *sh;
175 1.19.2.1 thorpej device_t newdev = NULL;
176 1.19.2.1 thorpej bool is_direct = cf == NULL;
177 1.19.2.1 thorpej const int skip_flags = is_direct ? SPIH_ATTACHED
178 1.19.2.1 thorpej : (SPIH_ATTACHED | SPIH_DIRECT);
179 1.19.2.1 thorpej const int claim_flags = skip_flags ^ SPIH_DIRECT;
180 1.19.2.1 thorpej int locs[SPICF_NLOCS] = { 0 };
181 1.19.2.1 thorpej
182 1.19.2.1 thorpej if (chip_select < 0 ||
183 1.19.2.1 thorpej chip_select >= sc->sc_controller.sct_nslaves) {
184 1.19.2.1 thorpej return;
185 1.19.2.1 thorpej }
186 1.12 tnn
187 1.19.2.1 thorpej sh = &sc->sc_slaves[chip_select];
188 1.19.2.1 thorpej
189 1.19.2.1 thorpej mutex_enter(&sc->sc_slave_state_lock);
190 1.19.2.1 thorpej if (ISSET(sh->sh_flags, skip_flags)) {
191 1.19.2.1 thorpej mutex_exit(&sc->sc_slave_state_lock);
192 1.12 tnn return;
193 1.19.2.1 thorpej }
194 1.12 tnn
195 1.19.2.1 thorpej /* Keep others off of this chip select. */
196 1.19.2.1 thorpej SET(sh->sh_flags, claim_flags);
197 1.19.2.1 thorpej mutex_exit(&sc->sc_slave_state_lock);
198 1.19.2.1 thorpej
199 1.19.2.1 thorpej locs[SPICF_SLAVE] = chip_select;
200 1.19.2.1 thorpej sa->sa_handle = sh;
201 1.19.2.1 thorpej
202 1.19.2.1 thorpej if (is_direct) {
203 1.19.2.1 thorpej newdev = config_found(sc->sc_dev, sa, spi_print_direct,
204 1.19.2.1 thorpej CFARGS(/* .submatch = config_stdsubmatch, XXX */
205 1.19.2.1 thorpej .locators = locs,
206 1.19.2.1 thorpej .devhandle = sa->sa_devhandle));
207 1.19.2.1 thorpej } else {
208 1.19.2.1 thorpej if (config_probe(sc->sc_dev, cf, &sa)) {
209 1.19.2.1 thorpej newdev = config_attach(sc->sc_dev, cf, &sa, spi_print,
210 1.19.2.1 thorpej CFARGS(.locators = locs));
211 1.12 tnn }
212 1.12 tnn }
213 1.12 tnn
214 1.19.2.1 thorpej if (newdev == NULL) {
215 1.19.2.1 thorpej /*
216 1.19.2.1 thorpej * Clear our claim on this chip select (yes, just
217 1.19.2.1 thorpej * the ATTACHED flag; we want to keep indirects off
218 1.19.2.1 thorpej * of chip selects for which there is a device tree
219 1.19.2.1 thorpej * node).
220 1.19.2.1 thorpej */
221 1.19.2.1 thorpej mutex_enter(&sc->sc_slave_state_lock);
222 1.19.2.1 thorpej CLR(sh->sh_flags, SPIH_ATTACHED);
223 1.19.2.1 thorpej mutex_exit(&sc->sc_slave_state_lock);
224 1.19.2.1 thorpej }
225 1.12 tnn }
226 1.12 tnn
227 1.19.2.1 thorpej static int
228 1.19.2.1 thorpej spi_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
229 1.12 tnn {
230 1.19.2.1 thorpej struct spi_softc *sc = device_private(parent);
231 1.12 tnn struct spi_attach_args sa;
232 1.12 tnn
233 1.19.2.1 thorpej if (cf->cf_loc[SPICF_SLAVE] == SPICF_SLAVE_DEFAULT) {
234 1.19.2.1 thorpej /* No wildcards for indirect on SPI. */
235 1.19.2.1 thorpej return 0;
236 1.12 tnn }
237 1.19.2.1 thorpej
238 1.19.2.1 thorpej memset(&sa, 0, sizeof(sa));
239 1.19.2.1 thorpej spi_attach_child(sc, &sa, cf->cf_loc[SPICF_SLAVE], cf);
240 1.19.2.1 thorpej
241 1.19.2.1 thorpej return 0;
242 1.19.2.1 thorpej }
243 1.19.2.1 thorpej
244 1.19.2.1 thorpej static bool
245 1.19.2.1 thorpej spi_enumerate_devices_callback(device_t self,
246 1.19.2.1 thorpej struct spi_enumerate_devices_args *args)
247 1.19.2.1 thorpej {
248 1.19.2.1 thorpej struct spi_softc *sc = device_private(self);
249 1.19.2.1 thorpej
250 1.19.2.1 thorpej spi_attach_child(sc, args->sa, args->chip_select, NULL);
251 1.19.2.1 thorpej
252 1.19.2.1 thorpej return true; /* keep enumerating */
253 1.12 tnn }
254 1.12 tnn
255 1.12 tnn int
256 1.12 tnn spi_compatible_match(const struct spi_attach_args *sa, const cfdata_t cf,
257 1.12 tnn const struct device_compatible_entry *compats)
258 1.12 tnn {
259 1.19.2.1 thorpej if (sa->sa_clist != NULL) {
260 1.19.2.1 thorpej return device_compatible_match_strlist(sa->sa_clist,
261 1.19.2.1 thorpej sa->sa_clist_size, compats);
262 1.19.2.1 thorpej }
263 1.12 tnn
264 1.19.2.1 thorpej /*
265 1.19.2.1 thorpej * In this case, we're using indirect configuration, but SPI
266 1.19.2.1 thorpej * has no real addressing system, and we've filtered out
267 1.19.2.1 thorpej * wildcarded chip selects in spi_search(), so we have no
268 1.19.2.1 thorpej * choice but to trust the user-specified config.
269 1.19.2.1 thorpej */
270 1.12 tnn return 1;
271 1.12 tnn }
272 1.12 tnn
273 1.1 gdamore static void
274 1.3 xtraeme spi_attach(device_t parent, device_t self, void *aux)
275 1.1 gdamore {
276 1.1 gdamore struct spi_softc *sc = device_private(self);
277 1.1 gdamore struct spibus_attach_args *sba = aux;
278 1.1 gdamore int i;
279 1.1 gdamore
280 1.19.2.1 thorpej sc->sc_dev = self;
281 1.19.2.1 thorpej
282 1.1 gdamore aprint_naive(": SPI bus\n");
283 1.1 gdamore aprint_normal(": SPI bus\n");
284 1.1 gdamore
285 1.18 mlelstv mutex_init(&sc->sc_dev_lock, MUTEX_DEFAULT, IPL_NONE);
286 1.15 kardel mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
287 1.19.2.1 thorpej mutex_init(&sc->sc_slave_state_lock, MUTEX_DEFAULT, IPL_NONE);
288 1.10 mlelstv cv_init(&sc->sc_cv, "spictl");
289 1.10 mlelstv
290 1.1 gdamore sc->sc_controller = *sba->sba_controller;
291 1.8 rkujawa sc->sc_nslaves = sba->sba_controller->sct_nslaves;
292 1.19.2.1 thorpej
293 1.1 gdamore /* allocate slave structures */
294 1.19.2.1 thorpej sc->sc_slaves = kmem_zalloc(sizeof(*sc->sc_slaves) * sc->sc_nslaves,
295 1.19.2.1 thorpej KM_SLEEP);
296 1.1 gdamore
297 1.1 gdamore sc->sc_speed = 0;
298 1.2 gdamore sc->sc_mode = -1;
299 1.10 mlelstv sc->sc_slave = -1;
300 1.1 gdamore
301 1.1 gdamore /*
302 1.1 gdamore * Initialize slave handles
303 1.1 gdamore */
304 1.1 gdamore for (i = 0; i < sc->sc_nslaves; i++) {
305 1.1 gdamore sc->sc_slaves[i].sh_slave = i;
306 1.1 gdamore sc->sc_slaves[i].sh_sc = sc;
307 1.1 gdamore sc->sc_slaves[i].sh_controller = &sc->sc_controller;
308 1.1 gdamore }
309 1.1 gdamore
310 1.19.2.1 thorpej /*
311 1.19.2.1 thorpej * Attempt to enumerate the devices on the bus using the
312 1.19.2.1 thorpej * platform device tree.
313 1.19.2.1 thorpej */
314 1.19.2.1 thorpej struct spi_attach_args sa = { 0 };
315 1.19.2.1 thorpej struct spi_enumerate_devices_args enumargs = {
316 1.19.2.1 thorpej .sa = &sa,
317 1.19.2.1 thorpej .callback = spi_enumerate_devices_callback,
318 1.19.2.1 thorpej };
319 1.19.2.1 thorpej device_call(self, "spi-enumerate-devices", &enumargs);
320 1.19.2.1 thorpej
321 1.12 tnn /* Then do any other devices the user may have manually wired */
322 1.17 thorpej config_search(self, NULL,
323 1.19 thorpej CFARGS(.search = spi_search));
324 1.1 gdamore }
325 1.1 gdamore
326 1.19.2.1 thorpej CFATTACH_DECL_NEW(spi, sizeof(struct spi_softc),
327 1.19.2.1 thorpej spi_match, spi_attach, NULL, NULL);
328 1.19.2.1 thorpej
329 1.10 mlelstv static int
330 1.10 mlelstv spi_open(dev_t dev, int flag, int fmt, lwp_t *l)
331 1.10 mlelstv {
332 1.10 mlelstv struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
333 1.10 mlelstv
334 1.10 mlelstv if (sc == NULL)
335 1.10 mlelstv return ENXIO;
336 1.10 mlelstv
337 1.10 mlelstv return 0;
338 1.10 mlelstv }
339 1.10 mlelstv
340 1.10 mlelstv static int
341 1.10 mlelstv spi_close(dev_t dev, int flag, int fmt, lwp_t *l)
342 1.10 mlelstv {
343 1.10 mlelstv
344 1.10 mlelstv return 0;
345 1.10 mlelstv }
346 1.10 mlelstv
347 1.10 mlelstv static int
348 1.10 mlelstv spi_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
349 1.10 mlelstv {
350 1.10 mlelstv struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
351 1.10 mlelstv struct spi_handle *sh;
352 1.10 mlelstv spi_ioctl_configure_t *sic;
353 1.10 mlelstv spi_ioctl_transfer_t *sit;
354 1.10 mlelstv uint8_t *sbuf, *rbuf;
355 1.10 mlelstv int error;
356 1.10 mlelstv
357 1.10 mlelstv if (sc == NULL)
358 1.10 mlelstv return ENXIO;
359 1.10 mlelstv
360 1.18 mlelstv mutex_enter(&sc->sc_dev_lock);
361 1.18 mlelstv
362 1.10 mlelstv switch (cmd) {
363 1.10 mlelstv case SPI_IOCTL_CONFIGURE:
364 1.10 mlelstv sic = (spi_ioctl_configure_t *)data;
365 1.10 mlelstv if (sic->sic_addr < 0 || sic->sic_addr >= sc->sc_nslaves) {
366 1.10 mlelstv error = EINVAL;
367 1.10 mlelstv break;
368 1.10 mlelstv }
369 1.10 mlelstv sh = &sc->sc_slaves[sic->sic_addr];
370 1.10 mlelstv error = spi_configure(sh, sic->sic_mode, sic->sic_speed);
371 1.10 mlelstv break;
372 1.10 mlelstv case SPI_IOCTL_TRANSFER:
373 1.10 mlelstv sit = (spi_ioctl_transfer_t *)data;
374 1.10 mlelstv if (sit->sit_addr < 0 || sit->sit_addr >= sc->sc_nslaves) {
375 1.10 mlelstv error = EINVAL;
376 1.10 mlelstv break;
377 1.10 mlelstv }
378 1.11 mlelstv if ((sit->sit_send && sit->sit_sendlen == 0)
379 1.11 mlelstv || (sit->sit_recv && sit->sit_recv == 0)) {
380 1.11 mlelstv error = EINVAL;
381 1.11 mlelstv break;
382 1.11 mlelstv }
383 1.10 mlelstv sh = &sc->sc_slaves[sit->sit_addr];
384 1.10 mlelstv sbuf = rbuf = NULL;
385 1.10 mlelstv error = 0;
386 1.11 mlelstv if (sit->sit_send && sit->sit_sendlen <= SPI_MAXDATA) {
387 1.19.2.1 thorpej sbuf = kmem_alloc(sit->sit_sendlen, KM_SLEEP);
388 1.10 mlelstv error = copyin(sit->sit_send, sbuf, sit->sit_sendlen);
389 1.10 mlelstv }
390 1.11 mlelstv if (sit->sit_recv && sit->sit_recvlen <= SPI_MAXDATA) {
391 1.19.2.1 thorpej rbuf = kmem_alloc(sit->sit_recvlen, KM_SLEEP);
392 1.10 mlelstv }
393 1.10 mlelstv if (error == 0) {
394 1.10 mlelstv if (sbuf && rbuf)
395 1.10 mlelstv error = spi_send_recv(sh,
396 1.10 mlelstv sit->sit_sendlen, sbuf,
397 1.10 mlelstv sit->sit_recvlen, rbuf);
398 1.10 mlelstv else if (sbuf)
399 1.10 mlelstv error = spi_send(sh,
400 1.10 mlelstv sit->sit_sendlen, sbuf);
401 1.10 mlelstv else if (rbuf)
402 1.10 mlelstv error = spi_recv(sh,
403 1.10 mlelstv sit->sit_recvlen, rbuf);
404 1.10 mlelstv }
405 1.10 mlelstv if (rbuf) {
406 1.10 mlelstv if (error == 0)
407 1.10 mlelstv error = copyout(rbuf, sit->sit_recv,
408 1.10 mlelstv sit->sit_recvlen);
409 1.19.2.1 thorpej kmem_free(rbuf, sit->sit_recvlen);
410 1.10 mlelstv }
411 1.10 mlelstv if (sbuf) {
412 1.19.2.1 thorpej kmem_free(sbuf, sit->sit_sendlen);
413 1.10 mlelstv }
414 1.10 mlelstv break;
415 1.10 mlelstv default:
416 1.10 mlelstv error = ENODEV;
417 1.10 mlelstv break;
418 1.10 mlelstv }
419 1.10 mlelstv
420 1.18 mlelstv mutex_exit(&sc->sc_dev_lock);
421 1.18 mlelstv
422 1.10 mlelstv return error;
423 1.10 mlelstv }
424 1.10 mlelstv
425 1.19.2.1 thorpej /*
426 1.19.2.1 thorpej * API for device drivers.
427 1.19.2.1 thorpej *
428 1.19.2.1 thorpej * We provide wrapper routines to decouple the ABI for the SPI
429 1.19.2.1 thorpej * device drivers from the ABI for the SPI bus drivers.
430 1.19.2.1 thorpej */
431 1.1 gdamore
432 1.1 gdamore /*
433 1.1 gdamore * Configure. This should be the first thing that the SPI driver
434 1.1 gdamore * should do, to configure which mode (e.g. SPI_MODE_0, which is the
435 1.1 gdamore * same as Philips Microwire mode), and speed. If the bus driver
436 1.1 gdamore * cannot run fast enough, then it should just configure the fastest
437 1.1 gdamore * mode that it can support. If the bus driver cannot run slow
438 1.1 gdamore * enough, then the device is incompatible and an error should be
439 1.1 gdamore * returned.
440 1.1 gdamore */
441 1.1 gdamore int
442 1.1 gdamore spi_configure(struct spi_handle *sh, int mode, int speed)
443 1.1 gdamore {
444 1.1 gdamore
445 1.10 mlelstv sh->sh_mode = mode;
446 1.10 mlelstv sh->sh_speed = speed;
447 1.10 mlelstv return 0;
448 1.10 mlelstv }
449 1.10 mlelstv
450 1.10 mlelstv /*
451 1.10 mlelstv * Acquire controller
452 1.10 mlelstv */
453 1.10 mlelstv static void
454 1.10 mlelstv spi_acquire(struct spi_handle *sh)
455 1.10 mlelstv {
456 1.10 mlelstv struct spi_softc *sc = sh->sh_sc;
457 1.10 mlelstv
458 1.10 mlelstv mutex_enter(&sc->sc_lock);
459 1.10 mlelstv while ((sc->sc_flags & SPIC_BUSY) != 0)
460 1.10 mlelstv cv_wait(&sc->sc_cv, &sc->sc_lock);
461 1.10 mlelstv sc->sc_flags |= SPIC_BUSY;
462 1.10 mlelstv mutex_exit(&sc->sc_lock);
463 1.10 mlelstv }
464 1.10 mlelstv
465 1.10 mlelstv /*
466 1.10 mlelstv * Release controller
467 1.10 mlelstv */
468 1.10 mlelstv static void
469 1.10 mlelstv spi_release(struct spi_handle *sh)
470 1.10 mlelstv {
471 1.10 mlelstv struct spi_softc *sc = sh->sh_sc;
472 1.10 mlelstv
473 1.10 mlelstv mutex_enter(&sc->sc_lock);
474 1.10 mlelstv sc->sc_flags &= ~SPIC_BUSY;
475 1.10 mlelstv cv_broadcast(&sc->sc_cv);
476 1.10 mlelstv mutex_exit(&sc->sc_lock);
477 1.1 gdamore }
478 1.1 gdamore
479 1.1 gdamore void
480 1.1 gdamore spi_transfer_init(struct spi_transfer *st)
481 1.1 gdamore {
482 1.1 gdamore
483 1.15 kardel mutex_init(&st->st_lock, MUTEX_DEFAULT, IPL_VM);
484 1.10 mlelstv cv_init(&st->st_cv, "spixfr");
485 1.5 rmind
486 1.1 gdamore st->st_flags = 0;
487 1.1 gdamore st->st_errno = 0;
488 1.1 gdamore st->st_done = NULL;
489 1.1 gdamore st->st_chunks = NULL;
490 1.1 gdamore st->st_private = NULL;
491 1.1 gdamore st->st_slave = -1;
492 1.1 gdamore }
493 1.1 gdamore
494 1.1 gdamore void
495 1.1 gdamore spi_chunk_init(struct spi_chunk *chunk, int cnt, const uint8_t *wptr,
496 1.1 gdamore uint8_t *rptr)
497 1.1 gdamore {
498 1.1 gdamore
499 1.1 gdamore chunk->chunk_write = chunk->chunk_wptr = wptr;
500 1.6 mrg chunk->chunk_read = chunk->chunk_rptr = rptr;
501 1.1 gdamore chunk->chunk_rresid = chunk->chunk_wresid = chunk->chunk_count = cnt;
502 1.1 gdamore chunk->chunk_next = NULL;
503 1.1 gdamore }
504 1.1 gdamore
505 1.1 gdamore void
506 1.1 gdamore spi_transfer_add(struct spi_transfer *st, struct spi_chunk *chunk)
507 1.1 gdamore {
508 1.1 gdamore struct spi_chunk **cpp;
509 1.1 gdamore
510 1.1 gdamore /* this is an O(n) insert -- perhaps we should use a simpleq? */
511 1.1 gdamore for (cpp = &st->st_chunks; *cpp; cpp = &(*cpp)->chunk_next);
512 1.1 gdamore *cpp = chunk;
513 1.1 gdamore }
514 1.1 gdamore
515 1.1 gdamore int
516 1.1 gdamore spi_transfer(struct spi_handle *sh, struct spi_transfer *st)
517 1.1 gdamore {
518 1.10 mlelstv struct spi_softc *sc = sh->sh_sc;
519 1.1 gdamore struct spi_controller *tag = sh->sh_controller;
520 1.1 gdamore struct spi_chunk *chunk;
521 1.10 mlelstv int error;
522 1.1 gdamore
523 1.1 gdamore /*
524 1.1 gdamore * Initialize "resid" counters and pointers, so that callers
525 1.1 gdamore * and bus drivers don't have to.
526 1.1 gdamore */
527 1.1 gdamore for (chunk = st->st_chunks; chunk; chunk = chunk->chunk_next) {
528 1.1 gdamore chunk->chunk_wresid = chunk->chunk_rresid = chunk->chunk_count;
529 1.1 gdamore chunk->chunk_wptr = chunk->chunk_write;
530 1.1 gdamore chunk->chunk_rptr = chunk->chunk_read;
531 1.1 gdamore }
532 1.1 gdamore
533 1.1 gdamore /*
534 1.10 mlelstv * Match slave and parameters to handle
535 1.1 gdamore */
536 1.1 gdamore st->st_slave = sh->sh_slave;
537 1.1 gdamore
538 1.10 mlelstv /*
539 1.10 mlelstv * Reserve controller during transaction
540 1.10 mlelstv */
541 1.10 mlelstv spi_acquire(sh);
542 1.10 mlelstv
543 1.10 mlelstv st->st_spiprivate = (void *)sh;
544 1.10 mlelstv
545 1.10 mlelstv /*
546 1.10 mlelstv * Reconfigure controller
547 1.10 mlelstv *
548 1.10 mlelstv * XXX backends don't configure per-slave parameters
549 1.10 mlelstv * Whenever we switch slaves or change mode or speed, we
550 1.10 mlelstv * need to tell the backend.
551 1.10 mlelstv */
552 1.10 mlelstv if (sc->sc_slave != sh->sh_slave
553 1.10 mlelstv || sc->sc_mode != sh->sh_mode
554 1.10 mlelstv || sc->sc_speed != sh->sh_speed) {
555 1.10 mlelstv error = (*tag->sct_configure)(tag->sct_cookie,
556 1.10 mlelstv sh->sh_slave, sh->sh_mode, sh->sh_speed);
557 1.10 mlelstv if (error)
558 1.10 mlelstv return error;
559 1.10 mlelstv }
560 1.10 mlelstv sc->sc_mode = sh->sh_mode;
561 1.10 mlelstv sc->sc_speed = sh->sh_speed;
562 1.10 mlelstv sc->sc_slave = sh->sh_slave;
563 1.10 mlelstv
564 1.10 mlelstv error = (*tag->sct_transfer)(tag->sct_cookie, st);
565 1.10 mlelstv
566 1.10 mlelstv return error;
567 1.1 gdamore }
568 1.1 gdamore
569 1.1 gdamore void
570 1.1 gdamore spi_wait(struct spi_transfer *st)
571 1.1 gdamore {
572 1.10 mlelstv struct spi_handle *sh = st->st_spiprivate;
573 1.1 gdamore
574 1.5 rmind mutex_enter(&st->st_lock);
575 1.4 jym while (!(st->st_flags & SPI_F_DONE)) {
576 1.5 rmind cv_wait(&st->st_cv, &st->st_lock);
577 1.1 gdamore }
578 1.5 rmind mutex_exit(&st->st_lock);
579 1.7 jakllsch cv_destroy(&st->st_cv);
580 1.7 jakllsch mutex_destroy(&st->st_lock);
581 1.10 mlelstv
582 1.10 mlelstv /*
583 1.10 mlelstv * End transaction
584 1.10 mlelstv */
585 1.10 mlelstv spi_release(sh);
586 1.1 gdamore }
587 1.1 gdamore
588 1.1 gdamore void
589 1.1 gdamore spi_done(struct spi_transfer *st, int err)
590 1.1 gdamore {
591 1.1 gdamore
592 1.5 rmind mutex_enter(&st->st_lock);
593 1.1 gdamore if ((st->st_errno = err) != 0) {
594 1.1 gdamore st->st_flags |= SPI_F_ERROR;
595 1.1 gdamore }
596 1.1 gdamore st->st_flags |= SPI_F_DONE;
597 1.1 gdamore if (st->st_done != NULL) {
598 1.1 gdamore (*st->st_done)(st);
599 1.1 gdamore } else {
600 1.5 rmind cv_broadcast(&st->st_cv);
601 1.1 gdamore }
602 1.5 rmind mutex_exit(&st->st_lock);
603 1.1 gdamore }
604 1.1 gdamore
605 1.1 gdamore /*
606 1.1 gdamore * Some convenience routines. These routines block until the work
607 1.1 gdamore * is done.
608 1.1 gdamore *
609 1.1 gdamore * spi_recv - receives data from the bus
610 1.1 gdamore *
611 1.1 gdamore * spi_send - sends data to the bus
612 1.1 gdamore *
613 1.1 gdamore * spi_send_recv - sends data to the bus, and then receives. Note that this is
614 1.1 gdamore * done synchronously, i.e. send a command and get the response. This is
615 1.1 gdamore * not full duplex. If you wnat full duplex, you can't use these convenience
616 1.1 gdamore * wrappers.
617 1.1 gdamore */
618 1.1 gdamore int
619 1.1 gdamore spi_recv(struct spi_handle *sh, int cnt, uint8_t *data)
620 1.1 gdamore {
621 1.1 gdamore struct spi_transfer trans;
622 1.1 gdamore struct spi_chunk chunk;
623 1.1 gdamore
624 1.1 gdamore spi_transfer_init(&trans);
625 1.1 gdamore spi_chunk_init(&chunk, cnt, NULL, data);
626 1.1 gdamore spi_transfer_add(&trans, &chunk);
627 1.1 gdamore
628 1.1 gdamore /* enqueue it and wait for it to complete */
629 1.1 gdamore spi_transfer(sh, &trans);
630 1.1 gdamore spi_wait(&trans);
631 1.1 gdamore
632 1.1 gdamore if (trans.st_flags & SPI_F_ERROR)
633 1.1 gdamore return trans.st_errno;
634 1.1 gdamore
635 1.1 gdamore return 0;
636 1.1 gdamore }
637 1.1 gdamore
638 1.1 gdamore int
639 1.1 gdamore spi_send(struct spi_handle *sh, int cnt, const uint8_t *data)
640 1.1 gdamore {
641 1.1 gdamore struct spi_transfer trans;
642 1.1 gdamore struct spi_chunk chunk;
643 1.1 gdamore
644 1.1 gdamore spi_transfer_init(&trans);
645 1.1 gdamore spi_chunk_init(&chunk, cnt, data, NULL);
646 1.1 gdamore spi_transfer_add(&trans, &chunk);
647 1.1 gdamore
648 1.1 gdamore /* enqueue it and wait for it to complete */
649 1.1 gdamore spi_transfer(sh, &trans);
650 1.1 gdamore spi_wait(&trans);
651 1.1 gdamore
652 1.1 gdamore if (trans.st_flags & SPI_F_ERROR)
653 1.1 gdamore return trans.st_errno;
654 1.1 gdamore
655 1.1 gdamore return 0;
656 1.1 gdamore }
657 1.1 gdamore
658 1.1 gdamore int
659 1.1 gdamore spi_send_recv(struct spi_handle *sh, int scnt, const uint8_t *snd,
660 1.1 gdamore int rcnt, uint8_t *rcv)
661 1.1 gdamore {
662 1.1 gdamore struct spi_transfer trans;
663 1.1 gdamore struct spi_chunk chunk1, chunk2;
664 1.1 gdamore
665 1.1 gdamore spi_transfer_init(&trans);
666 1.1 gdamore spi_chunk_init(&chunk1, scnt, snd, NULL);
667 1.1 gdamore spi_chunk_init(&chunk2, rcnt, NULL, rcv);
668 1.1 gdamore spi_transfer_add(&trans, &chunk1);
669 1.1 gdamore spi_transfer_add(&trans, &chunk2);
670 1.1 gdamore
671 1.1 gdamore /* enqueue it and wait for it to complete */
672 1.1 gdamore spi_transfer(sh, &trans);
673 1.1 gdamore spi_wait(&trans);
674 1.1 gdamore
675 1.1 gdamore if (trans.st_flags & SPI_F_ERROR)
676 1.1 gdamore return trans.st_errno;
677 1.1 gdamore
678 1.1 gdamore return 0;
679 1.1 gdamore }
680