spi.c revision 1.16.2.3 1 /* $NetBSD: spi.c,v 1.16.2.3 2021/03/22 02:01:01 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
5 * Copyright (c) 2006 Garrett D'Amore.
6 * All rights reserved.
7 *
8 * Portions of this code were written by Garrett D'Amore for the
9 * Champaign-Urbana Community Wireless Network Project.
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer in the documentation and/or other materials provided
19 * with the distribution.
20 * 3. All advertising materials mentioning features or use of this
21 * software must display the following acknowledgements:
22 * This product includes software developed by the Urbana-Champaign
23 * Independent Media Center.
24 * This product includes software developed by Garrett D'Amore.
25 * 4. Urbana-Champaign Independent Media Center's name and Garrett
26 * D'Amore's name may not be used to endorse or promote products
27 * derived from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
30 * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
31 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
34 * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
36 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
41 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 */
43
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: spi.c,v 1.16.2.3 2021/03/22 02:01:01 thorpej Exp $");
46
47 #include "locators.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/device.h>
52 #include <sys/conf.h>
53 #include <sys/malloc.h>
54 #include <sys/mutex.h>
55 #include <sys/condvar.h>
56 #include <sys/errno.h>
57
58 #include <dev/spi/spivar.h>
59 #include <dev/spi/spi_io.h>
60
61 #include "ioconf.h"
62 #include "locators.h"
63
64 struct spi_softc {
65 struct spi_controller sc_controller;
66 int sc_mode;
67 int sc_speed;
68 int sc_slave;
69 int sc_nslaves;
70 struct spi_handle *sc_slaves;
71 kmutex_t sc_lock;
72 kcondvar_t sc_cv;
73 int sc_flags;
74 #define SPIC_BUSY 1
75 };
76
77 static dev_type_open(spi_open);
78 static dev_type_close(spi_close);
79 static dev_type_ioctl(spi_ioctl);
80
81 const struct cdevsw spi_cdevsw = {
82 .d_open = spi_open,
83 .d_close = spi_close,
84 .d_read = noread,
85 .d_write = nowrite,
86 .d_ioctl = spi_ioctl,
87 .d_stop = nostop,
88 .d_tty = notty,
89 .d_poll = nopoll,
90 .d_mmap = nommap,
91 .d_kqfilter = nokqfilter,
92 .d_discard = nodiscard,
93 .d_flag = D_OTHER
94 };
95
96 /*
97 * SPI slave device. We have one of these per slave.
98 */
99 struct spi_handle {
100 struct spi_softc *sh_sc;
101 struct spi_controller *sh_controller;
102 int sh_slave;
103 int sh_mode;
104 int sh_speed;
105 int sh_flags;
106 #define SPIH_ATTACHED 1
107 };
108
109 #define SPI_MAXDATA 4096
110
111 /*
112 * API for bus drivers.
113 */
114
115 int
116 spibus_print(void *aux, const char *pnp)
117 {
118
119 if (pnp != NULL)
120 aprint_normal("spi at %s", pnp);
121
122 return (UNCONF);
123 }
124
125
126 static int
127 spi_match(device_t parent, cfdata_t cf, void *aux)
128 {
129
130 return 1;
131 }
132
133 static int
134 spi_print(void *aux, const char *pnp)
135 {
136 struct spi_attach_args *sa = aux;
137
138 if (sa->sa_handle->sh_slave != -1)
139 aprint_normal(" slave %d", sa->sa_handle->sh_slave);
140
141 return (UNCONF);
142 }
143
144 static int
145 spi_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
146 {
147 struct spi_softc *sc = device_private(parent);
148 struct spi_attach_args sa;
149 int addr;
150
151 addr = cf->cf_loc[SPICF_SLAVE];
152 if ((addr < 0) || (addr >= sc->sc_controller.sct_nslaves)) {
153 return -1;
154 }
155
156 memset(&sa, 0, sizeof sa);
157 sa.sa_handle = &sc->sc_slaves[addr];
158 if (ISSET(sa.sa_handle->sh_flags, SPIH_ATTACHED))
159 return -1;
160
161 if (config_match(parent, cf, &sa) > 0) {
162 SET(sa.sa_handle->sh_flags, SPIH_ATTACHED);
163 config_attach(parent, cf, &sa, spi_print);
164 }
165
166 return 0;
167 }
168
169 /*
170 * XXX this is the same as i2c_fill_compat. It could be refactored into a
171 * common fill_compat function with pointers to compat & ncompat instead
172 * of attach_args as the first parameter.
173 */
174 static void
175 spi_fill_compat(struct spi_attach_args *sa, const char *compat, size_t len,
176 char **buffer)
177 {
178 int count, i;
179 const char *c, *start, **ptr;
180
181 *buffer = NULL;
182 for (i = count = 0, c = compat; i < len; i++, c++)
183 if (*c == 0)
184 count++;
185 count += 2;
186 ptr = malloc(sizeof(char*)*count, M_TEMP, M_WAITOK);
187 if (!ptr)
188 return;
189
190 for (i = count = 0, start = c = compat; i < len; i++, c++) {
191 if (*c == 0) {
192 ptr[count++] = start;
193 start = c + 1;
194 }
195 }
196 if (start < compat + len) {
197 /* last string not 0 terminated */
198 size_t l = c - start;
199 *buffer = malloc(l + 1, M_TEMP, M_WAITOK);
200 memcpy(*buffer, start, l);
201 (*buffer)[l] = 0;
202 ptr[count++] = *buffer;
203 }
204 ptr[count] = NULL;
205
206 sa->sa_compat = ptr;
207 sa->sa_ncompat = count;
208 }
209
210 static void
211 spi_direct_attach_child_devices(device_t parent, struct spi_softc *sc,
212 prop_array_t child_devices)
213 {
214 unsigned int count;
215 prop_dictionary_t child;
216 prop_data_t cdata;
217 uint32_t slave;
218 uint64_t cookie;
219 struct spi_attach_args sa;
220 int loc[SPICF_NLOCS];
221 char *buf;
222 int i;
223
224 memset(loc, 0, sizeof loc);
225 count = prop_array_count(child_devices);
226 for (i = 0; i < count; i++) {
227 child = prop_array_get(child_devices, i);
228 if (!child)
229 continue;
230 if (!prop_dictionary_get_uint32(child, "slave", &slave))
231 continue;
232 if(slave >= sc->sc_controller.sct_nslaves)
233 continue;
234 if (!prop_dictionary_get_uint64(child, "cookie", &cookie))
235 continue;
236 if (!(cdata = prop_dictionary_get(child, "compatible")))
237 continue;
238 loc[SPICF_SLAVE] = slave;
239
240 memset(&sa, 0, sizeof sa);
241 sa.sa_handle = &sc->sc_slaves[i];
242 sa.sa_prop = child;
243 sa.sa_cookie = cookie;
244 if (ISSET(sa.sa_handle->sh_flags, SPIH_ATTACHED))
245 continue;
246 SET(sa.sa_handle->sh_flags, SPIH_ATTACHED);
247
248 buf = NULL;
249 spi_fill_compat(&sa,
250 prop_data_value(cdata),
251 prop_data_size(cdata), &buf);
252 config_found(parent, &sa, spi_print,
253 CFARG_IATTR, "spi",
254 CFARG_LOCATORS, loc,
255 CFARG_EOL);
256
257 if (sa.sa_compat)
258 free(sa.sa_compat, M_TEMP);
259 if (buf)
260 free(buf, M_TEMP);
261 }
262 }
263
264 int
265 spi_compatible_match(const struct spi_attach_args *sa, const cfdata_t cf,
266 const struct device_compatible_entry *compats)
267 {
268 if (sa->sa_ncompat > 0)
269 return device_compatible_match(sa->sa_compat, sa->sa_ncompat,
270 compats);
271
272 return 1;
273 }
274
275 /*
276 * API for device drivers.
277 *
278 * We provide wrapper routines to decouple the ABI for the SPI
279 * device drivers from the ABI for the SPI bus drivers.
280 */
281 static void
282 spi_attach(device_t parent, device_t self, void *aux)
283 {
284 struct spi_softc *sc = device_private(self);
285 struct spibus_attach_args *sba = aux;
286 int i;
287
288 aprint_naive(": SPI bus\n");
289 aprint_normal(": SPI bus\n");
290
291 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
292 cv_init(&sc->sc_cv, "spictl");
293
294 sc->sc_controller = *sba->sba_controller;
295 sc->sc_nslaves = sba->sba_controller->sct_nslaves;
296 /* allocate slave structures */
297 sc->sc_slaves = malloc(sizeof (struct spi_handle) * sc->sc_nslaves,
298 M_DEVBUF, M_WAITOK | M_ZERO);
299
300 sc->sc_speed = 0;
301 sc->sc_mode = -1;
302 sc->sc_slave = -1;
303
304 /*
305 * Initialize slave handles
306 */
307 for (i = 0; i < sc->sc_nslaves; i++) {
308 sc->sc_slaves[i].sh_slave = i;
309 sc->sc_slaves[i].sh_sc = sc;
310 sc->sc_slaves[i].sh_controller = &sc->sc_controller;
311 }
312
313 /* First attach devices known to be present via fdt */
314 if (sba->sba_child_devices) {
315 spi_direct_attach_child_devices(self, sc, sba->sba_child_devices);
316 }
317 /* Then do any other devices the user may have manually wired */
318 config_search(self, NULL,
319 CFARG_SUBMATCH, spi_search,
320 CFARG_EOL);
321 }
322
323 static int
324 spi_open(dev_t dev, int flag, int fmt, lwp_t *l)
325 {
326 struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
327
328 if (sc == NULL)
329 return ENXIO;
330
331 return 0;
332 }
333
334 static int
335 spi_close(dev_t dev, int flag, int fmt, lwp_t *l)
336 {
337
338 return 0;
339 }
340
341 static int
342 spi_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
343 {
344 struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
345 struct spi_handle *sh;
346 spi_ioctl_configure_t *sic;
347 spi_ioctl_transfer_t *sit;
348 uint8_t *sbuf, *rbuf;
349 int error;
350
351 if (sc == NULL)
352 return ENXIO;
353
354 switch (cmd) {
355 case SPI_IOCTL_CONFIGURE:
356 sic = (spi_ioctl_configure_t *)data;
357 if (sic->sic_addr < 0 || sic->sic_addr >= sc->sc_nslaves) {
358 error = EINVAL;
359 break;
360 }
361 sh = &sc->sc_slaves[sic->sic_addr];
362 error = spi_configure(sh, sic->sic_mode, sic->sic_speed);
363 break;
364 case SPI_IOCTL_TRANSFER:
365 sit = (spi_ioctl_transfer_t *)data;
366 if (sit->sit_addr < 0 || sit->sit_addr >= sc->sc_nslaves) {
367 error = EINVAL;
368 break;
369 }
370 if ((sit->sit_send && sit->sit_sendlen == 0)
371 || (sit->sit_recv && sit->sit_recv == 0)) {
372 error = EINVAL;
373 break;
374 }
375 sh = &sc->sc_slaves[sit->sit_addr];
376 sbuf = rbuf = NULL;
377 error = 0;
378 if (sit->sit_send && sit->sit_sendlen <= SPI_MAXDATA) {
379 sbuf = malloc(sit->sit_sendlen, M_DEVBUF, M_WAITOK);
380 error = copyin(sit->sit_send, sbuf, sit->sit_sendlen);
381 }
382 if (sit->sit_recv && sit->sit_recvlen <= SPI_MAXDATA) {
383 rbuf = malloc(sit->sit_recvlen, M_DEVBUF, M_WAITOK);
384 }
385 if (error == 0) {
386 if (sbuf && rbuf)
387 error = spi_send_recv(sh,
388 sit->sit_sendlen, sbuf,
389 sit->sit_recvlen, rbuf);
390 else if (sbuf)
391 error = spi_send(sh,
392 sit->sit_sendlen, sbuf);
393 else if (rbuf)
394 error = spi_recv(sh,
395 sit->sit_recvlen, rbuf);
396 }
397 if (rbuf) {
398 if (error == 0)
399 error = copyout(rbuf, sit->sit_recv,
400 sit->sit_recvlen);
401 free(rbuf, M_DEVBUF);
402 }
403 if (sbuf) {
404 free(sbuf, M_DEVBUF);
405 }
406 break;
407 default:
408 error = ENODEV;
409 break;
410 }
411
412 return error;
413 }
414
415 CFATTACH_DECL_NEW(spi, sizeof(struct spi_softc),
416 spi_match, spi_attach, NULL, NULL);
417
418 /*
419 * Configure. This should be the first thing that the SPI driver
420 * should do, to configure which mode (e.g. SPI_MODE_0, which is the
421 * same as Philips Microwire mode), and speed. If the bus driver
422 * cannot run fast enough, then it should just configure the fastest
423 * mode that it can support. If the bus driver cannot run slow
424 * enough, then the device is incompatible and an error should be
425 * returned.
426 */
427 int
428 spi_configure(struct spi_handle *sh, int mode, int speed)
429 {
430
431 sh->sh_mode = mode;
432 sh->sh_speed = speed;
433 return 0;
434 }
435
436 /*
437 * Acquire controller
438 */
439 static void
440 spi_acquire(struct spi_handle *sh)
441 {
442 struct spi_softc *sc = sh->sh_sc;
443
444 mutex_enter(&sc->sc_lock);
445 while ((sc->sc_flags & SPIC_BUSY) != 0)
446 cv_wait(&sc->sc_cv, &sc->sc_lock);
447 sc->sc_flags |= SPIC_BUSY;
448 mutex_exit(&sc->sc_lock);
449 }
450
451 /*
452 * Release controller
453 */
454 static void
455 spi_release(struct spi_handle *sh)
456 {
457 struct spi_softc *sc = sh->sh_sc;
458
459 mutex_enter(&sc->sc_lock);
460 sc->sc_flags &= ~SPIC_BUSY;
461 cv_broadcast(&sc->sc_cv);
462 mutex_exit(&sc->sc_lock);
463 }
464
465 void
466 spi_transfer_init(struct spi_transfer *st)
467 {
468
469 mutex_init(&st->st_lock, MUTEX_DEFAULT, IPL_VM);
470 cv_init(&st->st_cv, "spixfr");
471
472 st->st_flags = 0;
473 st->st_errno = 0;
474 st->st_done = NULL;
475 st->st_chunks = NULL;
476 st->st_private = NULL;
477 st->st_slave = -1;
478 }
479
480 void
481 spi_chunk_init(struct spi_chunk *chunk, int cnt, const uint8_t *wptr,
482 uint8_t *rptr)
483 {
484
485 chunk->chunk_write = chunk->chunk_wptr = wptr;
486 chunk->chunk_read = chunk->chunk_rptr = rptr;
487 chunk->chunk_rresid = chunk->chunk_wresid = chunk->chunk_count = cnt;
488 chunk->chunk_next = NULL;
489 }
490
491 void
492 spi_transfer_add(struct spi_transfer *st, struct spi_chunk *chunk)
493 {
494 struct spi_chunk **cpp;
495
496 /* this is an O(n) insert -- perhaps we should use a simpleq? */
497 for (cpp = &st->st_chunks; *cpp; cpp = &(*cpp)->chunk_next);
498 *cpp = chunk;
499 }
500
501 int
502 spi_transfer(struct spi_handle *sh, struct spi_transfer *st)
503 {
504 struct spi_softc *sc = sh->sh_sc;
505 struct spi_controller *tag = sh->sh_controller;
506 struct spi_chunk *chunk;
507 int error;
508
509 /*
510 * Initialize "resid" counters and pointers, so that callers
511 * and bus drivers don't have to.
512 */
513 for (chunk = st->st_chunks; chunk; chunk = chunk->chunk_next) {
514 chunk->chunk_wresid = chunk->chunk_rresid = chunk->chunk_count;
515 chunk->chunk_wptr = chunk->chunk_write;
516 chunk->chunk_rptr = chunk->chunk_read;
517 }
518
519 /*
520 * Match slave and parameters to handle
521 */
522 st->st_slave = sh->sh_slave;
523
524 /*
525 * Reserve controller during transaction
526 */
527 spi_acquire(sh);
528
529 st->st_spiprivate = (void *)sh;
530
531 /*
532 * Reconfigure controller
533 *
534 * XXX backends don't configure per-slave parameters
535 * Whenever we switch slaves or change mode or speed, we
536 * need to tell the backend.
537 */
538 if (sc->sc_slave != sh->sh_slave
539 || sc->sc_mode != sh->sh_mode
540 || sc->sc_speed != sh->sh_speed) {
541 error = (*tag->sct_configure)(tag->sct_cookie,
542 sh->sh_slave, sh->sh_mode, sh->sh_speed);
543 if (error)
544 return error;
545 }
546 sc->sc_mode = sh->sh_mode;
547 sc->sc_speed = sh->sh_speed;
548 sc->sc_slave = sh->sh_slave;
549
550 error = (*tag->sct_transfer)(tag->sct_cookie, st);
551
552 return error;
553 }
554
555 void
556 spi_wait(struct spi_transfer *st)
557 {
558 struct spi_handle *sh = st->st_spiprivate;
559
560 mutex_enter(&st->st_lock);
561 while (!(st->st_flags & SPI_F_DONE)) {
562 cv_wait(&st->st_cv, &st->st_lock);
563 }
564 mutex_exit(&st->st_lock);
565 cv_destroy(&st->st_cv);
566 mutex_destroy(&st->st_lock);
567
568 /*
569 * End transaction
570 */
571 spi_release(sh);
572 }
573
574 void
575 spi_done(struct spi_transfer *st, int err)
576 {
577
578 mutex_enter(&st->st_lock);
579 if ((st->st_errno = err) != 0) {
580 st->st_flags |= SPI_F_ERROR;
581 }
582 st->st_flags |= SPI_F_DONE;
583 if (st->st_done != NULL) {
584 (*st->st_done)(st);
585 } else {
586 cv_broadcast(&st->st_cv);
587 }
588 mutex_exit(&st->st_lock);
589 }
590
591 /*
592 * Some convenience routines. These routines block until the work
593 * is done.
594 *
595 * spi_recv - receives data from the bus
596 *
597 * spi_send - sends data to the bus
598 *
599 * spi_send_recv - sends data to the bus, and then receives. Note that this is
600 * done synchronously, i.e. send a command and get the response. This is
601 * not full duplex. If you wnat full duplex, you can't use these convenience
602 * wrappers.
603 */
604 int
605 spi_recv(struct spi_handle *sh, int cnt, uint8_t *data)
606 {
607 struct spi_transfer trans;
608 struct spi_chunk chunk;
609
610 spi_transfer_init(&trans);
611 spi_chunk_init(&chunk, cnt, NULL, data);
612 spi_transfer_add(&trans, &chunk);
613
614 /* enqueue it and wait for it to complete */
615 spi_transfer(sh, &trans);
616 spi_wait(&trans);
617
618 if (trans.st_flags & SPI_F_ERROR)
619 return trans.st_errno;
620
621 return 0;
622 }
623
624 int
625 spi_send(struct spi_handle *sh, int cnt, const uint8_t *data)
626 {
627 struct spi_transfer trans;
628 struct spi_chunk chunk;
629
630 spi_transfer_init(&trans);
631 spi_chunk_init(&chunk, cnt, data, NULL);
632 spi_transfer_add(&trans, &chunk);
633
634 /* enqueue it and wait for it to complete */
635 spi_transfer(sh, &trans);
636 spi_wait(&trans);
637
638 if (trans.st_flags & SPI_F_ERROR)
639 return trans.st_errno;
640
641 return 0;
642 }
643
644 int
645 spi_send_recv(struct spi_handle *sh, int scnt, const uint8_t *snd,
646 int rcnt, uint8_t *rcv)
647 {
648 struct spi_transfer trans;
649 struct spi_chunk chunk1, chunk2;
650
651 spi_transfer_init(&trans);
652 spi_chunk_init(&chunk1, scnt, snd, NULL);
653 spi_chunk_init(&chunk2, rcnt, NULL, rcv);
654 spi_transfer_add(&trans, &chunk1);
655 spi_transfer_add(&trans, &chunk2);
656
657 /* enqueue it and wait for it to complete */
658 spi_transfer(sh, &trans);
659 spi_wait(&trans);
660
661 if (trans.st_flags & SPI_F_ERROR)
662 return trans.st_errno;
663
664 return 0;
665 }
666
667