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spi.c revision 1.18
      1 /* $NetBSD: spi.c,v 1.18 2021/05/16 08:48:20 mlelstv Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
      5  * Copyright (c) 2006 Garrett D'Amore.
      6  * All rights reserved.
      7  *
      8  * Portions of this code were written by Garrett D'Amore for the
      9  * Champaign-Urbana Community Wireless Network Project.
     10  *
     11  * Redistribution and use in source and binary forms, with or
     12  * without modification, are permitted provided that the following
     13  * conditions are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above
     17  *    copyright notice, this list of conditions and the following
     18  *    disclaimer in the documentation and/or other materials provided
     19  *    with the distribution.
     20  * 3. All advertising materials mentioning features or use of this
     21  *    software must display the following acknowledgements:
     22  *      This product includes software developed by the Urbana-Champaign
     23  *      Independent Media Center.
     24  *	This product includes software developed by Garrett D'Amore.
     25  * 4. Urbana-Champaign Independent Media Center's name and Garrett
     26  *    D'Amore's name may not be used to endorse or promote products
     27  *    derived from this software without specific prior written permission.
     28  *
     29  * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
     30  * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
     31  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     32  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
     34  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
     35  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     36  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     37  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     38  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     39  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     40  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     41  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     42  */
     43 
     44 #include <sys/cdefs.h>
     45 __KERNEL_RCSID(0, "$NetBSD: spi.c,v 1.18 2021/05/16 08:48:20 mlelstv Exp $");
     46 
     47 #include "locators.h"
     48 
     49 #include <sys/param.h>
     50 #include <sys/systm.h>
     51 #include <sys/device.h>
     52 #include <sys/conf.h>
     53 #include <sys/malloc.h>
     54 #include <sys/mutex.h>
     55 #include <sys/condvar.h>
     56 #include <sys/errno.h>
     57 
     58 #include <dev/spi/spivar.h>
     59 #include <dev/spi/spi_io.h>
     60 
     61 #include "ioconf.h"
     62 #include "locators.h"
     63 
     64 struct spi_softc {
     65 	struct spi_controller	sc_controller;
     66 	int			sc_mode;
     67 	int			sc_speed;
     68 	int			sc_slave;
     69 	int			sc_nslaves;
     70 	struct spi_handle	*sc_slaves;
     71 	kmutex_t		sc_lock;
     72 	kcondvar_t		sc_cv;
     73 	kmutex_t		sc_dev_lock;
     74 	int			sc_flags;
     75 #define SPIC_BUSY		1
     76 };
     77 
     78 static dev_type_open(spi_open);
     79 static dev_type_close(spi_close);
     80 static dev_type_ioctl(spi_ioctl);
     81 
     82 const struct cdevsw spi_cdevsw = {
     83 	.d_open = spi_open,
     84 	.d_close = spi_close,
     85 	.d_read = noread,
     86 	.d_write = nowrite,
     87 	.d_ioctl = spi_ioctl,
     88 	.d_stop = nostop,
     89 	.d_tty = notty,
     90 	.d_poll = nopoll,
     91 	.d_mmap = nommap,
     92 	.d_kqfilter = nokqfilter,
     93 	.d_discard = nodiscard,
     94 	.d_flag = D_OTHER | D_MPSAFE
     95 };
     96 
     97 /*
     98  * SPI slave device.  We have one of these per slave.
     99  */
    100 struct spi_handle {
    101 	struct spi_softc	*sh_sc;
    102 	struct spi_controller	*sh_controller;
    103 	int			sh_slave;
    104 	int			sh_mode;
    105 	int			sh_speed;
    106 	int			sh_flags;
    107 #define SPIH_ATTACHED		1
    108 };
    109 
    110 #define SPI_MAXDATA 4096
    111 
    112 /*
    113  * API for bus drivers.
    114  */
    115 
    116 int
    117 spibus_print(void *aux, const char *pnp)
    118 {
    119 
    120 	if (pnp != NULL)
    121 		aprint_normal("spi at %s", pnp);
    122 
    123 	return (UNCONF);
    124 }
    125 
    126 
    127 static int
    128 spi_match(device_t parent, cfdata_t cf, void *aux)
    129 {
    130 
    131 	return 1;
    132 }
    133 
    134 static int
    135 spi_print(void *aux, const char *pnp)
    136 {
    137 	struct spi_attach_args *sa = aux;
    138 
    139 	if (sa->sa_handle->sh_slave != -1)
    140 		aprint_normal(" slave %d", sa->sa_handle->sh_slave);
    141 
    142 	return (UNCONF);
    143 }
    144 
    145 static int
    146 spi_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
    147 {
    148 	struct spi_softc *sc = device_private(parent);
    149 	struct spi_attach_args sa;
    150 	int addr;
    151 
    152 	addr = cf->cf_loc[SPICF_SLAVE];
    153 	if ((addr < 0) || (addr >= sc->sc_controller.sct_nslaves)) {
    154 		return -1;
    155 	}
    156 
    157 	memset(&sa, 0, sizeof sa);
    158 	sa.sa_handle = &sc->sc_slaves[addr];
    159 	if (ISSET(sa.sa_handle->sh_flags, SPIH_ATTACHED))
    160 		return -1;
    161 
    162 	if (config_probe(parent, cf, &sa)) {
    163 		SET(sa.sa_handle->sh_flags, SPIH_ATTACHED);
    164 		config_attach(parent, cf, &sa, spi_print, CFARG_EOL);
    165 	}
    166 
    167 	return 0;
    168 }
    169 
    170 /*
    171  * XXX this is the same as i2c_fill_compat. It could be refactored into a
    172  * common fill_compat function with pointers to compat & ncompat instead
    173  * of attach_args as the first parameter.
    174  */
    175 static void
    176 spi_fill_compat(struct spi_attach_args *sa, const char *compat, size_t len,
    177 	char **buffer)
    178 {
    179 	int count, i;
    180 	const char *c, *start, **ptr;
    181 
    182 	*buffer = NULL;
    183 	for (i = count = 0, c = compat; i < len; i++, c++)
    184 		if (*c == 0)
    185 			count++;
    186 	count += 2;
    187 	ptr = malloc(sizeof(char*)*count, M_TEMP, M_WAITOK);
    188 	if (!ptr)
    189 		return;
    190 
    191 	for (i = count = 0, start = c = compat; i < len; i++, c++) {
    192 		if (*c == 0) {
    193 			ptr[count++] = start;
    194 			start = c + 1;
    195 		}
    196 	}
    197 	if (start < compat + len) {
    198 		/* last string not 0 terminated */
    199 		size_t l = c - start;
    200 		*buffer = malloc(l + 1, M_TEMP, M_WAITOK);
    201 		memcpy(*buffer, start, l);
    202 		(*buffer)[l] = 0;
    203 		ptr[count++] = *buffer;
    204 	}
    205 	ptr[count] = NULL;
    206 
    207 	sa->sa_compat = ptr;
    208 	sa->sa_ncompat = count;
    209 }
    210 
    211 static void
    212 spi_direct_attach_child_devices(device_t parent, struct spi_softc *sc,
    213     prop_array_t child_devices)
    214 {
    215 	unsigned int count;
    216 	prop_dictionary_t child;
    217 	prop_data_t cdata;
    218 	uint32_t slave;
    219 	uint64_t cookie;
    220 	struct spi_attach_args sa;
    221 	int loc[SPICF_NLOCS];
    222 	char *buf;
    223 	int i;
    224 
    225 	memset(loc, 0, sizeof loc);
    226 	count = prop_array_count(child_devices);
    227 	for (i = 0; i < count; i++) {
    228 		child = prop_array_get(child_devices, i);
    229 		if (!child)
    230 			continue;
    231 		if (!prop_dictionary_get_uint32(child, "slave", &slave))
    232 			continue;
    233 		if(slave >= sc->sc_controller.sct_nslaves)
    234 			continue;
    235 		if (!prop_dictionary_get_uint64(child, "cookie", &cookie))
    236 			continue;
    237 		if (!(cdata = prop_dictionary_get(child, "compatible")))
    238 			continue;
    239 		loc[SPICF_SLAVE] = slave;
    240 
    241 		memset(&sa, 0, sizeof sa);
    242 		sa.sa_handle = &sc->sc_slaves[i];
    243 		sa.sa_prop = child;
    244 		sa.sa_cookie = cookie;
    245 		if (ISSET(sa.sa_handle->sh_flags, SPIH_ATTACHED))
    246 			continue;
    247 		SET(sa.sa_handle->sh_flags, SPIH_ATTACHED);
    248 
    249 		buf = NULL;
    250 		spi_fill_compat(&sa,
    251 				prop_data_value(cdata),
    252 				prop_data_size(cdata), &buf);
    253 		config_found(parent, &sa, spi_print,
    254 		    CFARG_LOCATORS, loc,
    255 		    CFARG_EOL);
    256 
    257 		if (sa.sa_compat)
    258 			free(sa.sa_compat, M_TEMP);
    259 		if (buf)
    260 			free(buf, M_TEMP);
    261 	}
    262 }
    263 
    264 int
    265 spi_compatible_match(const struct spi_attach_args *sa, const cfdata_t cf,
    266 		     const struct device_compatible_entry *compats)
    267 {
    268 	if (sa->sa_ncompat > 0)
    269 		return device_compatible_match(sa->sa_compat, sa->sa_ncompat,
    270 					       compats);
    271 
    272 	return 1;
    273 }
    274 
    275 /*
    276  * API for device drivers.
    277  *
    278  * We provide wrapper routines to decouple the ABI for the SPI
    279  * device drivers from the ABI for the SPI bus drivers.
    280  */
    281 static void
    282 spi_attach(device_t parent, device_t self, void *aux)
    283 {
    284 	struct spi_softc *sc = device_private(self);
    285 	struct spibus_attach_args *sba = aux;
    286 	int i;
    287 
    288 	aprint_naive(": SPI bus\n");
    289 	aprint_normal(": SPI bus\n");
    290 
    291 	mutex_init(&sc->sc_dev_lock, MUTEX_DEFAULT, IPL_NONE);
    292 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
    293 	cv_init(&sc->sc_cv, "spictl");
    294 
    295 	sc->sc_controller = *sba->sba_controller;
    296 	sc->sc_nslaves = sba->sba_controller->sct_nslaves;
    297 	/* allocate slave structures */
    298 	sc->sc_slaves = malloc(sizeof (struct spi_handle) * sc->sc_nslaves,
    299 	    M_DEVBUF, M_WAITOK | M_ZERO);
    300 
    301 	sc->sc_speed = 0;
    302 	sc->sc_mode = -1;
    303 	sc->sc_slave = -1;
    304 
    305 	/*
    306 	 * Initialize slave handles
    307 	 */
    308 	for (i = 0; i < sc->sc_nslaves; i++) {
    309 		sc->sc_slaves[i].sh_slave = i;
    310 		sc->sc_slaves[i].sh_sc = sc;
    311 		sc->sc_slaves[i].sh_controller = &sc->sc_controller;
    312 	}
    313 
    314 	/* First attach devices known to be present via fdt */
    315 	if (sba->sba_child_devices) {
    316 		spi_direct_attach_child_devices(self, sc, sba->sba_child_devices);
    317 	}
    318 	/* Then do any other devices the user may have manually wired */
    319 	config_search(self, NULL,
    320 	    CFARG_SEARCH, spi_search,
    321 	    CFARG_EOL);
    322 }
    323 
    324 static int
    325 spi_open(dev_t dev, int flag, int fmt, lwp_t *l)
    326 {
    327 	struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
    328 
    329 	if (sc == NULL)
    330 		return ENXIO;
    331 
    332 	return 0;
    333 }
    334 
    335 static int
    336 spi_close(dev_t dev, int flag, int fmt, lwp_t *l)
    337 {
    338 
    339 	return 0;
    340 }
    341 
    342 static int
    343 spi_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
    344 {
    345 	struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
    346 	struct spi_handle *sh;
    347 	spi_ioctl_configure_t *sic;
    348 	spi_ioctl_transfer_t *sit;
    349 	uint8_t *sbuf, *rbuf;
    350 	int error;
    351 
    352 	if (sc == NULL)
    353 		return ENXIO;
    354 
    355 	mutex_enter(&sc->sc_dev_lock);
    356 
    357 	switch (cmd) {
    358 	case SPI_IOCTL_CONFIGURE:
    359 		sic = (spi_ioctl_configure_t *)data;
    360 		if (sic->sic_addr < 0 || sic->sic_addr >= sc->sc_nslaves) {
    361 			error = EINVAL;
    362 			break;
    363 		}
    364 		sh = &sc->sc_slaves[sic->sic_addr];
    365 		error = spi_configure(sh, sic->sic_mode, sic->sic_speed);
    366 		break;
    367 	case SPI_IOCTL_TRANSFER:
    368 		sit = (spi_ioctl_transfer_t *)data;
    369 		if (sit->sit_addr < 0 || sit->sit_addr >= sc->sc_nslaves) {
    370 			error = EINVAL;
    371 			break;
    372 		}
    373 		if ((sit->sit_send && sit->sit_sendlen == 0)
    374 		    || (sit->sit_recv && sit->sit_recv == 0)) {
    375 			error = EINVAL;
    376 			break;
    377 		}
    378 		sh = &sc->sc_slaves[sit->sit_addr];
    379 		sbuf = rbuf = NULL;
    380 		error = 0;
    381 		if (sit->sit_send && sit->sit_sendlen <= SPI_MAXDATA) {
    382 			sbuf = malloc(sit->sit_sendlen, M_DEVBUF, M_WAITOK);
    383 			error = copyin(sit->sit_send, sbuf, sit->sit_sendlen);
    384 		}
    385 		if (sit->sit_recv && sit->sit_recvlen <= SPI_MAXDATA) {
    386 			rbuf = malloc(sit->sit_recvlen, M_DEVBUF, M_WAITOK);
    387 		}
    388 		if (error == 0) {
    389 			if (sbuf && rbuf)
    390 				error = spi_send_recv(sh,
    391 					sit->sit_sendlen, sbuf,
    392 					sit->sit_recvlen, rbuf);
    393 			else if (sbuf)
    394 				error = spi_send(sh,
    395 					sit->sit_sendlen, sbuf);
    396 			else if (rbuf)
    397 				error = spi_recv(sh,
    398 					sit->sit_recvlen, rbuf);
    399 		}
    400 		if (rbuf) {
    401 			if (error == 0)
    402 				error = copyout(rbuf, sit->sit_recv,
    403 						sit->sit_recvlen);
    404 			free(rbuf, M_DEVBUF);
    405 		}
    406 		if (sbuf) {
    407 			free(sbuf, M_DEVBUF);
    408 		}
    409 		break;
    410 	default:
    411 		error = ENODEV;
    412 		break;
    413 	}
    414 
    415 	mutex_exit(&sc->sc_dev_lock);
    416 
    417 	return error;
    418 }
    419 
    420 CFATTACH_DECL_NEW(spi, sizeof(struct spi_softc),
    421     spi_match, spi_attach, NULL, NULL);
    422 
    423 /*
    424  * Configure.  This should be the first thing that the SPI driver
    425  * should do, to configure which mode (e.g. SPI_MODE_0, which is the
    426  * same as Philips Microwire mode), and speed.  If the bus driver
    427  * cannot run fast enough, then it should just configure the fastest
    428  * mode that it can support.  If the bus driver cannot run slow
    429  * enough, then the device is incompatible and an error should be
    430  * returned.
    431  */
    432 int
    433 spi_configure(struct spi_handle *sh, int mode, int speed)
    434 {
    435 
    436 	sh->sh_mode = mode;
    437 	sh->sh_speed = speed;
    438 	return 0;
    439 }
    440 
    441 /*
    442  * Acquire controller
    443  */
    444 static void
    445 spi_acquire(struct spi_handle *sh)
    446 {
    447 	struct spi_softc *sc = sh->sh_sc;
    448 
    449 	mutex_enter(&sc->sc_lock);
    450 	while ((sc->sc_flags & SPIC_BUSY) != 0)
    451 		cv_wait(&sc->sc_cv, &sc->sc_lock);
    452 	sc->sc_flags |= SPIC_BUSY;
    453 	mutex_exit(&sc->sc_lock);
    454 }
    455 
    456 /*
    457  * Release controller
    458  */
    459 static void
    460 spi_release(struct spi_handle *sh)
    461 {
    462 	struct spi_softc *sc = sh->sh_sc;
    463 
    464 	mutex_enter(&sc->sc_lock);
    465 	sc->sc_flags &= ~SPIC_BUSY;
    466 	cv_broadcast(&sc->sc_cv);
    467 	mutex_exit(&sc->sc_lock);
    468 }
    469 
    470 void
    471 spi_transfer_init(struct spi_transfer *st)
    472 {
    473 
    474 	mutex_init(&st->st_lock, MUTEX_DEFAULT, IPL_VM);
    475 	cv_init(&st->st_cv, "spixfr");
    476 
    477 	st->st_flags = 0;
    478 	st->st_errno = 0;
    479 	st->st_done = NULL;
    480 	st->st_chunks = NULL;
    481 	st->st_private = NULL;
    482 	st->st_slave = -1;
    483 }
    484 
    485 void
    486 spi_chunk_init(struct spi_chunk *chunk, int cnt, const uint8_t *wptr,
    487     uint8_t *rptr)
    488 {
    489 
    490 	chunk->chunk_write = chunk->chunk_wptr = wptr;
    491 	chunk->chunk_read = chunk->chunk_rptr = rptr;
    492 	chunk->chunk_rresid = chunk->chunk_wresid = chunk->chunk_count = cnt;
    493 	chunk->chunk_next = NULL;
    494 }
    495 
    496 void
    497 spi_transfer_add(struct spi_transfer *st, struct spi_chunk *chunk)
    498 {
    499 	struct spi_chunk **cpp;
    500 
    501 	/* this is an O(n) insert -- perhaps we should use a simpleq? */
    502 	for (cpp = &st->st_chunks; *cpp; cpp = &(*cpp)->chunk_next);
    503 	*cpp = chunk;
    504 }
    505 
    506 int
    507 spi_transfer(struct spi_handle *sh, struct spi_transfer *st)
    508 {
    509 	struct spi_softc	*sc = sh->sh_sc;
    510 	struct spi_controller	*tag = sh->sh_controller;
    511 	struct spi_chunk	*chunk;
    512 	int error;
    513 
    514 	/*
    515 	 * Initialize "resid" counters and pointers, so that callers
    516 	 * and bus drivers don't have to.
    517 	 */
    518 	for (chunk = st->st_chunks; chunk; chunk = chunk->chunk_next) {
    519 		chunk->chunk_wresid = chunk->chunk_rresid = chunk->chunk_count;
    520 		chunk->chunk_wptr = chunk->chunk_write;
    521 		chunk->chunk_rptr = chunk->chunk_read;
    522 	}
    523 
    524 	/*
    525 	 * Match slave and parameters to handle
    526 	 */
    527 	st->st_slave = sh->sh_slave;
    528 
    529 	/*
    530 	 * Reserve controller during transaction
    531  	 */
    532 	spi_acquire(sh);
    533 
    534 	st->st_spiprivate = (void *)sh;
    535 
    536 	/*
    537 	 * Reconfigure controller
    538 	 *
    539 	 * XXX backends don't configure per-slave parameters
    540 	 * Whenever we switch slaves or change mode or speed, we
    541 	 * need to tell the backend.
    542 	 */
    543 	if (sc->sc_slave != sh->sh_slave
    544 	    || sc->sc_mode != sh->sh_mode
    545 	    || sc->sc_speed != sh->sh_speed) {
    546 		error = (*tag->sct_configure)(tag->sct_cookie,
    547 				sh->sh_slave, sh->sh_mode, sh->sh_speed);
    548 		if (error)
    549 			return error;
    550 	}
    551 	sc->sc_mode = sh->sh_mode;
    552 	sc->sc_speed = sh->sh_speed;
    553 	sc->sc_slave = sh->sh_slave;
    554 
    555 	error = (*tag->sct_transfer)(tag->sct_cookie, st);
    556 
    557 	return error;
    558 }
    559 
    560 void
    561 spi_wait(struct spi_transfer *st)
    562 {
    563 	struct spi_handle *sh = st->st_spiprivate;
    564 
    565 	mutex_enter(&st->st_lock);
    566 	while (!(st->st_flags & SPI_F_DONE)) {
    567 		cv_wait(&st->st_cv, &st->st_lock);
    568 	}
    569 	mutex_exit(&st->st_lock);
    570 	cv_destroy(&st->st_cv);
    571 	mutex_destroy(&st->st_lock);
    572 
    573 	/*
    574 	 * End transaction
    575 	 */
    576 	spi_release(sh);
    577 }
    578 
    579 void
    580 spi_done(struct spi_transfer *st, int err)
    581 {
    582 
    583 	mutex_enter(&st->st_lock);
    584 	if ((st->st_errno = err) != 0) {
    585 		st->st_flags |= SPI_F_ERROR;
    586 	}
    587 	st->st_flags |= SPI_F_DONE;
    588 	if (st->st_done != NULL) {
    589 		(*st->st_done)(st);
    590 	} else {
    591 		cv_broadcast(&st->st_cv);
    592 	}
    593 	mutex_exit(&st->st_lock);
    594 }
    595 
    596 /*
    597  * Some convenience routines.  These routines block until the work
    598  * is done.
    599  *
    600  * spi_recv - receives data from the bus
    601  *
    602  * spi_send - sends data to the bus
    603  *
    604  * spi_send_recv - sends data to the bus, and then receives.  Note that this is
    605  * done synchronously, i.e. send a command and get the response.  This is
    606  * not full duplex.  If you wnat full duplex, you can't use these convenience
    607  * wrappers.
    608  */
    609 int
    610 spi_recv(struct spi_handle *sh, int cnt, uint8_t *data)
    611 {
    612 	struct spi_transfer	trans;
    613 	struct spi_chunk	chunk;
    614 
    615 	spi_transfer_init(&trans);
    616 	spi_chunk_init(&chunk, cnt, NULL, data);
    617 	spi_transfer_add(&trans, &chunk);
    618 
    619 	/* enqueue it and wait for it to complete */
    620 	spi_transfer(sh, &trans);
    621 	spi_wait(&trans);
    622 
    623 	if (trans.st_flags & SPI_F_ERROR)
    624 		return trans.st_errno;
    625 
    626 	return 0;
    627 }
    628 
    629 int
    630 spi_send(struct spi_handle *sh, int cnt, const uint8_t *data)
    631 {
    632 	struct spi_transfer	trans;
    633 	struct spi_chunk	chunk;
    634 
    635 	spi_transfer_init(&trans);
    636 	spi_chunk_init(&chunk, cnt, data, NULL);
    637 	spi_transfer_add(&trans, &chunk);
    638 
    639 	/* enqueue it and wait for it to complete */
    640 	spi_transfer(sh, &trans);
    641 	spi_wait(&trans);
    642 
    643 	if (trans.st_flags & SPI_F_ERROR)
    644 		return trans.st_errno;
    645 
    646 	return 0;
    647 }
    648 
    649 int
    650 spi_send_recv(struct spi_handle *sh, int scnt, const uint8_t *snd,
    651     int rcnt, uint8_t *rcv)
    652 {
    653 	struct spi_transfer	trans;
    654 	struct spi_chunk	chunk1, chunk2;
    655 
    656 	spi_transfer_init(&trans);
    657 	spi_chunk_init(&chunk1, scnt, snd, NULL);
    658 	spi_chunk_init(&chunk2, rcnt, NULL, rcv);
    659 	spi_transfer_add(&trans, &chunk1);
    660 	spi_transfer_add(&trans, &chunk2);
    661 
    662 	/* enqueue it and wait for it to complete */
    663 	spi_transfer(sh, &trans);
    664 	spi_wait(&trans);
    665 
    666 	if (trans.st_flags & SPI_F_ERROR)
    667 		return trans.st_errno;
    668 
    669 	return 0;
    670 }
    671 
    672