spiflash.h revision 1.3.62.1 1 1.3.62.1 jym /* $NetBSD: spiflash.h,v 1.3.62.1 2009/05/13 17:21:29 jym Exp $ */
2 1.1 gdamore
3 1.1 gdamore /*-
4 1.1 gdamore * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
5 1.1 gdamore * Copyright (c) 2006 Garrett D'Amore.
6 1.1 gdamore * All rights reserved.
7 1.1 gdamore *
8 1.1 gdamore * Portions of this code were written by Garrett D'Amore for the
9 1.1 gdamore * Champaign-Urbana Community Wireless Network Project.
10 1.1 gdamore *
11 1.1 gdamore * Redistribution and use in source and binary forms, with or
12 1.1 gdamore * without modification, are permitted provided that the following
13 1.1 gdamore * conditions are met:
14 1.1 gdamore * 1. Redistributions of source code must retain the above copyright
15 1.1 gdamore * notice, this list of conditions and the following disclaimer.
16 1.1 gdamore * 2. Redistributions in binary form must reproduce the above
17 1.1 gdamore * copyright notice, this list of conditions and the following
18 1.1 gdamore * disclaimer in the documentation and/or other materials provided
19 1.1 gdamore * with the distribution.
20 1.1 gdamore * 3. All advertising materials mentioning features or use of this
21 1.1 gdamore * software must display the following acknowledgements:
22 1.1 gdamore * This product includes software developed by the Urbana-Champaign
23 1.1 gdamore * Independent Media Center.
24 1.1 gdamore * This product includes software developed by Garrett D'Amore.
25 1.1 gdamore * 4. Urbana-Champaign Independent Media Center's name and Garrett
26 1.1 gdamore * D'Amore's name may not be used to endorse or promote products
27 1.1 gdamore * derived from this software without specific prior written permission.
28 1.1 gdamore *
29 1.1 gdamore * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
30 1.1 gdamore * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
31 1.1 gdamore * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 1.1 gdamore * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 1.1 gdamore * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
34 1.1 gdamore * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
35 1.1 gdamore * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
36 1.1 gdamore * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 1.1 gdamore * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38 1.1 gdamore * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 1.1 gdamore * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 1.1 gdamore * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
41 1.1 gdamore * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 1.1 gdamore */
43 1.1 gdamore
44 1.1 gdamore #ifndef _DEV_SPI_SPIFLASH_H_
45 1.1 gdamore #define _DEV_SPI_SPIFLASH_H_
46 1.1 gdamore
47 1.1 gdamore #define SPIFLASH_CMD_RDSR 0x05 /* read status register */
48 1.1 gdamore #define SPIFLASH_CMD_WRSR 0x01 /* write status register */
49 1.1 gdamore #define SPIFLASH_CMD_WREN 0x06 /* enable WRSR */
50 1.1 gdamore #define SPIFLASH_CMD_WRDI 0x04 /* disable WRSR */
51 1.1 gdamore
52 1.1 gdamore /*
53 1.1 gdamore * Different chips offer different ways to read a device ID, although
54 1.1 gdamore * newer parts should all offer the standard JEDEC variant.
55 1.1 gdamore * Additionally, many parts have a faster read, though how to make use
56 1.1 gdamore * of this sometimes requires special hacks. E.g. some parts use an
57 1.1 gdamore * extra data pin, and some crank the clock rate up.
58 1.1 gdamore */
59 1.1 gdamore #define SPIFLASH_CMD_READ 0x03 /* read data (normal) */
60 1.1 gdamore #define SPIFLASH_CMD_RDID 0xab /* read id */
61 1.1 gdamore #define SPIFLASH_CMD_RDID2 0x90 /* read id (alternate) */
62 1.1 gdamore #define SPIFLASH_CMD_RDJI 0x9f /* read JEDEC id */
63 1.1 gdamore #define SPIFLASH_CMD_READFAST 0x0b /* fast read */
64 1.1 gdamore
65 1.1 gdamore /*
66 1.1 gdamore * Different chips offer different variations on the sector erase.
67 1.1 gdamore * E.g. SST parts offer 4k, 32k, and 64k erase sizes on the same part,
68 1.1 gdamore * with just different cmds. However, at least SST, AMD, and Winbond
69 1.1 gdamore * all offer at least the main (0xd8) variant.
70 1.1 gdamore */
71 1.1 gdamore #define SPIFLASH_CMD_ERASE 0xd8 /* sector erase */
72 1.1 gdamore #define SPIFLASH_CMD_ERASE2 0x52 /* sector erase (alternate) */
73 1.1 gdamore #define SPIFLASH_CMD_ERASE3 0x20 /* sector erase (alternate) */
74 1.1 gdamore #define SPIFLASH_CMD_ERASE4 0x81 /* page erase */
75 1.1 gdamore #define SPIFLASH_CMD_CHIPERASE 0xc7 /* chip erase */
76 1.1 gdamore
77 1.1 gdamore /*
78 1.1 gdamore * Some parts can stream bytes with the program command, whereas others require
79 1.3 wiz * a separate command sequence for each byte.
80 1.1 gdamore */
81 1.1 gdamore #define SPIFLASH_CMD_PROGRAM 0x02 /* page or byte program */
82 1.1 gdamore #define SPIFLASH_CMD_PROGRAM_AA 0xad /* program (autoincrement) */
83 1.1 gdamore
84 1.1 gdamore /*
85 1.1 gdamore * Some additional commands. Again, mostly device specific.
86 1.1 gdamore */
87 1.1 gdamore #define SPIFLASH_CMD_EBSY 0x70 /* output busy signal (SST) */
88 1.1 gdamore #define SPIFLASH_CMD_DBSY 0x80 /* disable busy signal (SST) */
89 1.1 gdamore
90 1.1 gdamore /*
91 1.1 gdamore * Status register bits. Not all devices implement all bits. In
92 1.1 gdamore * addition, the meanings of the BP bits seem to vary from device to
93 1.1 gdamore * device.
94 1.1 gdamore */
95 1.1 gdamore #define SPIFLASH_SR_BUSY 0x01 /* program in progress */
96 1.1 gdamore #define SPIFLASH_SR_WEL 0x02 /* write enable latch */
97 1.1 gdamore #define SPIFLASH_SR_BP0 0x04 /* block protect bits */
98 1.1 gdamore #define SPIFLASH_SR_BP1 0x08
99 1.1 gdamore #define SPIFLASH_SR_BP2 0x10
100 1.1 gdamore #define SPIFLASH_SR_BP3 0x20
101 1.1 gdamore #define SPIFLASH_SR_AAI 0x40 /* auto-increment mode */
102 1.1 gdamore #define SPIFLASH_SR_SRP 0x80 /* SR write protected */
103 1.1 gdamore
104 1.1 gdamore /*
105 1.2 christos * This needs to change to accommodate boot-sectored devices.
106 1.1 gdamore */
107 1.1 gdamore
108 1.1 gdamore typedef struct spiflash_softc *spiflash_handle_t;
109 1.1 gdamore
110 1.1 gdamore struct spiflash_hw_if {
111 1.1 gdamore /*
112 1.1 gdamore * Driver MUST provide these.
113 1.1 gdamore */
114 1.1 gdamore const char *(*sf_getname)(void *);
115 1.1 gdamore struct spi_handle *(*sf_gethandle)(void *);
116 1.1 gdamore int (*sf_getflags)(void *);
117 1.1 gdamore int (*sf_getsize)(void *, int);
118 1.1 gdamore
119 1.1 gdamore /*
120 1.1 gdamore * SPI framework will provide these if the driver does not.
121 1.1 gdamore */
122 1.1 gdamore int (*sf_erase)(spiflash_handle_t, size_t, size_t);
123 1.1 gdamore int (*sf_write)(spiflash_handle_t, size_t, size_t,
124 1.1 gdamore const uint8_t *);
125 1.1 gdamore int (*sf_read)(spiflash_handle_t, size_t, size_t, uint8_t *);
126 1.1 gdamore /*
127 1.1 gdamore * Not implemented yet.
128 1.1 gdamore */
129 1.1 gdamore int (*sf_getstatus)(spiflash_handle_t, int, int);
130 1.1 gdamore int (*sf_setstatus)(spiflash_handle_t, int, int, int);
131 1.1 gdamore };
132 1.1 gdamore
133 1.1 gdamore #define SPIFLASH_SIZE_DEVICE 0
134 1.1 gdamore #define SPIFLASH_SIZE_ERASE 1
135 1.1 gdamore #define SPIFLASH_SIZE_WRITE 2 /* return -1 for unlimited */
136 1.1 gdamore #define SPIFLASH_SIZE_READ 3 /* return -1 for unlimited */
137 1.1 gdamore #define SPIFLASH_SIZE_COUNT 4
138 1.1 gdamore
139 1.1 gdamore #define SPIFLASH_FLAG_FAST_READ 0x0004 /* use fast read sequence */
140 1.1 gdamore
141 1.1 gdamore spiflash_handle_t spiflash_attach_mi(const struct spiflash_hw_if *, void *,
142 1.3.62.1 jym device_t);
143 1.1 gdamore void spiflash_set_private(spiflash_handle_t, void *);
144 1.1 gdamore void *spiflash_get_private(spiflash_handle_t);
145 1.1 gdamore int spiflash_read_status(spiflash_handle_t, uint8_t *);
146 1.1 gdamore int spiflash_write_disable(spiflash_handle_t);
147 1.1 gdamore int spiflash_write_enable(spiflash_handle_t);
148 1.1 gdamore int spiflash_cmd(spiflash_handle_t, uint8_t, size_t, uint32_t, size_t,
149 1.1 gdamore const uint8_t *, uint8_t *);
150 1.1 gdamore int spiflash_wait(spiflash_handle_t, int);
151 1.1 gdamore
152 1.1 gdamore
153 1.1 gdamore #endif /* _DEV_SPI_SPIFLASH_H_ */
154