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spivar.h revision 1.17
      1 /* $NetBSD: spivar.h,v 1.17 2025/09/10 02:06:26 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
      5  * Copyright (c) 2006 Garrett D'Amore.
      6  * All rights reserved.
      7  *
      8  * Portions of this code were written by Garrett D'Amore for the
      9  * Champaign-Urbana Community Wireless Network Project.
     10  *
     11  * Redistribution and use in source and binary forms, with or
     12  * without modification, are permitted provided that the following
     13  * conditions are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above
     17  *    copyright notice, this list of conditions and the following
     18  *    disclaimer in the documentation and/or other materials provided
     19  *    with the distribution.
     20  * 3. All advertising materials mentioning features or use of this
     21  *    software must display the following acknowledgements:
     22  *      This product includes software developed by the Urbana-Champaign
     23  *      Independent Media Center.
     24  *	This product includes software developed by Garrett D'Amore.
     25  * 4. Urbana-Champaign Independent Media Center's name and Garrett
     26  *    D'Amore's name may not be used to endorse or promote products
     27  *    derived from this software without specific prior written permission.
     28  *
     29  * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
     30  * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
     31  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     32  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
     34  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
     35  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     36  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     37  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     38  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     39  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     40  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     41  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     42  */
     43 
     44 #ifndef	_DEV_SPI_SPIVAR_H_
     45 #define	_DEV_SPI_SPIVAR_H_
     46 
     47 #include <sys/queue.h>
     48 
     49 /*
     50  * Serial Peripheral Interface bus.  This is a 4-wire bus common for
     51  * connecting flash, clocks, sensors, and various other low-speed
     52  * peripherals.
     53  */
     54 
     55 struct spi_handle;
     56 struct spi_transfer;
     57 
     58 #define	SPI_MODE_CPHA	__BIT(0)
     59 #define	SPI_MODE_CPOL	__BIT(1)
     60 
     61 /*
     62  * De facto standard latching modes.
     63  */
     64 #define	SPI_MODE_0	0
     65 #define	SPI_MODE_1	SPI_MODE_CPHA
     66 #define	SPI_MODE_2	SPI_MODE_CPOL
     67 #define	SPI_MODE_3	(SPI_MODE_CPHA | SPI_MODE_CPOL)
     68 
     69 /* Philips' Microwire is just Mode 0 */
     70 #define	SPI_MODE_MICROWIRE	SPI_MODE_0
     71 
     72 /* SPI transfer speed helper macros -- converts to Hz for spi_configure(). */
     73 #define	SPI_FREQ_kHz(x)	((x) * 1000)
     74 #define	SPI_FREQ_MHz(x)	((x) * 1000000)
     75 
     76 struct spi_controller {
     77 	void	*sct_cookie;	/* controller private data */
     78 	int	sct_nslaves;
     79 	int	(*sct_configure)(void *, int, int, int);
     80 	int	(*sct_transfer)(void *, struct spi_transfer *);
     81 };
     82 
     83 int	spibus_print(void *, const char *);
     84 
     85 /* one per chip select */
     86 struct spibus_attach_args {
     87 	struct spi_controller	*sba_controller;
     88 	prop_array_t		sba_child_devices;
     89 };
     90 
     91 struct spi_attach_args {
     92 	struct spi_handle	*sa_handle;
     93 	/* only set if using direct config */
     94 	int		sa_ncompat;	/* number of pointers in the
     95 					   ia_compat array */
     96 	const char **	sa_compat;	/* chip names */
     97 	prop_dictionary_t sa_prop;	/* dictionary for this device */
     98 
     99 	uintptr_t	sa_cookie;	/* OF node in openfirmware machines */
    100 };
    101 
    102 /*
    103  * This is similar in some respects to struct buf, but we cannot use
    104  * that structure because it was not designed to support full-duplex
    105  * IO.
    106  */
    107 struct spi_chunk {
    108 	struct spi_chunk *chunk_next;
    109 	int		chunk_count;
    110 	uint8_t		*chunk_read;
    111 	const uint8_t	*chunk_write;
    112 	/* for private use by framework and bus driver */
    113 	uint8_t		*chunk_rptr;
    114 	const uint8_t	*chunk_wptr;
    115 	int		chunk_rresid;
    116 	int		chunk_wresid;
    117 };
    118 
    119 struct spi_transfer {
    120 	struct spi_chunk *st_chunks;		/* chained bufs */
    121 	SIMPLEQ_ENTRY(spi_transfer) st_chain;	/* chain of submitted jobs */
    122 	volatile int	st_flags;
    123 	int		st_errno;
    124 	int		st_slave;
    125 	void		*st_private;
    126 	void		(*st_done)(struct spi_transfer *);
    127 	kmutex_t	st_lock;
    128 	kcondvar_t	st_cv;
    129 	void		*st_busprivate;
    130 	void		*st_spiprivate;
    131 };
    132 
    133 /* declare a list of transfers */
    134 SIMPLEQ_HEAD(spi_transq, spi_transfer);
    135 
    136 #define	spi_transq_init(q)	\
    137 	SIMPLEQ_INIT(q)
    138 
    139 #define	spi_transq_enqueue(q, trans)	\
    140 	SIMPLEQ_INSERT_TAIL(q, trans, st_chain)
    141 
    142 #define	spi_transq_dequeue(q)		\
    143 	SIMPLEQ_REMOVE_HEAD(q, st_chain)
    144 
    145 #define	spi_transq_first(q)		\
    146 	SIMPLEQ_FIRST(q)
    147 
    148 #define	SPI_F_DONE		0x0001
    149 #define	SPI_F_ERROR		0x0002
    150 
    151 static inline device_t
    152 spibus_attach(device_t dev, struct spi_controller *sct)
    153 {
    154 	struct spibus_attach_args sba = {
    155 		.sba_controller = sct,
    156 	};
    157 	return config_found(dev, &sba, spibus_print,
    158 	    CFARGS(.iattr = "spibus",
    159 		   .devhandle = device_handle(dev)));
    160 }
    161 
    162 int	spi_compatible_match(const struct spi_attach_args *, const cfdata_t,
    163 	    const struct device_compatible_entry *);
    164 const struct device_compatible_entry *
    165 	spi_compatible_lookup(const struct spi_attach_args *,
    166 	    const struct device_compatible_entry *);
    167 int	spi_configure(device_t, struct spi_handle *, int, int);
    168 int	spi_transfer(struct spi_handle *, struct spi_transfer *);
    169 void	spi_transfer_init(struct spi_transfer *);
    170 void	spi_chunk_init(struct spi_chunk *, int, const uint8_t *, uint8_t *);
    171 void	spi_transfer_add(struct spi_transfer *, struct spi_chunk *);
    172 void	spi_wait(struct spi_transfer *);
    173 void	spi_done(struct spi_transfer *, int);
    174 
    175 /* convenience wrappers */
    176 int	spi_send(struct spi_handle *, int, const uint8_t *);
    177 int	spi_recv(struct spi_handle *, int, uint8_t *);
    178 int	spi_send_recv(struct spi_handle *, int, const uint8_t *, int,
    179 	    uint8_t *);
    180 
    181 #endif	/* _DEV_SPI_SPIVAR_H_ */
    182