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      1  1.18  thorpej /* $NetBSD: ssdfb_spi.c,v 1.18 2025/09/13 14:10:44 thorpej Exp $ */
      2   1.1      tnn 
      3   1.1      tnn /*
      4   1.1      tnn  * Copyright (c) 2019 The NetBSD Foundation, Inc.
      5   1.1      tnn  * All rights reserved.
      6   1.1      tnn  *
      7   1.1      tnn  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1      tnn  * by Tobias Nygren.
      9   1.1      tnn  *
     10   1.1      tnn  * Redistribution and use in source and binary forms, with or without
     11   1.1      tnn  * modification, are permitted provided that the following conditions
     12   1.1      tnn  * are met:
     13   1.1      tnn  * 1. Redistributions of source code must retain the above copyright
     14   1.1      tnn  *    notice, this list of conditions and the following disclaimer.
     15   1.1      tnn  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1      tnn  *    notice, this list of conditions and the following disclaimer in the
     17   1.1      tnn  *    documentation and/or other materials provided with the distribution.
     18   1.1      tnn  *
     19   1.1      tnn  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1      tnn  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1      tnn  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1      tnn  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1      tnn  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1      tnn  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1      tnn  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1      tnn  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1      tnn  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1      tnn  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1      tnn  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1      tnn  */
     31   1.1      tnn 
     32   1.1      tnn #include <sys/cdefs.h>
     33  1.18  thorpej __KERNEL_RCSID(0, "$NetBSD: ssdfb_spi.c,v 1.18 2025/09/13 14:10:44 thorpej Exp $");
     34   1.1      tnn 
     35   1.1      tnn #include <sys/param.h>
     36   1.1      tnn #include <sys/device.h>
     37   1.1      tnn #include <sys/kernel.h>
     38   1.1      tnn #include <dev/wscons/wsdisplayvar.h>
     39   1.1      tnn #include <dev/rasops/rasops.h>
     40   1.1      tnn #include <dev/spi/spivar.h>
     41   1.1      tnn #include <dev/ic/ssdfbvar.h>
     42   1.6      tnn #include "opt_fdt.h"
     43   1.6      tnn #ifdef FDT
     44   1.6      tnn #include <dev/fdt/fdtvar.h>
     45   1.6      tnn #endif
     46   1.1      tnn 
     47   1.1      tnn struct bs_state {
     48   1.1      tnn 	uint8_t	*base;
     49   1.1      tnn 	uint8_t	*cur;
     50   1.1      tnn 	uint8_t	mask;
     51   1.1      tnn };
     52   1.1      tnn 
     53   1.1      tnn struct ssdfb_spi_softc {
     54   1.1      tnn 	struct ssdfb_softc	sc;
     55  1.18  thorpej 	spi_handle_t		sc_sh;
     56   1.6      tnn #ifdef FDT
     57   1.6      tnn 	struct fdtbus_gpio_pin	*sc_gpio_dc;
     58   1.7      tnn 	struct fdtbus_gpio_pin	*sc_gpio_res;
     59   1.6      tnn #endif
     60   1.1      tnn 	bool			sc_3wiremode;
     61  1.10      tnn 	bool			sc_late_dc_deassert;
     62  1.10      tnn 	uint8_t			sc_padding_cmd;
     63   1.1      tnn };
     64   1.1      tnn 
     65   1.1      tnn static int	ssdfb_spi_match(device_t, cfdata_t, void *);
     66   1.1      tnn static void	ssdfb_spi_attach(device_t, device_t, void *);
     67   1.1      tnn 
     68   1.1      tnn static int	ssdfb_spi_cmd_3wire(void *, uint8_t *, size_t, bool);
     69   1.1      tnn static int	ssdfb_spi_xfer_rect_3wire_ssd1322(void *, uint8_t, uint8_t,
     70   1.1      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     71   1.1      tnn 
     72   1.1      tnn static int	ssdfb_spi_cmd_4wire(void *, uint8_t *, size_t, bool);
     73  1.11      tnn static int	ssdfb_spi_xfer_rect_4wire_sh1106(void *, uint8_t, uint8_t,
     74  1.11      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     75  1.11      tnn static int	ssdfb_spi_xfer_rect_4wire_ssd1306(void *, uint8_t, uint8_t,
     76  1.11      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     77   1.1      tnn static int	ssdfb_spi_xfer_rect_4wire_ssd1322(void *, uint8_t, uint8_t,
     78   1.1      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     79   1.8      tnn static int	ssdfb_spi_xfer_rect_4wire_ssd1353(void *, uint8_t, uint8_t,
     80   1.8      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     81   1.1      tnn 
     82   1.1      tnn static void	ssdfb_bitstream_init(struct bs_state *, uint8_t *);
     83   1.1      tnn static void	ssdfb_bitstream_append(struct bs_state *, uint8_t, uint8_t);
     84   1.1      tnn static void	ssdfb_bitstream_append_cmd(struct bs_state *, uint8_t);
     85   1.1      tnn static void	ssdfb_bitstream_append_data(struct bs_state *, uint8_t *,
     86   1.1      tnn 		    size_t);
     87  1.10      tnn static void	ssdfb_bitstream_final(struct bs_state *, uint8_t);
     88   1.1      tnn 
     89   1.1      tnn CFATTACH_DECL_NEW(ssdfb_spi, sizeof(struct ssdfb_spi_softc),
     90   1.1      tnn     ssdfb_spi_match, ssdfb_spi_attach, NULL, NULL);
     91   1.1      tnn 
     92   1.3      tnn static const struct device_compatible_entry compat_data[] = {
     93   1.6      tnn 	{ .compat = "solomon,ssd1306",	.value = SSDFB_PRODUCT_SSD1306_GENERIC },
     94  1.11      tnn 	{ .compat = "sino,sh1106",	.value = SSDFB_PRODUCT_SH1106_GENERIC },
     95   1.6      tnn 	{ .compat = "solomon,ssd1322",	.value = SSDFB_PRODUCT_SSD1322_GENERIC },
     96   1.8      tnn 	{ .compat = "solomon,ssd1353",	.value = SSDFB_PRODUCT_SSD1353_GENERIC },
     97   1.8      tnn 	{ .compat = "dep160128a",	.value = SSDFB_PRODUCT_DEP_160128A_RGB },
     98   1.5  thorpej 	DEVICE_COMPAT_EOL
     99   1.3      tnn };
    100   1.3      tnn 
    101   1.1      tnn static int
    102   1.1      tnn ssdfb_spi_match(device_t parent, cfdata_t match, void *aux)
    103   1.1      tnn {
    104   1.1      tnn 	struct spi_attach_args *sa = aux;
    105  1.17  thorpej 	int match_result;
    106   1.3      tnn 
    107  1.17  thorpej 	if (spi_use_direct_match(sa, compat_data, &match_result)) {
    108  1.17  thorpej 		return match_result;
    109  1.17  thorpej 	}
    110  1.17  thorpej 
    111  1.17  thorpej 	return SPI_MATCH_DEFAULT;
    112   1.1      tnn }
    113   1.1      tnn 
    114   1.1      tnn static void
    115   1.1      tnn ssdfb_spi_attach(device_t parent, device_t self, void *aux)
    116   1.1      tnn {
    117   1.1      tnn 	struct ssdfb_spi_softc *sc = device_private(self);
    118   1.1      tnn 	struct cfdata *cf = device_cfdata(self);
    119   1.1      tnn 	struct spi_attach_args *sa = aux;
    120   1.1      tnn 	int flags = cf->cf_flags;
    121  1.12  thorpej 	int error;
    122   1.1      tnn 
    123   1.1      tnn 	sc->sc.sc_dev = self;
    124   1.1      tnn 	sc->sc_sh = sa->sa_handle;
    125   1.1      tnn 	sc->sc.sc_cookie = (void *)sc;
    126  1.17  thorpej 
    127   1.6      tnn 	if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN) {
    128   1.6      tnn 		const struct device_compatible_entry *dce =
    129  1.14  thorpej 			spi_compatible_lookup(sa, compat_data);
    130   1.6      tnn 		if (dce)
    131   1.6      tnn 			flags |= (int)dce->value;
    132   1.6      tnn 		else
    133   1.6      tnn 			flags |= SSDFB_PRODUCT_SSD1322_GENERIC;
    134   1.6      tnn 	}
    135  1.12  thorpej 
    136  1.12  thorpej 	/*
    137  1.12  thorpej 	 * SSD1306 and SSD1322 data sheets specify 100ns cycle time.
    138  1.12  thorpej 	 */
    139  1.15  thorpej 	error = spi_configure(self, sa->sa_handle, SPI_MODE_0,
    140  1.15  thorpej 	    SPI_FREQ_MHz(10));
    141  1.12  thorpej 	if (error) {
    142  1.12  thorpej 		return;
    143  1.12  thorpej 	}
    144  1.12  thorpej 
    145   1.1      tnn 	/*
    146   1.1      tnn 	 * Note on interface modes.
    147   1.1      tnn 	 *
    148   1.1      tnn 	 * 3 wire mode sends 9 bit sequences over the MOSI, MSB contains
    149   1.1      tnn 	 * the bit that determines if the lower 8 bits are command or data.
    150   1.1      tnn 	 *
    151   1.1      tnn 	 * 4 wire mode sends 8 bit sequences and requires an auxiliary GPIO
    152   1.6      tnn 	 * pin for the command/data bit.
    153   1.1      tnn 	 */
    154  1.16  thorpej 	devhandle_t devhandle = device_handle(self);
    155  1.16  thorpej 	switch (devhandle_type(devhandle)) {
    156   1.6      tnn #ifdef FDT
    157  1.16  thorpej 	case DEVHANDLE_TYPE_OF: {
    158  1.16  thorpej 		const int phandle = devhandle_to_of(devhandle);
    159   1.7      tnn 		sc->sc_gpio_dc =
    160  1.16  thorpej 		    fdtbus_gpio_acquire(phandle, "dc-gpio", GPIO_PIN_OUTPUT);
    161  1.16  thorpej 		if (!sc->sc_gpio_dc) {
    162  1.16  thorpej 			sc->sc_gpio_dc = fdtbus_gpio_acquire(phandle,
    163  1.16  thorpej 			    "cd-gpio", GPIO_PIN_OUTPUT);
    164  1.16  thorpej 		}
    165  1.16  thorpej 		sc->sc_3wiremode = (sc->sc_gpio_dc == NULL);
    166  1.16  thorpej 		sc->sc_gpio_res =
    167  1.16  thorpej 		    fdtbus_gpio_acquire(phandle, "res-gpio", GPIO_PIN_OUTPUT);
    168  1.16  thorpej 		if (sc->sc_gpio_res) {
    169  1.16  thorpej 			fdtbus_gpio_write_raw(sc->sc_gpio_res, 0);
    170  1.16  thorpej 			DELAY(100);
    171  1.16  thorpej 			fdtbus_gpio_write_raw(sc->sc_gpio_res, 1);
    172  1.16  thorpej 			DELAY(100);
    173  1.16  thorpej 		}
    174  1.16  thorpej 		break;
    175  1.16  thorpej 	    }
    176  1.16  thorpej #endif /* FDT */
    177  1.16  thorpej 	default:
    178  1.16  thorpej 		sc->sc_3wiremode = true;
    179  1.16  thorpej 		break;
    180   1.7      tnn 	}
    181   1.1      tnn 
    182   1.8      tnn 	sc->sc.sc_cmd = sc->sc_3wiremode
    183   1.8      tnn 	    ? ssdfb_spi_cmd_3wire
    184   1.8      tnn 	    : ssdfb_spi_cmd_4wire;
    185   1.8      tnn 
    186   1.1      tnn 	switch (flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) {
    187  1.11      tnn 	case SSDFB_PRODUCT_SH1106_GENERIC:
    188  1.11      tnn 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    189  1.11      tnn 		    ? NULL
    190  1.11      tnn 		    : ssdfb_spi_xfer_rect_4wire_sh1106;
    191  1.11      tnn 		sc->sc_padding_cmd = SSDFB_CMD_NOP;
    192  1.11      tnn 		sc->sc_late_dc_deassert = true;
    193  1.11      tnn 		break;
    194  1.11      tnn 	case SSDFB_PRODUCT_SSD1306_GENERIC:
    195  1.11      tnn 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    196  1.11      tnn 		    ? NULL
    197  1.11      tnn 		    : ssdfb_spi_xfer_rect_4wire_ssd1306;
    198  1.11      tnn 		sc->sc_padding_cmd = SSDFB_CMD_NOP;
    199  1.11      tnn 		sc->sc_late_dc_deassert = true;
    200  1.11      tnn 		break;
    201   1.1      tnn 	case SSDFB_PRODUCT_SSD1322_GENERIC:
    202   1.8      tnn 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    203   1.8      tnn 		    ? ssdfb_spi_xfer_rect_3wire_ssd1322
    204   1.8      tnn 		    : ssdfb_spi_xfer_rect_4wire_ssd1322;
    205  1.10      tnn 		sc->sc_padding_cmd = SSD1322_CMD_WRITE_RAM;
    206   1.8      tnn 		break;
    207   1.8      tnn 	case SSDFB_PRODUCT_SSD1353_GENERIC:
    208   1.8      tnn 	case SSDFB_PRODUCT_DEP_160128A_RGB:
    209   1.8      tnn 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    210   1.8      tnn 		    ? NULL /* not supported here */
    211   1.8      tnn 		    : ssdfb_spi_xfer_rect_4wire_ssd1353;
    212   1.1      tnn 		break;
    213   1.1      tnn 	}
    214   1.8      tnn 
    215   1.8      tnn 	if (!sc->sc.sc_transfer_rect) {
    216   1.8      tnn 		aprint_error(": sc_transfer_rect not implemented\n");
    217   1.8      tnn 		return;
    218   1.1      tnn 	}
    219   1.6      tnn 
    220   1.1      tnn 	ssdfb_attach(&sc->sc, flags);
    221   1.1      tnn 
    222   1.8      tnn 	aprint_normal_dev(self, "%d-wire SPI interface\n",
    223   1.1      tnn 	    sc->sc_3wiremode == true ? 3 : 4);
    224   1.1      tnn }
    225   1.1      tnn 
    226   1.1      tnn static int
    227   1.1      tnn ssdfb_spi_cmd_3wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    228   1.1      tnn {
    229   1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    230   1.1      tnn 	uint8_t bitstream[16 * 9 / 8];
    231   1.1      tnn 	struct bs_state s;
    232   1.1      tnn 
    233   1.1      tnn 	KASSERT(len > 0 && len <= 16);
    234   1.1      tnn 	ssdfb_bitstream_init(&s, bitstream);
    235   1.1      tnn 	ssdfb_bitstream_append_cmd(&s, *cmd);
    236   1.1      tnn 	cmd++;
    237   1.1      tnn 	len--;
    238   1.1      tnn 	ssdfb_bitstream_append_data(&s, cmd, len);
    239  1.10      tnn 	ssdfb_bitstream_final(&s, sc->sc_padding_cmd);
    240   1.1      tnn 
    241   1.1      tnn 	return spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    242   1.1      tnn }
    243   1.1      tnn 
    244   1.1      tnn static int
    245   1.1      tnn ssdfb_spi_xfer_rect_3wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    246   1.1      tnn     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    247   1.1      tnn {
    248   1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    249   1.1      tnn 	uint8_t bitstream[128 * 9 / 8];
    250   1.1      tnn 	struct bs_state s;
    251   1.1      tnn 	size_t rlen = (tocol + 1 - fromcol) * 2;
    252   1.1      tnn 	int error;
    253   1.1      tnn 
    254   1.1      tnn 	/*
    255   1.1      tnn 	 * Unlike iic(4), there is no way to force spi(4) to use polling.
    256   1.1      tnn 	 */
    257   1.2      tnn 	if (usepoll && !cold)
    258   1.1      tnn 		return 0;
    259   1.1      tnn 
    260   1.1      tnn 	ssdfb_bitstream_init(&s, bitstream);
    261   1.1      tnn 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_ROW_ADDRESS);
    262   1.1      tnn 	ssdfb_bitstream_append_data(&s, &fromrow, 1);
    263   1.1      tnn 	ssdfb_bitstream_append_data(&s, &torow, 1);
    264   1.1      tnn 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_COLUMN_ADDRESS);
    265   1.1      tnn 	ssdfb_bitstream_append_data(&s, &fromcol, 1);
    266   1.1      tnn 	ssdfb_bitstream_append_data(&s, &tocol, 1);
    267   1.1      tnn 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_WRITE_RAM);
    268  1.10      tnn 	ssdfb_bitstream_final(&s, sc->sc_padding_cmd);
    269   1.1      tnn 	error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    270   1.1      tnn 	if (error)
    271   1.1      tnn 		return error;
    272   1.1      tnn 
    273   1.1      tnn 	KASSERT(rlen <= 128);
    274  1.11      tnn 	while (fromrow <= torow) {
    275   1.1      tnn 		ssdfb_bitstream_init(&s, bitstream);
    276   1.1      tnn 		ssdfb_bitstream_append_data(&s, p, rlen);
    277  1.10      tnn 		ssdfb_bitstream_final(&s, sc->sc_padding_cmd);
    278   1.1      tnn 		error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    279   1.1      tnn 		if (error)
    280   1.1      tnn 			return error;
    281  1.11      tnn 		fromrow++;
    282   1.1      tnn 		p += stride;
    283   1.1      tnn 	}
    284   1.1      tnn 
    285   1.1      tnn 	return 0;
    286   1.1      tnn }
    287   1.1      tnn 
    288   1.1      tnn static void
    289   1.1      tnn ssdfb_bitstream_init(struct bs_state *s, uint8_t *dst)
    290   1.1      tnn {
    291   1.1      tnn 	s->base = s->cur = dst;
    292   1.1      tnn 	s->mask = 0x80;
    293   1.1      tnn }
    294   1.1      tnn 
    295   1.1      tnn static void
    296   1.1      tnn ssdfb_bitstream_append(struct bs_state *s, uint8_t b, uint8_t srcmask)
    297   1.1      tnn {
    298   1.1      tnn 	while(srcmask) {
    299   1.1      tnn 		if (b & srcmask)
    300   1.1      tnn 			*s->cur |= s->mask;
    301   1.1      tnn 		else
    302   1.1      tnn 			*s->cur &= ~s->mask;
    303   1.1      tnn 		srcmask >>= 1;
    304   1.1      tnn 		s->mask >>= 1;
    305   1.1      tnn 		if (!s->mask) {
    306   1.1      tnn 			s->mask = 0x80;
    307   1.1      tnn 			s->cur++;
    308   1.1      tnn 		}
    309   1.1      tnn 	}
    310   1.1      tnn }
    311   1.1      tnn 
    312   1.1      tnn static void
    313   1.1      tnn ssdfb_bitstream_append_cmd(struct bs_state *s, uint8_t cmd)
    314   1.1      tnn {
    315   1.1      tnn 	ssdfb_bitstream_append(s, 0, 1);
    316   1.1      tnn 	ssdfb_bitstream_append(s, cmd, 0x80);
    317   1.1      tnn }
    318   1.1      tnn 
    319   1.1      tnn static void
    320   1.1      tnn ssdfb_bitstream_append_data(struct bs_state *s, uint8_t *data, size_t len)
    321   1.1      tnn {
    322   1.1      tnn 	while(len--) {
    323   1.1      tnn 		ssdfb_bitstream_append(s, 1, 1);
    324   1.1      tnn 		ssdfb_bitstream_append(s, *data++, 0x80);
    325   1.1      tnn 	}
    326   1.1      tnn }
    327   1.1      tnn 
    328   1.1      tnn static void
    329  1.10      tnn ssdfb_bitstream_final(struct bs_state *s, uint8_t padding_cmd)
    330   1.1      tnn {
    331   1.1      tnn 	while (s->mask != 0x80) {
    332   1.1      tnn 		ssdfb_bitstream_append_cmd(s, padding_cmd);
    333   1.1      tnn 	}
    334   1.1      tnn }
    335   1.1      tnn 
    336   1.1      tnn static void
    337   1.1      tnn ssdfb_spi_4wire_set_dc(struct ssdfb_spi_softc *sc, int value)
    338   1.1      tnn {
    339   1.6      tnn #ifdef FDT
    340   1.6      tnn 	fdtbus_gpio_write_raw(sc->sc_gpio_dc, value);
    341   1.6      tnn #else
    342   1.1      tnn 	panic("ssdfb_spi_4wire_set_dc");
    343   1.6      tnn #endif
    344   1.1      tnn }
    345   1.1      tnn 
    346   1.1      tnn static int
    347   1.1      tnn ssdfb_spi_cmd_4wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    348   1.1      tnn {
    349   1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    350   1.1      tnn 	int error;
    351   1.1      tnn 
    352   1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    353   1.1      tnn 	error = spi_send(sc->sc_sh, 1, cmd);
    354   1.1      tnn 	if (error)
    355   1.1      tnn 		return error;
    356   1.1      tnn 	if (len > 1) {
    357  1.10      tnn 		if (!sc->sc_late_dc_deassert)
    358  1.10      tnn 			ssdfb_spi_4wire_set_dc(sc, 1);
    359   1.1      tnn 		len--;
    360   1.1      tnn 		cmd++;
    361   1.1      tnn 		error = spi_send(sc->sc_sh, len, cmd);
    362   1.1      tnn 		if (error)
    363   1.1      tnn 			return error;
    364   1.1      tnn 	}
    365   1.1      tnn 
    366   1.1      tnn 	return 0;
    367   1.1      tnn }
    368   1.1      tnn 
    369   1.1      tnn static int
    370  1.11      tnn ssdfb_spi_xfer_rect_4wire_sh1106(void *cookie, uint8_t fromcol, uint8_t tocol,
    371  1.11      tnn     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    372  1.11      tnn {
    373  1.11      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    374  1.11      tnn 	size_t rlen = tocol + 1 - fromcol;
    375  1.11      tnn 	int error;
    376  1.11      tnn 	uint8_t cmd[] = {
    377  1.11      tnn 		SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage,
    378  1.11      tnn 		SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE + (fromcol >> 4),
    379  1.11      tnn 		SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE + (fromcol & 0xf)
    380  1.11      tnn 	};
    381  1.11      tnn 
    382  1.11      tnn 	if (usepoll && !cold)
    383  1.11      tnn 		return 0;
    384  1.11      tnn 
    385  1.11      tnn 	while (frompage <= topage) {
    386  1.11      tnn 		cmd[0] = SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage;
    387  1.11      tnn 		ssdfb_spi_4wire_set_dc(sc, 0);
    388  1.11      tnn 		error = spi_send(sc->sc_sh, sizeof(cmd), cmd);
    389  1.11      tnn 		if (error)
    390  1.11      tnn 			return error;
    391  1.11      tnn 		ssdfb_spi_4wire_set_dc(sc, 1);
    392  1.11      tnn 		error = spi_send(sc->sc_sh, rlen, p);
    393  1.11      tnn 		if (error)
    394  1.11      tnn 			return error;
    395  1.11      tnn 		frompage++;
    396  1.11      tnn 		p += stride;
    397  1.11      tnn 	}
    398  1.11      tnn 
    399  1.11      tnn 	return 0;
    400  1.11      tnn }
    401  1.11      tnn 
    402  1.11      tnn static int
    403  1.11      tnn ssdfb_spi_xfer_rect_4wire_ssd1306(void *cookie, uint8_t fromcol, uint8_t tocol,
    404  1.11      tnn     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    405  1.11      tnn {
    406  1.11      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    407  1.11      tnn 	size_t rlen = tocol + 1 - fromcol;
    408  1.11      tnn 	int error;
    409  1.11      tnn 	uint8_t cmd[] = {
    410  1.11      tnn 		SSD1306_CMD_SET_MEMORY_ADDRESSING_MODE,
    411  1.11      tnn 		SSD1306_MEMORY_ADDRESSING_MODE_HORIZONTAL,
    412  1.11      tnn 		SSD1306_CMD_SET_COLUMN_ADDRESS,
    413  1.11      tnn 		fromcol,
    414  1.11      tnn 		tocol,
    415  1.11      tnn 		SSD1306_CMD_SET_PAGE_ADDRESS,
    416  1.11      tnn 		frompage,
    417  1.11      tnn 		topage
    418  1.11      tnn 	};
    419  1.11      tnn 
    420  1.11      tnn 	if (usepoll && !cold)
    421  1.11      tnn 		return 0;
    422  1.11      tnn 
    423  1.11      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    424  1.11      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), cmd);
    425  1.11      tnn 	if (error)
    426  1.11      tnn 		return error;
    427  1.11      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    428  1.11      tnn 
    429  1.11      tnn 	while (frompage <= topage) {
    430  1.11      tnn 		error = spi_send(sc->sc_sh, rlen, p);
    431  1.11      tnn 		if (error)
    432  1.11      tnn 			return error;
    433  1.11      tnn 		frompage++;
    434  1.11      tnn 		p += stride;
    435  1.11      tnn 	}
    436  1.11      tnn 
    437  1.11      tnn 	return 0;
    438  1.11      tnn }
    439  1.11      tnn 
    440  1.11      tnn static int
    441   1.1      tnn ssdfb_spi_xfer_rect_4wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    442   1.1      tnn     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    443   1.1      tnn {
    444   1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    445   1.1      tnn 	size_t rlen = (tocol + 1 - fromcol) * 2;
    446   1.1      tnn 	int error;
    447   1.1      tnn 	uint8_t cmd;
    448   1.1      tnn 	uint8_t data[2];
    449   1.1      tnn 
    450   1.2      tnn 	if (usepoll && !cold)
    451   1.1      tnn 		return 0;
    452   1.1      tnn 
    453   1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    454   1.1      tnn 	cmd = SSD1322_CMD_SET_ROW_ADDRESS;
    455   1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    456   1.1      tnn 	if (error)
    457   1.1      tnn 		return error;
    458   1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    459   1.1      tnn 	data[0] = fromrow;
    460   1.1      tnn 	data[1] = torow;
    461   1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    462   1.1      tnn 	if (error)
    463   1.1      tnn 		return error;
    464   1.1      tnn 
    465   1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    466   1.1      tnn 	cmd = SSD1322_CMD_SET_COLUMN_ADDRESS;
    467   1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    468   1.1      tnn 	if (error)
    469   1.1      tnn 		return error;
    470   1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    471   1.1      tnn 	data[0] = fromcol;
    472   1.1      tnn 	data[1] = tocol;
    473   1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    474   1.1      tnn 	if (error)
    475   1.1      tnn 		return error;
    476   1.1      tnn 
    477   1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    478   1.1      tnn 	cmd = SSD1322_CMD_WRITE_RAM;
    479   1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    480   1.1      tnn 	if (error)
    481   1.1      tnn 		return error;
    482   1.1      tnn 
    483   1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    484  1.11      tnn 	while (fromrow <= torow) {
    485   1.1      tnn 		error = spi_send(sc->sc_sh, rlen, p);
    486   1.1      tnn 		if (error)
    487   1.1      tnn 			return error;
    488  1.11      tnn 		fromrow++;
    489   1.1      tnn 		p += stride;
    490   1.1      tnn 	}
    491   1.1      tnn 
    492   1.1      tnn 	return 0;
    493   1.1      tnn }
    494   1.8      tnn 
    495   1.8      tnn static int
    496   1.8      tnn ssdfb_spi_xfer_rect_4wire_ssd1353(void *cookie, uint8_t fromcol, uint8_t tocol,
    497   1.8      tnn     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    498   1.8      tnn {
    499   1.8      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    500   1.8      tnn 	size_t rlen = (tocol + 1 - fromcol) * 3;
    501   1.8      tnn 	uint8_t bitstream[160 * 3];
    502   1.8      tnn 	uint8_t *dstp, *srcp, *endp;
    503   1.8      tnn 	int error;
    504   1.8      tnn 	uint8_t cmd;
    505   1.8      tnn 	uint8_t data[2];
    506   1.8      tnn 
    507   1.8      tnn 	if (usepoll && !cold)
    508   1.8      tnn 		return 0;
    509   1.8      tnn 
    510   1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    511   1.9      tnn 	cmd = SSD1353_CMD_SET_ROW_ADDRESS;
    512   1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    513   1.8      tnn 	if (error)
    514   1.8      tnn 		return error;
    515   1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    516   1.8      tnn 	data[0] = fromrow;
    517   1.8      tnn 	data[1] = torow;
    518   1.8      tnn 	if (sc->sc.sc_upsidedown) {
    519   1.8      tnn 		/* fix picture outside frame on 160x128 panel */
    520   1.8      tnn 		data[0] += 132 - sc->sc.sc_p->p_height;
    521   1.8      tnn 		data[1] += 132 - sc->sc.sc_p->p_height;
    522   1.8      tnn 	}
    523   1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    524   1.8      tnn 	if (error)
    525   1.8      tnn 		return error;
    526   1.8      tnn 
    527   1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    528   1.9      tnn 	cmd = SSD1353_CMD_SET_COLUMN_ADDRESS;
    529   1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    530   1.8      tnn 	if (error)
    531   1.8      tnn 		return error;
    532   1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    533   1.8      tnn 	data[0] = fromcol;
    534   1.8      tnn 	data[1] = tocol;
    535   1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    536   1.8      tnn 	if (error)
    537   1.8      tnn 		return error;
    538   1.8      tnn 
    539   1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    540   1.9      tnn 	cmd = SSD1353_CMD_WRITE_RAM;
    541   1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    542   1.8      tnn 	if (error)
    543   1.8      tnn 		return error;
    544   1.8      tnn 
    545   1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    546   1.8      tnn 	KASSERT(rlen <= sizeof(bitstream));
    547  1.11      tnn 	while (fromrow <= torow) {
    548   1.8      tnn 		/* downconvert each row from 32bpp rgba to 18bpp panel format */
    549   1.8      tnn 		dstp = bitstream;
    550   1.8      tnn 		endp = dstp + rlen;
    551   1.8      tnn 		srcp = p;
    552   1.8      tnn 		while (dstp < endp) {
    553   1.8      tnn 			*dstp++ = (*srcp++) >> 2;
    554   1.8      tnn 			*dstp++ = (*srcp++) >> 2;
    555   1.8      tnn 			*dstp++ = (*srcp++) >> 2;
    556   1.8      tnn 			srcp++;
    557   1.8      tnn 		}
    558   1.8      tnn 		error = spi_send(sc->sc_sh, rlen, bitstream);
    559   1.8      tnn 		if (error)
    560   1.8      tnn 			return error;
    561  1.11      tnn 		fromrow++;
    562   1.8      tnn 		p += stride;
    563   1.8      tnn 	}
    564   1.8      tnn 
    565   1.8      tnn 	return 0;
    566   1.8      tnn }
    567