Home | History | Annotate | Line # | Download | only in spi
ssdfb_spi.c revision 1.8
      1  1.8      tnn /* $NetBSD: ssdfb_spi.c,v 1.8 2021/08/05 19:08:59 tnn Exp $ */
      2  1.1      tnn 
      3  1.1      tnn /*
      4  1.1      tnn  * Copyright (c) 2019 The NetBSD Foundation, Inc.
      5  1.1      tnn  * All rights reserved.
      6  1.1      tnn  *
      7  1.1      tnn  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1      tnn  * by Tobias Nygren.
      9  1.1      tnn  *
     10  1.1      tnn  * Redistribution and use in source and binary forms, with or without
     11  1.1      tnn  * modification, are permitted provided that the following conditions
     12  1.1      tnn  * are met:
     13  1.1      tnn  * 1. Redistributions of source code must retain the above copyright
     14  1.1      tnn  *    notice, this list of conditions and the following disclaimer.
     15  1.1      tnn  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1      tnn  *    notice, this list of conditions and the following disclaimer in the
     17  1.1      tnn  *    documentation and/or other materials provided with the distribution.
     18  1.1      tnn  *
     19  1.1      tnn  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1      tnn  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1      tnn  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1      tnn  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1      tnn  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1      tnn  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1      tnn  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1      tnn  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1      tnn  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1      tnn  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1      tnn  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1      tnn  */
     31  1.1      tnn 
     32  1.1      tnn #include <sys/cdefs.h>
     33  1.8      tnn __KERNEL_RCSID(0, "$NetBSD: ssdfb_spi.c,v 1.8 2021/08/05 19:08:59 tnn Exp $");
     34  1.1      tnn 
     35  1.1      tnn #include <sys/param.h>
     36  1.1      tnn #include <sys/device.h>
     37  1.1      tnn #include <sys/kernel.h>
     38  1.1      tnn #include <dev/wscons/wsdisplayvar.h>
     39  1.1      tnn #include <dev/rasops/rasops.h>
     40  1.1      tnn #include <dev/spi/spivar.h>
     41  1.1      tnn #include <dev/ic/ssdfbvar.h>
     42  1.6      tnn #include "opt_fdt.h"
     43  1.6      tnn #ifdef FDT
     44  1.6      tnn #include <dev/fdt/fdtvar.h>
     45  1.6      tnn #endif
     46  1.1      tnn 
     47  1.1      tnn struct bs_state {
     48  1.1      tnn 	uint8_t	*base;
     49  1.1      tnn 	uint8_t	*cur;
     50  1.1      tnn 	uint8_t	mask;
     51  1.1      tnn };
     52  1.1      tnn 
     53  1.1      tnn struct ssdfb_spi_softc {
     54  1.1      tnn 	struct ssdfb_softc	sc;
     55  1.1      tnn 	struct spi_handle	*sc_sh;
     56  1.6      tnn #ifdef FDT
     57  1.6      tnn 	struct fdtbus_gpio_pin	*sc_gpio_dc;
     58  1.7      tnn 	struct fdtbus_gpio_pin	*sc_gpio_res;
     59  1.6      tnn #endif
     60  1.1      tnn 	bool			sc_3wiremode;
     61  1.1      tnn };
     62  1.1      tnn 
     63  1.1      tnn static int	ssdfb_spi_match(device_t, cfdata_t, void *);
     64  1.1      tnn static void	ssdfb_spi_attach(device_t, device_t, void *);
     65  1.1      tnn 
     66  1.1      tnn static int	ssdfb_spi_cmd_3wire(void *, uint8_t *, size_t, bool);
     67  1.1      tnn static int	ssdfb_spi_xfer_rect_3wire_ssd1322(void *, uint8_t, uint8_t,
     68  1.1      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     69  1.1      tnn 
     70  1.1      tnn static int	ssdfb_spi_cmd_4wire(void *, uint8_t *, size_t, bool);
     71  1.1      tnn static int	ssdfb_spi_xfer_rect_4wire_ssd1322(void *, uint8_t, uint8_t,
     72  1.1      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     73  1.8      tnn static int	ssdfb_spi_xfer_rect_4wire_ssd1353(void *, uint8_t, uint8_t,
     74  1.8      tnn 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     75  1.1      tnn 
     76  1.1      tnn static void	ssdfb_bitstream_init(struct bs_state *, uint8_t *);
     77  1.1      tnn static void	ssdfb_bitstream_append(struct bs_state *, uint8_t, uint8_t);
     78  1.1      tnn static void	ssdfb_bitstream_append_cmd(struct bs_state *, uint8_t);
     79  1.1      tnn static void	ssdfb_bitstream_append_data(struct bs_state *, uint8_t *,
     80  1.1      tnn 		    size_t);
     81  1.1      tnn static void	ssdfb_bitstream_final(struct bs_state *);
     82  1.1      tnn 
     83  1.1      tnn CFATTACH_DECL_NEW(ssdfb_spi, sizeof(struct ssdfb_spi_softc),
     84  1.1      tnn     ssdfb_spi_match, ssdfb_spi_attach, NULL, NULL);
     85  1.1      tnn 
     86  1.3      tnn static const struct device_compatible_entry compat_data[] = {
     87  1.6      tnn 	{ .compat = "solomon,ssd1306",	.value = SSDFB_PRODUCT_SSD1306_GENERIC },
     88  1.6      tnn 	{ .compat = "solomon,ssd1322",	.value = SSDFB_PRODUCT_SSD1322_GENERIC },
     89  1.8      tnn 	{ .compat = "solomon,ssd1353",	.value = SSDFB_PRODUCT_SSD1353_GENERIC },
     90  1.8      tnn 	{ .compat = "dep160128a",	.value = SSDFB_PRODUCT_DEP_160128A_RGB },
     91  1.5  thorpej 	DEVICE_COMPAT_EOL
     92  1.3      tnn };
     93  1.3      tnn 
     94  1.1      tnn static int
     95  1.1      tnn ssdfb_spi_match(device_t parent, cfdata_t match, void *aux)
     96  1.1      tnn {
     97  1.1      tnn 	struct spi_attach_args *sa = aux;
     98  1.3      tnn 	int res;
     99  1.3      tnn 
    100  1.3      tnn 	res = spi_compatible_match(sa, match, compat_data);
    101  1.3      tnn 	if (!res)
    102  1.3      tnn 		return res;
    103  1.1      tnn 
    104  1.1      tnn 	/*
    105  1.1      tnn 	 * SSD1306 and SSD1322 data sheets specify 100ns cycle time.
    106  1.1      tnn 	 */
    107  1.1      tnn 	if (spi_configure(sa->sa_handle, SPI_MODE_0, 10000000))
    108  1.3      tnn 		res = 0;
    109  1.1      tnn 
    110  1.3      tnn 	return res;
    111  1.1      tnn }
    112  1.1      tnn 
    113  1.1      tnn static void
    114  1.1      tnn ssdfb_spi_attach(device_t parent, device_t self, void *aux)
    115  1.1      tnn {
    116  1.1      tnn 	struct ssdfb_spi_softc *sc = device_private(self);
    117  1.1      tnn 	struct cfdata *cf = device_cfdata(self);
    118  1.1      tnn 	struct spi_attach_args *sa = aux;
    119  1.1      tnn 	int flags = cf->cf_flags;
    120  1.1      tnn 
    121  1.1      tnn 	sc->sc.sc_dev = self;
    122  1.1      tnn 	sc->sc_sh = sa->sa_handle;
    123  1.1      tnn 	sc->sc.sc_cookie = (void *)sc;
    124  1.6      tnn 	if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN) {
    125  1.6      tnn 		const struct device_compatible_entry *dce =
    126  1.6      tnn 			device_compatible_lookup(sa->sa_compat, sa->sa_ncompat, compat_data);
    127  1.6      tnn 		if (dce)
    128  1.6      tnn 			flags |= (int)dce->value;
    129  1.6      tnn 		else
    130  1.6      tnn 			flags |= SSDFB_PRODUCT_SSD1322_GENERIC;
    131  1.6      tnn 	}
    132  1.1      tnn 	/*
    133  1.1      tnn 	 * Note on interface modes.
    134  1.1      tnn 	 *
    135  1.1      tnn 	 * 3 wire mode sends 9 bit sequences over the MOSI, MSB contains
    136  1.1      tnn 	 * the bit that determines if the lower 8 bits are command or data.
    137  1.1      tnn 	 *
    138  1.1      tnn 	 * 4 wire mode sends 8 bit sequences and requires an auxiliary GPIO
    139  1.6      tnn 	 * pin for the command/data bit.
    140  1.1      tnn 	 */
    141  1.6      tnn #ifdef FDT
    142  1.6      tnn 	const int phandle = sa->sa_cookie;
    143  1.7      tnn 	sc->sc_gpio_dc =
    144  1.7      tnn 	    fdtbus_gpio_acquire(phandle, "dc-gpio", GPIO_PIN_OUTPUT);
    145  1.6      tnn 	if (!sc->sc_gpio_dc)
    146  1.7      tnn 		sc->sc_gpio_dc =
    147  1.7      tnn 		    fdtbus_gpio_acquire(phandle, "cd-gpio", GPIO_PIN_OUTPUT);
    148  1.6      tnn 	sc->sc_3wiremode = (sc->sc_gpio_dc == NULL);
    149  1.7      tnn 	sc->sc_gpio_res =
    150  1.7      tnn 	    fdtbus_gpio_acquire(phandle, "res-gpio", GPIO_PIN_OUTPUT);
    151  1.7      tnn 	if (sc->sc_gpio_res) {
    152  1.7      tnn 		fdtbus_gpio_write_raw(sc->sc_gpio_res, 0);
    153  1.7      tnn 		DELAY(100);
    154  1.7      tnn 		fdtbus_gpio_write_raw(sc->sc_gpio_res, 1);
    155  1.7      tnn 		DELAY(100);
    156  1.7      tnn 	}
    157  1.6      tnn #else
    158  1.6      tnn 	sc->sc_3wiremode = true;
    159  1.6      tnn #endif
    160  1.1      tnn 
    161  1.8      tnn 	sc->sc.sc_cmd = sc->sc_3wiremode
    162  1.8      tnn 	    ? ssdfb_spi_cmd_3wire
    163  1.8      tnn 	    : ssdfb_spi_cmd_4wire;
    164  1.8      tnn 
    165  1.1      tnn 	switch (flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) {
    166  1.1      tnn 	case SSDFB_PRODUCT_SSD1322_GENERIC:
    167  1.8      tnn 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    168  1.8      tnn 		    ? ssdfb_spi_xfer_rect_3wire_ssd1322
    169  1.8      tnn 		    : ssdfb_spi_xfer_rect_4wire_ssd1322;
    170  1.8      tnn 		break;
    171  1.8      tnn 	case SSDFB_PRODUCT_SSD1353_GENERIC:
    172  1.8      tnn 	case SSDFB_PRODUCT_DEP_160128A_RGB:
    173  1.8      tnn 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    174  1.8      tnn 		    ? NULL /* not supported here */
    175  1.8      tnn 		    : ssdfb_spi_xfer_rect_4wire_ssd1353;
    176  1.1      tnn 		break;
    177  1.1      tnn 	}
    178  1.8      tnn 
    179  1.8      tnn 	if (!sc->sc.sc_transfer_rect) {
    180  1.8      tnn 		aprint_error(": sc_transfer_rect not implemented\n");
    181  1.8      tnn 		return;
    182  1.1      tnn 	}
    183  1.6      tnn 
    184  1.1      tnn 	ssdfb_attach(&sc->sc, flags);
    185  1.1      tnn 
    186  1.8      tnn 	aprint_normal_dev(self, "%d-wire SPI interface\n",
    187  1.1      tnn 	    sc->sc_3wiremode == true ? 3 : 4);
    188  1.1      tnn }
    189  1.1      tnn 
    190  1.1      tnn static int
    191  1.1      tnn ssdfb_spi_cmd_3wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    192  1.1      tnn {
    193  1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    194  1.1      tnn 	uint8_t bitstream[16 * 9 / 8];
    195  1.1      tnn 	struct bs_state s;
    196  1.1      tnn 
    197  1.1      tnn 	KASSERT(len > 0 && len <= 16);
    198  1.1      tnn 	ssdfb_bitstream_init(&s, bitstream);
    199  1.1      tnn 	ssdfb_bitstream_append_cmd(&s, *cmd);
    200  1.1      tnn 	cmd++;
    201  1.1      tnn 	len--;
    202  1.1      tnn 	ssdfb_bitstream_append_data(&s, cmd, len);
    203  1.1      tnn 	ssdfb_bitstream_final(&s);
    204  1.1      tnn 
    205  1.1      tnn 	return spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    206  1.1      tnn }
    207  1.1      tnn 
    208  1.1      tnn static int
    209  1.1      tnn ssdfb_spi_xfer_rect_3wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    210  1.1      tnn     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    211  1.1      tnn {
    212  1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    213  1.1      tnn 	uint8_t bitstream[128 * 9 / 8];
    214  1.1      tnn 	struct bs_state s;
    215  1.1      tnn 	uint8_t row;
    216  1.1      tnn 	size_t rlen = (tocol + 1 - fromcol) * 2;
    217  1.1      tnn 	int error;
    218  1.1      tnn 
    219  1.1      tnn 	/*
    220  1.1      tnn 	 * Unlike iic(4), there is no way to force spi(4) to use polling.
    221  1.1      tnn 	 */
    222  1.2      tnn 	if (usepoll && !cold)
    223  1.1      tnn 		return 0;
    224  1.1      tnn 
    225  1.1      tnn 	ssdfb_bitstream_init(&s, bitstream);
    226  1.1      tnn 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_ROW_ADDRESS);
    227  1.1      tnn 	ssdfb_bitstream_append_data(&s, &fromrow, 1);
    228  1.1      tnn 	ssdfb_bitstream_append_data(&s, &torow, 1);
    229  1.1      tnn 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_COLUMN_ADDRESS);
    230  1.1      tnn 	ssdfb_bitstream_append_data(&s, &fromcol, 1);
    231  1.1      tnn 	ssdfb_bitstream_append_data(&s, &tocol, 1);
    232  1.1      tnn 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_WRITE_RAM);
    233  1.1      tnn 	ssdfb_bitstream_final(&s);
    234  1.1      tnn 	error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    235  1.1      tnn 	if (error)
    236  1.1      tnn 		return error;
    237  1.1      tnn 
    238  1.1      tnn 	KASSERT(rlen <= 128);
    239  1.1      tnn 	for (row = fromrow; row <= torow; row++) {
    240  1.1      tnn 		ssdfb_bitstream_init(&s, bitstream);
    241  1.1      tnn 		ssdfb_bitstream_append_data(&s, p, rlen);
    242  1.1      tnn 		ssdfb_bitstream_final(&s);
    243  1.1      tnn 		error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    244  1.1      tnn 		if (error)
    245  1.1      tnn 			return error;
    246  1.1      tnn 		p += stride;
    247  1.1      tnn 	}
    248  1.1      tnn 
    249  1.1      tnn 	return 0;
    250  1.1      tnn }
    251  1.1      tnn 
    252  1.1      tnn static void
    253  1.1      tnn ssdfb_bitstream_init(struct bs_state *s, uint8_t *dst)
    254  1.1      tnn {
    255  1.1      tnn 	s->base = s->cur = dst;
    256  1.1      tnn 	s->mask = 0x80;
    257  1.1      tnn }
    258  1.1      tnn 
    259  1.1      tnn static void
    260  1.1      tnn ssdfb_bitstream_append(struct bs_state *s, uint8_t b, uint8_t srcmask)
    261  1.1      tnn {
    262  1.1      tnn 	while(srcmask) {
    263  1.1      tnn 		if (b & srcmask)
    264  1.1      tnn 			*s->cur |= s->mask;
    265  1.1      tnn 		else
    266  1.1      tnn 			*s->cur &= ~s->mask;
    267  1.1      tnn 		srcmask >>= 1;
    268  1.1      tnn 		s->mask >>= 1;
    269  1.1      tnn 		if (!s->mask) {
    270  1.1      tnn 			s->mask = 0x80;
    271  1.1      tnn 			s->cur++;
    272  1.1      tnn 		}
    273  1.1      tnn 	}
    274  1.1      tnn }
    275  1.1      tnn 
    276  1.1      tnn static void
    277  1.1      tnn ssdfb_bitstream_append_cmd(struct bs_state *s, uint8_t cmd)
    278  1.1      tnn {
    279  1.1      tnn 	ssdfb_bitstream_append(s, 0, 1);
    280  1.1      tnn 	ssdfb_bitstream_append(s, cmd, 0x80);
    281  1.1      tnn }
    282  1.1      tnn 
    283  1.1      tnn static void
    284  1.1      tnn ssdfb_bitstream_append_data(struct bs_state *s, uint8_t *data, size_t len)
    285  1.1      tnn {
    286  1.1      tnn 	while(len--) {
    287  1.1      tnn 		ssdfb_bitstream_append(s, 1, 1);
    288  1.1      tnn 		ssdfb_bitstream_append(s, *data++, 0x80);
    289  1.1      tnn 	}
    290  1.1      tnn }
    291  1.1      tnn 
    292  1.1      tnn static void
    293  1.1      tnn ssdfb_bitstream_final(struct bs_state *s)
    294  1.1      tnn {
    295  1.1      tnn 	uint8_t padding_cmd = SSD1322_CMD_WRITE_RAM;
    296  1.1      tnn 	/* padding_cmd = SSDFB_NOP_CMD; */
    297  1.1      tnn 
    298  1.1      tnn 	while (s->mask != 0x80) {
    299  1.1      tnn 		ssdfb_bitstream_append_cmd(s, padding_cmd);
    300  1.1      tnn 	}
    301  1.1      tnn }
    302  1.1      tnn 
    303  1.1      tnn static void
    304  1.1      tnn ssdfb_spi_4wire_set_dc(struct ssdfb_spi_softc *sc, int value)
    305  1.1      tnn {
    306  1.6      tnn #ifdef FDT
    307  1.6      tnn 	fdtbus_gpio_write_raw(sc->sc_gpio_dc, value);
    308  1.6      tnn #else
    309  1.1      tnn 	panic("ssdfb_spi_4wire_set_dc");
    310  1.6      tnn #endif
    311  1.1      tnn }
    312  1.1      tnn 
    313  1.1      tnn static int
    314  1.1      tnn ssdfb_spi_cmd_4wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    315  1.1      tnn {
    316  1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    317  1.1      tnn 	int error;
    318  1.1      tnn 
    319  1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    320  1.1      tnn 	error = spi_send(sc->sc_sh, 1, cmd);
    321  1.1      tnn 	if (error)
    322  1.1      tnn 		return error;
    323  1.1      tnn 	if (len > 1) {
    324  1.1      tnn 		ssdfb_spi_4wire_set_dc(sc, 1);
    325  1.1      tnn 		len--;
    326  1.1      tnn 		cmd++;
    327  1.1      tnn 		error = spi_send(sc->sc_sh, len, cmd);
    328  1.1      tnn 		if (error)
    329  1.1      tnn 			return error;
    330  1.1      tnn 	}
    331  1.1      tnn 
    332  1.1      tnn 	return 0;
    333  1.1      tnn }
    334  1.1      tnn 
    335  1.1      tnn static int
    336  1.1      tnn ssdfb_spi_xfer_rect_4wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    337  1.1      tnn     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    338  1.1      tnn {
    339  1.1      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    340  1.1      tnn 	uint8_t row;
    341  1.1      tnn 	size_t rlen = (tocol + 1 - fromcol) * 2;
    342  1.1      tnn 	int error;
    343  1.1      tnn 	uint8_t cmd;
    344  1.1      tnn 	uint8_t data[2];
    345  1.1      tnn 
    346  1.1      tnn 	/*
    347  1.1      tnn 	 * Unlike iic(4), there is no way to force spi(4) to use polling.
    348  1.1      tnn 	 */
    349  1.2      tnn 	if (usepoll && !cold)
    350  1.1      tnn 		return 0;
    351  1.1      tnn 
    352  1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    353  1.1      tnn 	cmd = SSD1322_CMD_SET_ROW_ADDRESS;
    354  1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    355  1.1      tnn 	if (error)
    356  1.1      tnn 		return error;
    357  1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    358  1.1      tnn 	data[0] = fromrow;
    359  1.1      tnn 	data[1] = torow;
    360  1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    361  1.1      tnn 	if (error)
    362  1.1      tnn 		return error;
    363  1.1      tnn 
    364  1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    365  1.1      tnn 	cmd = SSD1322_CMD_SET_COLUMN_ADDRESS;
    366  1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    367  1.1      tnn 	if (error)
    368  1.1      tnn 		return error;
    369  1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    370  1.1      tnn 	data[0] = fromcol;
    371  1.1      tnn 	data[1] = tocol;
    372  1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    373  1.1      tnn 	if (error)
    374  1.1      tnn 		return error;
    375  1.1      tnn 
    376  1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    377  1.1      tnn 	cmd = SSD1322_CMD_WRITE_RAM;
    378  1.1      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    379  1.1      tnn 	if (error)
    380  1.1      tnn 		return error;
    381  1.1      tnn 
    382  1.1      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    383  1.1      tnn 	for (row = fromrow; row <= torow; row++) {
    384  1.1      tnn 		error = spi_send(sc->sc_sh, rlen, p);
    385  1.1      tnn 		if (error)
    386  1.1      tnn 			return error;
    387  1.1      tnn 		p += stride;
    388  1.1      tnn 	}
    389  1.1      tnn 
    390  1.1      tnn 	return 0;
    391  1.1      tnn }
    392  1.8      tnn 
    393  1.8      tnn static int
    394  1.8      tnn ssdfb_spi_xfer_rect_4wire_ssd1353(void *cookie, uint8_t fromcol, uint8_t tocol,
    395  1.8      tnn     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    396  1.8      tnn {
    397  1.8      tnn 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    398  1.8      tnn 	uint8_t row;
    399  1.8      tnn 	size_t rlen = (tocol + 1 - fromcol) * 3;
    400  1.8      tnn 	uint8_t bitstream[160 * 3];
    401  1.8      tnn 	uint8_t *dstp, *srcp, *endp;
    402  1.8      tnn 	int error;
    403  1.8      tnn 	uint8_t cmd;
    404  1.8      tnn 	uint8_t data[2];
    405  1.8      tnn 
    406  1.8      tnn 	/*
    407  1.8      tnn 	 * Unlike iic(4), there is no way to force spi(4) to use polling.
    408  1.8      tnn 	 */
    409  1.8      tnn 	if (usepoll && !cold)
    410  1.8      tnn 		return 0;
    411  1.8      tnn 
    412  1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    413  1.8      tnn 	cmd = SSD1322_CMD_SET_ROW_ADDRESS;
    414  1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    415  1.8      tnn 	if (error)
    416  1.8      tnn 		return error;
    417  1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    418  1.8      tnn 	data[0] = fromrow;
    419  1.8      tnn 	data[1] = torow;
    420  1.8      tnn 	if (sc->sc.sc_upsidedown) {
    421  1.8      tnn 		/* fix picture outside frame on 160x128 panel */
    422  1.8      tnn 		data[0] += 132 - sc->sc.sc_p->p_height;
    423  1.8      tnn 		data[1] += 132 - sc->sc.sc_p->p_height;
    424  1.8      tnn 	}
    425  1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    426  1.8      tnn 	if (error)
    427  1.8      tnn 		return error;
    428  1.8      tnn 
    429  1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    430  1.8      tnn 	cmd = SSD1322_CMD_SET_COLUMN_ADDRESS;
    431  1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    432  1.8      tnn 	if (error)
    433  1.8      tnn 		return error;
    434  1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    435  1.8      tnn 	data[0] = fromcol;
    436  1.8      tnn 	data[1] = tocol;
    437  1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(data), data);
    438  1.8      tnn 	if (error)
    439  1.8      tnn 		return error;
    440  1.8      tnn 
    441  1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 0);
    442  1.8      tnn 	cmd = SSD1322_CMD_WRITE_RAM;
    443  1.8      tnn 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    444  1.8      tnn 	if (error)
    445  1.8      tnn 		return error;
    446  1.8      tnn 
    447  1.8      tnn 	ssdfb_spi_4wire_set_dc(sc, 1);
    448  1.8      tnn 	KASSERT(rlen <= sizeof(bitstream));
    449  1.8      tnn 	for (row = fromrow; row <= torow; row++) {
    450  1.8      tnn 		/* downconvert each row from 32bpp rgba to 18bpp panel format */
    451  1.8      tnn 		dstp = bitstream;
    452  1.8      tnn 		endp = dstp + rlen;
    453  1.8      tnn 		srcp = p;
    454  1.8      tnn 		while (dstp < endp) {
    455  1.8      tnn 			*dstp++ = (*srcp++) >> 2;
    456  1.8      tnn 			*dstp++ = (*srcp++) >> 2;
    457  1.8      tnn 			*dstp++ = (*srcp++) >> 2;
    458  1.8      tnn 			srcp++;
    459  1.8      tnn 		}
    460  1.8      tnn 		error = spi_send(sc->sc_sh, rlen, bitstream);
    461  1.8      tnn 		if (error)
    462  1.8      tnn 			return error;
    463  1.8      tnn 		p += stride;
    464  1.8      tnn 	}
    465  1.8      tnn 
    466  1.8      tnn 	return 0;
    467  1.8      tnn }
    468