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ssdfb_spi.c revision 1.12
      1 /* $NetBSD: ssdfb_spi.c,v 1.12 2022/01/19 05:05:45 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2019 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Tobias Nygren.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: ssdfb_spi.c,v 1.12 2022/01/19 05:05:45 thorpej Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/device.h>
     37 #include <sys/kernel.h>
     38 #include <dev/wscons/wsdisplayvar.h>
     39 #include <dev/rasops/rasops.h>
     40 #include <dev/spi/spivar.h>
     41 #include <dev/ic/ssdfbvar.h>
     42 #include "opt_fdt.h"
     43 #ifdef FDT
     44 #include <dev/fdt/fdtvar.h>
     45 #endif
     46 
     47 struct bs_state {
     48 	uint8_t	*base;
     49 	uint8_t	*cur;
     50 	uint8_t	mask;
     51 };
     52 
     53 struct ssdfb_spi_softc {
     54 	struct ssdfb_softc	sc;
     55 	struct spi_handle	*sc_sh;
     56 #ifdef FDT
     57 	struct fdtbus_gpio_pin	*sc_gpio_dc;
     58 	struct fdtbus_gpio_pin	*sc_gpio_res;
     59 #endif
     60 	bool			sc_3wiremode;
     61 	bool			sc_late_dc_deassert;
     62 	uint8_t			sc_padding_cmd;
     63 };
     64 
     65 static int	ssdfb_spi_match(device_t, cfdata_t, void *);
     66 static void	ssdfb_spi_attach(device_t, device_t, void *);
     67 
     68 static int	ssdfb_spi_cmd_3wire(void *, uint8_t *, size_t, bool);
     69 static int	ssdfb_spi_xfer_rect_3wire_ssd1322(void *, uint8_t, uint8_t,
     70 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     71 
     72 static int	ssdfb_spi_cmd_4wire(void *, uint8_t *, size_t, bool);
     73 static int	ssdfb_spi_xfer_rect_4wire_sh1106(void *, uint8_t, uint8_t,
     74 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     75 static int	ssdfb_spi_xfer_rect_4wire_ssd1306(void *, uint8_t, uint8_t,
     76 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     77 static int	ssdfb_spi_xfer_rect_4wire_ssd1322(void *, uint8_t, uint8_t,
     78 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     79 static int	ssdfb_spi_xfer_rect_4wire_ssd1353(void *, uint8_t, uint8_t,
     80 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     81 
     82 static void	ssdfb_bitstream_init(struct bs_state *, uint8_t *);
     83 static void	ssdfb_bitstream_append(struct bs_state *, uint8_t, uint8_t);
     84 static void	ssdfb_bitstream_append_cmd(struct bs_state *, uint8_t);
     85 static void	ssdfb_bitstream_append_data(struct bs_state *, uint8_t *,
     86 		    size_t);
     87 static void	ssdfb_bitstream_final(struct bs_state *, uint8_t);
     88 
     89 CFATTACH_DECL_NEW(ssdfb_spi, sizeof(struct ssdfb_spi_softc),
     90     ssdfb_spi_match, ssdfb_spi_attach, NULL, NULL);
     91 
     92 static const struct device_compatible_entry compat_data[] = {
     93 	{ .compat = "solomon,ssd1306",	.value = SSDFB_PRODUCT_SSD1306_GENERIC },
     94 	{ .compat = "sino,sh1106",	.value = SSDFB_PRODUCT_SH1106_GENERIC },
     95 	{ .compat = "solomon,ssd1322",	.value = SSDFB_PRODUCT_SSD1322_GENERIC },
     96 	{ .compat = "solomon,ssd1353",	.value = SSDFB_PRODUCT_SSD1353_GENERIC },
     97 	{ .compat = "dep160128a",	.value = SSDFB_PRODUCT_DEP_160128A_RGB },
     98 	DEVICE_COMPAT_EOL
     99 };
    100 
    101 static int
    102 ssdfb_spi_match(device_t parent, cfdata_t match, void *aux)
    103 {
    104 	struct spi_attach_args *sa = aux;
    105 
    106 	return spi_compatible_match(sa, match, compat_data);
    107 }
    108 
    109 static void
    110 ssdfb_spi_attach(device_t parent, device_t self, void *aux)
    111 {
    112 	struct ssdfb_spi_softc *sc = device_private(self);
    113 	struct cfdata *cf = device_cfdata(self);
    114 	struct spi_attach_args *sa = aux;
    115 	int flags = cf->cf_flags;
    116 	int error;
    117 
    118 	sc->sc.sc_dev = self;
    119 	sc->sc_sh = sa->sa_handle;
    120 	sc->sc.sc_cookie = (void *)sc;
    121 	if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN) {
    122 		const struct device_compatible_entry *dce =
    123 			device_compatible_lookup(sa->sa_compat, sa->sa_ncompat, compat_data);
    124 		if (dce)
    125 			flags |= (int)dce->value;
    126 		else
    127 			flags |= SSDFB_PRODUCT_SSD1322_GENERIC;
    128 	}
    129 
    130 	/*
    131 	 * SSD1306 and SSD1322 data sheets specify 100ns cycle time.
    132 	 */
    133 	error = spi_configure(sa->sa_handle, SPI_MODE_0, 10000000);
    134 	if (error) {
    135 		aprint_error(": failed to set Mode 0 @ 10MHz, error=%d\n",
    136 		    error);
    137 		return;
    138 	}
    139 
    140 	/*
    141 	 * Note on interface modes.
    142 	 *
    143 	 * 3 wire mode sends 9 bit sequences over the MOSI, MSB contains
    144 	 * the bit that determines if the lower 8 bits are command or data.
    145 	 *
    146 	 * 4 wire mode sends 8 bit sequences and requires an auxiliary GPIO
    147 	 * pin for the command/data bit.
    148 	 */
    149 #ifdef FDT
    150 	const int phandle = sa->sa_cookie;
    151 	sc->sc_gpio_dc =
    152 	    fdtbus_gpio_acquire(phandle, "dc-gpio", GPIO_PIN_OUTPUT);
    153 	if (!sc->sc_gpio_dc)
    154 		sc->sc_gpio_dc =
    155 		    fdtbus_gpio_acquire(phandle, "cd-gpio", GPIO_PIN_OUTPUT);
    156 	sc->sc_3wiremode = (sc->sc_gpio_dc == NULL);
    157 	sc->sc_gpio_res =
    158 	    fdtbus_gpio_acquire(phandle, "res-gpio", GPIO_PIN_OUTPUT);
    159 	if (sc->sc_gpio_res) {
    160 		fdtbus_gpio_write_raw(sc->sc_gpio_res, 0);
    161 		DELAY(100);
    162 		fdtbus_gpio_write_raw(sc->sc_gpio_res, 1);
    163 		DELAY(100);
    164 	}
    165 #else
    166 	sc->sc_3wiremode = true;
    167 #endif
    168 
    169 	sc->sc.sc_cmd = sc->sc_3wiremode
    170 	    ? ssdfb_spi_cmd_3wire
    171 	    : ssdfb_spi_cmd_4wire;
    172 
    173 	switch (flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) {
    174 	case SSDFB_PRODUCT_SH1106_GENERIC:
    175 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    176 		    ? NULL
    177 		    : ssdfb_spi_xfer_rect_4wire_sh1106;
    178 		sc->sc_padding_cmd = SSDFB_CMD_NOP;
    179 		sc->sc_late_dc_deassert = true;
    180 		break;
    181 	case SSDFB_PRODUCT_SSD1306_GENERIC:
    182 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    183 		    ? NULL
    184 		    : ssdfb_spi_xfer_rect_4wire_ssd1306;
    185 		sc->sc_padding_cmd = SSDFB_CMD_NOP;
    186 		sc->sc_late_dc_deassert = true;
    187 		break;
    188 	case SSDFB_PRODUCT_SSD1322_GENERIC:
    189 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    190 		    ? ssdfb_spi_xfer_rect_3wire_ssd1322
    191 		    : ssdfb_spi_xfer_rect_4wire_ssd1322;
    192 		sc->sc_padding_cmd = SSD1322_CMD_WRITE_RAM;
    193 		break;
    194 	case SSDFB_PRODUCT_SSD1353_GENERIC:
    195 	case SSDFB_PRODUCT_DEP_160128A_RGB:
    196 		sc->sc.sc_transfer_rect = sc->sc_3wiremode
    197 		    ? NULL /* not supported here */
    198 		    : ssdfb_spi_xfer_rect_4wire_ssd1353;
    199 		break;
    200 	}
    201 
    202 	if (!sc->sc.sc_transfer_rect) {
    203 		aprint_error(": sc_transfer_rect not implemented\n");
    204 		return;
    205 	}
    206 
    207 	ssdfb_attach(&sc->sc, flags);
    208 
    209 	aprint_normal_dev(self, "%d-wire SPI interface\n",
    210 	    sc->sc_3wiremode == true ? 3 : 4);
    211 }
    212 
    213 static int
    214 ssdfb_spi_cmd_3wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    215 {
    216 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    217 	uint8_t bitstream[16 * 9 / 8];
    218 	struct bs_state s;
    219 
    220 	KASSERT(len > 0 && len <= 16);
    221 	ssdfb_bitstream_init(&s, bitstream);
    222 	ssdfb_bitstream_append_cmd(&s, *cmd);
    223 	cmd++;
    224 	len--;
    225 	ssdfb_bitstream_append_data(&s, cmd, len);
    226 	ssdfb_bitstream_final(&s, sc->sc_padding_cmd);
    227 
    228 	return spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    229 }
    230 
    231 static int
    232 ssdfb_spi_xfer_rect_3wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    233     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    234 {
    235 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    236 	uint8_t bitstream[128 * 9 / 8];
    237 	struct bs_state s;
    238 	size_t rlen = (tocol + 1 - fromcol) * 2;
    239 	int error;
    240 
    241 	/*
    242 	 * Unlike iic(4), there is no way to force spi(4) to use polling.
    243 	 */
    244 	if (usepoll && !cold)
    245 		return 0;
    246 
    247 	ssdfb_bitstream_init(&s, bitstream);
    248 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_ROW_ADDRESS);
    249 	ssdfb_bitstream_append_data(&s, &fromrow, 1);
    250 	ssdfb_bitstream_append_data(&s, &torow, 1);
    251 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_COLUMN_ADDRESS);
    252 	ssdfb_bitstream_append_data(&s, &fromcol, 1);
    253 	ssdfb_bitstream_append_data(&s, &tocol, 1);
    254 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_WRITE_RAM);
    255 	ssdfb_bitstream_final(&s, sc->sc_padding_cmd);
    256 	error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    257 	if (error)
    258 		return error;
    259 
    260 	KASSERT(rlen <= 128);
    261 	while (fromrow <= torow) {
    262 		ssdfb_bitstream_init(&s, bitstream);
    263 		ssdfb_bitstream_append_data(&s, p, rlen);
    264 		ssdfb_bitstream_final(&s, sc->sc_padding_cmd);
    265 		error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    266 		if (error)
    267 			return error;
    268 		fromrow++;
    269 		p += stride;
    270 	}
    271 
    272 	return 0;
    273 }
    274 
    275 static void
    276 ssdfb_bitstream_init(struct bs_state *s, uint8_t *dst)
    277 {
    278 	s->base = s->cur = dst;
    279 	s->mask = 0x80;
    280 }
    281 
    282 static void
    283 ssdfb_bitstream_append(struct bs_state *s, uint8_t b, uint8_t srcmask)
    284 {
    285 	while(srcmask) {
    286 		if (b & srcmask)
    287 			*s->cur |= s->mask;
    288 		else
    289 			*s->cur &= ~s->mask;
    290 		srcmask >>= 1;
    291 		s->mask >>= 1;
    292 		if (!s->mask) {
    293 			s->mask = 0x80;
    294 			s->cur++;
    295 		}
    296 	}
    297 }
    298 
    299 static void
    300 ssdfb_bitstream_append_cmd(struct bs_state *s, uint8_t cmd)
    301 {
    302 	ssdfb_bitstream_append(s, 0, 1);
    303 	ssdfb_bitstream_append(s, cmd, 0x80);
    304 }
    305 
    306 static void
    307 ssdfb_bitstream_append_data(struct bs_state *s, uint8_t *data, size_t len)
    308 {
    309 	while(len--) {
    310 		ssdfb_bitstream_append(s, 1, 1);
    311 		ssdfb_bitstream_append(s, *data++, 0x80);
    312 	}
    313 }
    314 
    315 static void
    316 ssdfb_bitstream_final(struct bs_state *s, uint8_t padding_cmd)
    317 {
    318 	while (s->mask != 0x80) {
    319 		ssdfb_bitstream_append_cmd(s, padding_cmd);
    320 	}
    321 }
    322 
    323 static void
    324 ssdfb_spi_4wire_set_dc(struct ssdfb_spi_softc *sc, int value)
    325 {
    326 #ifdef FDT
    327 	fdtbus_gpio_write_raw(sc->sc_gpio_dc, value);
    328 #else
    329 	panic("ssdfb_spi_4wire_set_dc");
    330 #endif
    331 }
    332 
    333 static int
    334 ssdfb_spi_cmd_4wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    335 {
    336 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    337 	int error;
    338 
    339 	ssdfb_spi_4wire_set_dc(sc, 0);
    340 	error = spi_send(sc->sc_sh, 1, cmd);
    341 	if (error)
    342 		return error;
    343 	if (len > 1) {
    344 		if (!sc->sc_late_dc_deassert)
    345 			ssdfb_spi_4wire_set_dc(sc, 1);
    346 		len--;
    347 		cmd++;
    348 		error = spi_send(sc->sc_sh, len, cmd);
    349 		if (error)
    350 			return error;
    351 	}
    352 
    353 	return 0;
    354 }
    355 
    356 static int
    357 ssdfb_spi_xfer_rect_4wire_sh1106(void *cookie, uint8_t fromcol, uint8_t tocol,
    358     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    359 {
    360 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    361 	size_t rlen = tocol + 1 - fromcol;
    362 	int error;
    363 	uint8_t cmd[] = {
    364 		SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage,
    365 		SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE + (fromcol >> 4),
    366 		SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE + (fromcol & 0xf)
    367 	};
    368 
    369 	if (usepoll && !cold)
    370 		return 0;
    371 
    372 	while (frompage <= topage) {
    373 		cmd[0] = SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE + frompage;
    374 		ssdfb_spi_4wire_set_dc(sc, 0);
    375 		error = spi_send(sc->sc_sh, sizeof(cmd), cmd);
    376 		if (error)
    377 			return error;
    378 		ssdfb_spi_4wire_set_dc(sc, 1);
    379 		error = spi_send(sc->sc_sh, rlen, p);
    380 		if (error)
    381 			return error;
    382 		frompage++;
    383 		p += stride;
    384 	}
    385 
    386 	return 0;
    387 }
    388 
    389 static int
    390 ssdfb_spi_xfer_rect_4wire_ssd1306(void *cookie, uint8_t fromcol, uint8_t tocol,
    391     uint8_t frompage, uint8_t topage, uint8_t *p, size_t stride, bool usepoll)
    392 {
    393 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    394 	size_t rlen = tocol + 1 - fromcol;
    395 	int error;
    396 	uint8_t cmd[] = {
    397 		SSD1306_CMD_SET_MEMORY_ADDRESSING_MODE,
    398 		SSD1306_MEMORY_ADDRESSING_MODE_HORIZONTAL,
    399 		SSD1306_CMD_SET_COLUMN_ADDRESS,
    400 		fromcol,
    401 		tocol,
    402 		SSD1306_CMD_SET_PAGE_ADDRESS,
    403 		frompage,
    404 		topage
    405 	};
    406 
    407 	if (usepoll && !cold)
    408 		return 0;
    409 
    410 	ssdfb_spi_4wire_set_dc(sc, 0);
    411 	error = spi_send(sc->sc_sh, sizeof(cmd), cmd);
    412 	if (error)
    413 		return error;
    414 	ssdfb_spi_4wire_set_dc(sc, 1);
    415 
    416 	while (frompage <= topage) {
    417 		error = spi_send(sc->sc_sh, rlen, p);
    418 		if (error)
    419 			return error;
    420 		frompage++;
    421 		p += stride;
    422 	}
    423 
    424 	return 0;
    425 }
    426 
    427 static int
    428 ssdfb_spi_xfer_rect_4wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    429     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    430 {
    431 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    432 	size_t rlen = (tocol + 1 - fromcol) * 2;
    433 	int error;
    434 	uint8_t cmd;
    435 	uint8_t data[2];
    436 
    437 	if (usepoll && !cold)
    438 		return 0;
    439 
    440 	ssdfb_spi_4wire_set_dc(sc, 0);
    441 	cmd = SSD1322_CMD_SET_ROW_ADDRESS;
    442 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    443 	if (error)
    444 		return error;
    445 	ssdfb_spi_4wire_set_dc(sc, 1);
    446 	data[0] = fromrow;
    447 	data[1] = torow;
    448 	error = spi_send(sc->sc_sh, sizeof(data), data);
    449 	if (error)
    450 		return error;
    451 
    452 	ssdfb_spi_4wire_set_dc(sc, 0);
    453 	cmd = SSD1322_CMD_SET_COLUMN_ADDRESS;
    454 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    455 	if (error)
    456 		return error;
    457 	ssdfb_spi_4wire_set_dc(sc, 1);
    458 	data[0] = fromcol;
    459 	data[1] = tocol;
    460 	error = spi_send(sc->sc_sh, sizeof(data), data);
    461 	if (error)
    462 		return error;
    463 
    464 	ssdfb_spi_4wire_set_dc(sc, 0);
    465 	cmd = SSD1322_CMD_WRITE_RAM;
    466 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    467 	if (error)
    468 		return error;
    469 
    470 	ssdfb_spi_4wire_set_dc(sc, 1);
    471 	while (fromrow <= torow) {
    472 		error = spi_send(sc->sc_sh, rlen, p);
    473 		if (error)
    474 			return error;
    475 		fromrow++;
    476 		p += stride;
    477 	}
    478 
    479 	return 0;
    480 }
    481 
    482 static int
    483 ssdfb_spi_xfer_rect_4wire_ssd1353(void *cookie, uint8_t fromcol, uint8_t tocol,
    484     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    485 {
    486 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    487 	size_t rlen = (tocol + 1 - fromcol) * 3;
    488 	uint8_t bitstream[160 * 3];
    489 	uint8_t *dstp, *srcp, *endp;
    490 	int error;
    491 	uint8_t cmd;
    492 	uint8_t data[2];
    493 
    494 	if (usepoll && !cold)
    495 		return 0;
    496 
    497 	ssdfb_spi_4wire_set_dc(sc, 0);
    498 	cmd = SSD1353_CMD_SET_ROW_ADDRESS;
    499 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    500 	if (error)
    501 		return error;
    502 	ssdfb_spi_4wire_set_dc(sc, 1);
    503 	data[0] = fromrow;
    504 	data[1] = torow;
    505 	if (sc->sc.sc_upsidedown) {
    506 		/* fix picture outside frame on 160x128 panel */
    507 		data[0] += 132 - sc->sc.sc_p->p_height;
    508 		data[1] += 132 - sc->sc.sc_p->p_height;
    509 	}
    510 	error = spi_send(sc->sc_sh, sizeof(data), data);
    511 	if (error)
    512 		return error;
    513 
    514 	ssdfb_spi_4wire_set_dc(sc, 0);
    515 	cmd = SSD1353_CMD_SET_COLUMN_ADDRESS;
    516 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    517 	if (error)
    518 		return error;
    519 	ssdfb_spi_4wire_set_dc(sc, 1);
    520 	data[0] = fromcol;
    521 	data[1] = tocol;
    522 	error = spi_send(sc->sc_sh, sizeof(data), data);
    523 	if (error)
    524 		return error;
    525 
    526 	ssdfb_spi_4wire_set_dc(sc, 0);
    527 	cmd = SSD1353_CMD_WRITE_RAM;
    528 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    529 	if (error)
    530 		return error;
    531 
    532 	ssdfb_spi_4wire_set_dc(sc, 1);
    533 	KASSERT(rlen <= sizeof(bitstream));
    534 	while (fromrow <= torow) {
    535 		/* downconvert each row from 32bpp rgba to 18bpp panel format */
    536 		dstp = bitstream;
    537 		endp = dstp + rlen;
    538 		srcp = p;
    539 		while (dstp < endp) {
    540 			*dstp++ = (*srcp++) >> 2;
    541 			*dstp++ = (*srcp++) >> 2;
    542 			*dstp++ = (*srcp++) >> 2;
    543 			srcp++;
    544 		}
    545 		error = spi_send(sc->sc_sh, rlen, bitstream);
    546 		if (error)
    547 			return error;
    548 		fromrow++;
    549 		p += stride;
    550 	}
    551 
    552 	return 0;
    553 }
    554