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ssdfb_spi.c revision 1.4
      1 /* $NetBSD: ssdfb_spi.c,v 1.4 2021/01/17 21:42:35 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2019 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Tobias Nygren.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: ssdfb_spi.c,v 1.4 2021/01/17 21:42:35 thorpej Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/device.h>
     37 #include <sys/kernel.h>
     38 #include <dev/wscons/wsdisplayvar.h>
     39 #include <dev/rasops/rasops.h>
     40 #include <dev/spi/spivar.h>
     41 #include <dev/ic/ssdfbvar.h>
     42 
     43 struct bs_state {
     44 	uint8_t	*base;
     45 	uint8_t	*cur;
     46 	uint8_t	mask;
     47 };
     48 
     49 struct ssdfb_spi_softc {
     50 	struct ssdfb_softc	sc;
     51 	struct spi_handle	*sc_sh;
     52 	bool			sc_3wiremode;
     53 };
     54 
     55 static int	ssdfb_spi_match(device_t, cfdata_t, void *);
     56 static void	ssdfb_spi_attach(device_t, device_t, void *);
     57 
     58 static int	ssdfb_spi_cmd_3wire(void *, uint8_t *, size_t, bool);
     59 static int	ssdfb_spi_xfer_rect_3wire_ssd1322(void *, uint8_t, uint8_t,
     60 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     61 
     62 static int	ssdfb_spi_cmd_4wire(void *, uint8_t *, size_t, bool);
     63 static int	ssdfb_spi_xfer_rect_4wire_ssd1322(void *, uint8_t, uint8_t,
     64 		    uint8_t, uint8_t, uint8_t *, size_t, bool);
     65 
     66 static void	ssdfb_bitstream_init(struct bs_state *, uint8_t *);
     67 static void	ssdfb_bitstream_append(struct bs_state *, uint8_t, uint8_t);
     68 static void	ssdfb_bitstream_append_cmd(struct bs_state *, uint8_t);
     69 static void	ssdfb_bitstream_append_data(struct bs_state *, uint8_t *,
     70 		    size_t);
     71 static void	ssdfb_bitstream_final(struct bs_state *);
     72 
     73 CFATTACH_DECL_NEW(ssdfb_spi, sizeof(struct ssdfb_spi_softc),
     74     ssdfb_spi_match, ssdfb_spi_attach, NULL, NULL);
     75 
     76 static const struct device_compatible_entry compat_data[] = {
     77 	{ .compat = "solomon,ssd1322" },
     78 
     79 	{ 0 }
     80 };
     81 
     82 static int
     83 ssdfb_spi_match(device_t parent, cfdata_t match, void *aux)
     84 {
     85 	struct spi_attach_args *sa = aux;
     86 	int res;
     87 
     88 	res = spi_compatible_match(sa, match, compat_data);
     89 	if (!res)
     90 		return res;
     91 
     92 	/*
     93 	 * SSD1306 and SSD1322 data sheets specify 100ns cycle time.
     94 	 */
     95 	if (spi_configure(sa->sa_handle, SPI_MODE_0, 10000000))
     96 		res = 0;
     97 
     98 	return res;
     99 }
    100 
    101 static void
    102 ssdfb_spi_attach(device_t parent, device_t self, void *aux)
    103 {
    104 	struct ssdfb_spi_softc *sc = device_private(self);
    105 	struct cfdata *cf = device_cfdata(self);
    106 	struct spi_attach_args *sa = aux;
    107 	int flags = cf->cf_flags;
    108 
    109 	sc->sc.sc_dev = self;
    110 	sc->sc_sh = sa->sa_handle;
    111 	sc->sc.sc_cookie = (void *)sc;
    112 	if ((flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) == SSDFB_PRODUCT_UNKNOWN)
    113 		flags |= SSDFB_PRODUCT_SSD1322_GENERIC;
    114 	/*
    115 	 * Note on interface modes.
    116 	 *
    117 	 * 3 wire mode sends 9 bit sequences over the MOSI, MSB contains
    118 	 * the bit that determines if the lower 8 bits are command or data.
    119 	 *
    120 	 * 4 wire mode sends 8 bit sequences and requires an auxiliary GPIO
    121 	 * pin for the command/data bit. But in other to allocate a GPIO pin
    122 	 * we need to use fdt, so only support 3 wire mode in this frontend,
    123 	 * at least for now.
    124 	 */
    125 	sc->sc_3wiremode = true;
    126 
    127 	switch (flags & SSDFB_ATTACH_FLAG_PRODUCT_MASK) {
    128 	case SSDFB_PRODUCT_SSD1322_GENERIC:
    129 		if (sc->sc_3wiremode) {
    130 			sc->sc.sc_transfer_rect =
    131 			    ssdfb_spi_xfer_rect_3wire_ssd1322;
    132 		} else {
    133 			sc->sc.sc_transfer_rect =
    134 			    ssdfb_spi_xfer_rect_4wire_ssd1322;
    135 		}
    136 		break;
    137 	default:
    138 		panic("ssdfb_spi_attach: product not implemented");
    139 	}
    140 	if (sc->sc_3wiremode) {
    141 		sc->sc.sc_cmd = ssdfb_spi_cmd_3wire;
    142 	} else {
    143 		sc->sc.sc_cmd = ssdfb_spi_cmd_4wire;
    144 	}
    145 
    146 	ssdfb_attach(&sc->sc, flags);
    147 
    148 	device_printf(sc->sc.sc_dev, "%d-wire SPI interface\n",
    149 	    sc->sc_3wiremode == true ? 3 : 4);
    150 }
    151 
    152 static int
    153 ssdfb_spi_cmd_3wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    154 {
    155 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    156 	uint8_t bitstream[16 * 9 / 8];
    157 	struct bs_state s;
    158 
    159 	KASSERT(len > 0 && len <= 16);
    160 	ssdfb_bitstream_init(&s, bitstream);
    161 	ssdfb_bitstream_append_cmd(&s, *cmd);
    162 	cmd++;
    163 	len--;
    164 	ssdfb_bitstream_append_data(&s, cmd, len);
    165 	ssdfb_bitstream_final(&s);
    166 
    167 	return spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    168 }
    169 
    170 static int
    171 ssdfb_spi_xfer_rect_3wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    172     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    173 {
    174 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    175 	uint8_t bitstream[128 * 9 / 8];
    176 	struct bs_state s;
    177 	uint8_t row;
    178 	size_t rlen = (tocol + 1 - fromcol) * 2;
    179 	int error;
    180 
    181 	/*
    182 	 * Unlike iic(4), there is no way to force spi(4) to use polling.
    183 	 */
    184 	if (usepoll && !cold)
    185 		return 0;
    186 
    187 	ssdfb_bitstream_init(&s, bitstream);
    188 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_ROW_ADDRESS);
    189 	ssdfb_bitstream_append_data(&s, &fromrow, 1);
    190 	ssdfb_bitstream_append_data(&s, &torow, 1);
    191 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_SET_COLUMN_ADDRESS);
    192 	ssdfb_bitstream_append_data(&s, &fromcol, 1);
    193 	ssdfb_bitstream_append_data(&s, &tocol, 1);
    194 	ssdfb_bitstream_append_cmd(&s, SSD1322_CMD_WRITE_RAM);
    195 	ssdfb_bitstream_final(&s);
    196 	error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    197 	if (error)
    198 		return error;
    199 
    200 	KASSERT(rlen <= 128);
    201 	for (row = fromrow; row <= torow; row++) {
    202 		ssdfb_bitstream_init(&s, bitstream);
    203 		ssdfb_bitstream_append_data(&s, p, rlen);
    204 		ssdfb_bitstream_final(&s);
    205 		error = spi_send(sc->sc_sh, s.cur - s.base, bitstream);
    206 		if (error)
    207 			return error;
    208 		p += stride;
    209 	}
    210 
    211 	return 0;
    212 }
    213 
    214 static void
    215 ssdfb_bitstream_init(struct bs_state *s, uint8_t *dst)
    216 {
    217 	s->base = s->cur = dst;
    218 	s->mask = 0x80;
    219 }
    220 
    221 static void
    222 ssdfb_bitstream_append(struct bs_state *s, uint8_t b, uint8_t srcmask)
    223 {
    224 	while(srcmask) {
    225 		if (b & srcmask)
    226 			*s->cur |= s->mask;
    227 		else
    228 			*s->cur &= ~s->mask;
    229 		srcmask >>= 1;
    230 		s->mask >>= 1;
    231 		if (!s->mask) {
    232 			s->mask = 0x80;
    233 			s->cur++;
    234 		}
    235 	}
    236 }
    237 
    238 static void
    239 ssdfb_bitstream_append_cmd(struct bs_state *s, uint8_t cmd)
    240 {
    241 	ssdfb_bitstream_append(s, 0, 1);
    242 	ssdfb_bitstream_append(s, cmd, 0x80);
    243 }
    244 
    245 static void
    246 ssdfb_bitstream_append_data(struct bs_state *s, uint8_t *data, size_t len)
    247 {
    248 	while(len--) {
    249 		ssdfb_bitstream_append(s, 1, 1);
    250 		ssdfb_bitstream_append(s, *data++, 0x80);
    251 	}
    252 }
    253 
    254 static void
    255 ssdfb_bitstream_final(struct bs_state *s)
    256 {
    257 	uint8_t padding_cmd = SSD1322_CMD_WRITE_RAM;
    258 	/* padding_cmd = SSDFB_NOP_CMD; */
    259 
    260 	while (s->mask != 0x80) {
    261 		ssdfb_bitstream_append_cmd(s, padding_cmd);
    262 	}
    263 }
    264 
    265 static void
    266 ssdfb_spi_4wire_set_dc(struct ssdfb_spi_softc *sc, int value)
    267 {
    268 	/* TODO: this should toggle an auxilliary GPIO pin */
    269 	panic("ssdfb_spi_4wire_set_dc");
    270 }
    271 
    272 static int
    273 ssdfb_spi_cmd_4wire(void *cookie, uint8_t *cmd, size_t len, bool usepoll)
    274 {
    275 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    276 	int error;
    277 
    278 	ssdfb_spi_4wire_set_dc(sc, 0);
    279 	error = spi_send(sc->sc_sh, 1, cmd);
    280 	if (error)
    281 		return error;
    282 	if (len > 1) {
    283 		ssdfb_spi_4wire_set_dc(sc, 1);
    284 		len--;
    285 		cmd++;
    286 		error = spi_send(sc->sc_sh, len, cmd);
    287 		if (error)
    288 			return error;
    289 	}
    290 
    291 	return 0;
    292 }
    293 
    294 static int
    295 ssdfb_spi_xfer_rect_4wire_ssd1322(void *cookie, uint8_t fromcol, uint8_t tocol,
    296     uint8_t fromrow, uint8_t torow, uint8_t *p, size_t stride, bool usepoll)
    297 {
    298 	struct ssdfb_spi_softc *sc = (struct ssdfb_spi_softc *)cookie;
    299 	uint8_t row;
    300 	size_t rlen = (tocol + 1 - fromcol) * 2;
    301 	int error;
    302 	uint8_t cmd;
    303 	uint8_t data[2];
    304 
    305 	/*
    306 	 * Unlike iic(4), there is no way to force spi(4) to use polling.
    307 	 */
    308 	if (usepoll && !cold)
    309 		return 0;
    310 
    311 	ssdfb_spi_4wire_set_dc(sc, 0);
    312 	cmd = SSD1322_CMD_SET_ROW_ADDRESS;
    313 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    314 	if (error)
    315 		return error;
    316 	ssdfb_spi_4wire_set_dc(sc, 1);
    317 	data[0] = fromrow;
    318 	data[1] = torow;
    319 	error = spi_send(sc->sc_sh, sizeof(data), data);
    320 	if (error)
    321 		return error;
    322 
    323 	ssdfb_spi_4wire_set_dc(sc, 0);
    324 	cmd = SSD1322_CMD_SET_COLUMN_ADDRESS;
    325 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    326 	if (error)
    327 		return error;
    328 	ssdfb_spi_4wire_set_dc(sc, 1);
    329 	data[0] = fromcol;
    330 	data[1] = tocol;
    331 	error = spi_send(sc->sc_sh, sizeof(data), data);
    332 	if (error)
    333 		return error;
    334 
    335 	ssdfb_spi_4wire_set_dc(sc, 0);
    336 	cmd = SSD1322_CMD_WRITE_RAM;
    337 	error = spi_send(sc->sc_sh, sizeof(cmd), &cmd);
    338 	if (error)
    339 		return error;
    340 
    341 	ssdfb_spi_4wire_set_dc(sc, 1);
    342 	for (row = fromrow; row <= torow; row++) {
    343 		error = spi_send(sc->sc_sh, rlen, p);
    344 		if (error)
    345 			return error;
    346 		p += stride;
    347 	}
    348 
    349 	return 0;
    350 }
    351