ms.c revision 1.3 1 1.3 gwr /* $NetBSD: ms.c,v 1.3 1996/02/19 04:36:15 gwr Exp $ */
2 1.1 gwr
3 1.1 gwr /*
4 1.1 gwr * Copyright (c) 1992, 1993
5 1.1 gwr * The Regents of the University of California. All rights reserved.
6 1.1 gwr *
7 1.1 gwr * This software was developed by the Computer Systems Engineering group
8 1.1 gwr * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 1.1 gwr * contributed to Berkeley.
10 1.1 gwr *
11 1.1 gwr * All advertising materials mentioning features or use of this software
12 1.1 gwr * must display the following acknowledgement:
13 1.1 gwr * This product includes software developed by the University of
14 1.1 gwr * California, Lawrence Berkeley Laboratory.
15 1.1 gwr *
16 1.1 gwr * Redistribution and use in source and binary forms, with or without
17 1.1 gwr * modification, are permitted provided that the following conditions
18 1.1 gwr * are met:
19 1.1 gwr * 1. Redistributions of source code must retain the above copyright
20 1.1 gwr * notice, this list of conditions and the following disclaimer.
21 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
22 1.1 gwr * notice, this list of conditions and the following disclaimer in the
23 1.1 gwr * documentation and/or other materials provided with the distribution.
24 1.1 gwr * 3. All advertising materials mentioning features or use of this software
25 1.1 gwr * must display the following acknowledgement:
26 1.1 gwr * This product includes software developed by the University of
27 1.1 gwr * California, Berkeley and its contributors.
28 1.1 gwr * 4. Neither the name of the University nor the names of its contributors
29 1.1 gwr * may be used to endorse or promote products derived from this software
30 1.1 gwr * without specific prior written permission.
31 1.1 gwr *
32 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 1.1 gwr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 1.1 gwr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 1.1 gwr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 1.1 gwr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 1.1 gwr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 1.1 gwr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 1.1 gwr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 1.1 gwr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 1.1 gwr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 1.1 gwr * SUCH DAMAGE.
43 1.1 gwr *
44 1.1 gwr * @(#)ms.c 8.1 (Berkeley) 6/11/93
45 1.1 gwr */
46 1.1 gwr
47 1.1 gwr /*
48 1.1 gwr * Mouse driver (/dev/mouse)
49 1.1 gwr */
50 1.1 gwr
51 1.1 gwr /*
52 1.1 gwr * Zilog Z8530 Dual UART driver (mouse interface)
53 1.1 gwr *
54 1.1 gwr * This is the "slave" driver that will be attached to
55 1.1 gwr * the "zsc" driver for a Sun mouse.
56 1.1 gwr */
57 1.1 gwr
58 1.1 gwr #include <sys/param.h>
59 1.1 gwr #include <sys/systm.h>
60 1.1 gwr #include <sys/proc.h>
61 1.1 gwr #include <sys/device.h>
62 1.1 gwr #include <sys/conf.h>
63 1.1 gwr #include <sys/ioctl.h>
64 1.1 gwr #include <sys/kernel.h>
65 1.1 gwr #include <sys/syslog.h>
66 1.1 gwr
67 1.1 gwr #include <dev/ic/z8530reg.h>
68 1.1 gwr #include <machine/z8530var.h>
69 1.1 gwr #include <machine/vuid_event.h>
70 1.1 gwr
71 1.1 gwr #include "event_var.h"
72 1.1 gwr
73 1.1 gwr /*
74 1.1 gwr * How many input characters we can buffer.
75 1.1 gwr * The port-specific var.h may override this.
76 1.1 gwr * Note: must be a power of two!
77 1.1 gwr */
78 1.1 gwr #define MS_RX_RING_SIZE 256
79 1.1 gwr #define MS_RX_RING_MASK (MS_RX_RING_SIZE-1)
80 1.1 gwr /*
81 1.1 gwr * Output buffer. Only need a few chars.
82 1.1 gwr */
83 1.1 gwr #define MS_TX_RING_SIZE 16
84 1.1 gwr #define MS_TX_RING_MASK (MS_TX_RING_SIZE-1)
85 1.1 gwr /*
86 1.1 gwr * Keyboard serial line speed is fixed at 1200 bps.
87 1.1 gwr */
88 1.1 gwr #define MS_BPS 1200
89 1.1 gwr
90 1.1 gwr /*
91 1.1 gwr * Mouse state. A Mouse Systems mouse is a fairly simple device,
92 1.1 gwr * producing five-byte blobs of the form:
93 1.1 gwr *
94 1.1 gwr * b dx dy dx dy
95 1.1 gwr *
96 1.1 gwr * where b is the button state, encoded as 0x80|(~buttons)---there are
97 1.1 gwr * three buttons (4=left, 2=middle, 1=right)---and dx,dy are X and Y
98 1.1 gwr * delta values, none of which have are in [0x80..0x87]. (This lets
99 1.1 gwr * us sync up with the mouse after an error.)
100 1.1 gwr */
101 1.1 gwr struct ms_softc {
102 1.1 gwr struct device ms_dev; /* required first: base device */
103 1.1 gwr struct zs_chanstate *ms_cs;
104 1.1 gwr
105 1.1 gwr /* Flags to communicate with ms_softintr() */
106 1.1 gwr volatile int ms_intr_flags;
107 1.1 gwr #define INTR_RX_OVERRUN 1
108 1.1 gwr #define INTR_TX_EMPTY 2
109 1.1 gwr #define INTR_ST_CHECK 4
110 1.1 gwr
111 1.1 gwr /*
112 1.1 gwr * The receive ring buffer.
113 1.1 gwr */
114 1.1 gwr u_int ms_rbget; /* ring buffer `get' index */
115 1.1 gwr volatile u_int ms_rbput; /* ring buffer `put' index */
116 1.1 gwr u_short ms_rbuf[MS_RX_RING_SIZE]; /* rr1, data pairs */
117 1.1 gwr
118 1.1 gwr /*
119 1.1 gwr * State of input translator
120 1.1 gwr */
121 1.1 gwr short ms_byteno; /* input byte number, for decode */
122 1.1 gwr char ms_mb; /* mouse button state */
123 1.1 gwr char ms_ub; /* user button state */
124 1.1 gwr int ms_dx; /* delta-x */
125 1.1 gwr int ms_dy; /* delta-y */
126 1.1 gwr
127 1.1 gwr /*
128 1.1 gwr * State of upper interface.
129 1.1 gwr */
130 1.1 gwr volatile int ms_ready; /* event queue is ready */
131 1.1 gwr struct evvar ms_events; /* event queue state */
132 1.1 gwr } ms_softc;
133 1.1 gwr
134 1.1 gwr cdev_decl(ms); /* open, close, read, write, ioctl, stop, ... */
135 1.1 gwr
136 1.1 gwr struct zsops zsops_ms;
137 1.1 gwr
138 1.1 gwr /****************************************************************
139 1.1 gwr * Definition of the driver for autoconfig.
140 1.1 gwr ****************************************************************/
141 1.1 gwr
142 1.1 gwr static int ms_match(struct device *, void *, void *);
143 1.1 gwr static void ms_attach(struct device *, struct device *, void *);
144 1.1 gwr
145 1.1 gwr struct cfdriver mscd = {
146 1.1 gwr NULL, "ms", ms_match, ms_attach,
147 1.1 gwr DV_DULL, sizeof(struct ms_softc), NULL,
148 1.1 gwr };
149 1.1 gwr
150 1.1 gwr
151 1.1 gwr /*
152 1.1 gwr * ms_match: how is this zs channel configured?
153 1.1 gwr */
154 1.1 gwr int
155 1.1 gwr ms_match(parent, match, aux)
156 1.1 gwr struct device *parent;
157 1.1 gwr void *match, *aux;
158 1.1 gwr {
159 1.1 gwr struct cfdata *cf = match;
160 1.1 gwr struct zsc_attach_args *args = aux;
161 1.1 gwr
162 1.1 gwr /* Exact match required for keyboard. */
163 1.1 gwr if (cf->cf_loc[0] == args->channel)
164 1.1 gwr return 2;
165 1.1 gwr
166 1.1 gwr return 0;
167 1.1 gwr }
168 1.1 gwr
169 1.1 gwr void
170 1.1 gwr ms_attach(parent, self, aux)
171 1.1 gwr struct device *parent, *self;
172 1.1 gwr void *aux;
173 1.1 gwr
174 1.1 gwr {
175 1.1 gwr struct zsc_softc *zsc = (void *) parent;
176 1.1 gwr struct ms_softc *ms = (void *) self;
177 1.1 gwr struct zsc_attach_args *args = aux;
178 1.1 gwr struct zs_chanstate *cs;
179 1.1 gwr struct cfdata *cf;
180 1.1 gwr int channel, ms_unit;
181 1.1 gwr int reset, s, tconst;
182 1.1 gwr
183 1.1 gwr cf = ms->ms_dev.dv_cfdata;
184 1.3 gwr ms_unit = ms->ms_dev.dv_unit;
185 1.1 gwr channel = args->channel;
186 1.1 gwr cs = &zsc->zsc_cs[channel];
187 1.1 gwr cs->cs_private = ms;
188 1.1 gwr cs->cs_ops = &zsops_ms;
189 1.1 gwr ms->ms_cs = cs;
190 1.1 gwr
191 1.1 gwr printf("\n");
192 1.1 gwr
193 1.1 gwr /* Initialize the speed, etc. */
194 1.1 gwr tconst = BPS_TO_TCONST(cs->cs_pclk_div16, MS_BPS);
195 1.1 gwr s = splzs();
196 1.1 gwr /* May need reset... */
197 1.1 gwr reset = (channel == 0) ?
198 1.1 gwr ZSWR9_A_RESET : ZSWR9_B_RESET;
199 1.2 gwr zs_write_reg(cs, 9, reset);
200 1.1 gwr /* These are OK as set by zscc: WR3, WR4, WR5 */
201 1.1 gwr cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;
202 1.1 gwr cs->cs_preg[12] = tconst;
203 1.1 gwr cs->cs_preg[13] = tconst >> 8;
204 1.1 gwr zs_loadchannelregs(cs);
205 1.1 gwr splx(s);
206 1.1 gwr
207 1.1 gwr /* Initialize translator. */
208 1.1 gwr ms->ms_byteno = -1;
209 1.1 gwr }
210 1.1 gwr
211 1.1 gwr /****************************************************************
212 1.1 gwr * Entry points for /dev/mouse
213 1.1 gwr * (open,close,read,write,...)
214 1.1 gwr ****************************************************************/
215 1.1 gwr
216 1.1 gwr int
217 1.1 gwr msopen(dev, flags, mode, p)
218 1.1 gwr dev_t dev;
219 1.1 gwr int flags, mode;
220 1.1 gwr struct proc *p;
221 1.1 gwr {
222 1.1 gwr struct ms_softc *ms;
223 1.1 gwr int error, s, unit;
224 1.1 gwr
225 1.1 gwr unit = minor(dev);
226 1.1 gwr if (unit >= mscd.cd_ndevs)
227 1.1 gwr return (ENXIO);
228 1.1 gwr ms = mscd.cd_devs[unit];
229 1.1 gwr if (ms == NULL)
230 1.1 gwr return (ENXIO);
231 1.1 gwr
232 1.1 gwr /* This is an exclusive open device. */
233 1.1 gwr if (ms->ms_events.ev_io)
234 1.1 gwr return (EBUSY);
235 1.1 gwr ms->ms_events.ev_io = p;
236 1.1 gwr ev_init(&ms->ms_events); /* may cause sleep */
237 1.1 gwr
238 1.1 gwr ms->ms_ready = 1; /* start accepting events */
239 1.1 gwr return (0);
240 1.1 gwr }
241 1.1 gwr
242 1.1 gwr int
243 1.1 gwr msclose(dev, flags, mode, p)
244 1.1 gwr dev_t dev;
245 1.1 gwr int flags, mode;
246 1.1 gwr struct proc *p;
247 1.1 gwr {
248 1.1 gwr struct ms_softc *ms;
249 1.1 gwr
250 1.1 gwr ms = mscd.cd_devs[minor(dev)];
251 1.1 gwr ms->ms_ready = 0; /* stop accepting events */
252 1.1 gwr ev_fini(&ms->ms_events);
253 1.1 gwr
254 1.1 gwr ms->ms_events.ev_io = NULL;
255 1.1 gwr return (0);
256 1.1 gwr }
257 1.1 gwr
258 1.1 gwr int
259 1.1 gwr msread(dev, uio, flags)
260 1.1 gwr dev_t dev;
261 1.1 gwr struct uio *uio;
262 1.1 gwr int flags;
263 1.1 gwr {
264 1.1 gwr struct ms_softc *ms;
265 1.1 gwr
266 1.1 gwr ms = mscd.cd_devs[minor(dev)];
267 1.1 gwr return (ev_read(&ms->ms_events, uio, flags));
268 1.1 gwr }
269 1.1 gwr
270 1.1 gwr /* this routine should not exist, but is convenient to write here for now */
271 1.1 gwr int
272 1.1 gwr mswrite(dev, uio, flags)
273 1.1 gwr dev_t dev;
274 1.1 gwr struct uio *uio;
275 1.1 gwr int flags;
276 1.1 gwr {
277 1.1 gwr
278 1.1 gwr return (EOPNOTSUPP);
279 1.1 gwr }
280 1.1 gwr
281 1.1 gwr int
282 1.1 gwr msioctl(dev, cmd, data, flag, p)
283 1.1 gwr dev_t dev;
284 1.1 gwr u_long cmd;
285 1.1 gwr register caddr_t data;
286 1.1 gwr int flag;
287 1.1 gwr struct proc *p;
288 1.1 gwr {
289 1.1 gwr struct ms_softc *ms;
290 1.1 gwr
291 1.1 gwr ms = mscd.cd_devs[minor(dev)];
292 1.1 gwr
293 1.1 gwr switch (cmd) {
294 1.1 gwr
295 1.1 gwr case FIONBIO: /* we will remove this someday (soon???) */
296 1.1 gwr return (0);
297 1.1 gwr
298 1.1 gwr case FIOASYNC:
299 1.1 gwr ms->ms_events.ev_async = *(int *)data != 0;
300 1.1 gwr return (0);
301 1.1 gwr
302 1.1 gwr case TIOCSPGRP:
303 1.1 gwr if (*(int *)data != ms->ms_events.ev_io->p_pgid)
304 1.1 gwr return (EPERM);
305 1.1 gwr return (0);
306 1.1 gwr
307 1.1 gwr case VUIDGFORMAT:
308 1.1 gwr /* we only do firm_events */
309 1.1 gwr *(int *)data = VUID_FIRM_EVENT;
310 1.1 gwr return (0);
311 1.1 gwr
312 1.1 gwr case VUIDSFORMAT:
313 1.1 gwr if (*(int *)data != VUID_FIRM_EVENT)
314 1.1 gwr return (EINVAL);
315 1.1 gwr return (0);
316 1.1 gwr }
317 1.1 gwr return (ENOTTY);
318 1.1 gwr }
319 1.1 gwr
320 1.1 gwr int
321 1.1 gwr msselect(dev, rw, p)
322 1.1 gwr dev_t dev;
323 1.1 gwr int rw;
324 1.1 gwr struct proc *p;
325 1.1 gwr {
326 1.1 gwr struct ms_softc *ms;
327 1.1 gwr
328 1.1 gwr ms = mscd.cd_devs[minor(dev)];
329 1.1 gwr return (ev_select(&ms->ms_events, rw, p));
330 1.1 gwr }
331 1.1 gwr
332 1.1 gwr
333 1.1 gwr /****************************************************************
334 1.1 gwr * Middle layer (translator)
335 1.1 gwr ****************************************************************/
336 1.1 gwr
337 1.1 gwr /*
338 1.1 gwr * Called by our ms_softint() routine on input.
339 1.1 gwr */
340 1.1 gwr void
341 1.1 gwr ms_input(ms, c)
342 1.1 gwr register struct ms_softc *ms;
343 1.1 gwr register int c;
344 1.1 gwr {
345 1.1 gwr register struct firm_event *fe;
346 1.1 gwr register int mb, ub, d, get, put, any;
347 1.1 gwr static const char to_one[] = { 1, 2, 2, 4, 4, 4, 4 };
348 1.1 gwr static const int to_id[] = { MS_RIGHT, MS_MIDDLE, 0, MS_LEFT };
349 1.1 gwr
350 1.1 gwr /*
351 1.1 gwr * Discard input if not ready. Drop sync on parity or framing
352 1.1 gwr * error; gain sync on button byte.
353 1.1 gwr */
354 1.1 gwr if (ms->ms_ready == 0)
355 1.1 gwr return;
356 1.1 gwr if (c == -1) {
357 1.1 gwr ms->ms_byteno = -1;
358 1.1 gwr return;
359 1.1 gwr }
360 1.1 gwr if ((c & ~7) == 0x80) /* if in 0x80..0x87 */
361 1.1 gwr ms->ms_byteno = 0;
362 1.1 gwr
363 1.1 gwr /*
364 1.1 gwr * Run the decode loop, adding to the current information.
365 1.1 gwr * We add, rather than replace, deltas, so that if the event queue
366 1.1 gwr * fills, we accumulate data for when it opens up again.
367 1.1 gwr */
368 1.1 gwr switch (ms->ms_byteno) {
369 1.1 gwr
370 1.1 gwr case -1:
371 1.1 gwr return;
372 1.1 gwr
373 1.1 gwr case 0:
374 1.1 gwr /* buttons */
375 1.1 gwr ms->ms_byteno = 1;
376 1.1 gwr ms->ms_mb = (~c) & 0x7;
377 1.1 gwr return;
378 1.1 gwr
379 1.1 gwr case 1:
380 1.1 gwr /* first delta-x */
381 1.1 gwr ms->ms_byteno = 2;
382 1.1 gwr ms->ms_dx += (char)c;
383 1.1 gwr return;
384 1.1 gwr
385 1.1 gwr case 2:
386 1.1 gwr /* first delta-y */
387 1.1 gwr ms->ms_byteno = 3;
388 1.1 gwr ms->ms_dy += (char)c;
389 1.1 gwr return;
390 1.1 gwr
391 1.1 gwr case 3:
392 1.1 gwr /* second delta-x */
393 1.1 gwr ms->ms_byteno = 4;
394 1.1 gwr ms->ms_dx += (char)c;
395 1.1 gwr return;
396 1.1 gwr
397 1.1 gwr case 4:
398 1.1 gwr /* second delta-x */
399 1.1 gwr ms->ms_byteno = -1; /* wait for button-byte again */
400 1.1 gwr ms->ms_dy += (char)c;
401 1.1 gwr break;
402 1.1 gwr
403 1.1 gwr default:
404 1.1 gwr panic("ms_rint");
405 1.1 gwr /* NOTREACHED */
406 1.1 gwr }
407 1.1 gwr
408 1.1 gwr /*
409 1.1 gwr * We have at least one event (mouse button, delta-X, or
410 1.1 gwr * delta-Y; possibly all three, and possibly three separate
411 1.1 gwr * button events). Deliver these events until we are out
412 1.1 gwr * of changes or out of room. As events get delivered,
413 1.1 gwr * mark them `unchanged'.
414 1.1 gwr */
415 1.1 gwr any = 0;
416 1.1 gwr get = ms->ms_events.ev_get;
417 1.1 gwr put = ms->ms_events.ev_put;
418 1.1 gwr fe = &ms->ms_events.ev_q[put];
419 1.1 gwr
420 1.1 gwr /* NEXT prepares to put the next event, backing off if necessary */
421 1.1 gwr #define NEXT \
422 1.1 gwr if ((++put) % EV_QSIZE == get) { \
423 1.1 gwr put--; \
424 1.1 gwr goto out; \
425 1.1 gwr }
426 1.1 gwr /* ADVANCE completes the `put' of the event */
427 1.1 gwr #define ADVANCE \
428 1.1 gwr fe++; \
429 1.1 gwr if (put >= EV_QSIZE) { \
430 1.1 gwr put = 0; \
431 1.1 gwr fe = &ms->ms_events.ev_q[0]; \
432 1.1 gwr } \
433 1.1 gwr any = 1
434 1.1 gwr
435 1.1 gwr mb = ms->ms_mb;
436 1.1 gwr ub = ms->ms_ub;
437 1.1 gwr while ((d = mb ^ ub) != 0) {
438 1.1 gwr /*
439 1.1 gwr * Mouse button change. Convert up to three changes
440 1.1 gwr * to the `first' change, and drop it into the event queue.
441 1.1 gwr */
442 1.1 gwr NEXT;
443 1.1 gwr d = to_one[d - 1]; /* from 1..7 to {1,2,4} */
444 1.1 gwr fe->id = to_id[d - 1]; /* from {1,2,4} to ID */
445 1.1 gwr fe->value = mb & d ? VKEY_DOWN : VKEY_UP;
446 1.1 gwr fe->time = time;
447 1.1 gwr ADVANCE;
448 1.1 gwr ub ^= d;
449 1.1 gwr }
450 1.1 gwr if (ms->ms_dx) {
451 1.1 gwr NEXT;
452 1.1 gwr fe->id = LOC_X_DELTA;
453 1.1 gwr fe->value = ms->ms_dx;
454 1.1 gwr fe->time = time;
455 1.1 gwr ADVANCE;
456 1.1 gwr ms->ms_dx = 0;
457 1.1 gwr }
458 1.1 gwr if (ms->ms_dy) {
459 1.1 gwr NEXT;
460 1.1 gwr fe->id = LOC_Y_DELTA;
461 1.1 gwr fe->value = ms->ms_dy;
462 1.1 gwr fe->time = time;
463 1.1 gwr ADVANCE;
464 1.1 gwr ms->ms_dy = 0;
465 1.1 gwr }
466 1.1 gwr out:
467 1.1 gwr if (any) {
468 1.1 gwr ms->ms_ub = ub;
469 1.1 gwr ms->ms_events.ev_put = put;
470 1.1 gwr EV_WAKEUP(&ms->ms_events);
471 1.1 gwr }
472 1.1 gwr }
473 1.1 gwr
474 1.1 gwr /****************************************************************
475 1.1 gwr * Interface to the lower layer (zscc)
476 1.1 gwr ****************************************************************/
477 1.1 gwr
478 1.1 gwr static int
479 1.1 gwr ms_rxint(cs)
480 1.1 gwr register struct zs_chanstate *cs;
481 1.1 gwr {
482 1.1 gwr register struct ms_softc *ms;
483 1.1 gwr register int put, put_next;
484 1.1 gwr register u_char c, rr1;
485 1.1 gwr
486 1.1 gwr ms = cs->cs_private;
487 1.1 gwr put = ms->ms_rbput;
488 1.1 gwr
489 1.1 gwr /* Read the input data ASAP. */
490 1.2 gwr c = zs_read_data(cs);
491 1.1 gwr
492 1.1 gwr /* Save the status register too. */
493 1.2 gwr rr1 = zs_read_reg(cs, 1);
494 1.1 gwr
495 1.1 gwr if (rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) {
496 1.1 gwr /* Clear the receive error. */
497 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_ERRORS);
498 1.1 gwr }
499 1.1 gwr
500 1.1 gwr ms->ms_rbuf[put] = (c << 8) | rr1;
501 1.1 gwr put_next = (put + 1) & MS_RX_RING_MASK;
502 1.1 gwr
503 1.1 gwr /* Would overrun if increment makes (put==get). */
504 1.1 gwr if (put_next == ms->ms_rbget) {
505 1.1 gwr ms->ms_intr_flags |= INTR_RX_OVERRUN;
506 1.1 gwr } else {
507 1.1 gwr /* OK, really increment. */
508 1.1 gwr put = put_next;
509 1.1 gwr }
510 1.1 gwr
511 1.1 gwr /* Done reading. */
512 1.1 gwr ms->ms_rbput = put;
513 1.1 gwr
514 1.1 gwr /* Ask for softint() call. */
515 1.1 gwr cs->cs_softreq = 1;
516 1.1 gwr return(1);
517 1.1 gwr }
518 1.1 gwr
519 1.1 gwr
520 1.1 gwr static int
521 1.1 gwr ms_txint(cs)
522 1.1 gwr register struct zs_chanstate *cs;
523 1.1 gwr {
524 1.1 gwr register struct ms_softc *ms;
525 1.1 gwr register int count, rval;
526 1.1 gwr
527 1.1 gwr ms = cs->cs_private;
528 1.1 gwr
529 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_TXINT);
530 1.1 gwr
531 1.1 gwr ms->ms_intr_flags |= INTR_TX_EMPTY;
532 1.1 gwr /* Ask for softint() call. */
533 1.1 gwr cs->cs_softreq = 1;
534 1.1 gwr return (1);
535 1.1 gwr }
536 1.1 gwr
537 1.1 gwr
538 1.1 gwr static int
539 1.1 gwr ms_stint(cs)
540 1.1 gwr register struct zs_chanstate *cs;
541 1.1 gwr {
542 1.1 gwr register struct ms_softc *ms;
543 1.1 gwr register int rr0;
544 1.1 gwr
545 1.1 gwr ms = cs->cs_private;
546 1.1 gwr
547 1.2 gwr rr0 = zs_read_csr(cs);
548 1.2 gwr zs_write_csr(cs, ZSWR0_RESET_STATUS);
549 1.1 gwr
550 1.1 gwr ms->ms_intr_flags |= INTR_ST_CHECK;
551 1.1 gwr /* Ask for softint() call. */
552 1.1 gwr cs->cs_softreq = 1;
553 1.1 gwr return (1);
554 1.1 gwr }
555 1.1 gwr
556 1.1 gwr
557 1.1 gwr static int
558 1.1 gwr ms_softint(cs)
559 1.1 gwr struct zs_chanstate *cs;
560 1.1 gwr {
561 1.1 gwr register struct ms_softc *ms;
562 1.1 gwr register int get, c, s;
563 1.1 gwr int intr_flags;
564 1.1 gwr register u_short ring_data;
565 1.1 gwr register u_char rr0, rr1;
566 1.1 gwr
567 1.1 gwr ms = cs->cs_private;
568 1.1 gwr
569 1.1 gwr /* Atomically get and clear flags. */
570 1.1 gwr s = splzs();
571 1.1 gwr intr_flags = ms->ms_intr_flags;
572 1.1 gwr ms->ms_intr_flags = 0;
573 1.1 gwr splx(s);
574 1.1 gwr
575 1.1 gwr /*
576 1.1 gwr * Copy data from the receive ring to the event layer.
577 1.1 gwr */
578 1.1 gwr get = ms->ms_rbget;
579 1.1 gwr while (get != ms->ms_rbput) {
580 1.1 gwr ring_data = ms->ms_rbuf[get];
581 1.1 gwr get = (get + 1) & MS_RX_RING_MASK;
582 1.1 gwr
583 1.1 gwr /* low byte of ring_data is rr1 */
584 1.1 gwr c = (ring_data >> 8) & 0xff;
585 1.1 gwr
586 1.1 gwr if (ring_data & ZSRR1_DO)
587 1.1 gwr intr_flags |= INTR_RX_OVERRUN;
588 1.1 gwr if (ring_data & (ZSRR1_FE | ZSRR1_PE)) {
589 1.1 gwr log(LOG_ERR, "%s: input error (0x%x)\n",
590 1.1 gwr ms->ms_dev.dv_xname, ring_data);
591 1.1 gwr c = -1; /* signal input error */
592 1.1 gwr }
593 1.1 gwr
594 1.1 gwr /* Pass this up to the "middle" layer. */
595 1.1 gwr ms_input(ms, c);
596 1.1 gwr }
597 1.1 gwr if (intr_flags & INTR_RX_OVERRUN) {
598 1.1 gwr log(LOG_ERR, "%s: input overrun\n",
599 1.1 gwr ms->ms_dev.dv_xname);
600 1.1 gwr }
601 1.1 gwr ms->ms_rbget = get;
602 1.1 gwr
603 1.1 gwr if (intr_flags & INTR_TX_EMPTY) {
604 1.1 gwr /*
605 1.1 gwr * Transmit done. (Not expected.)
606 1.1 gwr */
607 1.1 gwr log(LOG_ERR, "%s: transmit interrupt?\n",
608 1.1 gwr ms->ms_dev.dv_xname);
609 1.1 gwr }
610 1.1 gwr
611 1.1 gwr if (intr_flags & INTR_ST_CHECK) {
612 1.1 gwr /*
613 1.1 gwr * Status line change. (Not expected.)
614 1.1 gwr */
615 1.1 gwr log(LOG_ERR, "%s: status interrupt?\n",
616 1.1 gwr ms->ms_dev.dv_xname);
617 1.1 gwr }
618 1.1 gwr
619 1.1 gwr return (1);
620 1.1 gwr }
621 1.1 gwr
622 1.1 gwr struct zsops zsops_ms = {
623 1.1 gwr ms_rxint, /* receive char available */
624 1.1 gwr ms_stint, /* external/status */
625 1.1 gwr ms_txint, /* xmit buffer empty */
626 1.1 gwr ms_softint, /* process software interrupt */
627 1.1 gwr };
628