ms_zs.c revision 1.1 1 1.1 mrg /* $NetBSD: ms_zs.c,v 1.1 1999/05/14 06:42:02 mrg Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.1 mrg * Copyright (c) 1992, 1993
5 1.1 mrg * The Regents of the University of California. All rights reserved.
6 1.1 mrg *
7 1.1 mrg * This software was developed by the Computer Systems Engineering group
8 1.1 mrg * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 1.1 mrg * contributed to Berkeley.
10 1.1 mrg *
11 1.1 mrg * All advertising materials mentioning features or use of this software
12 1.1 mrg * must display the following acknowledgement:
13 1.1 mrg * This product includes software developed by the University of
14 1.1 mrg * California, Lawrence Berkeley Laboratory.
15 1.1 mrg *
16 1.1 mrg * Redistribution and use in source and binary forms, with or without
17 1.1 mrg * modification, are permitted provided that the following conditions
18 1.1 mrg * are met:
19 1.1 mrg * 1. Redistributions of source code must retain the above copyright
20 1.1 mrg * notice, this list of conditions and the following disclaimer.
21 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
22 1.1 mrg * notice, this list of conditions and the following disclaimer in the
23 1.1 mrg * documentation and/or other materials provided with the distribution.
24 1.1 mrg * 3. All advertising materials mentioning features or use of this software
25 1.1 mrg * must display the following acknowledgement:
26 1.1 mrg * This product includes software developed by the University of
27 1.1 mrg * California, Berkeley and its contributors.
28 1.1 mrg * 4. Neither the name of the University nor the names of its contributors
29 1.1 mrg * may be used to endorse or promote products derived from this software
30 1.1 mrg * without specific prior written permission.
31 1.1 mrg *
32 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 1.1 mrg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 1.1 mrg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 1.1 mrg * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 1.1 mrg * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 1.1 mrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 1.1 mrg * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 1.1 mrg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 1.1 mrg * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 1.1 mrg * SUCH DAMAGE.
43 1.1 mrg *
44 1.1 mrg * @(#)ms.c 8.1 (Berkeley) 6/11/93
45 1.1 mrg */
46 1.1 mrg
47 1.1 mrg /*
48 1.1 mrg * Mouse driver (/dev/mouse)
49 1.1 mrg */
50 1.1 mrg
51 1.1 mrg /*
52 1.1 mrg * Zilog Z8530 Dual UART driver (mouse interface)
53 1.1 mrg *
54 1.1 mrg * This is the "slave" driver that will be attached to
55 1.1 mrg * the "zsc" driver for a Sun mouse.
56 1.1 mrg */
57 1.1 mrg
58 1.1 mrg #include <sys/param.h>
59 1.1 mrg #include <sys/systm.h>
60 1.1 mrg #include <sys/conf.h>
61 1.1 mrg #include <sys/device.h>
62 1.1 mrg #include <sys/ioctl.h>
63 1.1 mrg #include <sys/kernel.h>
64 1.1 mrg #include <sys/proc.h>
65 1.1 mrg #include <sys/signal.h>
66 1.1 mrg #include <sys/signalvar.h>
67 1.1 mrg #include <sys/time.h>
68 1.1 mrg #include <sys/select.h>
69 1.1 mrg #include <sys/syslog.h>
70 1.1 mrg
71 1.1 mrg #include <machine/vuid_event.h>
72 1.1 mrg
73 1.1 mrg #include <dev/ic/z8530reg.h>
74 1.1 mrg #include <machine/z8530var.h>
75 1.1 mrg #include <dev/sun/event_var.h>
76 1.1 mrg #include <dev/sun/msvar.h>
77 1.1 mrg
78 1.1 mrg static void ms_zs_rxint __P((struct zs_chanstate *));
79 1.1 mrg static void ms_zs_stint __P((struct zs_chanstate *, int));
80 1.1 mrg static void ms_zs_txint __P((struct zs_chanstate *));
81 1.1 mrg static void ms_zs_softint __P((struct zs_chanstate *));
82 1.1 mrg
83 1.1 mrg struct zsops zsops_ms = {
84 1.1 mrg ms_zs_rxint, /* receive char available */
85 1.1 mrg ms_zs_stint, /* external/status */
86 1.1 mrg ms_zs_txint, /* xmit buffer empty */
87 1.1 mrg ms_zs_softint, /* process software interrupt */
88 1.1 mrg };
89 1.1 mrg
90 1.1 mrg static int ms_zs_match(struct device *, struct cfdata *, void *);
91 1.1 mrg static void ms_zs_attach(struct device *, struct device *, void *);
92 1.1 mrg
93 1.1 mrg struct cfattach ms_zs_ca = {
94 1.1 mrg sizeof(struct ms_softc), ms_zs_match, ms_zs_attach
95 1.1 mrg };
96 1.1 mrg
97 1.1 mrg /*
98 1.1 mrg * ms_match: how is this zs channel configured?
99 1.1 mrg */
100 1.1 mrg int
101 1.1 mrg ms_zs_match(parent, cf, aux)
102 1.1 mrg struct device *parent;
103 1.1 mrg struct cfdata *cf;
104 1.1 mrg void *aux;
105 1.1 mrg {
106 1.1 mrg struct zsc_attach_args *args = aux;
107 1.1 mrg
108 1.1 mrg /* Exact match required for keyboard. */
109 1.1 mrg if (cf->cf_loc[ZSCCF_CHANNEL] == args->channel)
110 1.1 mrg return 2;
111 1.1 mrg
112 1.1 mrg return 0;
113 1.1 mrg }
114 1.1 mrg
115 1.1 mrg void
116 1.1 mrg ms_zs_attach(parent, self, aux)
117 1.1 mrg struct device *parent, *self;
118 1.1 mrg void *aux;
119 1.1 mrg
120 1.1 mrg {
121 1.1 mrg struct zsc_softc *zsc = (void *) parent;
122 1.1 mrg struct ms_softc *ms = (void *) self;
123 1.1 mrg struct zsc_attach_args *args = aux;
124 1.1 mrg struct zs_chanstate *cs;
125 1.1 mrg struct cfdata *cf;
126 1.1 mrg int channel, ms_unit;
127 1.1 mrg int reset, s;
128 1.1 mrg
129 1.1 mrg cf = ms->ms_dev.dv_cfdata;
130 1.1 mrg ms_unit = ms->ms_dev.dv_unit;
131 1.1 mrg channel = args->channel;
132 1.1 mrg cs = zsc->zsc_cs[channel];
133 1.1 mrg cs->cs_private = ms;
134 1.1 mrg cs->cs_ops = &zsops_ms;
135 1.1 mrg ms->ms_cs = cs;
136 1.1 mrg
137 1.1 mrg printf("\n");
138 1.1 mrg
139 1.1 mrg /* Initialize the speed, etc. */
140 1.1 mrg s = splzs();
141 1.1 mrg /* May need reset... */
142 1.1 mrg reset = (channel == 0) ?
143 1.1 mrg ZSWR9_A_RESET : ZSWR9_B_RESET;
144 1.1 mrg zs_write_reg(cs, 9, reset);
145 1.1 mrg /* These are OK as set by zscc: WR3, WR4, WR5 */
146 1.1 mrg /* We don't care about status or tx interrupts. */
147 1.1 mrg cs->cs_preg[1] = ZSWR1_RIE;
148 1.1 mrg (void) zs_set_speed(cs, MS_BPS);
149 1.1 mrg zs_loadchannelregs(cs);
150 1.1 mrg splx(s);
151 1.1 mrg
152 1.1 mrg /* Initialize translator. */
153 1.1 mrg ms->ms_byteno = -1;
154 1.1 mrg }
155 1.1 mrg
156 1.1 mrg /****************************************************************
157 1.1 mrg * Interface to the lower layer (zscc)
158 1.1 mrg ****************************************************************/
159 1.1 mrg
160 1.1 mrg static void
161 1.1 mrg ms_zs_rxint(cs)
162 1.1 mrg register struct zs_chanstate *cs;
163 1.1 mrg {
164 1.1 mrg register struct ms_softc *ms;
165 1.1 mrg register int put, put_next;
166 1.1 mrg register u_char c, rr1;
167 1.1 mrg
168 1.1 mrg ms = cs->cs_private;
169 1.1 mrg put = ms->ms_rbput;
170 1.1 mrg
171 1.1 mrg /*
172 1.1 mrg * First read the status, because reading the received char
173 1.1 mrg * destroys the status of this char.
174 1.1 mrg */
175 1.1 mrg rr1 = zs_read_reg(cs, 1);
176 1.1 mrg c = zs_read_data(cs);
177 1.1 mrg
178 1.1 mrg if (rr1 & (ZSRR1_FE | ZSRR1_DO | ZSRR1_PE)) {
179 1.1 mrg /* Clear the receive error. */
180 1.1 mrg zs_write_csr(cs, ZSWR0_RESET_ERRORS);
181 1.1 mrg }
182 1.1 mrg
183 1.1 mrg ms->ms_rbuf[put] = (c << 8) | rr1;
184 1.1 mrg put_next = (put + 1) & MS_RX_RING_MASK;
185 1.1 mrg
186 1.1 mrg /* Would overrun if increment makes (put==get). */
187 1.1 mrg if (put_next == ms->ms_rbget) {
188 1.1 mrg ms->ms_intr_flags |= INTR_RX_OVERRUN;
189 1.1 mrg } else {
190 1.1 mrg /* OK, really increment. */
191 1.1 mrg put = put_next;
192 1.1 mrg }
193 1.1 mrg
194 1.1 mrg /* Done reading. */
195 1.1 mrg ms->ms_rbput = put;
196 1.1 mrg
197 1.1 mrg /* Ask for softint() call. */
198 1.1 mrg cs->cs_softreq = 1;
199 1.1 mrg }
200 1.1 mrg
201 1.1 mrg static void
202 1.1 mrg ms_zs_txint(cs)
203 1.1 mrg register struct zs_chanstate *cs;
204 1.1 mrg {
205 1.1 mrg register struct ms_softc *ms;
206 1.1 mrg
207 1.1 mrg ms = cs->cs_private;
208 1.1 mrg zs_write_csr(cs, ZSWR0_RESET_TXINT);
209 1.1 mrg ms->ms_intr_flags |= INTR_TX_EMPTY;
210 1.1 mrg /* Ask for softint() call. */
211 1.1 mrg cs->cs_softreq = 1;
212 1.1 mrg }
213 1.1 mrg
214 1.1 mrg static void
215 1.1 mrg ms_zs_stint(cs, force)
216 1.1 mrg register struct zs_chanstate *cs;
217 1.1 mrg int force;
218 1.1 mrg {
219 1.1 mrg register struct ms_softc *ms;
220 1.1 mrg register int rr0;
221 1.1 mrg
222 1.1 mrg ms = cs->cs_private;
223 1.1 mrg
224 1.1 mrg rr0 = zs_read_csr(cs);
225 1.1 mrg zs_write_csr(cs, ZSWR0_RESET_STATUS);
226 1.1 mrg
227 1.1 mrg /*
228 1.1 mrg * We have to accumulate status line changes here.
229 1.1 mrg * Otherwise, if we get multiple status interrupts
230 1.1 mrg * before the softint runs, we could fail to notice
231 1.1 mrg * some status line changes in the softint routine.
232 1.1 mrg * Fix from Bill Studenmund, October 1996.
233 1.1 mrg */
234 1.1 mrg cs->cs_rr0_delta |= (cs->cs_rr0 ^ rr0);
235 1.1 mrg cs->cs_rr0 = rr0;
236 1.1 mrg ms->ms_intr_flags |= INTR_ST_CHECK;
237 1.1 mrg
238 1.1 mrg /* Ask for softint() call. */
239 1.1 mrg cs->cs_softreq = 1;
240 1.1 mrg }
241 1.1 mrg
242 1.1 mrg static void
243 1.1 mrg ms_zs_softint(cs)
244 1.1 mrg struct zs_chanstate *cs;
245 1.1 mrg {
246 1.1 mrg register struct ms_softc *ms;
247 1.1 mrg register int get, c, s;
248 1.1 mrg int intr_flags;
249 1.1 mrg register u_short ring_data;
250 1.1 mrg
251 1.1 mrg ms = cs->cs_private;
252 1.1 mrg
253 1.1 mrg /* Atomically get and clear flags. */
254 1.1 mrg s = splzs();
255 1.1 mrg intr_flags = ms->ms_intr_flags;
256 1.1 mrg ms->ms_intr_flags = 0;
257 1.1 mrg
258 1.1 mrg /* Now lower to spltty for the rest. */
259 1.1 mrg (void) spltty();
260 1.1 mrg
261 1.1 mrg /*
262 1.1 mrg * Copy data from the receive ring to the event layer.
263 1.1 mrg */
264 1.1 mrg get = ms->ms_rbget;
265 1.1 mrg while (get != ms->ms_rbput) {
266 1.1 mrg ring_data = ms->ms_rbuf[get];
267 1.1 mrg get = (get + 1) & MS_RX_RING_MASK;
268 1.1 mrg
269 1.1 mrg /* low byte of ring_data is rr1 */
270 1.1 mrg c = (ring_data >> 8) & 0xff;
271 1.1 mrg
272 1.1 mrg if (ring_data & ZSRR1_DO)
273 1.1 mrg intr_flags |= INTR_RX_OVERRUN;
274 1.1 mrg if (ring_data & (ZSRR1_FE | ZSRR1_PE)) {
275 1.1 mrg log(LOG_ERR, "%s: input error (0x%x)\n",
276 1.1 mrg ms->ms_dev.dv_xname, ring_data);
277 1.1 mrg c = -1; /* signal input error */
278 1.1 mrg }
279 1.1 mrg
280 1.1 mrg /* Pass this up to the "middle" layer. */
281 1.1 mrg ms_input(ms, c);
282 1.1 mrg }
283 1.1 mrg if (intr_flags & INTR_RX_OVERRUN) {
284 1.1 mrg log(LOG_ERR, "%s: input overrun\n",
285 1.1 mrg ms->ms_dev.dv_xname);
286 1.1 mrg }
287 1.1 mrg ms->ms_rbget = get;
288 1.1 mrg
289 1.1 mrg if (intr_flags & INTR_TX_EMPTY) {
290 1.1 mrg /*
291 1.1 mrg * Transmit done. (Not expected.)
292 1.1 mrg */
293 1.1 mrg log(LOG_ERR, "%s: transmit interrupt?\n",
294 1.1 mrg ms->ms_dev.dv_xname);
295 1.1 mrg }
296 1.1 mrg
297 1.1 mrg if (intr_flags & INTR_ST_CHECK) {
298 1.1 mrg /*
299 1.1 mrg * Status line change. (Not expected.)
300 1.1 mrg */
301 1.1 mrg log(LOG_ERR, "%s: status interrupt?\n",
302 1.1 mrg ms->ms_dev.dv_xname);
303 1.1 mrg cs->cs_rr0_delta = 0;
304 1.1 mrg }
305 1.1 mrg
306 1.1 mrg splx(s);
307 1.1 mrg }
308