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asc_tc.c revision 1.14.6.4
      1  1.14.6.4   nathanw /* $NetBSD: asc_tc.c,v 1.14.6.4 2002/10/18 02:44:24 nathanw Exp $ */
      2       1.1  jonathan 
      3  1.14.6.1   nathanw /*-
      4  1.14.6.1   nathanw  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  1.14.6.1   nathanw  * All rights reserved.
      6  1.14.6.1   nathanw  *
      7  1.14.6.1   nathanw  * This code is derived from software contributed to The NetBSD Foundation
      8  1.14.6.1   nathanw  * by Tohru Nishimura.
      9       1.1  jonathan  *
     10  1.14.6.1   nathanw  * Redistribution and use in source and binary forms, with or without
     11  1.14.6.1   nathanw  * modification, are permitted provided that the following conditions
     12  1.14.6.1   nathanw  * are met:
     13  1.14.6.1   nathanw  * 1. Redistributions of source code must retain the above copyright
     14  1.14.6.1   nathanw  *    notice, this list of conditions and the following disclaimer.
     15  1.14.6.1   nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.14.6.1   nathanw  *    notice, this list of conditions and the following disclaimer in the
     17  1.14.6.1   nathanw  *    documentation and/or other materials provided with the distribution.
     18  1.14.6.1   nathanw  * 3. All advertising materials mentioning features or use of this software
     19  1.14.6.1   nathanw  *    must display the following acknowledgement:
     20  1.14.6.1   nathanw  *	This product includes software developed by the NetBSD
     21  1.14.6.1   nathanw  *	Foundation, Inc. and its contributors.
     22  1.14.6.1   nathanw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.14.6.1   nathanw  *    contributors may be used to endorse or promote products derived
     24  1.14.6.1   nathanw  *    from this software without specific prior written permission.
     25       1.1  jonathan  *
     26  1.14.6.1   nathanw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.14.6.1   nathanw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.14.6.1   nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.14.6.1   nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.14.6.1   nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.14.6.1   nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.14.6.1   nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.14.6.1   nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.14.6.1   nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.14.6.1   nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.14.6.1   nathanw  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1  jonathan  */
     38       1.1  jonathan 
     39  1.14.6.2   nathanw #include <sys/cdefs.h>
     40  1.14.6.4   nathanw __KERNEL_RCSID(0, "$NetBSD: asc_tc.c,v 1.14.6.4 2002/10/18 02:44:24 nathanw Exp $");
     41  1.14.6.1   nathanw 
     42       1.1  jonathan #include <sys/param.h>
     43       1.1  jonathan #include <sys/systm.h>
     44       1.1  jonathan #include <sys/device.h>
     45  1.14.6.1   nathanw #include <sys/buf.h>
     46      1.10       mrg 
     47  1.14.6.1   nathanw #include <dev/scsipi/scsi_all.h>
     48  1.14.6.1   nathanw #include <dev/scsipi/scsipi_all.h>
     49  1.14.6.1   nathanw #include <dev/scsipi/scsiconf.h>
     50  1.14.6.1   nathanw #include <dev/scsipi/scsi_message.h>
     51       1.1  jonathan 
     52  1.14.6.1   nathanw #include <machine/bus.h>
     53       1.1  jonathan 
     54  1.14.6.1   nathanw #include <dev/ic/ncr53c9xreg.h>
     55  1.14.6.1   nathanw #include <dev/ic/ncr53c9xvar.h>
     56       1.1  jonathan 
     57  1.14.6.1   nathanw #include <dev/tc/tcvar.h>
     58       1.1  jonathan 
     59  1.14.6.1   nathanw struct asc_softc {
     60  1.14.6.1   nathanw 	struct ncr53c9x_softc sc_ncr53c9x;	/* glue to MI code */
     61  1.14.6.1   nathanw 	bus_space_tag_t sc_bst;
     62  1.14.6.1   nathanw 	bus_space_handle_t sc_bsh;
     63  1.14.6.1   nathanw 	bus_dma_tag_t sc_dmat;
     64  1.14.6.1   nathanw 	bus_dmamap_t sc_dmamap;
     65  1.14.6.1   nathanw 	caddr_t *sc_dmaaddr;
     66  1.14.6.1   nathanw 	size_t	*sc_dmalen;
     67  1.14.6.1   nathanw 	size_t	sc_dmasize;
     68  1.14.6.1   nathanw 	int	sc_active;			/* DMA active ? */
     69  1.14.6.1   nathanw 	int	sc_ispullup;			/* DMA into main memory? */
     70       1.1  jonathan 
     71  1.14.6.1   nathanw 	/* XXX XXX XXX */
     72  1.14.6.1   nathanw 	caddr_t sc_base, sc_bounce, sc_target;
     73  1.14.6.1   nathanw };
     74  1.14.6.1   nathanw 
     75  1.14.6.1   nathanw static int  asc_tc_match __P((struct device *, struct cfdata *, void *));
     76  1.14.6.1   nathanw static void asc_tc_attach __P((struct device *, struct device *, void *));
     77       1.1  jonathan 
     78  1.14.6.4   nathanw CFATTACH_DECL(asc_tc, sizeof(struct asc_softc),
     79  1.14.6.4   nathanw     asc_tc_match, asc_tc_attach, NULL, NULL);
     80       1.1  jonathan 
     81  1.14.6.1   nathanw static u_char	asc_read_reg __P((struct ncr53c9x_softc *, int));
     82  1.14.6.1   nathanw static void	asc_write_reg __P((struct ncr53c9x_softc *, int, u_char));
     83  1.14.6.1   nathanw static int	asc_dma_isintr __P((struct ncr53c9x_softc *));
     84  1.14.6.1   nathanw static void	asc_tc_reset __P((struct ncr53c9x_softc *));
     85  1.14.6.1   nathanw static int	asc_tc_intr __P((struct ncr53c9x_softc *));
     86  1.14.6.1   nathanw static int	asc_tc_setup __P((struct ncr53c9x_softc *, caddr_t *,
     87  1.14.6.1   nathanw 						size_t *, int, size_t *));
     88  1.14.6.1   nathanw static void	asc_tc_go __P((struct ncr53c9x_softc *));
     89  1.14.6.1   nathanw static void	asc_tc_stop __P((struct ncr53c9x_softc *));
     90  1.14.6.1   nathanw static int	asc_dma_isactive __P((struct ncr53c9x_softc *));
     91  1.14.6.1   nathanw static void	asc_clear_latched_intr __P((struct ncr53c9x_softc *));
     92  1.14.6.1   nathanw 
     93  1.14.6.1   nathanw static struct ncr53c9x_glue asc_tc_glue = {
     94  1.14.6.1   nathanw         asc_read_reg,
     95  1.14.6.1   nathanw         asc_write_reg,
     96  1.14.6.1   nathanw         asc_dma_isintr,
     97  1.14.6.1   nathanw         asc_tc_reset,
     98  1.14.6.1   nathanw         asc_tc_intr,
     99  1.14.6.1   nathanw         asc_tc_setup,
    100  1.14.6.1   nathanw         asc_tc_go,
    101  1.14.6.1   nathanw         asc_tc_stop,
    102  1.14.6.1   nathanw         asc_dma_isactive,
    103  1.14.6.1   nathanw         asc_clear_latched_intr,
    104  1.14.6.1   nathanw };
    105  1.14.6.1   nathanw 
    106       1.1  jonathan /*
    107  1.14.6.1   nathanw  * Parameters specific to PMAZ-A TC option card.
    108       1.1  jonathan  */
    109  1.14.6.1   nathanw #define PMAZ_OFFSET_53C94	0x0		/* from module base */
    110  1.14.6.1   nathanw #define PMAZ_OFFSET_DMAR	0x40000		/* DMA Address Register */
    111  1.14.6.1   nathanw #define PMAZ_OFFSET_RAM		0x80000		/* 128KB SRAM buffer */
    112  1.14.6.1   nathanw #define PMAZ_OFFSET_ROM		0xc0000		/* diagnostic ROM */
    113  1.14.6.1   nathanw 
    114  1.14.6.1   nathanw #define PMAZ_RAM_SIZE		0x20000		/* 128k (32k*32) */
    115  1.14.6.1   nathanw #define PER_TGT_DMA_SIZE	((PMAZ_RAM_SIZE/7) & ~(sizeof(int)-1))
    116  1.14.6.1   nathanw 
    117  1.14.6.1   nathanw #define PMAZ_DMAR_WRITE		0x80000000	/* DMA direction bit */
    118  1.14.6.1   nathanw #define PMAZ_DMAR_MASK		0x1ffff		/* 17 bits, 128k */
    119  1.14.6.1   nathanw #define PMAZ_DMA_ADDR(x)	((unsigned long)(x) & PMAZ_DMAR_MASK)
    120       1.1  jonathan 
    121       1.7    mhitch static int
    122  1.14.6.1   nathanw asc_tc_match(parent, cfdata, aux)
    123       1.1  jonathan 	struct device *parent;
    124  1.14.6.1   nathanw 	struct cfdata *cfdata;
    125       1.1  jonathan 	void *aux;
    126       1.1  jonathan {
    127  1.14.6.1   nathanw 	struct tc_attach_args *d = aux;
    128  1.14.6.1   nathanw 
    129  1.14.6.1   nathanw 	if (strncmp("PMAZ-AA ", d->ta_modname, TC_ROM_LLEN))
    130       1.1  jonathan 		return (0);
    131       1.1  jonathan 
    132       1.1  jonathan 	return (1);
    133       1.1  jonathan }
    134       1.1  jonathan 
    135  1.14.6.1   nathanw static void
    136       1.1  jonathan asc_tc_attach(parent, self, aux)
    137  1.14.6.1   nathanw 	struct device *parent, *self;
    138       1.1  jonathan 	void *aux;
    139       1.1  jonathan {
    140  1.14.6.1   nathanw 	struct tc_attach_args *ta = aux;
    141  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)self;
    142  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc = &asc->sc_ncr53c9x;
    143       1.1  jonathan 
    144       1.1  jonathan 	/*
    145  1.14.6.1   nathanw 	 * Set up glue for MI code early; we use some of it here.
    146       1.1  jonathan 	 */
    147  1.14.6.1   nathanw 	sc->sc_glue = &asc_tc_glue;
    148  1.14.6.1   nathanw 	asc->sc_bst = ta->ta_memt;
    149  1.14.6.1   nathanw 	asc->sc_dmat = ta->ta_dmat;
    150  1.14.6.1   nathanw 	if (bus_space_map(asc->sc_bst, ta->ta_addr,
    151  1.14.6.1   nathanw 		PMAZ_OFFSET_RAM + PMAZ_RAM_SIZE, 0, &asc->sc_bsh)) {
    152  1.14.6.1   nathanw 		printf("%s: unable to map device\n", sc->sc_dev.dv_xname);
    153  1.14.6.1   nathanw 		return;
    154  1.14.6.1   nathanw 	}
    155  1.14.6.1   nathanw 	asc->sc_base = (caddr_t)ta->ta_addr;	/* XXX XXX XXX */
    156  1.14.6.1   nathanw 
    157  1.14.6.1   nathanw 	tc_intr_establish(parent, ta->ta_cookie, IPL_BIO, ncr53c9x_intr, sc);
    158  1.14.6.1   nathanw 
    159  1.14.6.1   nathanw 	sc->sc_id = 7;
    160  1.14.6.1   nathanw 	sc->sc_freq = (ta->ta_busspeed) ? 25000000 : 12500000;
    161  1.14.6.1   nathanw 
    162  1.14.6.1   nathanw 	/* gimme Mhz */
    163  1.14.6.1   nathanw 	sc->sc_freq /= 1000000;
    164       1.1  jonathan 
    165       1.1  jonathan 	/*
    166  1.14.6.1   nathanw 	 * XXX More of this should be in ncr53c9x_attach(), but
    167  1.14.6.1   nathanw 	 * XXX should we really poke around the chip that much in
    168  1.14.6.1   nathanw 	 * XXX the MI code?  Think about this more...
    169       1.1  jonathan 	 */
    170       1.1  jonathan 
    171       1.1  jonathan 	/*
    172  1.14.6.1   nathanw 	 * Set up static configuration info.
    173       1.1  jonathan 	 */
    174  1.14.6.1   nathanw 	sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
    175  1.14.6.1   nathanw 	sc->sc_cfg2 = NCRCFG2_SCSI2;
    176  1.14.6.1   nathanw 	sc->sc_cfg3 = 0;
    177  1.14.6.1   nathanw 	sc->sc_rev = NCR_VARIANT_NCR53C94;
    178       1.7    mhitch 
    179       1.7    mhitch 	/*
    180  1.14.6.1   nathanw 	 * XXX minsync and maxxfer _should_ be set up in MI code,
    181  1.14.6.1   nathanw 	 * XXX but it appears to have some dependency on what sort
    182  1.14.6.1   nathanw 	 * XXX of DMA we're hooked up to, etc.
    183       1.7    mhitch 	 */
    184       1.7    mhitch 
    185       1.7    mhitch 	/*
    186  1.14.6.1   nathanw 	 * This is the value used to start sync negotiations
    187  1.14.6.1   nathanw 	 * Note that the NCR register "SYNCTP" is programmed
    188  1.14.6.1   nathanw 	 * in "clocks per byte", and has a minimum value of 4.
    189  1.14.6.1   nathanw 	 * The SCSI period used in negotiation is one-fourth
    190  1.14.6.1   nathanw 	 * of the time (in nanoseconds) needed to transfer one byte.
    191  1.14.6.1   nathanw 	 * Since the chip's clock is given in MHz, we have the following
    192  1.14.6.1   nathanw 	 * formula: 4 * period = (1000 / freq) * 4
    193       1.7    mhitch 	 */
    194  1.14.6.1   nathanw 	sc->sc_minsync = (1000 / sc->sc_freq) * 5 / 4;
    195       1.7    mhitch 
    196  1.14.6.1   nathanw 	sc->sc_maxxfer = 64 * 1024;
    197       1.1  jonathan 
    198  1.14.6.1   nathanw 	/* Do the common parts of attachment. */
    199  1.14.6.1   nathanw 	sc->sc_adapter.adapt_minphys = minphys;
    200  1.14.6.1   nathanw 	sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request;
    201  1.14.6.1   nathanw 	ncr53c9x_attach(sc);
    202  1.14.6.1   nathanw }
    203  1.14.6.1   nathanw 
    204  1.14.6.1   nathanw static void
    205  1.14.6.1   nathanw asc_tc_reset(sc)
    206  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    207  1.14.6.1   nathanw {
    208  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    209       1.1  jonathan 
    210  1.14.6.1   nathanw 	asc->sc_active = 0;
    211       1.1  jonathan }
    212       1.1  jonathan 
    213  1.14.6.1   nathanw static int
    214  1.14.6.1   nathanw asc_tc_intr(sc)
    215  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    216  1.14.6.1   nathanw {
    217  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    218  1.14.6.1   nathanw 	int trans, resid;
    219  1.14.6.1   nathanw 
    220  1.14.6.1   nathanw 	resid = 0;
    221  1.14.6.1   nathanw 	if (!asc->sc_ispullup &&
    222  1.14.6.1   nathanw 	    (resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
    223  1.14.6.1   nathanw 		NCR_DMA(("asc_tc_intr: empty FIFO of %d ", resid));
    224  1.14.6.1   nathanw 		DELAY(1);
    225  1.14.6.1   nathanw 	}
    226  1.14.6.1   nathanw 
    227  1.14.6.1   nathanw 	resid += NCR_READ_REG(sc, NCR_TCL);
    228  1.14.6.1   nathanw 	resid += NCR_READ_REG(sc, NCR_TCM) << 8;
    229  1.14.6.1   nathanw 
    230  1.14.6.1   nathanw 	trans = asc->sc_dmasize - resid;
    231  1.14.6.1   nathanw 
    232  1.14.6.1   nathanw 	if (asc->sc_ispullup)
    233  1.14.6.1   nathanw 		memcpy(asc->sc_target, asc->sc_bounce, trans);
    234  1.14.6.1   nathanw 	*asc->sc_dmalen -= trans;
    235  1.14.6.1   nathanw 	*asc->sc_dmaaddr += trans;
    236  1.14.6.1   nathanw 	asc->sc_active = 0;
    237  1.14.6.1   nathanw 
    238  1.14.6.1   nathanw 	return (0);
    239  1.14.6.1   nathanw }
    240  1.14.6.1   nathanw 
    241  1.14.6.1   nathanw static int
    242  1.14.6.1   nathanw asc_tc_setup(sc, addr, len, datain, dmasize)
    243  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    244  1.14.6.1   nathanw 	caddr_t *addr;
    245  1.14.6.1   nathanw 	size_t *len;
    246  1.14.6.1   nathanw 	int datain;
    247  1.14.6.1   nathanw 	size_t *dmasize;
    248  1.14.6.1   nathanw {
    249  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    250  1.14.6.1   nathanw 	u_int32_t tc_dmar;
    251  1.14.6.1   nathanw 	size_t size;
    252  1.14.6.1   nathanw 
    253  1.14.6.1   nathanw 	asc->sc_dmaaddr = addr;
    254  1.14.6.1   nathanw 	asc->sc_dmalen = len;
    255  1.14.6.1   nathanw 	asc->sc_ispullup = datain;
    256  1.14.6.1   nathanw 
    257  1.14.6.1   nathanw 	NCR_DMA(("asc_tc_setup: start %ld@%p, %s\n", (long)*asc->sc_dmalen,
    258  1.14.6.1   nathanw 		*asc->sc_dmaaddr, datain ? "IN" : "OUT"));
    259  1.14.6.1   nathanw 
    260  1.14.6.1   nathanw 	size = *dmasize;
    261  1.14.6.1   nathanw 	if (size > PER_TGT_DMA_SIZE)
    262  1.14.6.1   nathanw 		size = PER_TGT_DMA_SIZE;
    263  1.14.6.1   nathanw 	*dmasize = asc->sc_dmasize = size;
    264  1.14.6.1   nathanw 
    265  1.14.6.1   nathanw 	NCR_DMA(("asc_tc_setup: dmasize = %ld\n", (long)asc->sc_dmasize));
    266  1.14.6.1   nathanw 
    267  1.14.6.1   nathanw 	asc->sc_bounce = asc->sc_base + PMAZ_OFFSET_RAM;
    268  1.14.6.1   nathanw 	asc->sc_bounce += PER_TGT_DMA_SIZE *
    269  1.14.6.1   nathanw 	    sc->sc_nexus->xs->xs_periph->periph_target;
    270  1.14.6.1   nathanw 	asc->sc_target = *addr;
    271  1.14.6.1   nathanw 
    272  1.14.6.1   nathanw 	if (!asc->sc_ispullup)
    273  1.14.6.1   nathanw 		memcpy(asc->sc_bounce, asc->sc_target, size);
    274  1.14.6.1   nathanw 
    275  1.14.6.1   nathanw #if 1
    276  1.14.6.1   nathanw 	if (asc->sc_ispullup)
    277  1.14.6.1   nathanw 		tc_dmar = PMAZ_DMA_ADDR(asc->sc_bounce);
    278  1.14.6.1   nathanw 	else
    279  1.14.6.1   nathanw 		tc_dmar = PMAZ_DMAR_WRITE | PMAZ_DMA_ADDR(asc->sc_bounce);
    280  1.14.6.1   nathanw 	bus_space_write_4(asc->sc_bst, asc->sc_bsh, PMAZ_OFFSET_DMAR, tc_dmar);
    281  1.14.6.1   nathanw 	asc->sc_active = 1;
    282  1.14.6.1   nathanw #endif
    283  1.14.6.1   nathanw 	return (0);
    284  1.14.6.1   nathanw }
    285  1.14.6.1   nathanw 
    286  1.14.6.1   nathanw static void
    287  1.14.6.1   nathanw asc_tc_go(sc)
    288  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    289  1.14.6.1   nathanw {
    290  1.14.6.1   nathanw #if 0
    291  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    292  1.14.6.1   nathanw 	u_int32_t tc_dmar;
    293  1.14.6.1   nathanw 
    294  1.14.6.1   nathanw 	if (asc->sc_ispullup)
    295  1.14.6.1   nathanw 		tc_dmar = PMAZ_DMA_ADDR(asc->sc_bounce);
    296  1.14.6.1   nathanw 	else
    297  1.14.6.1   nathanw 		tc_dmar = PMAZ_DMAR_WRITE | PMAZ_DMA_ADDR(asc->sc_bounce);
    298  1.14.6.1   nathanw 	bus_space_write_4(asc->sc_bst, asc->sc_bsh, PMAZ_OFFSET_DMAR, tc_dmar);
    299  1.14.6.1   nathanw 	asc->sc_active = 1;
    300  1.14.6.1   nathanw #endif
    301  1.14.6.1   nathanw }
    302  1.14.6.1   nathanw 
    303  1.14.6.1   nathanw /* NEVER CALLED BY MI 53C9x ENGINE INDEED */
    304  1.14.6.1   nathanw static void
    305  1.14.6.1   nathanw asc_tc_stop(sc)
    306  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    307  1.14.6.1   nathanw {
    308  1.14.6.1   nathanw #if 0
    309  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    310  1.14.6.1   nathanw 
    311  1.14.6.1   nathanw 	if (asc->sc_ispullup)
    312  1.14.6.1   nathanw 		memcpy(asc->sc_target, asc->sc_bounce, asc->sc_dmasize);
    313  1.14.6.1   nathanw 	asc->sc_active = 0;
    314  1.14.6.1   nathanw #endif
    315  1.14.6.1   nathanw }
    316       1.1  jonathan 
    317       1.1  jonathan /*
    318  1.14.6.1   nathanw  * Glue functions.
    319       1.1  jonathan  */
    320  1.14.6.1   nathanw static u_char
    321  1.14.6.1   nathanw asc_read_reg(sc, reg)
    322  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    323  1.14.6.1   nathanw 	int reg;
    324  1.14.6.1   nathanw {
    325  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    326  1.14.6.1   nathanw 	u_char v;
    327  1.14.6.1   nathanw 
    328  1.14.6.1   nathanw 	v = bus_space_read_4(asc->sc_bst, asc->sc_bsh,
    329  1.14.6.1   nathanw 	    reg * sizeof(u_int32_t)) & 0xff;
    330  1.14.6.1   nathanw 
    331  1.14.6.1   nathanw 	return (v);
    332  1.14.6.1   nathanw }
    333  1.14.6.1   nathanw 
    334  1.14.6.1   nathanw static void
    335  1.14.6.1   nathanw asc_write_reg(sc, reg, val)
    336  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    337  1.14.6.1   nathanw 	int reg;
    338  1.14.6.1   nathanw 	u_char val;
    339  1.14.6.1   nathanw {
    340  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    341  1.14.6.1   nathanw 
    342  1.14.6.1   nathanw 	bus_space_write_4(asc->sc_bst, asc->sc_bsh,
    343  1.14.6.1   nathanw 	    reg * sizeof(u_int32_t), val);
    344  1.14.6.1   nathanw }
    345  1.14.6.1   nathanw 
    346  1.14.6.1   nathanw static int
    347  1.14.6.1   nathanw asc_dma_isintr(sc)
    348  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    349  1.14.6.1   nathanw {
    350  1.14.6.1   nathanw 	return !!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT);
    351  1.14.6.1   nathanw }
    352  1.14.6.1   nathanw 
    353       1.7    mhitch static int
    354  1.14.6.1   nathanw asc_dma_isactive(sc)
    355  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    356       1.1  jonathan {
    357  1.14.6.1   nathanw 	struct asc_softc *asc = (struct asc_softc *)sc;
    358       1.1  jonathan 
    359  1.14.6.1   nathanw 	return (asc->sc_active);
    360       1.1  jonathan }
    361       1.1  jonathan 
    362       1.1  jonathan static void
    363  1.14.6.1   nathanw asc_clear_latched_intr(sc)
    364  1.14.6.1   nathanw 	struct ncr53c9x_softc *sc;
    365       1.1  jonathan {
    366       1.1  jonathan }
    367