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bba.c revision 1.1
      1  1.1  augustss /* $NetBSD: bba.c,v 1.1 2000/05/02 06:43:05 augustss Exp $ */
      2  1.1  augustss 
      3  1.1  augustss /*
      4  1.1  augustss  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  1.1  augustss  * All rights reserved.
      6  1.1  augustss  *
      7  1.1  augustss  * Redistribution and use in source and binary forms, with or without
      8  1.1  augustss  * modification, are permitted provided that the following conditions
      9  1.1  augustss  * are met:
     10  1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     11  1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     12  1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  augustss  *    documentation and/or other materials provided with the distribution.
     15  1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     16  1.1  augustss  *    must display the following acknowledgement:
     17  1.1  augustss  *        This product includes software developed by the NetBSD
     18  1.1  augustss  *        Foundation, Inc. and its contributors.
     19  1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     20  1.1  augustss  *    contributors may be used to endorse or promote products derived
     21  1.1  augustss  *    from this software without specific prior written permission.
     22  1.1  augustss  *
     23  1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24  1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25  1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26  1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27  1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30  1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31  1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32  1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33  1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     34  1.1  augustss  */
     35  1.1  augustss 
     36  1.1  augustss /* maxine/alpha baseboard audio (bba) */
     37  1.1  augustss 
     38  1.1  augustss #include "audio.h"
     39  1.1  augustss #if NAUDIO > 0
     40  1.1  augustss 
     41  1.1  augustss #include <sys/param.h>
     42  1.1  augustss #include <sys/systm.h>
     43  1.1  augustss #include <sys/kernel.h>
     44  1.1  augustss #include <sys/device.h>
     45  1.1  augustss #include <sys/malloc.h>
     46  1.1  augustss 
     47  1.1  augustss #include <machine/bus.h>
     48  1.1  augustss #include <machine/autoconf.h>
     49  1.1  augustss #include <machine/cpu.h>
     50  1.1  augustss 
     51  1.1  augustss #include <vm/vm.h>	/* for PAGE_SIZE */
     52  1.1  augustss 
     53  1.1  augustss #include <sys/audioio.h>
     54  1.1  augustss #include <dev/audio_if.h>
     55  1.1  augustss 
     56  1.1  augustss #include <dev/ic/am7930reg.h>
     57  1.1  augustss #include <dev/ic/am7930var.h>
     58  1.1  augustss 
     59  1.1  augustss #include <dev/tc/tcvar.h>
     60  1.1  augustss #include <dev/tc/ioasicreg.h>
     61  1.1  augustss #include <dev/tc/ioasicvar.h>
     62  1.1  augustss 
     63  1.1  augustss #ifdef pmax
     64  1.1  augustss #include <pmax/pmax/maxine.h>
     65  1.1  augustss #define IOASIC_CSR_ISDN_ENABLE	XINE_CSR_ISDN_ENABLE
     66  1.1  augustss #define IOASIC_INTR_ISDN_TXLOAD	IOASIC_INTR_ISDN_DS_TXLOAD
     67  1.1  augustss #define IOASIC_INTR_ISDN_RXLOAD	IOASIC_INTR_ISDN_DS_RXLOAD
     68  1.1  augustss #ifdef IOASIC_INTR_ISDN_OVRUN
     69  1.1  augustss #undef IOASIC_INTR_ISDN_OVRUN
     70  1.1  augustss #endif
     71  1.1  augustss #define IOASIC_INTR_ISDN_OVRUN	IOASIC_INTR_ISDN_DS_OVRUN
     72  1.1  augustss #endif
     73  1.1  augustss 
     74  1.1  augustss #ifdef AUDIO_DEBUG
     75  1.1  augustss #define DPRINTF(x)	if (am7930debug) printf x
     76  1.1  augustss #else
     77  1.1  augustss #define DPRINTF(x)
     78  1.1  augustss #endif  /* AUDIO_DEBUG */
     79  1.1  augustss 
     80  1.1  augustss #define BBA_MAX_DMA_SEGMENTS	16
     81  1.1  augustss 
     82  1.1  augustss struct bba_mem {
     83  1.1  augustss 	bus_addr_t addr;
     84  1.1  augustss 	bus_size_t size;
     85  1.1  augustss 	caddr_t kva;
     86  1.1  augustss         struct bba_mem *next;
     87  1.1  augustss };
     88  1.1  augustss 
     89  1.1  augustss struct bba_dma_state {
     90  1.1  augustss 	bus_dmamap_t dmam;		/* dma map */
     91  1.1  augustss 	int active;
     92  1.1  augustss 	int curseg;			/* current segment in dma buffer */
     93  1.1  augustss 	void (*intr)__P((void *));	/* higher-level audio handler */
     94  1.1  augustss 	void *intr_arg;
     95  1.1  augustss };
     96  1.1  augustss 
     97  1.1  augustss struct bba_softc {
     98  1.1  augustss 	struct am7930_softc sc_am7930;		/* glue to MI code */
     99  1.1  augustss 
    100  1.1  augustss 	bus_space_tag_t sc_bst;			/* IOASIC bus tag/handle */
    101  1.1  augustss 	bus_space_handle_t sc_bsh;
    102  1.1  augustss 	bus_dma_tag_t sc_dmat;
    103  1.1  augustss 	bus_space_handle_t sc_codec_bsh;	/* codec bus space handle */
    104  1.1  augustss 
    105  1.1  augustss 	struct bba_mem *sc_mem_head;		/* list of buffers */
    106  1.1  augustss 
    107  1.1  augustss 	struct bba_dma_state sc_tx_dma_state;
    108  1.1  augustss 	struct bba_dma_state sc_rx_dma_state;
    109  1.1  augustss };
    110  1.1  augustss 
    111  1.1  augustss int	bba_match __P((struct device *, struct cfdata *, void *));
    112  1.1  augustss void	bba_attach __P((struct device *, struct device *, void *));
    113  1.1  augustss 
    114  1.1  augustss struct cfattach bba_ca = {
    115  1.1  augustss 	sizeof(struct bba_softc), bba_match, bba_attach
    116  1.1  augustss };
    117  1.1  augustss 
    118  1.1  augustss /*
    119  1.1  augustss  * Define our interface into the am7930 MI driver.
    120  1.1  augustss  */
    121  1.1  augustss 
    122  1.1  augustss u_int8_t	bba_codec_iread __P((struct am7930_softc *, int));
    123  1.1  augustss u_int16_t	bba_codec_iread16 __P((struct am7930_softc *, int));
    124  1.1  augustss void	bba_codec_iwrite __P((struct am7930_softc *, int, u_int8_t));
    125  1.1  augustss void	bba_codec_iwrite16 __P((struct am7930_softc *, int, u_int16_t));
    126  1.1  augustss void	bba_onopen __P((struct am7930_softc *sc));
    127  1.1  augustss void	bba_onclose __P((struct am7930_softc *sc));
    128  1.1  augustss void	bba_output_conv __P((void *, u_int8_t *, int));
    129  1.1  augustss void	bba_input_conv __P((void *, u_int8_t *, int));
    130  1.1  augustss 
    131  1.1  augustss struct am7930_glue bba_glue = {
    132  1.1  augustss 	bba_codec_iread,
    133  1.1  augustss 	bba_codec_iwrite,
    134  1.1  augustss 	bba_codec_iread16,
    135  1.1  augustss 	bba_codec_iwrite16,
    136  1.1  augustss 	bba_onopen,
    137  1.1  augustss 	bba_onclose,
    138  1.1  augustss 	4,
    139  1.1  augustss 	bba_input_conv,
    140  1.1  augustss 	bba_output_conv,
    141  1.1  augustss };
    142  1.1  augustss 
    143  1.1  augustss /*
    144  1.1  augustss  * Define our interface to the higher level audio driver.
    145  1.1  augustss  */
    146  1.1  augustss 
    147  1.1  augustss int	bba_round_blocksize __P((void *, int));
    148  1.1  augustss int	bba_halt_output __P((void *));
    149  1.1  augustss int	bba_halt_input __P((void *));
    150  1.1  augustss int	bba_getdev __P((void *, struct audio_device *));
    151  1.1  augustss void	*bba_allocm __P((void *, int, size_t, int, int));
    152  1.1  augustss void	bba_freem __P((void *, void *, int));
    153  1.1  augustss size_t	bba_round_buffersize __P((void *, int, size_t));
    154  1.1  augustss int	bba_trigger_output __P((void *, void *, void *, int,
    155  1.1  augustss 		void (*)(void *), void *, struct audio_params *));
    156  1.1  augustss int	bba_trigger_input __P((void *, void *, void *, int,
    157  1.1  augustss 		void (*)(void *), void *, struct audio_params *));
    158  1.1  augustss 
    159  1.1  augustss struct audio_hw_if sa_hw_if = {
    160  1.1  augustss 	am7930_open,
    161  1.1  augustss 	am7930_close,
    162  1.1  augustss 	0,
    163  1.1  augustss 	am7930_query_encoding,
    164  1.1  augustss 	am7930_set_params,
    165  1.1  augustss 	bba_round_blocksize,		/* md */
    166  1.1  augustss 	am7930_commit_settings,
    167  1.1  augustss 	0,
    168  1.1  augustss 	0,
    169  1.1  augustss 	0,
    170  1.1  augustss 	0,
    171  1.1  augustss 	bba_halt_output,		/* md */
    172  1.1  augustss 	bba_halt_input,			/* md */
    173  1.1  augustss 	0,
    174  1.1  augustss 	bba_getdev,
    175  1.1  augustss 	0,
    176  1.1  augustss 	am7930_set_port,
    177  1.1  augustss 	am7930_get_port,
    178  1.1  augustss 	am7930_query_devinfo,
    179  1.1  augustss 	bba_allocm,			/* md */
    180  1.1  augustss 	bba_freem,			/* md */
    181  1.1  augustss 	bba_round_buffersize,		/* md */
    182  1.1  augustss 	0,
    183  1.1  augustss 	am7930_get_props,
    184  1.1  augustss 	bba_trigger_output,		/* md */
    185  1.1  augustss 	bba_trigger_input		/* md */
    186  1.1  augustss };
    187  1.1  augustss 
    188  1.1  augustss struct audio_device bba_device = {
    189  1.1  augustss 	"am7930",
    190  1.1  augustss 	"x",
    191  1.1  augustss 	"bba"
    192  1.1  augustss };
    193  1.1  augustss 
    194  1.1  augustss int	bba_intr __P((void *));
    195  1.1  augustss void	bba_reset __P((struct bba_softc *, int));
    196  1.1  augustss void	bba_codec_dwrite __P((struct am7930_softc *, int, u_int8_t));
    197  1.1  augustss u_int8_t	bba_codec_dread __P((struct am7930_softc *, int));
    198  1.1  augustss 
    199  1.1  augustss int bba_match(parent, cf, aux)
    200  1.1  augustss 	struct device *parent;
    201  1.1  augustss 	struct cfdata *cf;
    202  1.1  augustss 	void *aux;
    203  1.1  augustss {
    204  1.1  augustss 	struct ioasicdev_attach_args *ia = aux;
    205  1.1  augustss 
    206  1.1  augustss         if (strcmp(ia->iada_modname, "isdn") != 0 &&
    207  1.1  augustss             strcmp(ia->iada_modname, "AMD79c30") != 0)
    208  1.1  augustss                 return 0;
    209  1.1  augustss 
    210  1.1  augustss 	return 1;
    211  1.1  augustss }
    212  1.1  augustss 
    213  1.1  augustss 
    214  1.1  augustss void
    215  1.1  augustss bba_attach(parent, self, aux)
    216  1.1  augustss 	struct device *parent;
    217  1.1  augustss 	struct device *self;
    218  1.1  augustss 	void *aux;
    219  1.1  augustss {
    220  1.1  augustss 	struct ioasicdev_attach_args *ia = aux;
    221  1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)self;
    222  1.1  augustss 	struct am7930_softc *asc = &sc->sc_am7930;
    223  1.1  augustss 
    224  1.1  augustss 	sc->sc_bst = ((struct ioasic_softc *)parent)->sc_bst;
    225  1.1  augustss 	sc->sc_bsh = ((struct ioasic_softc *)parent)->sc_bsh;
    226  1.1  augustss 	sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat;
    227  1.1  augustss 
    228  1.1  augustss 	/* get the bus space handle for codec */
    229  1.1  augustss 	if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
    230  1.1  augustss 		ia->iada_offset, 0, &sc->sc_codec_bsh)) {
    231  1.1  augustss 		printf("%s: unable to map device\n", asc->sc_dev.dv_xname);
    232  1.1  augustss 		return;
    233  1.1  augustss 	}
    234  1.1  augustss 
    235  1.1  augustss 	printf("\n");
    236  1.1  augustss 
    237  1.1  augustss 	bba_reset(sc,1);
    238  1.1  augustss 
    239  1.1  augustss 	/*
    240  1.1  augustss 	 * Set up glue for MI code early; we use some of it here.
    241  1.1  augustss 	 */
    242  1.1  augustss 	asc->sc_glue = &bba_glue;
    243  1.1  augustss 
    244  1.1  augustss 	/*
    245  1.1  augustss 	 *  MI initialisation.  We will be doing DMA.
    246  1.1  augustss 	 */
    247  1.1  augustss 	am7930_init(asc, AUDIOAMD_DMA_MODE);
    248  1.1  augustss 
    249  1.1  augustss 	ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
    250  1.1  augustss 		 bba_intr, sc);
    251  1.1  augustss 
    252  1.1  augustss 	audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev);
    253  1.1  augustss }
    254  1.1  augustss 
    255  1.1  augustss 
    256  1.1  augustss void
    257  1.1  augustss bba_onopen(sc)
    258  1.1  augustss 	struct am7930_softc *sc;
    259  1.1  augustss {
    260  1.1  augustss 	bba_reset((struct bba_softc *)sc, 0);
    261  1.1  augustss }
    262  1.1  augustss 
    263  1.1  augustss 
    264  1.1  augustss void
    265  1.1  augustss bba_onclose(sc)
    266  1.1  augustss 	struct am7930_softc *sc;
    267  1.1  augustss {
    268  1.1  augustss 	bba_halt_input((struct bba_softc *)sc);
    269  1.1  augustss 	bba_halt_output((struct bba_softc *)sc);
    270  1.1  augustss }
    271  1.1  augustss 
    272  1.1  augustss 
    273  1.1  augustss void
    274  1.1  augustss bba_reset(sc, reset)
    275  1.1  augustss 	struct bba_softc *sc;
    276  1.1  augustss 	int reset;
    277  1.1  augustss {
    278  1.1  augustss 	u_int32_t ssr;
    279  1.1  augustss 
    280  1.1  augustss 	/* disable any DMA and reset the codec */
    281  1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    282  1.1  augustss 	ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
    283  1.1  augustss 	if (reset)
    284  1.1  augustss 		ssr &= ~IOASIC_CSR_ISDN_ENABLE;
    285  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    286  1.1  augustss 	DELAY(10);	/* 400ns required for codec to reset */
    287  1.1  augustss 
    288  1.1  augustss 	/* initialise DMA pointers */
    289  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
    290  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
    291  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
    292  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
    293  1.1  augustss 
    294  1.1  augustss 	/* take out of reset state */
    295  1.1  augustss 	if (reset) {
    296  1.1  augustss 		ssr |= IOASIC_CSR_ISDN_ENABLE;
    297  1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    298  1.1  augustss 	}
    299  1.1  augustss 
    300  1.1  augustss }
    301  1.1  augustss 
    302  1.1  augustss 
    303  1.1  augustss void *
    304  1.1  augustss bba_allocm(addr, direction, size, pool, flags)
    305  1.1  augustss 	void *addr;
    306  1.1  augustss 	int direction;
    307  1.1  augustss 	size_t size;
    308  1.1  augustss 	int pool, flags;
    309  1.1  augustss {
    310  1.1  augustss 	struct am7930_softc *asc = addr;
    311  1.1  augustss 	struct bba_softc *sc = addr;
    312  1.1  augustss 	bus_dma_segment_t seg;
    313  1.1  augustss 	int rseg;
    314  1.1  augustss 	caddr_t kva;
    315  1.1  augustss 	struct bba_mem *m;
    316  1.1  augustss 	int state = 0;
    317  1.1  augustss 
    318  1.1  augustss 	DPRINTF(("bba_allocm: size = %d\n",size));
    319  1.1  augustss 
    320  1.1  augustss 	if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg,
    321  1.1  augustss 		1, &rseg, BUS_DMA_NOWAIT)) {
    322  1.1  augustss 		printf("%s: can't allocate DMA buffer\n",
    323  1.1  augustss 			asc->sc_dev.dv_xname);
    324  1.1  augustss 		goto bad;
    325  1.1  augustss 	}
    326  1.1  augustss 	state |= 1;
    327  1.1  augustss 
    328  1.1  augustss 	if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
    329  1.1  augustss 		&kva, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
    330  1.1  augustss 		printf("%s: can't map DMA buffer\n", asc->sc_dev.dv_xname);
    331  1.1  augustss 		goto bad;
    332  1.1  augustss 	}
    333  1.1  augustss 	state |= 2;
    334  1.1  augustss 
    335  1.1  augustss 	m = malloc(sizeof(struct bba_mem), pool, flags);
    336  1.1  augustss 	if (m == NULL)
    337  1.1  augustss 		goto bad;
    338  1.1  augustss 	m->addr = seg.ds_addr;
    339  1.1  augustss 	m->size = seg.ds_len;
    340  1.1  augustss         m->kva = kva;
    341  1.1  augustss         m->next = sc->sc_mem_head;
    342  1.1  augustss         sc->sc_mem_head = m;
    343  1.1  augustss 
    344  1.1  augustss         return (void *)kva;
    345  1.1  augustss 
    346  1.1  augustss bad:
    347  1.1  augustss 	if (state & 2)
    348  1.1  augustss 		bus_dmamem_unmap(sc->sc_dmat, kva, size);
    349  1.1  augustss 	if (state & 1)
    350  1.1  augustss 		bus_dmamem_free(sc->sc_dmat, &seg, 1);
    351  1.1  augustss 	return NULL;
    352  1.1  augustss }
    353  1.1  augustss 
    354  1.1  augustss 
    355  1.1  augustss void
    356  1.1  augustss bba_freem(addr, ptr, pool)
    357  1.1  augustss 	void *addr;
    358  1.1  augustss 	void *ptr;
    359  1.1  augustss 	int pool;
    360  1.1  augustss {
    361  1.1  augustss 	struct bba_softc *sc = addr;
    362  1.1  augustss         struct bba_mem **mp, *m;
    363  1.1  augustss 	bus_dma_segment_t seg;
    364  1.1  augustss         caddr_t kva = (caddr_t)addr;
    365  1.1  augustss 
    366  1.1  augustss 	for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
    367  1.1  augustss 		mp = &(*mp)->next)
    368  1.1  augustss 		/* nothing */ ;
    369  1.1  augustss 	m = *mp;
    370  1.1  augustss 	if (m != NULL) {
    371  1.1  augustss 		printf("bba_freem: freeing unallocted memory\n");
    372  1.1  augustss 		return;
    373  1.1  augustss 	}
    374  1.1  augustss 	*mp = m->next;
    375  1.1  augustss 	bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
    376  1.1  augustss 
    377  1.1  augustss         seg.ds_addr = m->addr;
    378  1.1  augustss         seg.ds_len = m->size;
    379  1.1  augustss 	bus_dmamem_free(sc->sc_dmat, &seg, 1);
    380  1.1  augustss         free(m, pool);
    381  1.1  augustss }
    382  1.1  augustss 
    383  1.1  augustss 
    384  1.1  augustss size_t
    385  1.1  augustss bba_round_buffersize(addr, direction, size)
    386  1.1  augustss 	void *addr;
    387  1.1  augustss 	int direction;
    388  1.1  augustss 	size_t size;
    389  1.1  augustss {
    390  1.1  augustss 	DPRINTF(("bba_round_buffersize: size=%d\n", size));
    391  1.1  augustss 
    392  1.1  augustss #define BBA_BUFFERSIZE (BBA_MAX_DMA_SEGMENTS * PAGE_SIZE)
    393  1.1  augustss 	return  (size > BBA_BUFFERSIZE ? BBA_BUFFERSIZE : round_page(size));
    394  1.1  augustss }
    395  1.1  augustss 
    396  1.1  augustss 
    397  1.1  augustss int
    398  1.1  augustss bba_halt_output(addr)
    399  1.1  augustss 	void *addr;
    400  1.1  augustss {
    401  1.1  augustss 	struct bba_softc *sc = addr;
    402  1.1  augustss 	struct bba_dma_state *d = &sc->sc_tx_dma_state;
    403  1.1  augustss 	u_int32_t ssr;
    404  1.1  augustss 
    405  1.1  augustss 	/* disable any DMA */
    406  1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    407  1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
    408  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    409  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
    410  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
    411  1.1  augustss 
    412  1.1  augustss 	if (d->active) {
    413  1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    414  1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    415  1.1  augustss 		d->active = 0;
    416  1.1  augustss 	}
    417  1.1  augustss 
    418  1.1  augustss 	return 0;
    419  1.1  augustss }
    420  1.1  augustss 
    421  1.1  augustss 
    422  1.1  augustss int
    423  1.1  augustss bba_halt_input(addr)
    424  1.1  augustss 	void *addr;
    425  1.1  augustss {
    426  1.1  augustss 	struct bba_softc *sc = addr;
    427  1.1  augustss 	struct bba_dma_state *d = &sc->sc_rx_dma_state;
    428  1.1  augustss 	u_int32_t ssr;
    429  1.1  augustss 
    430  1.1  augustss 	/* disable any DMA */
    431  1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    432  1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
    433  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    434  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
    435  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
    436  1.1  augustss 
    437  1.1  augustss 	if (d->active) {
    438  1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    439  1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    440  1.1  augustss 		d->active = 0;
    441  1.1  augustss 	}
    442  1.1  augustss 
    443  1.1  augustss 	return 0;
    444  1.1  augustss }
    445  1.1  augustss 
    446  1.1  augustss 
    447  1.1  augustss int
    448  1.1  augustss bba_getdev(addr, retp)
    449  1.1  augustss 	void *addr;
    450  1.1  augustss 	struct audio_device *retp;
    451  1.1  augustss {
    452  1.1  augustss 	*retp = bba_device;
    453  1.1  augustss 	return 0;
    454  1.1  augustss }
    455  1.1  augustss 
    456  1.1  augustss 
    457  1.1  augustss int
    458  1.1  augustss bba_trigger_output(addr, start, end, blksize, intr, arg, param)
    459  1.1  augustss 	void *addr;
    460  1.1  augustss 	void *start, *end;
    461  1.1  augustss 	int blksize;
    462  1.1  augustss 	void (*intr) __P((void *));
    463  1.1  augustss 	void *arg;
    464  1.1  augustss 	struct audio_params *param;
    465  1.1  augustss {
    466  1.1  augustss 	struct bba_softc *sc = addr;
    467  1.1  augustss 	struct bba_dma_state *d = &sc->sc_tx_dma_state;
    468  1.1  augustss 	u_int32_t ssr;
    469  1.1  augustss         tc_addr_t phys, nphys;
    470  1.1  augustss 	int state = 0;
    471  1.1  augustss 
    472  1.1  augustss 	DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
    473  1.1  augustss 		addr, start, end, blksize, intr, arg));
    474  1.1  augustss 
    475  1.1  augustss 	if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
    476  1.1  augustss 		BBA_MAX_DMA_SEGMENTS, PAGE_SIZE, 0, BUS_DMA_NOWAIT, &d->dmam)) {
    477  1.1  augustss 		printf("bba_trigger_output: can't create DMA map\n");
    478  1.1  augustss 		goto bad;
    479  1.1  augustss 	}
    480  1.1  augustss 	state |= 1;
    481  1.1  augustss 
    482  1.1  augustss 	if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
    483  1.1  augustss 		(char *)end - (char *)start, NULL, BUS_DMA_NOWAIT)) {
    484  1.1  augustss 		printf("bba_trigger_output: can't load DMA map\n");
    485  1.1  augustss 		goto bad;
    486  1.1  augustss 	}
    487  1.1  augustss 	state |= 2;
    488  1.1  augustss 
    489  1.1  augustss 	/* disable any DMA */
    490  1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    491  1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
    492  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    493  1.1  augustss 
    494  1.1  augustss 	d->intr = intr;
    495  1.1  augustss 	d->intr_arg = arg;
    496  1.1  augustss 	d->curseg = 1;
    497  1.1  augustss 
    498  1.1  augustss 	/* get physical address of buffer start */
    499  1.1  augustss 	phys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    500  1.1  augustss 	nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg+1].ds_addr;
    501  1.1  augustss 
    502  1.1  augustss 	/* setup DMA pointer */
    503  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
    504  1.1  augustss 		IOASIC_DMA_ADDR(phys));
    505  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
    506  1.1  augustss 		IOASIC_DMA_ADDR(nphys));
    507  1.1  augustss 
    508  1.1  augustss 	/* kick off DMA */
    509  1.1  augustss 	ssr |= IOASIC_CSR_DMAEN_ISDN_T;
    510  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    511  1.1  augustss 
    512  1.1  augustss 	wbflush();
    513  1.1  augustss 
    514  1.1  augustss 	d->active = 1;
    515  1.1  augustss 
    516  1.1  augustss 	return 0;
    517  1.1  augustss 
    518  1.1  augustss bad:
    519  1.1  augustss 	if (state & 2)
    520  1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    521  1.1  augustss 	if (state & 1)
    522  1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    523  1.1  augustss 	return 1;
    524  1.1  augustss }
    525  1.1  augustss 
    526  1.1  augustss 
    527  1.1  augustss int
    528  1.1  augustss bba_trigger_input(addr, start, end, blksize, intr, arg, param)
    529  1.1  augustss 	void *addr;
    530  1.1  augustss 	void *start, *end;
    531  1.1  augustss 	int blksize;
    532  1.1  augustss 	void (*intr) __P((void *));
    533  1.1  augustss 	void *arg;
    534  1.1  augustss 	struct audio_params *param;
    535  1.1  augustss {
    536  1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)addr;
    537  1.1  augustss 	struct bba_dma_state *d = &sc->sc_rx_dma_state;
    538  1.1  augustss         tc_addr_t phys, nphys;
    539  1.1  augustss 	u_int32_t ssr;
    540  1.1  augustss 	int state = 0;
    541  1.1  augustss 
    542  1.1  augustss 	DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
    543  1.1  augustss 		addr, start, end, blksize, intr, arg));
    544  1.1  augustss 
    545  1.1  augustss 	if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
    546  1.1  augustss 		BBA_MAX_DMA_SEGMENTS, PAGE_SIZE, 0, BUS_DMA_NOWAIT, &d->dmam)) {
    547  1.1  augustss 		printf("bba_trigger_input: can't create DMA map\n");
    548  1.1  augustss 		goto bad;
    549  1.1  augustss 	}
    550  1.1  augustss 	state |= 1;
    551  1.1  augustss 
    552  1.1  augustss 	if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
    553  1.1  augustss 		(char *)end - (char *)start, NULL, BUS_DMA_NOWAIT)) {
    554  1.1  augustss 		printf("bba_trigger_input: can't load DMA map\n");
    555  1.1  augustss 		goto bad;
    556  1.1  augustss 	}
    557  1.1  augustss 	state |= 2;
    558  1.1  augustss 
    559  1.1  augustss 	/* disable any DMA */
    560  1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    561  1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
    562  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    563  1.1  augustss 
    564  1.1  augustss 	d->intr = intr;
    565  1.1  augustss 	d->intr_arg = arg;
    566  1.1  augustss 	d->curseg = 1;
    567  1.1  augustss 
    568  1.1  augustss 	/* get physical address of buffer start */
    569  1.1  augustss 	phys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    570  1.1  augustss 	nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg+1].ds_addr;
    571  1.1  augustss 
    572  1.1  augustss 	/* setup DMA pointer */
    573  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
    574  1.1  augustss 		IOASIC_DMA_ADDR(phys));
    575  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
    576  1.1  augustss 		IOASIC_DMA_ADDR(nphys));
    577  1.1  augustss 
    578  1.1  augustss 	/* kick off DMA */
    579  1.1  augustss 	ssr |= IOASIC_CSR_DMAEN_ISDN_R;
    580  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    581  1.1  augustss 
    582  1.1  augustss 	wbflush();
    583  1.1  augustss 
    584  1.1  augustss 	d->active = 1;
    585  1.1  augustss 
    586  1.1  augustss 	return 0;
    587  1.1  augustss 
    588  1.1  augustss bad:
    589  1.1  augustss 	if (state & 2)
    590  1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    591  1.1  augustss 	if (state & 1)
    592  1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    593  1.1  augustss 	return 1;
    594  1.1  augustss }
    595  1.1  augustss 
    596  1.1  augustss int
    597  1.1  augustss bba_intr(addr)
    598  1.1  augustss 	void *addr;
    599  1.1  augustss {
    600  1.1  augustss 	struct bba_softc *sc = addr;
    601  1.1  augustss 	struct bba_dma_state *d;
    602  1.1  augustss 	tc_addr_t nphys;
    603  1.1  augustss 	int s, mask;
    604  1.1  augustss 
    605  1.1  augustss 	s = splaudio();
    606  1.1  augustss 
    607  1.1  augustss 	mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
    608  1.1  augustss 
    609  1.1  augustss 	if (mask & IOASIC_INTR_ISDN_TXLOAD) {
    610  1.1  augustss 		d = &sc->sc_tx_dma_state;
    611  1.1  augustss 		d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
    612  1.1  augustss 		nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    613  1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
    614  1.1  augustss 			IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
    615  1.1  augustss 		if (d->intr != NULL)
    616  1.1  augustss 			(*d->intr)(d->intr_arg);
    617  1.1  augustss 	}
    618  1.1  augustss 	if (mask & IOASIC_INTR_ISDN_RXLOAD) {
    619  1.1  augustss 		d = &sc->sc_rx_dma_state;
    620  1.1  augustss 		d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
    621  1.1  augustss 		nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    622  1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
    623  1.1  augustss 			IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
    624  1.1  augustss 		if (d->intr != NULL)
    625  1.1  augustss 			(*d->intr)(d->intr_arg);
    626  1.1  augustss 	}
    627  1.1  augustss 
    628  1.1  augustss 	splx(s);
    629  1.1  augustss 
    630  1.1  augustss 	return 0;
    631  1.1  augustss }
    632  1.1  augustss 
    633  1.1  augustss 
    634  1.1  augustss void
    635  1.1  augustss bba_input_conv(v, p, cc)
    636  1.1  augustss 	void *v;
    637  1.1  augustss 	u_int8_t *p;
    638  1.1  augustss 	int cc;
    639  1.1  augustss {
    640  1.1  augustss 	u_int8_t *q = p;
    641  1.1  augustss 
    642  1.1  augustss 	DPRINTF(("bba_input_conv(): v=%p p=%p cc=%d\n", v, p, cc));
    643  1.1  augustss 
    644  1.1  augustss 	/*
    645  1.1  augustss 	 * p points start of buffer
    646  1.1  augustss 	 * cc is the number of bytes in the destination buffer
    647  1.1  augustss 	 */
    648  1.1  augustss 
    649  1.1  augustss 	while (--cc >= 0) {
    650  1.1  augustss 		*p = ((*(u_int32_t *)q)>>16)&0xff;
    651  1.1  augustss 		q += 4;
    652  1.1  augustss 		p++;
    653  1.1  augustss 	}
    654  1.1  augustss }
    655  1.1  augustss 
    656  1.1  augustss 
    657  1.1  augustss void
    658  1.1  augustss bba_output_conv(v, p, cc)
    659  1.1  augustss 	void *v;
    660  1.1  augustss 	u_int8_t *p;
    661  1.1  augustss 	int cc;
    662  1.1  augustss {
    663  1.1  augustss 	u_int8_t *q = p;
    664  1.1  augustss 
    665  1.1  augustss 	DPRINTF(("bba_output_conv(): v=%p p=%p cc=%d\n", v, p, cc));
    666  1.1  augustss 
    667  1.1  augustss 	/*
    668  1.1  augustss 	 * p points start of buffer
    669  1.1  augustss 	 * cc is the number of bytes in the source buffer
    670  1.1  augustss 	 */
    671  1.1  augustss 
    672  1.1  augustss 	p += cc;
    673  1.1  augustss 	q += cc * 4;
    674  1.1  augustss 	while (--cc >= 0) {
    675  1.1  augustss 		q -= 4;
    676  1.1  augustss 		p -= 1;
    677  1.1  augustss 		*(u_int32_t *)q = (*p<<16);
    678  1.1  augustss 	}
    679  1.1  augustss }
    680  1.1  augustss 
    681  1.1  augustss 
    682  1.1  augustss int
    683  1.1  augustss bba_round_blocksize(addr, blk)
    684  1.1  augustss 	void *addr;
    685  1.1  augustss 	int blk;
    686  1.1  augustss {
    687  1.1  augustss 	return (PAGE_SIZE);
    688  1.1  augustss }
    689  1.1  augustss 
    690  1.1  augustss 
    691  1.1  augustss /* indirect write */
    692  1.1  augustss void
    693  1.1  augustss bba_codec_iwrite(sc, reg, val)
    694  1.1  augustss 	struct am7930_softc *sc;
    695  1.1  augustss 	int reg;
    696  1.1  augustss 	u_int8_t val;
    697  1.1  augustss {
    698  1.1  augustss 	DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
    699  1.1  augustss 
    700  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    701  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    702  1.1  augustss }
    703  1.1  augustss 
    704  1.1  augustss 
    705  1.1  augustss void
    706  1.1  augustss bba_codec_iwrite16(sc, reg, val)
    707  1.1  augustss 	struct am7930_softc *sc;
    708  1.1  augustss 	int reg;
    709  1.1  augustss 	u_int16_t val;
    710  1.1  augustss {
    711  1.1  augustss 	DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
    712  1.1  augustss 
    713  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    714  1.1  augustss #if 0
    715  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
    716  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    717  1.1  augustss #else
    718  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    719  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
    720  1.1  augustss #endif
    721  1.1  augustss }
    722  1.1  augustss 
    723  1.1  augustss 
    724  1.1  augustss u_int16_t
    725  1.1  augustss bba_codec_iread16(sc, reg)
    726  1.1  augustss 	struct am7930_softc *sc;
    727  1.1  augustss 	int reg;
    728  1.1  augustss {
    729  1.1  augustss 	u_int16_t val;
    730  1.1  augustss 	DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n",sc,reg));
    731  1.1  augustss 
    732  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    733  1.1  augustss #if 0
    734  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
    735  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    736  1.1  augustss #else
    737  1.1  augustss 	val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
    738  1.1  augustss 	val |= bba_codec_dread(sc, AM7930_DREG_DR);
    739  1.1  augustss #endif
    740  1.1  augustss 
    741  1.1  augustss 	return val;
    742  1.1  augustss }
    743  1.1  augustss 
    744  1.1  augustss 
    745  1.1  augustss /* indirect read */
    746  1.1  augustss u_int8_t
    747  1.1  augustss bba_codec_iread(sc, reg)
    748  1.1  augustss 	struct am7930_softc *sc;
    749  1.1  augustss 	int reg;
    750  1.1  augustss {
    751  1.1  augustss 	u_int8_t val;
    752  1.1  augustss 
    753  1.1  augustss 	DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n",sc,reg));
    754  1.1  augustss 
    755  1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    756  1.1  augustss 	val = bba_codec_dread(sc, AM7930_DREG_DR);
    757  1.1  augustss 
    758  1.1  augustss 	DPRINTF(("read 0x%x (%d)\n", val, val));
    759  1.1  augustss 
    760  1.1  augustss 	return val;
    761  1.1  augustss }
    762  1.1  augustss 
    763  1.1  augustss 
    764  1.1  augustss #define TIMETOWASTE	50
    765  1.1  augustss 
    766  1.1  augustss /* direct write */
    767  1.1  augustss void
    768  1.1  augustss bba_codec_dwrite(asc, reg, val)
    769  1.1  augustss 	struct am7930_softc *asc;
    770  1.1  augustss 	int reg;
    771  1.1  augustss 	u_int8_t val;
    772  1.1  augustss {
    773  1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)asc;
    774  1.1  augustss 	int i;
    775  1.1  augustss 
    776  1.1  augustss 	DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
    777  1.1  augustss 
    778  1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, (reg<<6), val);
    779  1.1  augustss 
    780  1.1  augustss 	for (i=0; i<TIMETOWASTE; i++) {};
    781  1.1  augustss }
    782  1.1  augustss 
    783  1.1  augustss /* direct read */
    784  1.1  augustss u_int8_t
    785  1.1  augustss bba_codec_dread(asc, reg)
    786  1.1  augustss 	struct am7930_softc *asc;
    787  1.1  augustss 	int reg;
    788  1.1  augustss {
    789  1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)asc;
    790  1.1  augustss 	u_int8_t val;
    791  1.1  augustss 	int i;
    792  1.1  augustss 
    793  1.1  augustss 	DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n",sc,reg));
    794  1.1  augustss 
    795  1.1  augustss 	val = bus_space_read_1(sc->sc_bst, sc->sc_codec_bsh, (reg<<6));
    796  1.1  augustss 
    797  1.1  augustss 	for (i=0; i<TIMETOWASTE; i++) {};
    798  1.1  augustss 
    799  1.1  augustss 	return val;
    800  1.1  augustss }
    801  1.1  augustss 
    802  1.1  augustss #endif /* NAUDIO > 0 */
    803