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bba.c revision 1.22.2.1
      1  1.22.2.1      kent /* $NetBSD: bba.c,v 1.22.2.1 2005/01/03 16:48:08 kent Exp $ */
      2       1.1  augustss 
      3       1.1  augustss /*
      4       1.1  augustss  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * Redistribution and use in source and binary forms, with or without
      8       1.1  augustss  * modification, are permitted provided that the following conditions
      9       1.1  augustss  * are met:
     10       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     11       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     12       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     14       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     15       1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     16       1.1  augustss  *    must display the following acknowledgement:
     17       1.1  augustss  *        This product includes software developed by the NetBSD
     18       1.1  augustss  *        Foundation, Inc. and its contributors.
     19       1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     20       1.1  augustss  *    contributors may be used to endorse or promote products derived
     21       1.1  augustss  *    from this software without specific prior written permission.
     22       1.1  augustss  *
     23       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24       1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25       1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26       1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33       1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     34       1.1  augustss  */
     35       1.1  augustss 
     36       1.1  augustss /* maxine/alpha baseboard audio (bba) */
     37      1.15     lukem 
     38      1.15     lukem #include <sys/cdefs.h>
     39  1.22.2.1      kent __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.22.2.1 2005/01/03 16:48:08 kent Exp $");
     40       1.1  augustss 
     41       1.1  augustss #include <sys/param.h>
     42       1.1  augustss #include <sys/systm.h>
     43       1.1  augustss #include <sys/kernel.h>
     44       1.1  augustss #include <sys/device.h>
     45       1.1  augustss #include <sys/malloc.h>
     46       1.1  augustss 
     47       1.1  augustss #include <machine/bus.h>
     48       1.1  augustss #include <machine/autoconf.h>
     49       1.1  augustss #include <machine/cpu.h>
     50       1.1  augustss 
     51       1.1  augustss #include <sys/audioio.h>
     52       1.1  augustss #include <dev/audio_if.h>
     53  1.22.2.1      kent #include <dev/auconv.h>
     54       1.1  augustss 
     55       1.1  augustss #include <dev/ic/am7930reg.h>
     56       1.1  augustss #include <dev/ic/am7930var.h>
     57       1.1  augustss 
     58       1.1  augustss #include <dev/tc/tcvar.h>
     59       1.1  augustss #include <dev/tc/ioasicreg.h>
     60       1.1  augustss #include <dev/tc/ioasicvar.h>
     61       1.1  augustss 
     62       1.1  augustss #ifdef AUDIO_DEBUG
     63       1.1  augustss #define DPRINTF(x)	if (am7930debug) printf x
     64       1.1  augustss #else
     65       1.1  augustss #define DPRINTF(x)
     66       1.1  augustss #endif  /* AUDIO_DEBUG */
     67       1.1  augustss 
     68       1.1  augustss #define BBA_MAX_DMA_SEGMENTS	16
     69       1.9   thorpej #define BBA_DMABUF_SIZE		(BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE)
     70       1.9   thorpej #define BBA_DMABUF_ALIGN	IOASIC_DMA_BLOCKSIZE
     71       1.6  gmcgarry #define BBA_DMABUF_BOUNDARY	0
     72       1.1  augustss 
     73       1.1  augustss struct bba_mem {
     74       1.6  gmcgarry         struct bba_mem *next;
     75       1.1  augustss 	bus_addr_t addr;
     76       1.1  augustss 	bus_size_t size;
     77       1.1  augustss 	caddr_t kva;
     78       1.1  augustss };
     79       1.1  augustss 
     80       1.1  augustss struct bba_dma_state {
     81      1.20       wiz 	bus_dmamap_t dmam;		/* DMA map */
     82       1.1  augustss 	int active;
     83      1.20       wiz 	int curseg;			/* current segment in DMA buffer */
     84       1.1  augustss 	void (*intr)__P((void *));	/* higher-level audio handler */
     85       1.1  augustss 	void *intr_arg;
     86       1.1  augustss };
     87       1.1  augustss 
     88       1.1  augustss struct bba_softc {
     89       1.1  augustss 	struct am7930_softc sc_am7930;		/* glue to MI code */
     90       1.1  augustss 
     91       1.1  augustss 	bus_space_tag_t sc_bst;			/* IOASIC bus tag/handle */
     92       1.1  augustss 	bus_space_handle_t sc_bsh;
     93       1.1  augustss 	bus_dma_tag_t sc_dmat;
     94       1.1  augustss 	bus_space_handle_t sc_codec_bsh;	/* codec bus space handle */
     95       1.1  augustss 
     96       1.1  augustss 	struct bba_mem *sc_mem_head;		/* list of buffers */
     97       1.1  augustss 
     98       1.1  augustss 	struct bba_dma_state sc_tx_dma_state;
     99       1.1  augustss 	struct bba_dma_state sc_rx_dma_state;
    100       1.1  augustss };
    101       1.1  augustss 
    102       1.1  augustss int	bba_match __P((struct device *, struct cfdata *, void *));
    103       1.1  augustss void	bba_attach __P((struct device *, struct device *, void *));
    104       1.1  augustss 
    105      1.17   thorpej CFATTACH_DECL(bba, sizeof(struct bba_softc),
    106      1.18   thorpej     bba_match, bba_attach, NULL, NULL);
    107       1.1  augustss 
    108       1.1  augustss /*
    109       1.1  augustss  * Define our interface into the am7930 MI driver.
    110       1.1  augustss  */
    111       1.1  augustss 
    112       1.1  augustss u_int8_t	bba_codec_iread __P((struct am7930_softc *, int));
    113       1.1  augustss u_int16_t	bba_codec_iread16 __P((struct am7930_softc *, int));
    114       1.1  augustss void	bba_codec_iwrite __P((struct am7930_softc *, int, u_int8_t));
    115       1.1  augustss void	bba_codec_iwrite16 __P((struct am7930_softc *, int, u_int16_t));
    116       1.1  augustss void	bba_onopen __P((struct am7930_softc *sc));
    117       1.1  augustss void	bba_onclose __P((struct am7930_softc *sc));
    118  1.22.2.1      kent static stream_filter_factory_t bba_output_conv;
    119  1.22.2.1      kent static stream_filter_factory_t bba_input_conv;
    120  1.22.2.1      kent static int bba_output_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int);
    121  1.22.2.1      kent static int bba_input_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int);
    122       1.1  augustss 
    123       1.1  augustss struct am7930_glue bba_glue = {
    124       1.1  augustss 	bba_codec_iread,
    125       1.1  augustss 	bba_codec_iwrite,
    126       1.1  augustss 	bba_codec_iread16,
    127       1.1  augustss 	bba_codec_iwrite16,
    128       1.1  augustss 	bba_onopen,
    129       1.1  augustss 	bba_onclose,
    130       1.1  augustss 	4,
    131       1.1  augustss 	bba_input_conv,
    132       1.1  augustss 	bba_output_conv,
    133       1.1  augustss };
    134       1.1  augustss 
    135       1.1  augustss /*
    136       1.1  augustss  * Define our interface to the higher level audio driver.
    137       1.1  augustss  */
    138       1.1  augustss 
    139       1.1  augustss int	bba_round_blocksize __P((void *, int));
    140       1.1  augustss int	bba_halt_output __P((void *));
    141       1.1  augustss int	bba_halt_input __P((void *));
    142       1.1  augustss int	bba_getdev __P((void *, struct audio_device *));
    143      1.19      matt void	*bba_allocm __P((void *, int, size_t, struct malloc_type *, int));
    144      1.19      matt void	bba_freem __P((void *, void *, struct malloc_type *));
    145       1.1  augustss size_t	bba_round_buffersize __P((void *, int, size_t));
    146       1.6  gmcgarry int	bba_get_props __P((void *));
    147       1.7    simonb paddr_t	bba_mappage __P((void *, void *, off_t, int));
    148       1.1  augustss int	bba_trigger_output __P((void *, void *, void *, int,
    149  1.22.2.1      kent 	    void (*)(void *), void *, const audio_params_t *));
    150       1.1  augustss int	bba_trigger_input __P((void *, void *, void *, int,
    151  1.22.2.1      kent 	    void (*)(void *), void *, const audio_params_t *));
    152       1.1  augustss 
    153      1.22      yamt const struct audio_hw_if sa_hw_if = {
    154       1.1  augustss 	am7930_open,
    155       1.1  augustss 	am7930_close,
    156       1.1  augustss 	0,
    157       1.1  augustss 	am7930_query_encoding,
    158       1.1  augustss 	am7930_set_params,
    159       1.1  augustss 	bba_round_blocksize,		/* md */
    160       1.1  augustss 	am7930_commit_settings,
    161       1.1  augustss 	0,
    162       1.1  augustss 	0,
    163       1.1  augustss 	0,
    164       1.1  augustss 	0,
    165       1.1  augustss 	bba_halt_output,		/* md */
    166       1.1  augustss 	bba_halt_input,			/* md */
    167       1.1  augustss 	0,
    168       1.1  augustss 	bba_getdev,
    169       1.1  augustss 	0,
    170       1.1  augustss 	am7930_set_port,
    171       1.1  augustss 	am7930_get_port,
    172       1.1  augustss 	am7930_query_devinfo,
    173       1.1  augustss 	bba_allocm,			/* md */
    174       1.1  augustss 	bba_freem,			/* md */
    175       1.1  augustss 	bba_round_buffersize,		/* md */
    176       1.6  gmcgarry 	bba_mappage,
    177       1.6  gmcgarry 	bba_get_props,
    178       1.1  augustss 	bba_trigger_output,		/* md */
    179      1.14  augustss 	bba_trigger_input,		/* md */
    180      1.14  augustss 	0,
    181       1.1  augustss };
    182       1.1  augustss 
    183       1.1  augustss struct audio_device bba_device = {
    184       1.1  augustss 	"am7930",
    185       1.1  augustss 	"x",
    186       1.1  augustss 	"bba"
    187       1.1  augustss };
    188       1.1  augustss 
    189       1.1  augustss int	bba_intr __P((void *));
    190       1.1  augustss void	bba_reset __P((struct bba_softc *, int));
    191       1.1  augustss void	bba_codec_dwrite __P((struct am7930_softc *, int, u_int8_t));
    192       1.1  augustss u_int8_t	bba_codec_dread __P((struct am7930_softc *, int));
    193       1.1  augustss 
    194       1.1  augustss int bba_match(parent, cf, aux)
    195       1.1  augustss 	struct device *parent;
    196       1.1  augustss 	struct cfdata *cf;
    197       1.1  augustss 	void *aux;
    198       1.1  augustss {
    199       1.1  augustss 	struct ioasicdev_attach_args *ia = aux;
    200       1.1  augustss 
    201       1.6  gmcgarry 	if (strcmp(ia->iada_modname, "isdn") != 0 &&
    202       1.6  gmcgarry 	    strcmp(ia->iada_modname, "AMD79c30") != 0)
    203       1.6  gmcgarry 		return 0;
    204       1.1  augustss 
    205       1.1  augustss 	return 1;
    206       1.1  augustss }
    207       1.1  augustss 
    208       1.1  augustss 
    209       1.1  augustss void
    210       1.1  augustss bba_attach(parent, self, aux)
    211       1.1  augustss 	struct device *parent;
    212       1.1  augustss 	struct device *self;
    213       1.1  augustss 	void *aux;
    214       1.1  augustss {
    215       1.1  augustss 	struct ioasicdev_attach_args *ia = aux;
    216       1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)self;
    217       1.1  augustss 	struct am7930_softc *asc = &sc->sc_am7930;
    218       1.1  augustss 
    219       1.1  augustss 	sc->sc_bst = ((struct ioasic_softc *)parent)->sc_bst;
    220       1.1  augustss 	sc->sc_bsh = ((struct ioasic_softc *)parent)->sc_bsh;
    221       1.1  augustss 	sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat;
    222       1.1  augustss 
    223       1.1  augustss 	/* get the bus space handle for codec */
    224       1.1  augustss 	if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
    225       1.6  gmcgarry 	    ia->iada_offset, 0, &sc->sc_codec_bsh)) {
    226       1.1  augustss 		printf("%s: unable to map device\n", asc->sc_dev.dv_xname);
    227       1.1  augustss 		return;
    228       1.1  augustss 	}
    229       1.1  augustss 
    230       1.1  augustss 	printf("\n");
    231       1.1  augustss 
    232       1.1  augustss 	bba_reset(sc,1);
    233       1.1  augustss 
    234       1.1  augustss 	/*
    235       1.1  augustss 	 * Set up glue for MI code early; we use some of it here.
    236       1.1  augustss 	 */
    237       1.1  augustss 	asc->sc_glue = &bba_glue;
    238       1.1  augustss 
    239       1.1  augustss 	/*
    240       1.1  augustss 	 *  MI initialisation.  We will be doing DMA.
    241       1.1  augustss 	 */
    242       1.1  augustss 	am7930_init(asc, AUDIOAMD_DMA_MODE);
    243       1.1  augustss 
    244       1.1  augustss 	ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
    245       1.6  gmcgarry 	    bba_intr, sc);
    246       1.1  augustss 
    247       1.1  augustss 	audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev);
    248       1.1  augustss }
    249       1.1  augustss 
    250       1.1  augustss 
    251       1.1  augustss void
    252       1.1  augustss bba_onopen(sc)
    253       1.1  augustss 	struct am7930_softc *sc;
    254       1.1  augustss {
    255       1.1  augustss }
    256       1.1  augustss 
    257       1.1  augustss 
    258       1.1  augustss void
    259       1.1  augustss bba_onclose(sc)
    260       1.1  augustss 	struct am7930_softc *sc;
    261       1.1  augustss {
    262       1.1  augustss }
    263       1.1  augustss 
    264       1.1  augustss 
    265       1.1  augustss void
    266       1.1  augustss bba_reset(sc, reset)
    267       1.1  augustss 	struct bba_softc *sc;
    268       1.1  augustss 	int reset;
    269       1.1  augustss {
    270       1.1  augustss 	u_int32_t ssr;
    271       1.1  augustss 
    272       1.1  augustss 	/* disable any DMA and reset the codec */
    273       1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    274       1.1  augustss 	ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
    275       1.1  augustss 	if (reset)
    276       1.1  augustss 		ssr &= ~IOASIC_CSR_ISDN_ENABLE;
    277       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    278       1.1  augustss 	DELAY(10);	/* 400ns required for codec to reset */
    279       1.1  augustss 
    280       1.1  augustss 	/* initialise DMA pointers */
    281       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
    282       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
    283       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
    284       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
    285       1.1  augustss 
    286       1.1  augustss 	/* take out of reset state */
    287       1.1  augustss 	if (reset) {
    288       1.1  augustss 		ssr |= IOASIC_CSR_ISDN_ENABLE;
    289       1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    290       1.1  augustss 	}
    291       1.1  augustss 
    292       1.1  augustss }
    293       1.1  augustss 
    294       1.1  augustss 
    295       1.1  augustss void *
    296       1.1  augustss bba_allocm(addr, direction, size, pool, flags)
    297       1.1  augustss 	void *addr;
    298       1.1  augustss 	int direction;
    299       1.1  augustss 	size_t size;
    300      1.19      matt 	struct malloc_type *pool;
    301      1.19      matt 	int flags;
    302       1.1  augustss {
    303       1.1  augustss 	struct am7930_softc *asc = addr;
    304       1.1  augustss 	struct bba_softc *sc = addr;
    305       1.1  augustss 	bus_dma_segment_t seg;
    306       1.1  augustss 	int rseg;
    307       1.1  augustss 	caddr_t kva;
    308       1.1  augustss 	struct bba_mem *m;
    309       1.6  gmcgarry 	int w;
    310       1.1  augustss 	int state = 0;
    311       1.1  augustss 
    312       1.1  augustss 	DPRINTF(("bba_allocm: size = %d\n",size));
    313       1.1  augustss 
    314       1.6  gmcgarry 	w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
    315       1.6  gmcgarry 
    316       1.6  gmcgarry 	if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN,
    317       1.6  gmcgarry 	    BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) {
    318       1.1  augustss 		printf("%s: can't allocate DMA buffer\n",
    319       1.6  gmcgarry 		    asc->sc_dev.dv_xname);
    320       1.1  augustss 		goto bad;
    321       1.1  augustss 	}
    322       1.1  augustss 	state |= 1;
    323       1.1  augustss 
    324       1.1  augustss 	if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
    325       1.6  gmcgarry 	    &kva, w | BUS_DMA_COHERENT)) {
    326       1.1  augustss 		printf("%s: can't map DMA buffer\n", asc->sc_dev.dv_xname);
    327       1.1  augustss 		goto bad;
    328       1.1  augustss 	}
    329       1.1  augustss 	state |= 2;
    330       1.1  augustss 
    331       1.1  augustss 	m = malloc(sizeof(struct bba_mem), pool, flags);
    332       1.1  augustss 	if (m == NULL)
    333       1.1  augustss 		goto bad;
    334       1.1  augustss 	m->addr = seg.ds_addr;
    335       1.1  augustss 	m->size = seg.ds_len;
    336       1.1  augustss         m->kva = kva;
    337       1.1  augustss         m->next = sc->sc_mem_head;
    338       1.1  augustss         sc->sc_mem_head = m;
    339       1.1  augustss 
    340       1.1  augustss         return (void *)kva;
    341       1.1  augustss 
    342       1.1  augustss bad:
    343       1.1  augustss 	if (state & 2)
    344       1.1  augustss 		bus_dmamem_unmap(sc->sc_dmat, kva, size);
    345       1.1  augustss 	if (state & 1)
    346       1.1  augustss 		bus_dmamem_free(sc->sc_dmat, &seg, 1);
    347       1.1  augustss 	return NULL;
    348       1.1  augustss }
    349       1.1  augustss 
    350       1.1  augustss 
    351       1.1  augustss void
    352       1.1  augustss bba_freem(addr, ptr, pool)
    353       1.1  augustss 	void *addr;
    354       1.1  augustss 	void *ptr;
    355      1.19      matt 	struct malloc_type *pool;
    356       1.1  augustss {
    357       1.1  augustss 	struct bba_softc *sc = addr;
    358       1.1  augustss         struct bba_mem **mp, *m;
    359       1.1  augustss 	bus_dma_segment_t seg;
    360       1.1  augustss         caddr_t kva = (caddr_t)addr;
    361       1.1  augustss 
    362       1.1  augustss 	for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
    363       1.6  gmcgarry 	    mp = &(*mp)->next)
    364       1.1  augustss 		/* nothing */ ;
    365       1.1  augustss 	m = *mp;
    366       1.6  gmcgarry 	if (m == NULL) {
    367       1.6  gmcgarry 		printf("bba_freem: freeing unallocated memory\n");
    368       1.1  augustss 		return;
    369       1.1  augustss 	}
    370       1.1  augustss 	*mp = m->next;
    371       1.1  augustss 	bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
    372       1.1  augustss 
    373       1.1  augustss         seg.ds_addr = m->addr;
    374       1.1  augustss         seg.ds_len = m->size;
    375       1.1  augustss 	bus_dmamem_free(sc->sc_dmat, &seg, 1);
    376       1.1  augustss         free(m, pool);
    377       1.1  augustss }
    378       1.1  augustss 
    379       1.1  augustss 
    380       1.1  augustss size_t
    381       1.1  augustss bba_round_buffersize(addr, direction, size)
    382       1.1  augustss 	void *addr;
    383       1.1  augustss 	int direction;
    384       1.1  augustss 	size_t size;
    385       1.1  augustss {
    386       1.1  augustss 	DPRINTF(("bba_round_buffersize: size=%d\n", size));
    387       1.1  augustss 
    388       1.9   thorpej 	return (size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE :
    389       1.9   thorpej 	    roundup(size, IOASIC_DMA_BLOCKSIZE));
    390       1.1  augustss }
    391       1.1  augustss 
    392       1.1  augustss 
    393       1.1  augustss int
    394       1.1  augustss bba_halt_output(addr)
    395       1.1  augustss 	void *addr;
    396       1.1  augustss {
    397       1.1  augustss 	struct bba_softc *sc = addr;
    398       1.1  augustss 	struct bba_dma_state *d = &sc->sc_tx_dma_state;
    399       1.1  augustss 	u_int32_t ssr;
    400       1.1  augustss 
    401       1.1  augustss 	/* disable any DMA */
    402       1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    403       1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
    404       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    405       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
    406       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
    407       1.1  augustss 
    408       1.1  augustss 	if (d->active) {
    409       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    410       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    411       1.1  augustss 		d->active = 0;
    412       1.1  augustss 	}
    413       1.1  augustss 
    414       1.1  augustss 	return 0;
    415       1.1  augustss }
    416       1.1  augustss 
    417       1.1  augustss 
    418       1.1  augustss int
    419       1.1  augustss bba_halt_input(addr)
    420       1.1  augustss 	void *addr;
    421       1.1  augustss {
    422       1.1  augustss 	struct bba_softc *sc = addr;
    423       1.1  augustss 	struct bba_dma_state *d = &sc->sc_rx_dma_state;
    424       1.1  augustss 	u_int32_t ssr;
    425       1.1  augustss 
    426       1.1  augustss 	/* disable any DMA */
    427       1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    428       1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
    429       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    430       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
    431       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
    432       1.1  augustss 
    433       1.1  augustss 	if (d->active) {
    434       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    435       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    436       1.1  augustss 		d->active = 0;
    437       1.1  augustss 	}
    438       1.1  augustss 
    439       1.1  augustss 	return 0;
    440       1.1  augustss }
    441       1.1  augustss 
    442       1.1  augustss 
    443       1.1  augustss int
    444       1.1  augustss bba_getdev(addr, retp)
    445       1.1  augustss 	void *addr;
    446       1.1  augustss 	struct audio_device *retp;
    447       1.1  augustss {
    448       1.1  augustss 	*retp = bba_device;
    449       1.1  augustss 	return 0;
    450       1.1  augustss }
    451       1.1  augustss 
    452       1.1  augustss 
    453       1.1  augustss int
    454       1.1  augustss bba_trigger_output(addr, start, end, blksize, intr, arg, param)
    455       1.1  augustss 	void *addr;
    456       1.1  augustss 	void *start, *end;
    457       1.1  augustss 	int blksize;
    458       1.1  augustss 	void (*intr) __P((void *));
    459       1.1  augustss 	void *arg;
    460  1.22.2.1      kent 	const audio_params_t *param;
    461       1.1  augustss {
    462       1.1  augustss 	struct bba_softc *sc = addr;
    463       1.1  augustss 	struct bba_dma_state *d = &sc->sc_tx_dma_state;
    464       1.1  augustss 	u_int32_t ssr;
    465  1.22.2.1      kent 	tc_addr_t phys, nphys;
    466       1.1  augustss 	int state = 0;
    467       1.1  augustss 
    468       1.1  augustss 	DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
    469       1.6  gmcgarry 	    addr, start, end, blksize, intr, arg));
    470       1.6  gmcgarry 
    471       1.6  gmcgarry 	/* disable any DMA */
    472       1.6  gmcgarry 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    473       1.6  gmcgarry 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
    474       1.6  gmcgarry 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    475       1.1  augustss 
    476       1.1  augustss 	if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
    477       1.9   thorpej 	    BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
    478       1.9   thorpej 	    BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
    479       1.1  augustss 		printf("bba_trigger_output: can't create DMA map\n");
    480       1.1  augustss 		goto bad;
    481       1.1  augustss 	}
    482       1.1  augustss 	state |= 1;
    483       1.1  augustss 
    484       1.1  augustss 	if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
    485      1.13   thorpej 	    (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) {
    486       1.6  gmcgarry 	    printf("bba_trigger_output: can't load DMA map\n");
    487       1.1  augustss 		goto bad;
    488       1.1  augustss 	}
    489       1.1  augustss 	state |= 2;
    490       1.1  augustss 
    491       1.1  augustss 	d->intr = intr;
    492       1.1  augustss 	d->intr_arg = arg;
    493       1.1  augustss 	d->curseg = 1;
    494       1.1  augustss 
    495       1.1  augustss 	/* get physical address of buffer start */
    496       1.2  gmcgarry 	phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
    497       1.2  gmcgarry 	nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
    498       1.1  augustss 
    499       1.1  augustss 	/* setup DMA pointer */
    500       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
    501       1.6  gmcgarry 	    IOASIC_DMA_ADDR(phys));
    502       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
    503       1.6  gmcgarry 	    IOASIC_DMA_ADDR(nphys));
    504       1.1  augustss 
    505       1.1  augustss 	/* kick off DMA */
    506       1.1  augustss 	ssr |= IOASIC_CSR_DMAEN_ISDN_T;
    507       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    508       1.1  augustss 
    509       1.1  augustss 	d->active = 1;
    510       1.1  augustss 
    511       1.1  augustss 	return 0;
    512       1.1  augustss 
    513       1.1  augustss bad:
    514       1.1  augustss 	if (state & 2)
    515       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    516       1.1  augustss 	if (state & 1)
    517       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    518       1.1  augustss 	return 1;
    519       1.1  augustss }
    520       1.1  augustss 
    521       1.1  augustss 
    522       1.1  augustss int
    523       1.1  augustss bba_trigger_input(addr, start, end, blksize, intr, arg, param)
    524       1.1  augustss 	void *addr;
    525       1.1  augustss 	void *start, *end;
    526       1.1  augustss 	int blksize;
    527       1.1  augustss 	void (*intr) __P((void *));
    528       1.1  augustss 	void *arg;
    529  1.22.2.1      kent 	const audio_params_t *param;
    530       1.1  augustss {
    531       1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)addr;
    532       1.1  augustss 	struct bba_dma_state *d = &sc->sc_rx_dma_state;
    533  1.22.2.1      kent 	tc_addr_t phys, nphys;
    534       1.1  augustss 	u_int32_t ssr;
    535       1.1  augustss 	int state = 0;
    536       1.1  augustss 
    537       1.1  augustss 	DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
    538       1.6  gmcgarry 	    addr, start, end, blksize, intr, arg));
    539       1.6  gmcgarry 
    540       1.6  gmcgarry 	/* disable any DMA */
    541       1.6  gmcgarry 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    542       1.6  gmcgarry 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
    543       1.6  gmcgarry 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    544       1.1  augustss 
    545       1.1  augustss 	if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
    546       1.9   thorpej 	    BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
    547       1.9   thorpej 	    BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
    548       1.1  augustss 		printf("bba_trigger_input: can't create DMA map\n");
    549       1.1  augustss 		goto bad;
    550       1.1  augustss 	}
    551       1.1  augustss 	state |= 1;
    552       1.1  augustss 
    553       1.1  augustss 	if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
    554      1.13   thorpej 	    (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) {
    555       1.1  augustss 		printf("bba_trigger_input: can't load DMA map\n");
    556       1.1  augustss 		goto bad;
    557       1.1  augustss 	}
    558       1.1  augustss 	state |= 2;
    559       1.1  augustss 
    560       1.1  augustss 	d->intr = intr;
    561       1.1  augustss 	d->intr_arg = arg;
    562       1.1  augustss 	d->curseg = 1;
    563       1.1  augustss 
    564       1.1  augustss 	/* get physical address of buffer start */
    565       1.2  gmcgarry 	phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
    566       1.2  gmcgarry 	nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
    567       1.1  augustss 
    568       1.1  augustss 	/* setup DMA pointer */
    569       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
    570       1.6  gmcgarry 	    IOASIC_DMA_ADDR(phys));
    571       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
    572       1.6  gmcgarry 	    IOASIC_DMA_ADDR(nphys));
    573       1.1  augustss 
    574       1.1  augustss 	/* kick off DMA */
    575       1.1  augustss 	ssr |= IOASIC_CSR_DMAEN_ISDN_R;
    576       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    577       1.1  augustss 
    578       1.1  augustss 	d->active = 1;
    579       1.1  augustss 
    580       1.1  augustss 	return 0;
    581       1.1  augustss 
    582       1.1  augustss bad:
    583       1.1  augustss 	if (state & 2)
    584       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    585       1.1  augustss 	if (state & 1)
    586       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    587       1.1  augustss 	return 1;
    588       1.1  augustss }
    589       1.1  augustss 
    590       1.1  augustss int
    591       1.1  augustss bba_intr(addr)
    592       1.1  augustss 	void *addr;
    593       1.1  augustss {
    594       1.1  augustss 	struct bba_softc *sc = addr;
    595       1.1  augustss 	struct bba_dma_state *d;
    596       1.1  augustss 	tc_addr_t nphys;
    597       1.1  augustss 	int s, mask;
    598       1.1  augustss 
    599       1.1  augustss 	s = splaudio();
    600       1.1  augustss 
    601       1.1  augustss 	mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
    602       1.1  augustss 
    603       1.1  augustss 	if (mask & IOASIC_INTR_ISDN_TXLOAD) {
    604       1.1  augustss 		d = &sc->sc_tx_dma_state;
    605       1.1  augustss 		d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
    606       1.1  augustss 		nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    607       1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
    608       1.6  gmcgarry 		    IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
    609       1.1  augustss 		if (d->intr != NULL)
    610       1.1  augustss 			(*d->intr)(d->intr_arg);
    611       1.1  augustss 	}
    612       1.1  augustss 	if (mask & IOASIC_INTR_ISDN_RXLOAD) {
    613       1.1  augustss 		d = &sc->sc_rx_dma_state;
    614       1.1  augustss 		d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
    615       1.1  augustss 		nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    616       1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
    617       1.6  gmcgarry 		    IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
    618       1.1  augustss 		if (d->intr != NULL)
    619       1.1  augustss 			(*d->intr)(d->intr_arg);
    620       1.1  augustss 	}
    621       1.1  augustss 
    622       1.1  augustss 	splx(s);
    623       1.1  augustss 
    624       1.1  augustss 	return 0;
    625       1.6  gmcgarry }
    626       1.6  gmcgarry 
    627       1.6  gmcgarry int
    628       1.6  gmcgarry bba_get_props(addr)
    629       1.6  gmcgarry         void *addr;
    630       1.6  gmcgarry {
    631       1.6  gmcgarry 	return (AUDIO_PROP_MMAP | am7930_get_props(addr));
    632       1.6  gmcgarry }
    633       1.6  gmcgarry 
    634       1.7    simonb paddr_t
    635       1.6  gmcgarry bba_mappage(addr, mem, offset, prot)
    636       1.6  gmcgarry 	void *addr;
    637       1.6  gmcgarry 	void *mem;
    638       1.7    simonb 	off_t offset;
    639       1.6  gmcgarry 	int prot;
    640       1.6  gmcgarry {
    641       1.6  gmcgarry 	struct bba_softc *sc = addr;
    642       1.6  gmcgarry         struct bba_mem **mp;
    643       1.6  gmcgarry 	bus_dma_segment_t seg;
    644       1.6  gmcgarry         caddr_t kva = (caddr_t)mem;
    645       1.6  gmcgarry 
    646       1.6  gmcgarry 	for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
    647       1.6  gmcgarry 	    mp = &(*mp)->next)
    648       1.6  gmcgarry 		/* nothing */ ;
    649       1.6  gmcgarry 	if (*mp == NULL || offset < 0) {
    650       1.6  gmcgarry 		return -1;
    651       1.6  gmcgarry 	}
    652       1.6  gmcgarry 
    653       1.6  gmcgarry         seg.ds_addr = (*mp)->addr;
    654       1.6  gmcgarry         seg.ds_len = (*mp)->size;
    655       1.6  gmcgarry 
    656       1.6  gmcgarry         return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset,
    657       1.6  gmcgarry 	    prot, BUS_DMA_WAITOK);
    658       1.1  augustss }
    659       1.1  augustss 
    660       1.1  augustss 
    661  1.22.2.1      kent static stream_filter_t *
    662  1.22.2.1      kent bba_input_conv(struct audio_softc *sc, const audio_params_t *from,
    663  1.22.2.1      kent 	       const audio_params_t *to)
    664  1.22.2.1      kent {
    665  1.22.2.1      kent 	return auconv_nocontext_filter_factory(bba_input_conv_fetch_to);
    666  1.22.2.1      kent }
    667  1.22.2.1      kent 
    668  1.22.2.1      kent static int
    669  1.22.2.1      kent bba_input_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst,
    670  1.22.2.1      kent 			int max_used)
    671  1.22.2.1      kent {
    672  1.22.2.1      kent 	stream_filter_t *this;
    673  1.22.2.1      kent 	uint8_t *d;
    674  1.22.2.1      kent 	const uint8_t *s;
    675  1.22.2.1      kent 	int m, err;
    676  1.22.2.1      kent 	int used_dst, used_src;
    677  1.22.2.1      kent 
    678  1.22.2.1      kent 	this = (stream_filter_t *)self;
    679  1.22.2.1      kent 	if ((err = this->prev->fetch_to(this->prev, this->src, max_used * 4)))
    680  1.22.2.1      kent 		return err;
    681  1.22.2.1      kent 	m = dst->end - dst->start;
    682  1.22.2.1      kent 	m = min(m, max_used);
    683  1.22.2.1      kent 	d = dst->inp;
    684  1.22.2.1      kent 	s = this->src->outp;
    685  1.22.2.1      kent 	used_dst = audio_stream_get_used(dst);
    686  1.22.2.1      kent 	used_src = audio_stream_get_used(this->src);
    687  1.22.2.1      kent 	while (used_dst < m && used_src >= 4) {
    688  1.22.2.1      kent 		*d = ((*(uint32_t *)s) >> 16) & 0xff;
    689  1.22.2.1      kent 		d = audio_stream_add_inp(dst, d, 1);
    690  1.22.2.1      kent 		s = audio_stream_add_outp(this->src, s, 4);
    691  1.22.2.1      kent 		used_dst += 1;
    692  1.22.2.1      kent 		used_src += 4;
    693       1.1  augustss 	}
    694  1.22.2.1      kent 	dst->inp = d;
    695  1.22.2.1      kent 	this->src->outp = s;
    696  1.22.2.1      kent 	return 0;
    697       1.1  augustss }
    698       1.1  augustss 
    699  1.22.2.1      kent static stream_filter_t *
    700  1.22.2.1      kent bba_output_conv(struct audio_softc *sc, const audio_params_t *from,
    701  1.22.2.1      kent 		const audio_params_t *to)
    702  1.22.2.1      kent {
    703  1.22.2.1      kent 	return auconv_nocontext_filter_factory(bba_output_conv_fetch_to);
    704  1.22.2.1      kent }
    705  1.22.2.1      kent 
    706  1.22.2.1      kent static int
    707  1.22.2.1      kent bba_output_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst,
    708  1.22.2.1      kent 			  int max_used)
    709  1.22.2.1      kent {
    710  1.22.2.1      kent 	stream_filter_t *this;
    711  1.22.2.1      kent 	uint8_t *d;
    712  1.22.2.1      kent 	const uint8_t *s;
    713  1.22.2.1      kent 	int m, err;
    714  1.22.2.1      kent 	int used_dst, used_src;
    715  1.22.2.1      kent 
    716  1.22.2.1      kent 	this = (stream_filter_t *)self;
    717  1.22.2.1      kent 	max_used = (max_used + 3) & ~3;
    718  1.22.2.1      kent 	if ((err = this->prev->fetch_to(this->prev, this->src, max_used / 4)))
    719  1.22.2.1      kent 		return err;
    720  1.22.2.1      kent 	m = (dst->end - dst->start) & ~3;
    721  1.22.2.1      kent 	m = min(m, max_used);
    722  1.22.2.1      kent 	d = dst->inp;
    723  1.22.2.1      kent 	s = this->src->outp;
    724  1.22.2.1      kent 	used_dst = audio_stream_get_used(dst);
    725  1.22.2.1      kent 	used_src = audio_stream_get_used(this->src);
    726  1.22.2.1      kent 	while (used_dst < m && used_src > 0) {
    727  1.22.2.1      kent 		*(uint32_t *)d = (*s << 16);
    728  1.22.2.1      kent 		d = audio_stream_add_inp(dst, d, 4);
    729  1.22.2.1      kent 		s = audio_stream_add_outp(this->src, s, 1);
    730  1.22.2.1      kent 		used_dst += 4;
    731  1.22.2.1      kent 		used_src--;
    732       1.1  augustss 	}
    733  1.22.2.1      kent 	dst->inp = d;
    734  1.22.2.1      kent 	this->src->outp = s;
    735  1.22.2.1      kent 	return 0;
    736       1.1  augustss }
    737       1.1  augustss 
    738       1.1  augustss 
    739       1.1  augustss int
    740       1.1  augustss bba_round_blocksize(addr, blk)
    741       1.1  augustss 	void *addr;
    742       1.1  augustss 	int blk;
    743       1.1  augustss {
    744      1.12   thorpej 	return (IOASIC_DMA_BLOCKSIZE);
    745       1.1  augustss }
    746       1.1  augustss 
    747       1.1  augustss 
    748       1.1  augustss /* indirect write */
    749       1.1  augustss void
    750       1.1  augustss bba_codec_iwrite(sc, reg, val)
    751       1.1  augustss 	struct am7930_softc *sc;
    752       1.1  augustss 	int reg;
    753       1.1  augustss 	u_int8_t val;
    754       1.1  augustss {
    755       1.1  augustss 	DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
    756       1.1  augustss 
    757       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    758       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    759       1.1  augustss }
    760       1.1  augustss 
    761       1.1  augustss 
    762       1.1  augustss void
    763       1.1  augustss bba_codec_iwrite16(sc, reg, val)
    764       1.1  augustss 	struct am7930_softc *sc;
    765       1.1  augustss 	int reg;
    766       1.1  augustss 	u_int16_t val;
    767       1.1  augustss {
    768       1.1  augustss 	DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
    769       1.1  augustss 
    770       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    771       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    772       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
    773       1.1  augustss }
    774       1.1  augustss 
    775       1.1  augustss 
    776       1.1  augustss u_int16_t
    777       1.1  augustss bba_codec_iread16(sc, reg)
    778       1.1  augustss 	struct am7930_softc *sc;
    779       1.1  augustss 	int reg;
    780       1.1  augustss {
    781       1.1  augustss 	u_int16_t val;
    782       1.1  augustss 	DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n",sc,reg));
    783       1.1  augustss 
    784       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    785       1.1  augustss 	val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
    786       1.1  augustss 	val |= bba_codec_dread(sc, AM7930_DREG_DR);
    787       1.1  augustss 
    788       1.1  augustss 	return val;
    789       1.1  augustss }
    790       1.1  augustss 
    791       1.1  augustss 
    792       1.1  augustss /* indirect read */
    793       1.1  augustss u_int8_t
    794       1.1  augustss bba_codec_iread(sc, reg)
    795       1.1  augustss 	struct am7930_softc *sc;
    796       1.1  augustss 	int reg;
    797       1.1  augustss {
    798       1.1  augustss 	u_int8_t val;
    799       1.1  augustss 
    800       1.1  augustss 	DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n",sc,reg));
    801       1.1  augustss 
    802       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    803       1.1  augustss 	val = bba_codec_dread(sc, AM7930_DREG_DR);
    804       1.1  augustss 
    805       1.1  augustss 	DPRINTF(("read 0x%x (%d)\n", val, val));
    806       1.1  augustss 
    807       1.1  augustss 	return val;
    808       1.1  augustss }
    809       1.1  augustss 
    810       1.1  augustss /* direct write */
    811       1.1  augustss void
    812       1.1  augustss bba_codec_dwrite(asc, reg, val)
    813       1.1  augustss 	struct am7930_softc *asc;
    814       1.1  augustss 	int reg;
    815       1.1  augustss 	u_int8_t val;
    816       1.1  augustss {
    817       1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)asc;
    818       1.1  augustss 
    819       1.1  augustss 	DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
    820       1.1  augustss 
    821       1.9   thorpej #if defined(__alpha__)
    822       1.5  gmcgarry 	bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
    823       1.9   thorpej 	    reg << 2, val << 8);
    824       1.9   thorpej #else
    825       1.9   thorpej 	bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
    826       1.9   thorpej 	    reg << 6, val);
    827       1.9   thorpej #endif
    828       1.1  augustss }
    829       1.1  augustss 
    830       1.1  augustss /* direct read */
    831       1.1  augustss u_int8_t
    832       1.1  augustss bba_codec_dread(asc, reg)
    833       1.1  augustss 	struct am7930_softc *asc;
    834       1.1  augustss 	int reg;
    835       1.1  augustss {
    836       1.1  augustss 	struct bba_softc *sc = (struct bba_softc *)asc;
    837       1.1  augustss 
    838       1.1  augustss 	DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n",sc,reg));
    839       1.1  augustss 
    840       1.9   thorpej #if defined(__alpha__)
    841       1.9   thorpej 	return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
    842       1.9   thorpej 		reg << 2) >> 8) & 0xff);
    843       1.9   thorpej #else
    844       1.9   thorpej 	return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
    845       1.9   thorpej 		reg << 6) & 0xff);
    846       1.9   thorpej #endif
    847       1.1  augustss }
    848