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bba.c revision 1.24.8.1
      1  1.24.8.1       riz /* $NetBSD: bba.c,v 1.24.8.1 2005/12/06 20:02:42 riz Exp $ */
      2       1.1  augustss 
      3       1.1  augustss /*
      4       1.1  augustss  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * Redistribution and use in source and binary forms, with or without
      8       1.1  augustss  * modification, are permitted provided that the following conditions
      9       1.1  augustss  * are met:
     10       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     11       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     12       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     14       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     15       1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     16       1.1  augustss  *    must display the following acknowledgement:
     17       1.1  augustss  *        This product includes software developed by the NetBSD
     18       1.1  augustss  *        Foundation, Inc. and its contributors.
     19       1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     20       1.1  augustss  *    contributors may be used to endorse or promote products derived
     21       1.1  augustss  *    from this software without specific prior written permission.
     22       1.1  augustss  *
     23       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24       1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25       1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26       1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33       1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     34       1.1  augustss  */
     35       1.1  augustss 
     36       1.1  augustss /* maxine/alpha baseboard audio (bba) */
     37      1.15     lukem 
     38      1.15     lukem #include <sys/cdefs.h>
     39  1.24.8.1       riz __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.24.8.1 2005/12/06 20:02:42 riz Exp $");
     40       1.1  augustss 
     41       1.1  augustss #include <sys/param.h>
     42       1.1  augustss #include <sys/systm.h>
     43       1.1  augustss #include <sys/kernel.h>
     44       1.1  augustss #include <sys/device.h>
     45       1.1  augustss #include <sys/malloc.h>
     46       1.1  augustss 
     47       1.1  augustss #include <machine/bus.h>
     48       1.1  augustss #include <machine/autoconf.h>
     49       1.1  augustss #include <machine/cpu.h>
     50       1.1  augustss 
     51       1.1  augustss #include <sys/audioio.h>
     52       1.1  augustss #include <dev/audio_if.h>
     53      1.23      kent #include <dev/auconv.h>
     54       1.1  augustss 
     55       1.1  augustss #include <dev/ic/am7930reg.h>
     56       1.1  augustss #include <dev/ic/am7930var.h>
     57       1.1  augustss 
     58       1.1  augustss #include <dev/tc/tcvar.h>
     59       1.1  augustss #include <dev/tc/ioasicreg.h>
     60       1.1  augustss #include <dev/tc/ioasicvar.h>
     61       1.1  augustss 
     62       1.1  augustss #ifdef AUDIO_DEBUG
     63       1.1  augustss #define DPRINTF(x)	if (am7930debug) printf x
     64       1.1  augustss #else
     65       1.1  augustss #define DPRINTF(x)
     66       1.1  augustss #endif  /* AUDIO_DEBUG */
     67       1.1  augustss 
     68       1.1  augustss #define BBA_MAX_DMA_SEGMENTS	16
     69       1.9   thorpej #define BBA_DMABUF_SIZE		(BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE)
     70       1.9   thorpej #define BBA_DMABUF_ALIGN	IOASIC_DMA_BLOCKSIZE
     71       1.6  gmcgarry #define BBA_DMABUF_BOUNDARY	0
     72       1.1  augustss 
     73       1.1  augustss struct bba_mem {
     74      1.24      kent 	struct bba_mem *next;
     75       1.1  augustss 	bus_addr_t addr;
     76       1.1  augustss 	bus_size_t size;
     77       1.1  augustss 	caddr_t kva;
     78       1.1  augustss };
     79       1.1  augustss 
     80       1.1  augustss struct bba_dma_state {
     81      1.20       wiz 	bus_dmamap_t dmam;		/* DMA map */
     82       1.1  augustss 	int active;
     83      1.20       wiz 	int curseg;			/* current segment in DMA buffer */
     84      1.24      kent 	void (*intr)(void *);		/* higher-level audio handler */
     85       1.1  augustss 	void *intr_arg;
     86       1.1  augustss };
     87       1.1  augustss 
     88       1.1  augustss struct bba_softc {
     89       1.1  augustss 	struct am7930_softc sc_am7930;		/* glue to MI code */
     90       1.1  augustss 
     91       1.1  augustss 	bus_space_tag_t sc_bst;			/* IOASIC bus tag/handle */
     92       1.1  augustss 	bus_space_handle_t sc_bsh;
     93       1.1  augustss 	bus_dma_tag_t sc_dmat;
     94       1.1  augustss 	bus_space_handle_t sc_codec_bsh;	/* codec bus space handle */
     95       1.1  augustss 
     96       1.1  augustss 	struct bba_mem *sc_mem_head;		/* list of buffers */
     97       1.1  augustss 
     98       1.1  augustss 	struct bba_dma_state sc_tx_dma_state;
     99       1.1  augustss 	struct bba_dma_state sc_rx_dma_state;
    100       1.1  augustss };
    101       1.1  augustss 
    102      1.24      kent int	bba_match(struct device *, struct cfdata *, void *);
    103      1.24      kent void	bba_attach(struct device *, struct device *, void *);
    104       1.1  augustss 
    105      1.17   thorpej CFATTACH_DECL(bba, sizeof(struct bba_softc),
    106      1.18   thorpej     bba_match, bba_attach, NULL, NULL);
    107       1.1  augustss 
    108       1.1  augustss /*
    109       1.1  augustss  * Define our interface into the am7930 MI driver.
    110       1.1  augustss  */
    111       1.1  augustss 
    112      1.24      kent uint8_t	bba_codec_iread(struct am7930_softc *, int);
    113      1.24      kent uint16_t	bba_codec_iread16(struct am7930_softc *, int);
    114      1.24      kent void	bba_codec_iwrite(struct am7930_softc *, int, uint8_t);
    115      1.24      kent void	bba_codec_iwrite16(struct am7930_softc *, int, uint16_t);
    116      1.24      kent void	bba_onopen(struct am7930_softc *);
    117      1.24      kent void	bba_onclose(struct am7930_softc *);
    118      1.23      kent static stream_filter_factory_t bba_output_conv;
    119      1.23      kent static stream_filter_factory_t bba_input_conv;
    120      1.23      kent static int bba_output_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int);
    121      1.23      kent static int bba_input_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int);
    122       1.1  augustss 
    123       1.1  augustss struct am7930_glue bba_glue = {
    124       1.1  augustss 	bba_codec_iread,
    125       1.1  augustss 	bba_codec_iwrite,
    126       1.1  augustss 	bba_codec_iread16,
    127       1.1  augustss 	bba_codec_iwrite16,
    128       1.1  augustss 	bba_onopen,
    129       1.1  augustss 	bba_onclose,
    130       1.1  augustss 	4,
    131       1.1  augustss 	bba_input_conv,
    132       1.1  augustss 	bba_output_conv,
    133       1.1  augustss };
    134       1.1  augustss 
    135       1.1  augustss /*
    136       1.1  augustss  * Define our interface to the higher level audio driver.
    137       1.1  augustss  */
    138       1.1  augustss 
    139      1.24      kent int	bba_round_blocksize(void *, int, int, const audio_params_t *);
    140      1.24      kent int	bba_halt_output(void *);
    141      1.24      kent int	bba_halt_input(void *);
    142      1.24      kent int	bba_getdev(void *, struct audio_device *);
    143      1.24      kent void	*bba_allocm(void *, int, size_t, struct malloc_type *, int);
    144      1.24      kent void	bba_freem(void *, void *, struct malloc_type *);
    145      1.24      kent size_t	bba_round_buffersize(void *, int, size_t);
    146      1.24      kent int	bba_get_props(void *);
    147      1.24      kent paddr_t	bba_mappage(void *, void *, off_t, int);
    148      1.24      kent int	bba_trigger_output(void *, void *, void *, int,
    149      1.24      kent 	    void (*)(void *), void *, const audio_params_t *);
    150      1.24      kent int	bba_trigger_input(void *, void *, void *, int,
    151      1.24      kent 	    void (*)(void *), void *, const audio_params_t *);
    152       1.1  augustss 
    153      1.22      yamt const struct audio_hw_if sa_hw_if = {
    154       1.1  augustss 	am7930_open,
    155       1.1  augustss 	am7930_close,
    156       1.1  augustss 	0,
    157       1.1  augustss 	am7930_query_encoding,
    158       1.1  augustss 	am7930_set_params,
    159       1.1  augustss 	bba_round_blocksize,		/* md */
    160       1.1  augustss 	am7930_commit_settings,
    161       1.1  augustss 	0,
    162       1.1  augustss 	0,
    163       1.1  augustss 	0,
    164       1.1  augustss 	0,
    165       1.1  augustss 	bba_halt_output,		/* md */
    166       1.1  augustss 	bba_halt_input,			/* md */
    167       1.1  augustss 	0,
    168       1.1  augustss 	bba_getdev,
    169       1.1  augustss 	0,
    170       1.1  augustss 	am7930_set_port,
    171       1.1  augustss 	am7930_get_port,
    172       1.1  augustss 	am7930_query_devinfo,
    173       1.1  augustss 	bba_allocm,			/* md */
    174       1.1  augustss 	bba_freem,			/* md */
    175       1.1  augustss 	bba_round_buffersize,		/* md */
    176       1.6  gmcgarry 	bba_mappage,
    177       1.6  gmcgarry 	bba_get_props,
    178       1.1  augustss 	bba_trigger_output,		/* md */
    179      1.14  augustss 	bba_trigger_input,		/* md */
    180      1.14  augustss 	0,
    181       1.1  augustss };
    182       1.1  augustss 
    183       1.1  augustss struct audio_device bba_device = {
    184       1.1  augustss 	"am7930",
    185       1.1  augustss 	"x",
    186       1.1  augustss 	"bba"
    187       1.1  augustss };
    188       1.1  augustss 
    189      1.24      kent int	bba_intr(void *);
    190      1.24      kent void	bba_reset(struct bba_softc *, int);
    191      1.24      kent void	bba_codec_dwrite(struct am7930_softc *, int, u_int8_t);
    192      1.24      kent uint8_t	bba_codec_dread(struct am7930_softc *, int);
    193      1.24      kent 
    194      1.24      kent int
    195      1.24      kent bba_match(struct device *parent, struct cfdata *cf, void *aux)
    196       1.1  augustss {
    197      1.24      kent 	struct ioasicdev_attach_args *ia;
    198       1.1  augustss 
    199      1.24      kent 	ia = aux;
    200       1.6  gmcgarry 	if (strcmp(ia->iada_modname, "isdn") != 0 &&
    201       1.6  gmcgarry 	    strcmp(ia->iada_modname, "AMD79c30") != 0)
    202       1.6  gmcgarry 		return 0;
    203       1.1  augustss 
    204       1.1  augustss 	return 1;
    205       1.1  augustss }
    206       1.1  augustss 
    207       1.1  augustss 
    208       1.1  augustss void
    209      1.24      kent bba_attach(struct device *parent, struct device *self, void *aux)
    210      1.24      kent {
    211      1.24      kent 	struct ioasicdev_attach_args *ia;
    212      1.24      kent 	struct bba_softc *sc;
    213      1.24      kent 	struct am7930_softc *asc;
    214       1.1  augustss 
    215      1.24      kent 	ia = aux;
    216      1.24      kent 	sc = (struct bba_softc *)self;
    217      1.24      kent 	asc = &sc->sc_am7930;
    218       1.1  augustss 	sc->sc_bst = ((struct ioasic_softc *)parent)->sc_bst;
    219       1.1  augustss 	sc->sc_bsh = ((struct ioasic_softc *)parent)->sc_bsh;
    220       1.1  augustss 	sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat;
    221       1.1  augustss 
    222       1.1  augustss 	/* get the bus space handle for codec */
    223       1.1  augustss 	if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
    224       1.6  gmcgarry 	    ia->iada_offset, 0, &sc->sc_codec_bsh)) {
    225       1.1  augustss 		printf("%s: unable to map device\n", asc->sc_dev.dv_xname);
    226       1.1  augustss 		return;
    227       1.1  augustss 	}
    228       1.1  augustss 
    229       1.1  augustss 	printf("\n");
    230       1.1  augustss 
    231       1.1  augustss 	bba_reset(sc,1);
    232       1.1  augustss 
    233       1.1  augustss 	/*
    234       1.1  augustss 	 * Set up glue for MI code early; we use some of it here.
    235       1.1  augustss 	 */
    236       1.1  augustss 	asc->sc_glue = &bba_glue;
    237       1.1  augustss 
    238       1.1  augustss 	/*
    239       1.1  augustss 	 *  MI initialisation.  We will be doing DMA.
    240       1.1  augustss 	 */
    241       1.1  augustss 	am7930_init(asc, AUDIOAMD_DMA_MODE);
    242       1.1  augustss 
    243       1.1  augustss 	ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
    244       1.6  gmcgarry 	    bba_intr, sc);
    245       1.1  augustss 
    246       1.1  augustss 	audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev);
    247       1.1  augustss }
    248       1.1  augustss 
    249       1.1  augustss 
    250       1.1  augustss void
    251      1.24      kent bba_onopen(struct am7930_softc *sc)
    252       1.1  augustss {
    253       1.1  augustss }
    254       1.1  augustss 
    255       1.1  augustss 
    256       1.1  augustss void
    257      1.24      kent bba_onclose(struct am7930_softc *sc)
    258       1.1  augustss {
    259       1.1  augustss }
    260       1.1  augustss 
    261       1.1  augustss 
    262       1.1  augustss void
    263      1.24      kent bba_reset(struct bba_softc *sc, int reset)
    264       1.1  augustss {
    265      1.24      kent 	uint32_t ssr;
    266       1.1  augustss 
    267       1.1  augustss 	/* disable any DMA and reset the codec */
    268       1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    269       1.1  augustss 	ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
    270       1.1  augustss 	if (reset)
    271       1.1  augustss 		ssr &= ~IOASIC_CSR_ISDN_ENABLE;
    272       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    273       1.1  augustss 	DELAY(10);	/* 400ns required for codec to reset */
    274       1.1  augustss 
    275       1.1  augustss 	/* initialise DMA pointers */
    276       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
    277       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
    278       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
    279       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
    280       1.1  augustss 
    281       1.1  augustss 	/* take out of reset state */
    282       1.1  augustss 	if (reset) {
    283       1.1  augustss 		ssr |= IOASIC_CSR_ISDN_ENABLE;
    284       1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    285       1.1  augustss 	}
    286       1.1  augustss 
    287       1.1  augustss }
    288       1.1  augustss 
    289       1.1  augustss 
    290       1.1  augustss void *
    291      1.24      kent bba_allocm(void *addr, int direction, size_t size,
    292      1.24      kent 	   struct malloc_type *pool, int flags)
    293       1.1  augustss {
    294      1.24      kent 	struct am7930_softc *asc;
    295      1.24      kent 	struct bba_softc *sc;
    296       1.1  augustss 	bus_dma_segment_t seg;
    297       1.1  augustss 	int rseg;
    298       1.1  augustss 	caddr_t kva;
    299       1.1  augustss 	struct bba_mem *m;
    300       1.6  gmcgarry 	int w;
    301      1.24      kent 	int state;
    302       1.1  augustss 
    303  1.24.8.1       riz 	DPRINTF(("bba_allocm: size = %zu\n", size));
    304      1.24      kent 	asc = addr;
    305      1.24      kent 	sc = addr;
    306      1.24      kent 	state = 0;
    307       1.6  gmcgarry 	w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
    308       1.6  gmcgarry 
    309       1.6  gmcgarry 	if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN,
    310       1.6  gmcgarry 	    BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) {
    311       1.1  augustss 		printf("%s: can't allocate DMA buffer\n",
    312       1.6  gmcgarry 		    asc->sc_dev.dv_xname);
    313       1.1  augustss 		goto bad;
    314       1.1  augustss 	}
    315       1.1  augustss 	state |= 1;
    316       1.1  augustss 
    317       1.1  augustss 	if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
    318       1.6  gmcgarry 	    &kva, w | BUS_DMA_COHERENT)) {
    319       1.1  augustss 		printf("%s: can't map DMA buffer\n", asc->sc_dev.dv_xname);
    320       1.1  augustss 		goto bad;
    321       1.1  augustss 	}
    322       1.1  augustss 	state |= 2;
    323       1.1  augustss 
    324       1.1  augustss 	m = malloc(sizeof(struct bba_mem), pool, flags);
    325       1.1  augustss 	if (m == NULL)
    326       1.1  augustss 		goto bad;
    327       1.1  augustss 	m->addr = seg.ds_addr;
    328       1.1  augustss 	m->size = seg.ds_len;
    329      1.24      kent 	m->kva = kva;
    330      1.24      kent 	m->next = sc->sc_mem_head;
    331      1.24      kent 	sc->sc_mem_head = m;
    332       1.1  augustss 
    333      1.24      kent 	return (void *)kva;
    334       1.1  augustss 
    335       1.1  augustss bad:
    336       1.1  augustss 	if (state & 2)
    337       1.1  augustss 		bus_dmamem_unmap(sc->sc_dmat, kva, size);
    338       1.1  augustss 	if (state & 1)
    339       1.1  augustss 		bus_dmamem_free(sc->sc_dmat, &seg, 1);
    340       1.1  augustss 	return NULL;
    341       1.1  augustss }
    342       1.1  augustss 
    343       1.1  augustss 
    344       1.1  augustss void
    345      1.24      kent bba_freem(void *addr, void *ptr, struct malloc_type *pool)
    346       1.1  augustss {
    347      1.24      kent 	struct bba_softc *sc;
    348      1.24      kent 	struct bba_mem **mp, *m;
    349       1.1  augustss 	bus_dma_segment_t seg;
    350      1.24      kent 	caddr_t kva;
    351       1.1  augustss 
    352      1.24      kent 	sc = addr;
    353      1.24      kent 	kva = (caddr_t)addr;
    354       1.1  augustss 	for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
    355       1.6  gmcgarry 	    mp = &(*mp)->next)
    356      1.24      kent 		continue;
    357       1.1  augustss 	m = *mp;
    358       1.6  gmcgarry 	if (m == NULL) {
    359       1.6  gmcgarry 		printf("bba_freem: freeing unallocated memory\n");
    360       1.1  augustss 		return;
    361       1.1  augustss 	}
    362       1.1  augustss 	*mp = m->next;
    363       1.1  augustss 	bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
    364       1.1  augustss 
    365      1.24      kent 	seg.ds_addr = m->addr;
    366      1.24      kent 	seg.ds_len = m->size;
    367       1.1  augustss 	bus_dmamem_free(sc->sc_dmat, &seg, 1);
    368      1.24      kent 	free(m, pool);
    369       1.1  augustss }
    370       1.1  augustss 
    371       1.1  augustss 
    372       1.1  augustss size_t
    373      1.24      kent bba_round_buffersize(void *addr, int direction, size_t size)
    374       1.1  augustss {
    375      1.24      kent 
    376  1.24.8.1       riz 	DPRINTF(("bba_round_buffersize: size=%zu\n", size));
    377      1.24      kent 	return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE :
    378      1.24      kent 	    roundup(size, IOASIC_DMA_BLOCKSIZE);
    379       1.1  augustss }
    380       1.1  augustss 
    381       1.1  augustss 
    382       1.1  augustss int
    383      1.24      kent bba_halt_output(void *addr)
    384       1.1  augustss {
    385      1.24      kent 	struct bba_softc *sc;
    386      1.24      kent 	struct bba_dma_state *d;
    387      1.24      kent 	uint32_t ssr;
    388       1.1  augustss 
    389      1.24      kent 	sc = addr;
    390      1.24      kent 	d = &sc->sc_tx_dma_state;
    391       1.1  augustss 	/* disable any DMA */
    392       1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    393       1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
    394       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    395       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
    396       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
    397       1.1  augustss 
    398       1.1  augustss 	if (d->active) {
    399       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    400       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    401       1.1  augustss 		d->active = 0;
    402       1.1  augustss 	}
    403       1.1  augustss 
    404       1.1  augustss 	return 0;
    405       1.1  augustss }
    406       1.1  augustss 
    407       1.1  augustss 
    408       1.1  augustss int
    409      1.24      kent bba_halt_input(void *addr)
    410       1.1  augustss {
    411      1.24      kent 	struct bba_softc *sc;
    412      1.24      kent 	struct bba_dma_state *d;
    413      1.24      kent 	uint32_t ssr;
    414       1.1  augustss 
    415      1.24      kent 	sc = addr;
    416      1.24      kent 	d = &sc->sc_rx_dma_state;
    417       1.1  augustss 	/* disable any DMA */
    418       1.1  augustss 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    419       1.1  augustss 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
    420       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    421       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
    422       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
    423       1.1  augustss 
    424       1.1  augustss 	if (d->active) {
    425       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    426       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    427       1.1  augustss 		d->active = 0;
    428       1.1  augustss 	}
    429       1.1  augustss 
    430       1.1  augustss 	return 0;
    431       1.1  augustss }
    432       1.1  augustss 
    433       1.1  augustss 
    434       1.1  augustss int
    435      1.24      kent bba_getdev(void *addr, struct audio_device *retp)
    436       1.1  augustss {
    437      1.24      kent 
    438       1.1  augustss 	*retp = bba_device;
    439       1.1  augustss 	return 0;
    440       1.1  augustss }
    441       1.1  augustss 
    442       1.1  augustss 
    443       1.1  augustss int
    444      1.24      kent bba_trigger_output(void *addr, void *start, void *end, int blksize,
    445      1.24      kent 		   void (*intr)(void *), void *arg,
    446      1.24      kent 		   const audio_params_t *param)
    447       1.1  augustss {
    448      1.24      kent 	struct bba_softc *sc;
    449      1.24      kent 	struct bba_dma_state *d;
    450      1.24      kent 	uint32_t ssr;
    451      1.23      kent 	tc_addr_t phys, nphys;
    452      1.24      kent 	int state;
    453       1.1  augustss 
    454       1.1  augustss 	DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
    455       1.6  gmcgarry 	    addr, start, end, blksize, intr, arg));
    456      1.24      kent 	sc = addr;
    457      1.24      kent 	d = &sc->sc_tx_dma_state;
    458      1.24      kent 	state = 0;
    459       1.6  gmcgarry 
    460       1.6  gmcgarry 	/* disable any DMA */
    461       1.6  gmcgarry 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    462       1.6  gmcgarry 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
    463       1.6  gmcgarry 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    464       1.1  augustss 
    465       1.1  augustss 	if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
    466       1.9   thorpej 	    BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
    467       1.9   thorpej 	    BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
    468       1.1  augustss 		printf("bba_trigger_output: can't create DMA map\n");
    469       1.1  augustss 		goto bad;
    470       1.1  augustss 	}
    471       1.1  augustss 	state |= 1;
    472       1.1  augustss 
    473       1.1  augustss 	if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
    474      1.13   thorpej 	    (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) {
    475       1.6  gmcgarry 	    printf("bba_trigger_output: can't load DMA map\n");
    476       1.1  augustss 		goto bad;
    477       1.1  augustss 	}
    478       1.1  augustss 	state |= 2;
    479       1.1  augustss 
    480       1.1  augustss 	d->intr = intr;
    481       1.1  augustss 	d->intr_arg = arg;
    482       1.1  augustss 	d->curseg = 1;
    483       1.1  augustss 
    484       1.1  augustss 	/* get physical address of buffer start */
    485       1.2  gmcgarry 	phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
    486       1.2  gmcgarry 	nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
    487       1.1  augustss 
    488       1.1  augustss 	/* setup DMA pointer */
    489       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
    490       1.6  gmcgarry 	    IOASIC_DMA_ADDR(phys));
    491       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
    492       1.6  gmcgarry 	    IOASIC_DMA_ADDR(nphys));
    493       1.1  augustss 
    494       1.1  augustss 	/* kick off DMA */
    495       1.1  augustss 	ssr |= IOASIC_CSR_DMAEN_ISDN_T;
    496       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    497       1.1  augustss 
    498       1.1  augustss 	d->active = 1;
    499       1.1  augustss 
    500       1.1  augustss 	return 0;
    501       1.1  augustss 
    502       1.1  augustss bad:
    503       1.1  augustss 	if (state & 2)
    504       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    505       1.1  augustss 	if (state & 1)
    506       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    507       1.1  augustss 	return 1;
    508       1.1  augustss }
    509       1.1  augustss 
    510       1.1  augustss 
    511       1.1  augustss int
    512      1.24      kent bba_trigger_input(void *addr, void *start, void *end, int blksize,
    513      1.24      kent 		  void (*intr)(void *), void *arg, const audio_params_t *param)
    514       1.1  augustss {
    515      1.24      kent 	struct bba_softc *sc;
    516      1.24      kent 	struct bba_dma_state *d;
    517      1.23      kent 	tc_addr_t phys, nphys;
    518       1.1  augustss 	u_int32_t ssr;
    519       1.1  augustss 	int state = 0;
    520       1.1  augustss 
    521       1.1  augustss 	DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
    522       1.6  gmcgarry 	    addr, start, end, blksize, intr, arg));
    523      1.24      kent 	sc = (struct bba_softc *)addr;
    524      1.24      kent 	d = &sc->sc_rx_dma_state;
    525      1.24      kent 	state = 0;
    526       1.6  gmcgarry 
    527       1.6  gmcgarry 	/* disable any DMA */
    528       1.6  gmcgarry 	ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
    529       1.6  gmcgarry 	ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
    530       1.6  gmcgarry 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    531       1.1  augustss 
    532       1.1  augustss 	if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
    533       1.9   thorpej 	    BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
    534       1.9   thorpej 	    BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
    535       1.1  augustss 		printf("bba_trigger_input: can't create DMA map\n");
    536       1.1  augustss 		goto bad;
    537       1.1  augustss 	}
    538       1.1  augustss 	state |= 1;
    539       1.1  augustss 
    540       1.1  augustss 	if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
    541      1.13   thorpej 	    (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) {
    542       1.1  augustss 		printf("bba_trigger_input: can't load DMA map\n");
    543       1.1  augustss 		goto bad;
    544       1.1  augustss 	}
    545       1.1  augustss 	state |= 2;
    546       1.1  augustss 
    547       1.1  augustss 	d->intr = intr;
    548       1.1  augustss 	d->intr_arg = arg;
    549       1.1  augustss 	d->curseg = 1;
    550       1.1  augustss 
    551       1.1  augustss 	/* get physical address of buffer start */
    552       1.2  gmcgarry 	phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
    553       1.2  gmcgarry 	nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
    554       1.1  augustss 
    555       1.1  augustss 	/* setup DMA pointer */
    556       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
    557       1.6  gmcgarry 	    IOASIC_DMA_ADDR(phys));
    558       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
    559       1.6  gmcgarry 	    IOASIC_DMA_ADDR(nphys));
    560       1.1  augustss 
    561       1.1  augustss 	/* kick off DMA */
    562       1.1  augustss 	ssr |= IOASIC_CSR_DMAEN_ISDN_R;
    563       1.1  augustss 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
    564       1.1  augustss 
    565       1.1  augustss 	d->active = 1;
    566       1.1  augustss 
    567       1.1  augustss 	return 0;
    568       1.1  augustss 
    569       1.1  augustss bad:
    570       1.1  augustss 	if (state & 2)
    571       1.1  augustss 		bus_dmamap_unload(sc->sc_dmat, d->dmam);
    572       1.1  augustss 	if (state & 1)
    573       1.1  augustss 		bus_dmamap_destroy(sc->sc_dmat, d->dmam);
    574       1.1  augustss 	return 1;
    575       1.1  augustss }
    576       1.1  augustss 
    577      1.24      kent int
    578      1.24      kent bba_intr(void *addr)
    579       1.1  augustss {
    580      1.24      kent 	struct bba_softc *sc;
    581       1.1  augustss 	struct bba_dma_state *d;
    582       1.1  augustss 	tc_addr_t nphys;
    583       1.1  augustss 	int s, mask;
    584       1.1  augustss 
    585      1.24      kent 	sc = addr;
    586       1.1  augustss 	s = splaudio();
    587       1.1  augustss 
    588       1.1  augustss 	mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
    589       1.1  augustss 
    590       1.1  augustss 	if (mask & IOASIC_INTR_ISDN_TXLOAD) {
    591       1.1  augustss 		d = &sc->sc_tx_dma_state;
    592       1.1  augustss 		d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
    593       1.1  augustss 		nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    594       1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
    595       1.6  gmcgarry 		    IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
    596       1.1  augustss 		if (d->intr != NULL)
    597       1.1  augustss 			(*d->intr)(d->intr_arg);
    598       1.1  augustss 	}
    599       1.1  augustss 	if (mask & IOASIC_INTR_ISDN_RXLOAD) {
    600       1.1  augustss 		d = &sc->sc_rx_dma_state;
    601       1.1  augustss 		d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
    602       1.1  augustss 		nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
    603       1.1  augustss 		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
    604       1.6  gmcgarry 		    IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
    605       1.1  augustss 		if (d->intr != NULL)
    606       1.1  augustss 			(*d->intr)(d->intr_arg);
    607       1.1  augustss 	}
    608       1.1  augustss 
    609       1.1  augustss 	splx(s);
    610       1.1  augustss 
    611       1.1  augustss 	return 0;
    612       1.6  gmcgarry }
    613       1.6  gmcgarry 
    614       1.6  gmcgarry int
    615      1.24      kent bba_get_props(void *addr)
    616       1.6  gmcgarry {
    617      1.24      kent 
    618      1.24      kent 	return AUDIO_PROP_MMAP | am7930_get_props(addr);
    619       1.6  gmcgarry }
    620       1.6  gmcgarry 
    621       1.7    simonb paddr_t
    622      1.24      kent bba_mappage(void *addr, void *mem, off_t offset, int prot)
    623       1.6  gmcgarry {
    624      1.24      kent 	struct bba_softc *sc;
    625      1.24      kent 	struct bba_mem **mp;
    626       1.6  gmcgarry 	bus_dma_segment_t seg;
    627      1.24      kent 	caddr_t kva;
    628       1.6  gmcgarry 
    629      1.24      kent 	sc = addr;
    630      1.24      kent 	kva = (caddr_t)mem;
    631       1.6  gmcgarry 	for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
    632       1.6  gmcgarry 	    mp = &(*mp)->next)
    633      1.24      kent 		continue;
    634       1.6  gmcgarry 	if (*mp == NULL || offset < 0) {
    635       1.6  gmcgarry 		return -1;
    636       1.6  gmcgarry 	}
    637       1.6  gmcgarry 
    638      1.24      kent 	seg.ds_addr = (*mp)->addr;
    639      1.24      kent 	seg.ds_len = (*mp)->size;
    640       1.6  gmcgarry 
    641      1.24      kent 	return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset,
    642       1.6  gmcgarry 	    prot, BUS_DMA_WAITOK);
    643       1.1  augustss }
    644       1.1  augustss 
    645      1.23      kent static stream_filter_t *
    646      1.23      kent bba_input_conv(struct audio_softc *sc, const audio_params_t *from,
    647      1.23      kent 	       const audio_params_t *to)
    648      1.23      kent {
    649      1.23      kent 	return auconv_nocontext_filter_factory(bba_input_conv_fetch_to);
    650      1.23      kent }
    651      1.23      kent 
    652      1.23      kent static int
    653      1.23      kent bba_input_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst,
    654      1.23      kent 			int max_used)
    655      1.23      kent {
    656      1.23      kent 	stream_filter_t *this;
    657      1.23      kent 	int m, err;
    658      1.23      kent 
    659      1.23      kent 	this = (stream_filter_t *)self;
    660      1.23      kent 	if ((err = this->prev->fetch_to(this->prev, this->src, max_used * 4)))
    661      1.23      kent 		return err;
    662      1.23      kent 	m = dst->end - dst->start;
    663      1.23      kent 	m = min(m, max_used);
    664      1.23      kent 	FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) {
    665      1.23      kent 		*d = ((*(uint32_t *)s) >> 16) & 0xff;
    666      1.23      kent 	} FILTER_LOOP_EPILOGUE(this->src, dst);
    667      1.23      kent 	return 0;
    668       1.1  augustss }
    669       1.1  augustss 
    670      1.23      kent static stream_filter_t *
    671      1.23      kent bba_output_conv(struct audio_softc *sc, const audio_params_t *from,
    672      1.23      kent 		const audio_params_t *to)
    673      1.23      kent {
    674      1.23      kent 	return auconv_nocontext_filter_factory(bba_output_conv_fetch_to);
    675      1.23      kent }
    676      1.23      kent 
    677      1.23      kent static int
    678      1.23      kent bba_output_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst,
    679      1.23      kent 			  int max_used)
    680      1.23      kent {
    681      1.23      kent 	stream_filter_t *this;
    682      1.23      kent 	int m, err;
    683      1.23      kent 
    684      1.23      kent 	this = (stream_filter_t *)self;
    685      1.23      kent 	max_used = (max_used + 3) & ~3;
    686      1.23      kent 	if ((err = this->prev->fetch_to(this->prev, this->src, max_used / 4)))
    687      1.23      kent 		return err;
    688      1.23      kent 	m = (dst->end - dst->start) & ~3;
    689      1.23      kent 	m = min(m, max_used);
    690      1.23      kent 	FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) {
    691      1.23      kent 		*(uint32_t *)d = (*s << 16);
    692      1.23      kent 	} FILTER_LOOP_EPILOGUE(this->src, dst);
    693      1.23      kent 	return 0;
    694       1.1  augustss }
    695       1.1  augustss 
    696       1.1  augustss int
    697      1.24      kent bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param)
    698       1.1  augustss {
    699      1.24      kent 
    700      1.24      kent 	return IOASIC_DMA_BLOCKSIZE;
    701       1.1  augustss }
    702       1.1  augustss 
    703       1.1  augustss 
    704       1.1  augustss /* indirect write */
    705       1.1  augustss void
    706      1.24      kent bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val)
    707       1.1  augustss {
    708       1.1  augustss 
    709      1.24      kent 	DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
    710       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    711       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    712       1.1  augustss }
    713       1.1  augustss 
    714       1.1  augustss 
    715       1.1  augustss void
    716      1.24      kent bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val)
    717       1.1  augustss {
    718       1.1  augustss 
    719      1.24      kent 	DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
    720       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    721       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val);
    722       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
    723       1.1  augustss }
    724       1.1  augustss 
    725       1.1  augustss 
    726      1.24      kent uint16_t
    727      1.24      kent bba_codec_iread16(struct am7930_softc *sc, int reg)
    728       1.1  augustss {
    729      1.24      kent 	uint16_t val;
    730       1.1  augustss 
    731      1.24      kent 	DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg));
    732       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    733       1.1  augustss 	val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
    734       1.1  augustss 	val |= bba_codec_dread(sc, AM7930_DREG_DR);
    735       1.1  augustss 
    736       1.1  augustss 	return val;
    737       1.1  augustss }
    738       1.1  augustss 
    739       1.1  augustss 
    740       1.1  augustss /* indirect read */
    741      1.24      kent uint8_t
    742      1.24      kent bba_codec_iread(struct am7930_softc *sc, int reg)
    743       1.1  augustss {
    744      1.24      kent 	uint8_t val;
    745       1.1  augustss 
    746      1.24      kent 	DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg));
    747       1.1  augustss 	bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
    748       1.1  augustss 	val = bba_codec_dread(sc, AM7930_DREG_DR);
    749       1.1  augustss 
    750       1.1  augustss 	DPRINTF(("read 0x%x (%d)\n", val, val));
    751       1.1  augustss 
    752       1.1  augustss 	return val;
    753       1.1  augustss }
    754       1.1  augustss 
    755       1.1  augustss /* direct write */
    756       1.1  augustss void
    757      1.24      kent bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val)
    758       1.1  augustss {
    759      1.24      kent 	struct bba_softc *sc;
    760       1.1  augustss 
    761      1.24      kent 	sc = (struct bba_softc *)asc;
    762      1.24      kent 	DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
    763       1.1  augustss 
    764       1.9   thorpej #if defined(__alpha__)
    765       1.5  gmcgarry 	bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
    766       1.9   thorpej 	    reg << 2, val << 8);
    767       1.9   thorpej #else
    768       1.9   thorpej 	bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
    769       1.9   thorpej 	    reg << 6, val);
    770       1.9   thorpej #endif
    771       1.1  augustss }
    772       1.1  augustss 
    773       1.1  augustss /* direct read */
    774      1.24      kent uint8_t
    775      1.24      kent bba_codec_dread(struct am7930_softc *asc, int reg)
    776       1.1  augustss {
    777      1.24      kent 	struct bba_softc *sc;
    778       1.1  augustss 
    779      1.24      kent 	sc = (struct bba_softc *)asc;
    780      1.24      kent 	DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg));
    781       1.1  augustss 
    782       1.9   thorpej #if defined(__alpha__)
    783       1.9   thorpej 	return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
    784       1.9   thorpej 		reg << 2) >> 8) & 0xff);
    785       1.9   thorpej #else
    786       1.9   thorpej 	return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
    787       1.9   thorpej 		reg << 6) & 0xff);
    788       1.9   thorpej #endif
    789       1.1  augustss }
    790