bba.c revision 1.36 1 1.36 cegger /* $NetBSD: bba.c,v 1.36 2009/05/12 14:47:04 cegger Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * Redistribution and use in source and binary forms, with or without
8 1.1 augustss * modification, are permitted provided that the following conditions
9 1.1 augustss * are met:
10 1.1 augustss * 1. Redistributions of source code must retain the above copyright
11 1.1 augustss * notice, this list of conditions and the following disclaimer.
12 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 augustss * notice, this list of conditions and the following disclaimer in the
14 1.1 augustss * documentation and/or other materials provided with the distribution.
15 1.1 augustss *
16 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
27 1.1 augustss */
28 1.1 augustss
29 1.1 augustss /* maxine/alpha baseboard audio (bba) */
30 1.15 lukem
31 1.15 lukem #include <sys/cdefs.h>
32 1.36 cegger __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.36 2009/05/12 14:47:04 cegger Exp $");
33 1.1 augustss
34 1.1 augustss #include <sys/param.h>
35 1.1 augustss #include <sys/systm.h>
36 1.1 augustss #include <sys/kernel.h>
37 1.1 augustss #include <sys/device.h>
38 1.1 augustss #include <sys/malloc.h>
39 1.1 augustss
40 1.32 ad #include <sys/bus.h>
41 1.1 augustss #include <machine/autoconf.h>
42 1.32 ad #include <sys/cpu.h>
43 1.1 augustss
44 1.1 augustss #include <sys/audioio.h>
45 1.1 augustss #include <dev/audio_if.h>
46 1.23 kent #include <dev/auconv.h>
47 1.1 augustss
48 1.1 augustss #include <dev/ic/am7930reg.h>
49 1.1 augustss #include <dev/ic/am7930var.h>
50 1.1 augustss
51 1.1 augustss #include <dev/tc/tcvar.h>
52 1.1 augustss #include <dev/tc/ioasicreg.h>
53 1.1 augustss #include <dev/tc/ioasicvar.h>
54 1.1 augustss
55 1.1 augustss #ifdef AUDIO_DEBUG
56 1.1 augustss #define DPRINTF(x) if (am7930debug) printf x
57 1.1 augustss #else
58 1.1 augustss #define DPRINTF(x)
59 1.1 augustss #endif /* AUDIO_DEBUG */
60 1.1 augustss
61 1.1 augustss #define BBA_MAX_DMA_SEGMENTS 16
62 1.9 thorpej #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE)
63 1.9 thorpej #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE
64 1.6 gmcgarry #define BBA_DMABUF_BOUNDARY 0
65 1.1 augustss
66 1.1 augustss struct bba_mem {
67 1.24 kent struct bba_mem *next;
68 1.1 augustss bus_addr_t addr;
69 1.1 augustss bus_size_t size;
70 1.31 christos void *kva;
71 1.1 augustss };
72 1.1 augustss
73 1.1 augustss struct bba_dma_state {
74 1.20 wiz bus_dmamap_t dmam; /* DMA map */
75 1.1 augustss int active;
76 1.20 wiz int curseg; /* current segment in DMA buffer */
77 1.24 kent void (*intr)(void *); /* higher-level audio handler */
78 1.1 augustss void *intr_arg;
79 1.1 augustss };
80 1.1 augustss
81 1.1 augustss struct bba_softc {
82 1.1 augustss struct am7930_softc sc_am7930; /* glue to MI code */
83 1.1 augustss
84 1.1 augustss bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */
85 1.1 augustss bus_space_handle_t sc_bsh;
86 1.1 augustss bus_dma_tag_t sc_dmat;
87 1.1 augustss bus_space_handle_t sc_codec_bsh; /* codec bus space handle */
88 1.1 augustss
89 1.1 augustss struct bba_mem *sc_mem_head; /* list of buffers */
90 1.1 augustss
91 1.1 augustss struct bba_dma_state sc_tx_dma_state;
92 1.1 augustss struct bba_dma_state sc_rx_dma_state;
93 1.1 augustss };
94 1.1 augustss
95 1.36 cegger static int bba_match(device_t, cfdata_t, void *);
96 1.36 cegger static void bba_attach(device_t, device_t, void *);
97 1.1 augustss
98 1.17 thorpej CFATTACH_DECL(bba, sizeof(struct bba_softc),
99 1.18 thorpej bba_match, bba_attach, NULL, NULL);
100 1.1 augustss
101 1.1 augustss /*
102 1.1 augustss * Define our interface into the am7930 MI driver.
103 1.1 augustss */
104 1.1 augustss
105 1.30 he static uint8_t bba_codec_iread(struct am7930_softc *, int);
106 1.28 thorpej static uint16_t bba_codec_iread16(struct am7930_softc *, int);
107 1.28 thorpej static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t);
108 1.28 thorpej static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t);
109 1.28 thorpej static void bba_onopen(struct am7930_softc *);
110 1.28 thorpej static void bba_onclose(struct am7930_softc *);
111 1.28 thorpej
112 1.23 kent static stream_filter_factory_t bba_output_conv;
113 1.23 kent static stream_filter_factory_t bba_input_conv;
114 1.28 thorpej static int bba_output_conv_fetch_to(stream_fetcher_t *, audio_stream_t *,
115 1.28 thorpej int);
116 1.28 thorpej static int bba_input_conv_fetch_to(stream_fetcher_t *, audio_stream_t *,
117 1.28 thorpej int);
118 1.1 augustss
119 1.1 augustss struct am7930_glue bba_glue = {
120 1.1 augustss bba_codec_iread,
121 1.1 augustss bba_codec_iwrite,
122 1.1 augustss bba_codec_iread16,
123 1.1 augustss bba_codec_iwrite16,
124 1.1 augustss bba_onopen,
125 1.1 augustss bba_onclose,
126 1.1 augustss 4,
127 1.1 augustss bba_input_conv,
128 1.1 augustss bba_output_conv,
129 1.1 augustss };
130 1.1 augustss
131 1.1 augustss /*
132 1.1 augustss * Define our interface to the higher level audio driver.
133 1.1 augustss */
134 1.1 augustss
135 1.28 thorpej static int bba_round_blocksize(void *, int, int, const audio_params_t *);
136 1.28 thorpej static int bba_halt_output(void *);
137 1.28 thorpej static int bba_halt_input(void *);
138 1.28 thorpej static int bba_getdev(void *, struct audio_device *);
139 1.28 thorpej static void *bba_allocm(void *, int, size_t, struct malloc_type *, int);
140 1.28 thorpej static void bba_freem(void *, void *, struct malloc_type *);
141 1.28 thorpej static size_t bba_round_buffersize(void *, int, size_t);
142 1.28 thorpej static int bba_get_props(void *);
143 1.28 thorpej static paddr_t bba_mappage(void *, void *, off_t, int);
144 1.28 thorpej static int bba_trigger_output(void *, void *, void *, int,
145 1.28 thorpej void (*)(void *), void *,
146 1.28 thorpej const audio_params_t *);
147 1.28 thorpej static int bba_trigger_input(void *, void *, void *, int,
148 1.28 thorpej void (*)(void *), void *,
149 1.28 thorpej const audio_params_t *);
150 1.1 augustss
151 1.28 thorpej static const struct audio_hw_if sa_hw_if = {
152 1.1 augustss am7930_open,
153 1.1 augustss am7930_close,
154 1.1 augustss 0,
155 1.1 augustss am7930_query_encoding,
156 1.1 augustss am7930_set_params,
157 1.1 augustss bba_round_blocksize, /* md */
158 1.1 augustss am7930_commit_settings,
159 1.1 augustss 0,
160 1.1 augustss 0,
161 1.1 augustss 0,
162 1.1 augustss 0,
163 1.1 augustss bba_halt_output, /* md */
164 1.1 augustss bba_halt_input, /* md */
165 1.1 augustss 0,
166 1.1 augustss bba_getdev,
167 1.1 augustss 0,
168 1.1 augustss am7930_set_port,
169 1.1 augustss am7930_get_port,
170 1.1 augustss am7930_query_devinfo,
171 1.1 augustss bba_allocm, /* md */
172 1.1 augustss bba_freem, /* md */
173 1.1 augustss bba_round_buffersize, /* md */
174 1.6 gmcgarry bba_mappage,
175 1.6 gmcgarry bba_get_props,
176 1.1 augustss bba_trigger_output, /* md */
177 1.14 augustss bba_trigger_input, /* md */
178 1.14 augustss 0,
179 1.1 augustss };
180 1.1 augustss
181 1.28 thorpej static struct audio_device bba_device = {
182 1.1 augustss "am7930",
183 1.1 augustss "x",
184 1.1 augustss "bba"
185 1.1 augustss };
186 1.1 augustss
187 1.28 thorpej static int bba_intr(void *);
188 1.28 thorpej static void bba_reset(struct bba_softc *, int);
189 1.28 thorpej static void bba_codec_dwrite(struct am7930_softc *, int, u_int8_t);
190 1.28 thorpej static uint8_t bba_codec_dread(struct am7930_softc *, int);
191 1.24 kent
192 1.28 thorpej static int
193 1.36 cegger bba_match(device_t parent, cfdata_t cf, void *aux)
194 1.1 augustss {
195 1.24 kent struct ioasicdev_attach_args *ia;
196 1.1 augustss
197 1.24 kent ia = aux;
198 1.6 gmcgarry if (strcmp(ia->iada_modname, "isdn") != 0 &&
199 1.6 gmcgarry strcmp(ia->iada_modname, "AMD79c30") != 0)
200 1.6 gmcgarry return 0;
201 1.1 augustss
202 1.1 augustss return 1;
203 1.1 augustss }
204 1.1 augustss
205 1.1 augustss
206 1.28 thorpej static void
207 1.36 cegger bba_attach(device_t parent, device_t self, void *aux)
208 1.24 kent {
209 1.24 kent struct ioasicdev_attach_args *ia;
210 1.24 kent struct bba_softc *sc;
211 1.24 kent struct am7930_softc *asc;
212 1.29 thorpej struct ioasic_softc *iosc = device_private(parent);
213 1.1 augustss
214 1.24 kent ia = aux;
215 1.27 thorpej sc = device_private(self);
216 1.24 kent asc = &sc->sc_am7930;
217 1.29 thorpej sc->sc_bst = iosc->sc_bst;
218 1.29 thorpej sc->sc_bsh = iosc->sc_bsh;
219 1.29 thorpej sc->sc_dmat = iosc->sc_dmat;
220 1.1 augustss
221 1.1 augustss /* get the bus space handle for codec */
222 1.1 augustss if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
223 1.6 gmcgarry ia->iada_offset, 0, &sc->sc_codec_bsh)) {
224 1.33 cegger aprint_error_dev(&asc->sc_dev, "unable to map device\n");
225 1.1 augustss return;
226 1.1 augustss }
227 1.1 augustss
228 1.1 augustss printf("\n");
229 1.1 augustss
230 1.1 augustss bba_reset(sc,1);
231 1.1 augustss
232 1.1 augustss /*
233 1.1 augustss * Set up glue for MI code early; we use some of it here.
234 1.1 augustss */
235 1.1 augustss asc->sc_glue = &bba_glue;
236 1.1 augustss
237 1.1 augustss /*
238 1.1 augustss * MI initialisation. We will be doing DMA.
239 1.1 augustss */
240 1.1 augustss am7930_init(asc, AUDIOAMD_DMA_MODE);
241 1.1 augustss
242 1.1 augustss ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
243 1.6 gmcgarry bba_intr, sc);
244 1.1 augustss
245 1.1 augustss audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev);
246 1.1 augustss }
247 1.1 augustss
248 1.1 augustss
249 1.28 thorpej static void
250 1.24 kent bba_onopen(struct am7930_softc *sc)
251 1.1 augustss {
252 1.1 augustss }
253 1.1 augustss
254 1.1 augustss
255 1.28 thorpej static void
256 1.24 kent bba_onclose(struct am7930_softc *sc)
257 1.1 augustss {
258 1.1 augustss }
259 1.1 augustss
260 1.1 augustss
261 1.28 thorpej static void
262 1.24 kent bba_reset(struct bba_softc *sc, int reset)
263 1.1 augustss {
264 1.24 kent uint32_t ssr;
265 1.1 augustss
266 1.1 augustss /* disable any DMA and reset the codec */
267 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
268 1.1 augustss ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
269 1.1 augustss if (reset)
270 1.1 augustss ssr &= ~IOASIC_CSR_ISDN_ENABLE;
271 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
272 1.1 augustss DELAY(10); /* 400ns required for codec to reset */
273 1.1 augustss
274 1.1 augustss /* initialise DMA pointers */
275 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
276 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
277 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
278 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
279 1.1 augustss
280 1.1 augustss /* take out of reset state */
281 1.1 augustss if (reset) {
282 1.1 augustss ssr |= IOASIC_CSR_ISDN_ENABLE;
283 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
284 1.1 augustss }
285 1.1 augustss
286 1.1 augustss }
287 1.1 augustss
288 1.1 augustss
289 1.28 thorpej static void *
290 1.24 kent bba_allocm(void *addr, int direction, size_t size,
291 1.24 kent struct malloc_type *pool, int flags)
292 1.1 augustss {
293 1.24 kent struct am7930_softc *asc;
294 1.24 kent struct bba_softc *sc;
295 1.1 augustss bus_dma_segment_t seg;
296 1.1 augustss int rseg;
297 1.31 christos void *kva;
298 1.1 augustss struct bba_mem *m;
299 1.6 gmcgarry int w;
300 1.24 kent int state;
301 1.1 augustss
302 1.26 kleink DPRINTF(("bba_allocm: size = %zu\n", size));
303 1.24 kent asc = addr;
304 1.24 kent sc = addr;
305 1.24 kent state = 0;
306 1.6 gmcgarry w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
307 1.6 gmcgarry
308 1.6 gmcgarry if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN,
309 1.6 gmcgarry BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) {
310 1.33 cegger aprint_error_dev(&asc->sc_dev, "can't allocate DMA buffer\n");
311 1.1 augustss goto bad;
312 1.1 augustss }
313 1.1 augustss state |= 1;
314 1.1 augustss
315 1.1 augustss if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
316 1.6 gmcgarry &kva, w | BUS_DMA_COHERENT)) {
317 1.33 cegger aprint_error_dev(&asc->sc_dev, "can't map DMA buffer\n");
318 1.1 augustss goto bad;
319 1.1 augustss }
320 1.1 augustss state |= 2;
321 1.1 augustss
322 1.1 augustss m = malloc(sizeof(struct bba_mem), pool, flags);
323 1.1 augustss if (m == NULL)
324 1.1 augustss goto bad;
325 1.1 augustss m->addr = seg.ds_addr;
326 1.1 augustss m->size = seg.ds_len;
327 1.24 kent m->kva = kva;
328 1.24 kent m->next = sc->sc_mem_head;
329 1.24 kent sc->sc_mem_head = m;
330 1.1 augustss
331 1.24 kent return (void *)kva;
332 1.1 augustss
333 1.1 augustss bad:
334 1.1 augustss if (state & 2)
335 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, size);
336 1.1 augustss if (state & 1)
337 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
338 1.1 augustss return NULL;
339 1.1 augustss }
340 1.1 augustss
341 1.1 augustss
342 1.28 thorpej static void
343 1.24 kent bba_freem(void *addr, void *ptr, struct malloc_type *pool)
344 1.1 augustss {
345 1.24 kent struct bba_softc *sc;
346 1.24 kent struct bba_mem **mp, *m;
347 1.1 augustss bus_dma_segment_t seg;
348 1.31 christos void *kva;
349 1.1 augustss
350 1.24 kent sc = addr;
351 1.31 christos kva = (void *)addr;
352 1.1 augustss for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
353 1.6 gmcgarry mp = &(*mp)->next)
354 1.24 kent continue;
355 1.1 augustss m = *mp;
356 1.6 gmcgarry if (m == NULL) {
357 1.6 gmcgarry printf("bba_freem: freeing unallocated memory\n");
358 1.1 augustss return;
359 1.1 augustss }
360 1.1 augustss *mp = m->next;
361 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
362 1.1 augustss
363 1.24 kent seg.ds_addr = m->addr;
364 1.24 kent seg.ds_len = m->size;
365 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
366 1.24 kent free(m, pool);
367 1.1 augustss }
368 1.1 augustss
369 1.1 augustss
370 1.28 thorpej static size_t
371 1.24 kent bba_round_buffersize(void *addr, int direction, size_t size)
372 1.1 augustss {
373 1.24 kent
374 1.26 kleink DPRINTF(("bba_round_buffersize: size=%zu\n", size));
375 1.24 kent return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE :
376 1.24 kent roundup(size, IOASIC_DMA_BLOCKSIZE);
377 1.1 augustss }
378 1.1 augustss
379 1.1 augustss
380 1.28 thorpej static int
381 1.24 kent bba_halt_output(void *addr)
382 1.1 augustss {
383 1.24 kent struct bba_softc *sc;
384 1.24 kent struct bba_dma_state *d;
385 1.24 kent uint32_t ssr;
386 1.1 augustss
387 1.24 kent sc = addr;
388 1.24 kent d = &sc->sc_tx_dma_state;
389 1.1 augustss /* disable any DMA */
390 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
391 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
392 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
393 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
394 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
395 1.1 augustss
396 1.1 augustss if (d->active) {
397 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
398 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
399 1.1 augustss d->active = 0;
400 1.1 augustss }
401 1.1 augustss
402 1.1 augustss return 0;
403 1.1 augustss }
404 1.1 augustss
405 1.1 augustss
406 1.28 thorpej static int
407 1.24 kent bba_halt_input(void *addr)
408 1.1 augustss {
409 1.24 kent struct bba_softc *sc;
410 1.24 kent struct bba_dma_state *d;
411 1.24 kent uint32_t ssr;
412 1.1 augustss
413 1.24 kent sc = addr;
414 1.24 kent d = &sc->sc_rx_dma_state;
415 1.1 augustss /* disable any DMA */
416 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
417 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
418 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
419 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
420 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
421 1.1 augustss
422 1.1 augustss if (d->active) {
423 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
424 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
425 1.1 augustss d->active = 0;
426 1.1 augustss }
427 1.1 augustss
428 1.1 augustss return 0;
429 1.1 augustss }
430 1.1 augustss
431 1.1 augustss
432 1.28 thorpej static int
433 1.24 kent bba_getdev(void *addr, struct audio_device *retp)
434 1.1 augustss {
435 1.24 kent
436 1.1 augustss *retp = bba_device;
437 1.1 augustss return 0;
438 1.1 augustss }
439 1.1 augustss
440 1.1 augustss
441 1.28 thorpej static int
442 1.24 kent bba_trigger_output(void *addr, void *start, void *end, int blksize,
443 1.24 kent void (*intr)(void *), void *arg,
444 1.24 kent const audio_params_t *param)
445 1.1 augustss {
446 1.24 kent struct bba_softc *sc;
447 1.24 kent struct bba_dma_state *d;
448 1.24 kent uint32_t ssr;
449 1.23 kent tc_addr_t phys, nphys;
450 1.24 kent int state;
451 1.1 augustss
452 1.1 augustss DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
453 1.6 gmcgarry addr, start, end, blksize, intr, arg));
454 1.24 kent sc = addr;
455 1.24 kent d = &sc->sc_tx_dma_state;
456 1.24 kent state = 0;
457 1.6 gmcgarry
458 1.6 gmcgarry /* disable any DMA */
459 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
460 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
461 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
462 1.1 augustss
463 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
464 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
465 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
466 1.1 augustss printf("bba_trigger_output: can't create DMA map\n");
467 1.1 augustss goto bad;
468 1.1 augustss }
469 1.1 augustss state |= 1;
470 1.1 augustss
471 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
472 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) {
473 1.6 gmcgarry printf("bba_trigger_output: can't load DMA map\n");
474 1.1 augustss goto bad;
475 1.1 augustss }
476 1.1 augustss state |= 2;
477 1.1 augustss
478 1.1 augustss d->intr = intr;
479 1.1 augustss d->intr_arg = arg;
480 1.1 augustss d->curseg = 1;
481 1.1 augustss
482 1.1 augustss /* get physical address of buffer start */
483 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
484 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
485 1.1 augustss
486 1.1 augustss /* setup DMA pointer */
487 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
488 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
489 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
490 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
491 1.1 augustss
492 1.1 augustss /* kick off DMA */
493 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_T;
494 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
495 1.1 augustss
496 1.1 augustss d->active = 1;
497 1.1 augustss
498 1.1 augustss return 0;
499 1.1 augustss
500 1.1 augustss bad:
501 1.1 augustss if (state & 2)
502 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
503 1.1 augustss if (state & 1)
504 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
505 1.1 augustss return 1;
506 1.1 augustss }
507 1.1 augustss
508 1.1 augustss
509 1.28 thorpej static int
510 1.24 kent bba_trigger_input(void *addr, void *start, void *end, int blksize,
511 1.24 kent void (*intr)(void *), void *arg, const audio_params_t *param)
512 1.1 augustss {
513 1.24 kent struct bba_softc *sc;
514 1.24 kent struct bba_dma_state *d;
515 1.23 kent tc_addr_t phys, nphys;
516 1.1 augustss u_int32_t ssr;
517 1.1 augustss int state = 0;
518 1.1 augustss
519 1.1 augustss DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
520 1.6 gmcgarry addr, start, end, blksize, intr, arg));
521 1.24 kent sc = (struct bba_softc *)addr;
522 1.24 kent d = &sc->sc_rx_dma_state;
523 1.24 kent state = 0;
524 1.6 gmcgarry
525 1.6 gmcgarry /* disable any DMA */
526 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
527 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
528 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
529 1.1 augustss
530 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
531 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
532 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
533 1.1 augustss printf("bba_trigger_input: can't create DMA map\n");
534 1.1 augustss goto bad;
535 1.1 augustss }
536 1.1 augustss state |= 1;
537 1.1 augustss
538 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
539 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) {
540 1.1 augustss printf("bba_trigger_input: can't load DMA map\n");
541 1.1 augustss goto bad;
542 1.1 augustss }
543 1.1 augustss state |= 2;
544 1.1 augustss
545 1.1 augustss d->intr = intr;
546 1.1 augustss d->intr_arg = arg;
547 1.1 augustss d->curseg = 1;
548 1.1 augustss
549 1.1 augustss /* get physical address of buffer start */
550 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
551 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
552 1.1 augustss
553 1.1 augustss /* setup DMA pointer */
554 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
555 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
556 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
557 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
558 1.1 augustss
559 1.1 augustss /* kick off DMA */
560 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_R;
561 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
562 1.1 augustss
563 1.1 augustss d->active = 1;
564 1.1 augustss
565 1.1 augustss return 0;
566 1.1 augustss
567 1.1 augustss bad:
568 1.1 augustss if (state & 2)
569 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
570 1.1 augustss if (state & 1)
571 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
572 1.1 augustss return 1;
573 1.1 augustss }
574 1.1 augustss
575 1.28 thorpej static int
576 1.24 kent bba_intr(void *addr)
577 1.1 augustss {
578 1.24 kent struct bba_softc *sc;
579 1.1 augustss struct bba_dma_state *d;
580 1.1 augustss tc_addr_t nphys;
581 1.1 augustss int s, mask;
582 1.1 augustss
583 1.24 kent sc = addr;
584 1.1 augustss s = splaudio();
585 1.1 augustss
586 1.1 augustss mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
587 1.1 augustss
588 1.1 augustss if (mask & IOASIC_INTR_ISDN_TXLOAD) {
589 1.1 augustss d = &sc->sc_tx_dma_state;
590 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
591 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
592 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
593 1.6 gmcgarry IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
594 1.1 augustss if (d->intr != NULL)
595 1.1 augustss (*d->intr)(d->intr_arg);
596 1.1 augustss }
597 1.1 augustss if (mask & IOASIC_INTR_ISDN_RXLOAD) {
598 1.1 augustss d = &sc->sc_rx_dma_state;
599 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
600 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
601 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
602 1.6 gmcgarry IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
603 1.1 augustss if (d->intr != NULL)
604 1.1 augustss (*d->intr)(d->intr_arg);
605 1.1 augustss }
606 1.1 augustss
607 1.1 augustss splx(s);
608 1.1 augustss
609 1.1 augustss return 0;
610 1.6 gmcgarry }
611 1.6 gmcgarry
612 1.28 thorpej static int
613 1.24 kent bba_get_props(void *addr)
614 1.6 gmcgarry {
615 1.24 kent
616 1.24 kent return AUDIO_PROP_MMAP | am7930_get_props(addr);
617 1.6 gmcgarry }
618 1.6 gmcgarry
619 1.28 thorpej static paddr_t
620 1.24 kent bba_mappage(void *addr, void *mem, off_t offset, int prot)
621 1.6 gmcgarry {
622 1.24 kent struct bba_softc *sc;
623 1.24 kent struct bba_mem **mp;
624 1.6 gmcgarry bus_dma_segment_t seg;
625 1.31 christos void *kva;
626 1.6 gmcgarry
627 1.24 kent sc = addr;
628 1.31 christos kva = (void *)mem;
629 1.6 gmcgarry for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
630 1.6 gmcgarry mp = &(*mp)->next)
631 1.24 kent continue;
632 1.6 gmcgarry if (*mp == NULL || offset < 0) {
633 1.6 gmcgarry return -1;
634 1.6 gmcgarry }
635 1.6 gmcgarry
636 1.24 kent seg.ds_addr = (*mp)->addr;
637 1.24 kent seg.ds_len = (*mp)->size;
638 1.6 gmcgarry
639 1.24 kent return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset,
640 1.6 gmcgarry prot, BUS_DMA_WAITOK);
641 1.1 augustss }
642 1.1 augustss
643 1.23 kent static stream_filter_t *
644 1.23 kent bba_input_conv(struct audio_softc *sc, const audio_params_t *from,
645 1.23 kent const audio_params_t *to)
646 1.23 kent {
647 1.23 kent return auconv_nocontext_filter_factory(bba_input_conv_fetch_to);
648 1.23 kent }
649 1.23 kent
650 1.23 kent static int
651 1.23 kent bba_input_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst,
652 1.23 kent int max_used)
653 1.23 kent {
654 1.23 kent stream_filter_t *this;
655 1.23 kent int m, err;
656 1.23 kent
657 1.23 kent this = (stream_filter_t *)self;
658 1.23 kent if ((err = this->prev->fetch_to(this->prev, this->src, max_used * 4)))
659 1.23 kent return err;
660 1.23 kent m = dst->end - dst->start;
661 1.23 kent m = min(m, max_used);
662 1.23 kent FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) {
663 1.25 drochner *d = ((*(const uint32_t *)s) >> 16) & 0xff;
664 1.23 kent } FILTER_LOOP_EPILOGUE(this->src, dst);
665 1.23 kent return 0;
666 1.1 augustss }
667 1.1 augustss
668 1.23 kent static stream_filter_t *
669 1.23 kent bba_output_conv(struct audio_softc *sc, const audio_params_t *from,
670 1.23 kent const audio_params_t *to)
671 1.23 kent {
672 1.23 kent return auconv_nocontext_filter_factory(bba_output_conv_fetch_to);
673 1.23 kent }
674 1.23 kent
675 1.23 kent static int
676 1.23 kent bba_output_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst,
677 1.23 kent int max_used)
678 1.23 kent {
679 1.23 kent stream_filter_t *this;
680 1.23 kent int m, err;
681 1.23 kent
682 1.23 kent this = (stream_filter_t *)self;
683 1.23 kent max_used = (max_used + 3) & ~3;
684 1.23 kent if ((err = this->prev->fetch_to(this->prev, this->src, max_used / 4)))
685 1.23 kent return err;
686 1.23 kent m = (dst->end - dst->start) & ~3;
687 1.23 kent m = min(m, max_used);
688 1.23 kent FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) {
689 1.23 kent *(uint32_t *)d = (*s << 16);
690 1.23 kent } FILTER_LOOP_EPILOGUE(this->src, dst);
691 1.23 kent return 0;
692 1.1 augustss }
693 1.1 augustss
694 1.28 thorpej static int
695 1.24 kent bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param)
696 1.1 augustss {
697 1.24 kent
698 1.24 kent return IOASIC_DMA_BLOCKSIZE;
699 1.1 augustss }
700 1.1 augustss
701 1.1 augustss
702 1.1 augustss /* indirect write */
703 1.28 thorpej static void
704 1.24 kent bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val)
705 1.1 augustss {
706 1.1 augustss
707 1.24 kent DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
708 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
709 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
710 1.1 augustss }
711 1.1 augustss
712 1.1 augustss
713 1.28 thorpej static void
714 1.24 kent bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val)
715 1.1 augustss {
716 1.1 augustss
717 1.24 kent DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
718 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
719 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
720 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
721 1.1 augustss }
722 1.1 augustss
723 1.1 augustss
724 1.28 thorpej static uint16_t
725 1.24 kent bba_codec_iread16(struct am7930_softc *sc, int reg)
726 1.1 augustss {
727 1.24 kent uint16_t val;
728 1.1 augustss
729 1.24 kent DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg));
730 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
731 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
732 1.1 augustss val |= bba_codec_dread(sc, AM7930_DREG_DR);
733 1.1 augustss
734 1.1 augustss return val;
735 1.1 augustss }
736 1.1 augustss
737 1.1 augustss
738 1.1 augustss /* indirect read */
739 1.28 thorpej static uint8_t
740 1.24 kent bba_codec_iread(struct am7930_softc *sc, int reg)
741 1.1 augustss {
742 1.24 kent uint8_t val;
743 1.1 augustss
744 1.24 kent DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg));
745 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
746 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR);
747 1.1 augustss
748 1.1 augustss DPRINTF(("read 0x%x (%d)\n", val, val));
749 1.1 augustss
750 1.1 augustss return val;
751 1.1 augustss }
752 1.1 augustss
753 1.1 augustss /* direct write */
754 1.28 thorpej static void
755 1.24 kent bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val)
756 1.1 augustss {
757 1.24 kent struct bba_softc *sc;
758 1.1 augustss
759 1.24 kent sc = (struct bba_softc *)asc;
760 1.24 kent DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
761 1.1 augustss
762 1.9 thorpej #if defined(__alpha__)
763 1.5 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
764 1.9 thorpej reg << 2, val << 8);
765 1.9 thorpej #else
766 1.9 thorpej bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
767 1.9 thorpej reg << 6, val);
768 1.9 thorpej #endif
769 1.1 augustss }
770 1.1 augustss
771 1.1 augustss /* direct read */
772 1.28 thorpej static uint8_t
773 1.24 kent bba_codec_dread(struct am7930_softc *asc, int reg)
774 1.1 augustss {
775 1.24 kent struct bba_softc *sc;
776 1.1 augustss
777 1.24 kent sc = (struct bba_softc *)asc;
778 1.24 kent DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg));
779 1.1 augustss
780 1.9 thorpej #if defined(__alpha__)
781 1.9 thorpej return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
782 1.9 thorpej reg << 2) >> 8) & 0xff);
783 1.9 thorpej #else
784 1.9 thorpej return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
785 1.9 thorpej reg << 6) & 0xff);
786 1.9 thorpej #endif
787 1.1 augustss }
788