bba.c revision 1.41 1 1.41 riastrad /* $NetBSD: bba.c,v 1.41 2018/09/03 16:29:33 riastradh Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * Redistribution and use in source and binary forms, with or without
8 1.1 augustss * modification, are permitted provided that the following conditions
9 1.1 augustss * are met:
10 1.1 augustss * 1. Redistributions of source code must retain the above copyright
11 1.1 augustss * notice, this list of conditions and the following disclaimer.
12 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 augustss * notice, this list of conditions and the following disclaimer in the
14 1.1 augustss * documentation and/or other materials provided with the distribution.
15 1.1 augustss *
16 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
27 1.1 augustss */
28 1.1 augustss
29 1.1 augustss /* maxine/alpha baseboard audio (bba) */
30 1.15 lukem
31 1.15 lukem #include <sys/cdefs.h>
32 1.41 riastrad __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.41 2018/09/03 16:29:33 riastradh Exp $");
33 1.1 augustss
34 1.1 augustss #include <sys/param.h>
35 1.1 augustss #include <sys/systm.h>
36 1.1 augustss #include <sys/kernel.h>
37 1.1 augustss #include <sys/device.h>
38 1.39 jmcneill #include <sys/kmem.h>
39 1.1 augustss
40 1.32 ad #include <sys/bus.h>
41 1.1 augustss #include <machine/autoconf.h>
42 1.32 ad #include <sys/cpu.h>
43 1.1 augustss
44 1.1 augustss #include <sys/audioio.h>
45 1.1 augustss #include <dev/audio_if.h>
46 1.23 kent #include <dev/auconv.h>
47 1.1 augustss
48 1.1 augustss #include <dev/ic/am7930reg.h>
49 1.1 augustss #include <dev/ic/am7930var.h>
50 1.1 augustss
51 1.1 augustss #include <dev/tc/tcvar.h>
52 1.1 augustss #include <dev/tc/ioasicreg.h>
53 1.1 augustss #include <dev/tc/ioasicvar.h>
54 1.1 augustss
55 1.1 augustss #ifdef AUDIO_DEBUG
56 1.1 augustss #define DPRINTF(x) if (am7930debug) printf x
57 1.1 augustss #else
58 1.1 augustss #define DPRINTF(x)
59 1.1 augustss #endif /* AUDIO_DEBUG */
60 1.1 augustss
61 1.1 augustss #define BBA_MAX_DMA_SEGMENTS 16
62 1.9 thorpej #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE)
63 1.9 thorpej #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE
64 1.6 gmcgarry #define BBA_DMABUF_BOUNDARY 0
65 1.1 augustss
66 1.1 augustss struct bba_mem {
67 1.24 kent struct bba_mem *next;
68 1.1 augustss bus_addr_t addr;
69 1.1 augustss bus_size_t size;
70 1.31 christos void *kva;
71 1.1 augustss };
72 1.1 augustss
73 1.1 augustss struct bba_dma_state {
74 1.20 wiz bus_dmamap_t dmam; /* DMA map */
75 1.1 augustss int active;
76 1.20 wiz int curseg; /* current segment in DMA buffer */
77 1.24 kent void (*intr)(void *); /* higher-level audio handler */
78 1.1 augustss void *intr_arg;
79 1.1 augustss };
80 1.1 augustss
81 1.1 augustss struct bba_softc {
82 1.1 augustss struct am7930_softc sc_am7930; /* glue to MI code */
83 1.1 augustss
84 1.1 augustss bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */
85 1.1 augustss bus_space_handle_t sc_bsh;
86 1.1 augustss bus_dma_tag_t sc_dmat;
87 1.1 augustss bus_space_handle_t sc_codec_bsh; /* codec bus space handle */
88 1.1 augustss
89 1.1 augustss struct bba_mem *sc_mem_head; /* list of buffers */
90 1.1 augustss
91 1.1 augustss struct bba_dma_state sc_tx_dma_state;
92 1.1 augustss struct bba_dma_state sc_rx_dma_state;
93 1.1 augustss };
94 1.1 augustss
95 1.36 cegger static int bba_match(device_t, cfdata_t, void *);
96 1.36 cegger static void bba_attach(device_t, device_t, void *);
97 1.1 augustss
98 1.38 tsutsui CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc),
99 1.18 thorpej bba_match, bba_attach, NULL, NULL);
100 1.1 augustss
101 1.1 augustss /*
102 1.1 augustss * Define our interface into the am7930 MI driver.
103 1.1 augustss */
104 1.1 augustss
105 1.30 he static uint8_t bba_codec_iread(struct am7930_softc *, int);
106 1.28 thorpej static uint16_t bba_codec_iread16(struct am7930_softc *, int);
107 1.28 thorpej static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t);
108 1.28 thorpej static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t);
109 1.28 thorpej static void bba_onopen(struct am7930_softc *);
110 1.28 thorpej static void bba_onclose(struct am7930_softc *);
111 1.28 thorpej
112 1.23 kent static stream_filter_factory_t bba_output_conv;
113 1.23 kent static stream_filter_factory_t bba_input_conv;
114 1.39 jmcneill static int bba_output_conv_fetch_to(struct audio_softc *, stream_fetcher_t *,
115 1.39 jmcneill audio_stream_t *, int);
116 1.39 jmcneill static int bba_input_conv_fetch_to(struct audio_softc *, stream_fetcher_t *,
117 1.39 jmcneill audio_stream_t *, int);
118 1.1 augustss
119 1.1 augustss struct am7930_glue bba_glue = {
120 1.1 augustss bba_codec_iread,
121 1.1 augustss bba_codec_iwrite,
122 1.1 augustss bba_codec_iread16,
123 1.1 augustss bba_codec_iwrite16,
124 1.1 augustss bba_onopen,
125 1.1 augustss bba_onclose,
126 1.1 augustss 4,
127 1.1 augustss bba_input_conv,
128 1.1 augustss bba_output_conv,
129 1.1 augustss };
130 1.1 augustss
131 1.1 augustss /*
132 1.1 augustss * Define our interface to the higher level audio driver.
133 1.1 augustss */
134 1.1 augustss
135 1.28 thorpej static int bba_round_blocksize(void *, int, int, const audio_params_t *);
136 1.28 thorpej static int bba_halt_output(void *);
137 1.28 thorpej static int bba_halt_input(void *);
138 1.28 thorpej static int bba_getdev(void *, struct audio_device *);
139 1.39 jmcneill static void *bba_allocm(void *, int, size_t);
140 1.39 jmcneill static void bba_freem(void *, void *, size_t);
141 1.28 thorpej static size_t bba_round_buffersize(void *, int, size_t);
142 1.28 thorpej static int bba_get_props(void *);
143 1.28 thorpej static paddr_t bba_mappage(void *, void *, off_t, int);
144 1.28 thorpej static int bba_trigger_output(void *, void *, void *, int,
145 1.28 thorpej void (*)(void *), void *,
146 1.28 thorpej const audio_params_t *);
147 1.28 thorpej static int bba_trigger_input(void *, void *, void *, int,
148 1.28 thorpej void (*)(void *), void *,
149 1.28 thorpej const audio_params_t *);
150 1.39 jmcneill static void bba_get_locks(void *opaque, kmutex_t **intr,
151 1.39 jmcneill kmutex_t **thread);
152 1.1 augustss
153 1.28 thorpej static const struct audio_hw_if sa_hw_if = {
154 1.1 augustss am7930_open,
155 1.1 augustss am7930_close,
156 1.1 augustss 0,
157 1.1 augustss am7930_query_encoding,
158 1.1 augustss am7930_set_params,
159 1.1 augustss bba_round_blocksize, /* md */
160 1.1 augustss am7930_commit_settings,
161 1.1 augustss 0,
162 1.1 augustss 0,
163 1.1 augustss 0,
164 1.1 augustss 0,
165 1.1 augustss bba_halt_output, /* md */
166 1.1 augustss bba_halt_input, /* md */
167 1.1 augustss 0,
168 1.1 augustss bba_getdev,
169 1.1 augustss 0,
170 1.1 augustss am7930_set_port,
171 1.1 augustss am7930_get_port,
172 1.1 augustss am7930_query_devinfo,
173 1.1 augustss bba_allocm, /* md */
174 1.1 augustss bba_freem, /* md */
175 1.1 augustss bba_round_buffersize, /* md */
176 1.6 gmcgarry bba_mappage,
177 1.6 gmcgarry bba_get_props,
178 1.1 augustss bba_trigger_output, /* md */
179 1.14 augustss bba_trigger_input, /* md */
180 1.14 augustss 0,
181 1.39 jmcneill bba_get_locks,
182 1.1 augustss };
183 1.1 augustss
184 1.28 thorpej static struct audio_device bba_device = {
185 1.1 augustss "am7930",
186 1.1 augustss "x",
187 1.1 augustss "bba"
188 1.1 augustss };
189 1.1 augustss
190 1.28 thorpej static int bba_intr(void *);
191 1.28 thorpej static void bba_reset(struct bba_softc *, int);
192 1.37 tsutsui static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t);
193 1.28 thorpej static uint8_t bba_codec_dread(struct am7930_softc *, int);
194 1.24 kent
195 1.28 thorpej static int
196 1.36 cegger bba_match(device_t parent, cfdata_t cf, void *aux)
197 1.1 augustss {
198 1.24 kent struct ioasicdev_attach_args *ia;
199 1.1 augustss
200 1.24 kent ia = aux;
201 1.6 gmcgarry if (strcmp(ia->iada_modname, "isdn") != 0 &&
202 1.6 gmcgarry strcmp(ia->iada_modname, "AMD79c30") != 0)
203 1.6 gmcgarry return 0;
204 1.1 augustss
205 1.1 augustss return 1;
206 1.1 augustss }
207 1.1 augustss
208 1.1 augustss
209 1.28 thorpej static void
210 1.36 cegger bba_attach(device_t parent, device_t self, void *aux)
211 1.24 kent {
212 1.24 kent struct ioasicdev_attach_args *ia;
213 1.24 kent struct bba_softc *sc;
214 1.24 kent struct am7930_softc *asc;
215 1.29 thorpej struct ioasic_softc *iosc = device_private(parent);
216 1.1 augustss
217 1.24 kent ia = aux;
218 1.27 thorpej sc = device_private(self);
219 1.24 kent asc = &sc->sc_am7930;
220 1.38 tsutsui asc->sc_dev = self;
221 1.29 thorpej sc->sc_bst = iosc->sc_bst;
222 1.29 thorpej sc->sc_bsh = iosc->sc_bsh;
223 1.29 thorpej sc->sc_dmat = iosc->sc_dmat;
224 1.1 augustss
225 1.1 augustss /* get the bus space handle for codec */
226 1.1 augustss if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
227 1.6 gmcgarry ia->iada_offset, 0, &sc->sc_codec_bsh)) {
228 1.38 tsutsui aprint_error_dev(self, "unable to map device\n");
229 1.1 augustss return;
230 1.1 augustss }
231 1.1 augustss
232 1.1 augustss printf("\n");
233 1.1 augustss
234 1.1 augustss bba_reset(sc,1);
235 1.1 augustss
236 1.1 augustss /*
237 1.1 augustss * Set up glue for MI code early; we use some of it here.
238 1.1 augustss */
239 1.1 augustss asc->sc_glue = &bba_glue;
240 1.1 augustss
241 1.1 augustss /*
242 1.1 augustss * MI initialisation. We will be doing DMA.
243 1.1 augustss */
244 1.1 augustss am7930_init(asc, AUDIOAMD_DMA_MODE);
245 1.1 augustss
246 1.1 augustss ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
247 1.6 gmcgarry bba_intr, sc);
248 1.1 augustss
249 1.38 tsutsui audio_attach_mi(&sa_hw_if, asc, self);
250 1.1 augustss }
251 1.1 augustss
252 1.1 augustss
253 1.28 thorpej static void
254 1.24 kent bba_onopen(struct am7930_softc *sc)
255 1.1 augustss {
256 1.1 augustss }
257 1.1 augustss
258 1.1 augustss
259 1.28 thorpej static void
260 1.24 kent bba_onclose(struct am7930_softc *sc)
261 1.1 augustss {
262 1.1 augustss }
263 1.1 augustss
264 1.1 augustss
265 1.28 thorpej static void
266 1.24 kent bba_reset(struct bba_softc *sc, int reset)
267 1.1 augustss {
268 1.24 kent uint32_t ssr;
269 1.1 augustss
270 1.1 augustss /* disable any DMA and reset the codec */
271 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
272 1.1 augustss ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
273 1.1 augustss if (reset)
274 1.1 augustss ssr &= ~IOASIC_CSR_ISDN_ENABLE;
275 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
276 1.1 augustss DELAY(10); /* 400ns required for codec to reset */
277 1.1 augustss
278 1.1 augustss /* initialise DMA pointers */
279 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
280 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
281 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
282 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
283 1.1 augustss
284 1.1 augustss /* take out of reset state */
285 1.1 augustss if (reset) {
286 1.1 augustss ssr |= IOASIC_CSR_ISDN_ENABLE;
287 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
288 1.1 augustss }
289 1.1 augustss
290 1.1 augustss }
291 1.1 augustss
292 1.1 augustss
293 1.28 thorpej static void *
294 1.39 jmcneill bba_allocm(void *addr, int direction, size_t size)
295 1.1 augustss {
296 1.24 kent struct am7930_softc *asc;
297 1.24 kent struct bba_softc *sc;
298 1.1 augustss bus_dma_segment_t seg;
299 1.1 augustss int rseg;
300 1.31 christos void *kva;
301 1.1 augustss struct bba_mem *m;
302 1.24 kent int state;
303 1.1 augustss
304 1.26 kleink DPRINTF(("bba_allocm: size = %zu\n", size));
305 1.24 kent asc = addr;
306 1.24 kent sc = addr;
307 1.24 kent state = 0;
308 1.6 gmcgarry
309 1.6 gmcgarry if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN,
310 1.39 jmcneill BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) {
311 1.38 tsutsui aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n");
312 1.1 augustss goto bad;
313 1.1 augustss }
314 1.1 augustss state |= 1;
315 1.1 augustss
316 1.1 augustss if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
317 1.39 jmcneill &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) {
318 1.38 tsutsui aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n");
319 1.1 augustss goto bad;
320 1.1 augustss }
321 1.1 augustss state |= 2;
322 1.1 augustss
323 1.39 jmcneill m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP);
324 1.1 augustss m->addr = seg.ds_addr;
325 1.1 augustss m->size = seg.ds_len;
326 1.24 kent m->kva = kva;
327 1.24 kent m->next = sc->sc_mem_head;
328 1.24 kent sc->sc_mem_head = m;
329 1.1 augustss
330 1.24 kent return (void *)kva;
331 1.1 augustss
332 1.1 augustss bad:
333 1.1 augustss if (state & 2)
334 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, size);
335 1.1 augustss if (state & 1)
336 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
337 1.1 augustss return NULL;
338 1.1 augustss }
339 1.1 augustss
340 1.1 augustss
341 1.28 thorpej static void
342 1.39 jmcneill bba_freem(void *addr, void *ptr, size_t size)
343 1.1 augustss {
344 1.24 kent struct bba_softc *sc;
345 1.24 kent struct bba_mem **mp, *m;
346 1.1 augustss bus_dma_segment_t seg;
347 1.31 christos void *kva;
348 1.1 augustss
349 1.24 kent sc = addr;
350 1.31 christos kva = (void *)addr;
351 1.1 augustss for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
352 1.6 gmcgarry mp = &(*mp)->next)
353 1.24 kent continue;
354 1.1 augustss m = *mp;
355 1.6 gmcgarry if (m == NULL) {
356 1.6 gmcgarry printf("bba_freem: freeing unallocated memory\n");
357 1.1 augustss return;
358 1.1 augustss }
359 1.1 augustss *mp = m->next;
360 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
361 1.1 augustss
362 1.24 kent seg.ds_addr = m->addr;
363 1.24 kent seg.ds_len = m->size;
364 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
365 1.39 jmcneill kmem_free(m, sizeof(struct bba_mem));
366 1.1 augustss }
367 1.1 augustss
368 1.1 augustss
369 1.28 thorpej static size_t
370 1.24 kent bba_round_buffersize(void *addr, int direction, size_t size)
371 1.1 augustss {
372 1.24 kent
373 1.26 kleink DPRINTF(("bba_round_buffersize: size=%zu\n", size));
374 1.24 kent return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE :
375 1.24 kent roundup(size, IOASIC_DMA_BLOCKSIZE);
376 1.1 augustss }
377 1.1 augustss
378 1.1 augustss
379 1.28 thorpej static int
380 1.24 kent bba_halt_output(void *addr)
381 1.1 augustss {
382 1.24 kent struct bba_softc *sc;
383 1.24 kent struct bba_dma_state *d;
384 1.24 kent uint32_t ssr;
385 1.1 augustss
386 1.24 kent sc = addr;
387 1.24 kent d = &sc->sc_tx_dma_state;
388 1.1 augustss /* disable any DMA */
389 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
390 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
391 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
392 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
393 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
394 1.1 augustss
395 1.1 augustss if (d->active) {
396 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
397 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
398 1.1 augustss d->active = 0;
399 1.1 augustss }
400 1.1 augustss
401 1.1 augustss return 0;
402 1.1 augustss }
403 1.1 augustss
404 1.1 augustss
405 1.28 thorpej static int
406 1.24 kent bba_halt_input(void *addr)
407 1.1 augustss {
408 1.24 kent struct bba_softc *sc;
409 1.24 kent struct bba_dma_state *d;
410 1.24 kent uint32_t ssr;
411 1.1 augustss
412 1.24 kent sc = addr;
413 1.24 kent d = &sc->sc_rx_dma_state;
414 1.1 augustss /* disable any DMA */
415 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
416 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
417 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
418 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
419 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
420 1.1 augustss
421 1.1 augustss if (d->active) {
422 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
423 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
424 1.1 augustss d->active = 0;
425 1.1 augustss }
426 1.1 augustss
427 1.1 augustss return 0;
428 1.1 augustss }
429 1.1 augustss
430 1.1 augustss
431 1.28 thorpej static int
432 1.24 kent bba_getdev(void *addr, struct audio_device *retp)
433 1.1 augustss {
434 1.24 kent
435 1.1 augustss *retp = bba_device;
436 1.1 augustss return 0;
437 1.1 augustss }
438 1.1 augustss
439 1.1 augustss
440 1.28 thorpej static int
441 1.24 kent bba_trigger_output(void *addr, void *start, void *end, int blksize,
442 1.24 kent void (*intr)(void *), void *arg,
443 1.24 kent const audio_params_t *param)
444 1.1 augustss {
445 1.24 kent struct bba_softc *sc;
446 1.24 kent struct bba_dma_state *d;
447 1.24 kent uint32_t ssr;
448 1.23 kent tc_addr_t phys, nphys;
449 1.24 kent int state;
450 1.1 augustss
451 1.1 augustss DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
452 1.6 gmcgarry addr, start, end, blksize, intr, arg));
453 1.24 kent sc = addr;
454 1.24 kent d = &sc->sc_tx_dma_state;
455 1.24 kent state = 0;
456 1.6 gmcgarry
457 1.6 gmcgarry /* disable any DMA */
458 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
459 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
460 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
461 1.1 augustss
462 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
463 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
464 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
465 1.1 augustss printf("bba_trigger_output: can't create DMA map\n");
466 1.1 augustss goto bad;
467 1.1 augustss }
468 1.1 augustss state |= 1;
469 1.1 augustss
470 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
471 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) {
472 1.6 gmcgarry printf("bba_trigger_output: can't load DMA map\n");
473 1.1 augustss goto bad;
474 1.1 augustss }
475 1.1 augustss state |= 2;
476 1.1 augustss
477 1.1 augustss d->intr = intr;
478 1.1 augustss d->intr_arg = arg;
479 1.1 augustss d->curseg = 1;
480 1.1 augustss
481 1.1 augustss /* get physical address of buffer start */
482 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
483 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
484 1.1 augustss
485 1.1 augustss /* setup DMA pointer */
486 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
487 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
488 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
489 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
490 1.1 augustss
491 1.1 augustss /* kick off DMA */
492 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_T;
493 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
494 1.1 augustss
495 1.1 augustss d->active = 1;
496 1.1 augustss
497 1.1 augustss return 0;
498 1.1 augustss
499 1.1 augustss bad:
500 1.1 augustss if (state & 2)
501 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
502 1.1 augustss if (state & 1)
503 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
504 1.1 augustss return 1;
505 1.1 augustss }
506 1.1 augustss
507 1.1 augustss
508 1.28 thorpej static int
509 1.24 kent bba_trigger_input(void *addr, void *start, void *end, int blksize,
510 1.24 kent void (*intr)(void *), void *arg, const audio_params_t *param)
511 1.1 augustss {
512 1.24 kent struct bba_softc *sc;
513 1.24 kent struct bba_dma_state *d;
514 1.23 kent tc_addr_t phys, nphys;
515 1.37 tsutsui uint32_t ssr;
516 1.1 augustss int state = 0;
517 1.1 augustss
518 1.1 augustss DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
519 1.6 gmcgarry addr, start, end, blksize, intr, arg));
520 1.38 tsutsui sc = addr;
521 1.24 kent d = &sc->sc_rx_dma_state;
522 1.24 kent state = 0;
523 1.6 gmcgarry
524 1.6 gmcgarry /* disable any DMA */
525 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
526 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
527 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
528 1.1 augustss
529 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
530 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
531 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
532 1.1 augustss printf("bba_trigger_input: can't create DMA map\n");
533 1.1 augustss goto bad;
534 1.1 augustss }
535 1.1 augustss state |= 1;
536 1.1 augustss
537 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
538 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) {
539 1.1 augustss printf("bba_trigger_input: can't load DMA map\n");
540 1.1 augustss goto bad;
541 1.1 augustss }
542 1.1 augustss state |= 2;
543 1.1 augustss
544 1.1 augustss d->intr = intr;
545 1.1 augustss d->intr_arg = arg;
546 1.1 augustss d->curseg = 1;
547 1.1 augustss
548 1.1 augustss /* get physical address of buffer start */
549 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
550 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
551 1.1 augustss
552 1.1 augustss /* setup DMA pointer */
553 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
554 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
555 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
556 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
557 1.1 augustss
558 1.1 augustss /* kick off DMA */
559 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_R;
560 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
561 1.1 augustss
562 1.1 augustss d->active = 1;
563 1.1 augustss
564 1.1 augustss return 0;
565 1.1 augustss
566 1.1 augustss bad:
567 1.1 augustss if (state & 2)
568 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
569 1.1 augustss if (state & 1)
570 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
571 1.1 augustss return 1;
572 1.1 augustss }
573 1.1 augustss
574 1.39 jmcneill static void
575 1.39 jmcneill bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread)
576 1.39 jmcneill {
577 1.39 jmcneill struct bba_softc *bsc = opaque;
578 1.39 jmcneill struct am7930_softc *sc = &bsc->sc_am7930;
579 1.39 jmcneill
580 1.39 jmcneill *intr = &sc->sc_intr_lock;
581 1.39 jmcneill *thread = &sc->sc_lock;
582 1.39 jmcneill }
583 1.39 jmcneill
584 1.28 thorpej static int
585 1.24 kent bba_intr(void *addr)
586 1.1 augustss {
587 1.24 kent struct bba_softc *sc;
588 1.1 augustss struct bba_dma_state *d;
589 1.1 augustss tc_addr_t nphys;
590 1.39 jmcneill int mask;
591 1.1 augustss
592 1.24 kent sc = addr;
593 1.39 jmcneill mutex_enter(&sc->sc_am7930.sc_intr_lock);
594 1.1 augustss
595 1.1 augustss mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
596 1.1 augustss
597 1.1 augustss if (mask & IOASIC_INTR_ISDN_TXLOAD) {
598 1.1 augustss d = &sc->sc_tx_dma_state;
599 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
600 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
601 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
602 1.6 gmcgarry IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
603 1.1 augustss if (d->intr != NULL)
604 1.1 augustss (*d->intr)(d->intr_arg);
605 1.1 augustss }
606 1.1 augustss if (mask & IOASIC_INTR_ISDN_RXLOAD) {
607 1.1 augustss d = &sc->sc_rx_dma_state;
608 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
609 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
610 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
611 1.6 gmcgarry IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
612 1.1 augustss if (d->intr != NULL)
613 1.1 augustss (*d->intr)(d->intr_arg);
614 1.1 augustss }
615 1.1 augustss
616 1.39 jmcneill mutex_exit(&sc->sc_am7930.sc_intr_lock);
617 1.1 augustss
618 1.1 augustss return 0;
619 1.6 gmcgarry }
620 1.6 gmcgarry
621 1.28 thorpej static int
622 1.24 kent bba_get_props(void *addr)
623 1.6 gmcgarry {
624 1.24 kent
625 1.24 kent return AUDIO_PROP_MMAP | am7930_get_props(addr);
626 1.6 gmcgarry }
627 1.6 gmcgarry
628 1.28 thorpej static paddr_t
629 1.24 kent bba_mappage(void *addr, void *mem, off_t offset, int prot)
630 1.6 gmcgarry {
631 1.24 kent struct bba_softc *sc;
632 1.24 kent struct bba_mem **mp;
633 1.6 gmcgarry bus_dma_segment_t seg;
634 1.31 christos void *kva;
635 1.6 gmcgarry
636 1.24 kent sc = addr;
637 1.31 christos kva = (void *)mem;
638 1.6 gmcgarry for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
639 1.6 gmcgarry mp = &(*mp)->next)
640 1.24 kent continue;
641 1.6 gmcgarry if (*mp == NULL || offset < 0) {
642 1.6 gmcgarry return -1;
643 1.6 gmcgarry }
644 1.6 gmcgarry
645 1.24 kent seg.ds_addr = (*mp)->addr;
646 1.24 kent seg.ds_len = (*mp)->size;
647 1.6 gmcgarry
648 1.24 kent return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset,
649 1.6 gmcgarry prot, BUS_DMA_WAITOK);
650 1.1 augustss }
651 1.1 augustss
652 1.23 kent static stream_filter_t *
653 1.23 kent bba_input_conv(struct audio_softc *sc, const audio_params_t *from,
654 1.23 kent const audio_params_t *to)
655 1.23 kent {
656 1.23 kent return auconv_nocontext_filter_factory(bba_input_conv_fetch_to);
657 1.23 kent }
658 1.23 kent
659 1.23 kent static int
660 1.39 jmcneill bba_input_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self,
661 1.39 jmcneill audio_stream_t *dst, int max_used)
662 1.23 kent {
663 1.23 kent stream_filter_t *this;
664 1.23 kent int m, err;
665 1.23 kent
666 1.23 kent this = (stream_filter_t *)self;
667 1.39 jmcneill if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used * 4)))
668 1.23 kent return err;
669 1.23 kent m = dst->end - dst->start;
670 1.41 riastrad m = uimin(m, max_used);
671 1.23 kent FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) {
672 1.25 drochner *d = ((*(const uint32_t *)s) >> 16) & 0xff;
673 1.23 kent } FILTER_LOOP_EPILOGUE(this->src, dst);
674 1.23 kent return 0;
675 1.1 augustss }
676 1.1 augustss
677 1.23 kent static stream_filter_t *
678 1.23 kent bba_output_conv(struct audio_softc *sc, const audio_params_t *from,
679 1.23 kent const audio_params_t *to)
680 1.23 kent {
681 1.23 kent return auconv_nocontext_filter_factory(bba_output_conv_fetch_to);
682 1.23 kent }
683 1.23 kent
684 1.23 kent static int
685 1.39 jmcneill bba_output_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self,
686 1.39 jmcneill audio_stream_t *dst, int max_used)
687 1.23 kent {
688 1.23 kent stream_filter_t *this;
689 1.23 kent int m, err;
690 1.23 kent
691 1.23 kent this = (stream_filter_t *)self;
692 1.23 kent max_used = (max_used + 3) & ~3;
693 1.39 jmcneill if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used / 4)))
694 1.23 kent return err;
695 1.23 kent m = (dst->end - dst->start) & ~3;
696 1.41 riastrad m = uimin(m, max_used);
697 1.23 kent FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) {
698 1.23 kent *(uint32_t *)d = (*s << 16);
699 1.23 kent } FILTER_LOOP_EPILOGUE(this->src, dst);
700 1.23 kent return 0;
701 1.1 augustss }
702 1.1 augustss
703 1.28 thorpej static int
704 1.24 kent bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param)
705 1.1 augustss {
706 1.24 kent
707 1.24 kent return IOASIC_DMA_BLOCKSIZE;
708 1.1 augustss }
709 1.1 augustss
710 1.1 augustss
711 1.1 augustss /* indirect write */
712 1.28 thorpej static void
713 1.24 kent bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val)
714 1.1 augustss {
715 1.1 augustss
716 1.24 kent DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
717 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
718 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
719 1.1 augustss }
720 1.1 augustss
721 1.1 augustss
722 1.28 thorpej static void
723 1.24 kent bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val)
724 1.1 augustss {
725 1.1 augustss
726 1.24 kent DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
727 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
728 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
729 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
730 1.1 augustss }
731 1.1 augustss
732 1.1 augustss
733 1.28 thorpej static uint16_t
734 1.24 kent bba_codec_iread16(struct am7930_softc *sc, int reg)
735 1.1 augustss {
736 1.24 kent uint16_t val;
737 1.1 augustss
738 1.24 kent DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg));
739 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
740 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
741 1.1 augustss val |= bba_codec_dread(sc, AM7930_DREG_DR);
742 1.1 augustss
743 1.1 augustss return val;
744 1.1 augustss }
745 1.1 augustss
746 1.1 augustss
747 1.1 augustss /* indirect read */
748 1.28 thorpej static uint8_t
749 1.24 kent bba_codec_iread(struct am7930_softc *sc, int reg)
750 1.1 augustss {
751 1.24 kent uint8_t val;
752 1.1 augustss
753 1.24 kent DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg));
754 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
755 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR);
756 1.1 augustss
757 1.1 augustss DPRINTF(("read 0x%x (%d)\n", val, val));
758 1.1 augustss
759 1.1 augustss return val;
760 1.1 augustss }
761 1.1 augustss
762 1.1 augustss /* direct write */
763 1.28 thorpej static void
764 1.24 kent bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val)
765 1.1 augustss {
766 1.24 kent struct bba_softc *sc;
767 1.1 augustss
768 1.24 kent sc = (struct bba_softc *)asc;
769 1.24 kent DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
770 1.1 augustss
771 1.9 thorpej #if defined(__alpha__)
772 1.5 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
773 1.9 thorpej reg << 2, val << 8);
774 1.9 thorpej #else
775 1.9 thorpej bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
776 1.9 thorpej reg << 6, val);
777 1.9 thorpej #endif
778 1.1 augustss }
779 1.1 augustss
780 1.1 augustss /* direct read */
781 1.28 thorpej static uint8_t
782 1.24 kent bba_codec_dread(struct am7930_softc *asc, int reg)
783 1.1 augustss {
784 1.24 kent struct bba_softc *sc;
785 1.1 augustss
786 1.24 kent sc = (struct bba_softc *)asc;
787 1.24 kent DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg));
788 1.1 augustss
789 1.9 thorpej #if defined(__alpha__)
790 1.9 thorpej return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
791 1.9 thorpej reg << 2) >> 8) & 0xff);
792 1.9 thorpej #else
793 1.9 thorpej return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
794 1.9 thorpej reg << 6) & 0xff);
795 1.9 thorpej #endif
796 1.1 augustss }
797