bba.c revision 1.42 1 1.42 isaki /* $NetBSD: bba.c,v 1.42 2019/03/16 12:09:58 isaki Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * Redistribution and use in source and binary forms, with or without
8 1.1 augustss * modification, are permitted provided that the following conditions
9 1.1 augustss * are met:
10 1.1 augustss * 1. Redistributions of source code must retain the above copyright
11 1.1 augustss * notice, this list of conditions and the following disclaimer.
12 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 augustss * notice, this list of conditions and the following disclaimer in the
14 1.1 augustss * documentation and/or other materials provided with the distribution.
15 1.1 augustss *
16 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
27 1.1 augustss */
28 1.1 augustss
29 1.1 augustss /* maxine/alpha baseboard audio (bba) */
30 1.15 lukem
31 1.15 lukem #include <sys/cdefs.h>
32 1.42 isaki __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.42 2019/03/16 12:09:58 isaki Exp $");
33 1.1 augustss
34 1.1 augustss #include <sys/param.h>
35 1.1 augustss #include <sys/systm.h>
36 1.1 augustss #include <sys/kernel.h>
37 1.1 augustss #include <sys/device.h>
38 1.39 jmcneill #include <sys/kmem.h>
39 1.1 augustss
40 1.32 ad #include <sys/bus.h>
41 1.1 augustss #include <machine/autoconf.h>
42 1.32 ad #include <sys/cpu.h>
43 1.1 augustss
44 1.1 augustss #include <sys/audioio.h>
45 1.1 augustss #include <dev/audio_if.h>
46 1.23 kent #include <dev/auconv.h>
47 1.1 augustss
48 1.1 augustss #include <dev/ic/am7930reg.h>
49 1.1 augustss #include <dev/ic/am7930var.h>
50 1.1 augustss
51 1.1 augustss #include <dev/tc/tcvar.h>
52 1.1 augustss #include <dev/tc/ioasicreg.h>
53 1.1 augustss #include <dev/tc/ioasicvar.h>
54 1.1 augustss
55 1.1 augustss #ifdef AUDIO_DEBUG
56 1.1 augustss #define DPRINTF(x) if (am7930debug) printf x
57 1.1 augustss #else
58 1.1 augustss #define DPRINTF(x)
59 1.1 augustss #endif /* AUDIO_DEBUG */
60 1.1 augustss
61 1.1 augustss #define BBA_MAX_DMA_SEGMENTS 16
62 1.9 thorpej #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE)
63 1.9 thorpej #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE
64 1.6 gmcgarry #define BBA_DMABUF_BOUNDARY 0
65 1.1 augustss
66 1.1 augustss struct bba_mem {
67 1.24 kent struct bba_mem *next;
68 1.1 augustss bus_addr_t addr;
69 1.1 augustss bus_size_t size;
70 1.31 christos void *kva;
71 1.1 augustss };
72 1.1 augustss
73 1.1 augustss struct bba_dma_state {
74 1.20 wiz bus_dmamap_t dmam; /* DMA map */
75 1.1 augustss int active;
76 1.20 wiz int curseg; /* current segment in DMA buffer */
77 1.24 kent void (*intr)(void *); /* higher-level audio handler */
78 1.1 augustss void *intr_arg;
79 1.1 augustss };
80 1.1 augustss
81 1.1 augustss struct bba_softc {
82 1.1 augustss struct am7930_softc sc_am7930; /* glue to MI code */
83 1.1 augustss
84 1.1 augustss bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */
85 1.1 augustss bus_space_handle_t sc_bsh;
86 1.1 augustss bus_dma_tag_t sc_dmat;
87 1.1 augustss bus_space_handle_t sc_codec_bsh; /* codec bus space handle */
88 1.1 augustss
89 1.1 augustss struct bba_mem *sc_mem_head; /* list of buffers */
90 1.1 augustss
91 1.1 augustss struct bba_dma_state sc_tx_dma_state;
92 1.1 augustss struct bba_dma_state sc_rx_dma_state;
93 1.1 augustss };
94 1.1 augustss
95 1.36 cegger static int bba_match(device_t, cfdata_t, void *);
96 1.36 cegger static void bba_attach(device_t, device_t, void *);
97 1.1 augustss
98 1.38 tsutsui CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc),
99 1.18 thorpej bba_match, bba_attach, NULL, NULL);
100 1.1 augustss
101 1.1 augustss /*
102 1.1 augustss * Define our interface into the am7930 MI driver.
103 1.1 augustss */
104 1.1 augustss
105 1.30 he static uint8_t bba_codec_iread(struct am7930_softc *, int);
106 1.28 thorpej static uint16_t bba_codec_iread16(struct am7930_softc *, int);
107 1.28 thorpej static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t);
108 1.28 thorpej static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t);
109 1.28 thorpej static void bba_onopen(struct am7930_softc *);
110 1.28 thorpej static void bba_onclose(struct am7930_softc *);
111 1.28 thorpej
112 1.23 kent static stream_filter_factory_t bba_output_conv;
113 1.23 kent static stream_filter_factory_t bba_input_conv;
114 1.39 jmcneill static int bba_output_conv_fetch_to(struct audio_softc *, stream_fetcher_t *,
115 1.39 jmcneill audio_stream_t *, int);
116 1.39 jmcneill static int bba_input_conv_fetch_to(struct audio_softc *, stream_fetcher_t *,
117 1.39 jmcneill audio_stream_t *, int);
118 1.1 augustss
119 1.1 augustss struct am7930_glue bba_glue = {
120 1.1 augustss bba_codec_iread,
121 1.1 augustss bba_codec_iwrite,
122 1.1 augustss bba_codec_iread16,
123 1.1 augustss bba_codec_iwrite16,
124 1.1 augustss bba_onopen,
125 1.1 augustss bba_onclose,
126 1.1 augustss 4,
127 1.1 augustss bba_input_conv,
128 1.1 augustss bba_output_conv,
129 1.1 augustss };
130 1.1 augustss
131 1.1 augustss /*
132 1.1 augustss * Define our interface to the higher level audio driver.
133 1.1 augustss */
134 1.1 augustss
135 1.28 thorpej static int bba_round_blocksize(void *, int, int, const audio_params_t *);
136 1.28 thorpej static int bba_halt_output(void *);
137 1.28 thorpej static int bba_halt_input(void *);
138 1.28 thorpej static int bba_getdev(void *, struct audio_device *);
139 1.39 jmcneill static void *bba_allocm(void *, int, size_t);
140 1.39 jmcneill static void bba_freem(void *, void *, size_t);
141 1.28 thorpej static size_t bba_round_buffersize(void *, int, size_t);
142 1.28 thorpej static int bba_get_props(void *);
143 1.28 thorpej static paddr_t bba_mappage(void *, void *, off_t, int);
144 1.28 thorpej static int bba_trigger_output(void *, void *, void *, int,
145 1.28 thorpej void (*)(void *), void *,
146 1.28 thorpej const audio_params_t *);
147 1.28 thorpej static int bba_trigger_input(void *, void *, void *, int,
148 1.28 thorpej void (*)(void *), void *,
149 1.28 thorpej const audio_params_t *);
150 1.39 jmcneill static void bba_get_locks(void *opaque, kmutex_t **intr,
151 1.39 jmcneill kmutex_t **thread);
152 1.1 augustss
153 1.28 thorpej static const struct audio_hw_if sa_hw_if = {
154 1.42 isaki .open = am7930_open,
155 1.42 isaki .close = am7930_close,
156 1.42 isaki .query_encoding = am7930_query_encoding,
157 1.42 isaki .set_params = am7930_set_params,
158 1.42 isaki .round_blocksize = bba_round_blocksize, /* md */
159 1.42 isaki .commit_settings = am7930_commit_settings,
160 1.42 isaki .halt_output = bba_halt_output, /* md */
161 1.42 isaki .halt_input = bba_halt_input, /* md */
162 1.42 isaki .getdev = bba_getdev,
163 1.42 isaki .set_port = am7930_set_port,
164 1.42 isaki .get_port = am7930_get_port,
165 1.42 isaki .query_devinfo = am7930_query_devinfo,
166 1.42 isaki .allocm = bba_allocm, /* md */
167 1.42 isaki .freem = bba_freem, /* md */
168 1.42 isaki .round_buffersize = bba_round_buffersize, /* md */
169 1.42 isaki .mappage = bba_mappage,
170 1.42 isaki .get_props = bba_get_props,
171 1.42 isaki .trigger_output = bba_trigger_output, /* md */
172 1.42 isaki .trigger_input = bba_trigger_input, /* md */
173 1.42 isaki .get_locks = bba_get_locks,
174 1.1 augustss };
175 1.1 augustss
176 1.28 thorpej static struct audio_device bba_device = {
177 1.1 augustss "am7930",
178 1.1 augustss "x",
179 1.1 augustss "bba"
180 1.1 augustss };
181 1.1 augustss
182 1.28 thorpej static int bba_intr(void *);
183 1.28 thorpej static void bba_reset(struct bba_softc *, int);
184 1.37 tsutsui static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t);
185 1.28 thorpej static uint8_t bba_codec_dread(struct am7930_softc *, int);
186 1.24 kent
187 1.28 thorpej static int
188 1.36 cegger bba_match(device_t parent, cfdata_t cf, void *aux)
189 1.1 augustss {
190 1.24 kent struct ioasicdev_attach_args *ia;
191 1.1 augustss
192 1.24 kent ia = aux;
193 1.6 gmcgarry if (strcmp(ia->iada_modname, "isdn") != 0 &&
194 1.6 gmcgarry strcmp(ia->iada_modname, "AMD79c30") != 0)
195 1.6 gmcgarry return 0;
196 1.1 augustss
197 1.1 augustss return 1;
198 1.1 augustss }
199 1.1 augustss
200 1.1 augustss
201 1.28 thorpej static void
202 1.36 cegger bba_attach(device_t parent, device_t self, void *aux)
203 1.24 kent {
204 1.24 kent struct ioasicdev_attach_args *ia;
205 1.24 kent struct bba_softc *sc;
206 1.24 kent struct am7930_softc *asc;
207 1.29 thorpej struct ioasic_softc *iosc = device_private(parent);
208 1.1 augustss
209 1.24 kent ia = aux;
210 1.27 thorpej sc = device_private(self);
211 1.24 kent asc = &sc->sc_am7930;
212 1.38 tsutsui asc->sc_dev = self;
213 1.29 thorpej sc->sc_bst = iosc->sc_bst;
214 1.29 thorpej sc->sc_bsh = iosc->sc_bsh;
215 1.29 thorpej sc->sc_dmat = iosc->sc_dmat;
216 1.1 augustss
217 1.1 augustss /* get the bus space handle for codec */
218 1.1 augustss if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
219 1.6 gmcgarry ia->iada_offset, 0, &sc->sc_codec_bsh)) {
220 1.38 tsutsui aprint_error_dev(self, "unable to map device\n");
221 1.1 augustss return;
222 1.1 augustss }
223 1.1 augustss
224 1.1 augustss printf("\n");
225 1.1 augustss
226 1.1 augustss bba_reset(sc,1);
227 1.1 augustss
228 1.1 augustss /*
229 1.1 augustss * Set up glue for MI code early; we use some of it here.
230 1.1 augustss */
231 1.1 augustss asc->sc_glue = &bba_glue;
232 1.1 augustss
233 1.1 augustss /*
234 1.1 augustss * MI initialisation. We will be doing DMA.
235 1.1 augustss */
236 1.1 augustss am7930_init(asc, AUDIOAMD_DMA_MODE);
237 1.1 augustss
238 1.1 augustss ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
239 1.6 gmcgarry bba_intr, sc);
240 1.1 augustss
241 1.38 tsutsui audio_attach_mi(&sa_hw_if, asc, self);
242 1.1 augustss }
243 1.1 augustss
244 1.1 augustss
245 1.28 thorpej static void
246 1.24 kent bba_onopen(struct am7930_softc *sc)
247 1.1 augustss {
248 1.1 augustss }
249 1.1 augustss
250 1.1 augustss
251 1.28 thorpej static void
252 1.24 kent bba_onclose(struct am7930_softc *sc)
253 1.1 augustss {
254 1.1 augustss }
255 1.1 augustss
256 1.1 augustss
257 1.28 thorpej static void
258 1.24 kent bba_reset(struct bba_softc *sc, int reset)
259 1.1 augustss {
260 1.24 kent uint32_t ssr;
261 1.1 augustss
262 1.1 augustss /* disable any DMA and reset the codec */
263 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
264 1.1 augustss ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
265 1.1 augustss if (reset)
266 1.1 augustss ssr &= ~IOASIC_CSR_ISDN_ENABLE;
267 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
268 1.1 augustss DELAY(10); /* 400ns required for codec to reset */
269 1.1 augustss
270 1.1 augustss /* initialise DMA pointers */
271 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
272 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
273 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
274 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
275 1.1 augustss
276 1.1 augustss /* take out of reset state */
277 1.1 augustss if (reset) {
278 1.1 augustss ssr |= IOASIC_CSR_ISDN_ENABLE;
279 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
280 1.1 augustss }
281 1.1 augustss
282 1.1 augustss }
283 1.1 augustss
284 1.1 augustss
285 1.28 thorpej static void *
286 1.39 jmcneill bba_allocm(void *addr, int direction, size_t size)
287 1.1 augustss {
288 1.24 kent struct am7930_softc *asc;
289 1.24 kent struct bba_softc *sc;
290 1.1 augustss bus_dma_segment_t seg;
291 1.1 augustss int rseg;
292 1.31 christos void *kva;
293 1.1 augustss struct bba_mem *m;
294 1.24 kent int state;
295 1.1 augustss
296 1.26 kleink DPRINTF(("bba_allocm: size = %zu\n", size));
297 1.24 kent asc = addr;
298 1.24 kent sc = addr;
299 1.24 kent state = 0;
300 1.6 gmcgarry
301 1.6 gmcgarry if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN,
302 1.39 jmcneill BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) {
303 1.38 tsutsui aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n");
304 1.1 augustss goto bad;
305 1.1 augustss }
306 1.1 augustss state |= 1;
307 1.1 augustss
308 1.1 augustss if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
309 1.39 jmcneill &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) {
310 1.38 tsutsui aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n");
311 1.1 augustss goto bad;
312 1.1 augustss }
313 1.1 augustss state |= 2;
314 1.1 augustss
315 1.39 jmcneill m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP);
316 1.1 augustss m->addr = seg.ds_addr;
317 1.1 augustss m->size = seg.ds_len;
318 1.24 kent m->kva = kva;
319 1.24 kent m->next = sc->sc_mem_head;
320 1.24 kent sc->sc_mem_head = m;
321 1.1 augustss
322 1.24 kent return (void *)kva;
323 1.1 augustss
324 1.1 augustss bad:
325 1.1 augustss if (state & 2)
326 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, size);
327 1.1 augustss if (state & 1)
328 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
329 1.1 augustss return NULL;
330 1.1 augustss }
331 1.1 augustss
332 1.1 augustss
333 1.28 thorpej static void
334 1.39 jmcneill bba_freem(void *addr, void *ptr, size_t size)
335 1.1 augustss {
336 1.24 kent struct bba_softc *sc;
337 1.24 kent struct bba_mem **mp, *m;
338 1.1 augustss bus_dma_segment_t seg;
339 1.31 christos void *kva;
340 1.1 augustss
341 1.24 kent sc = addr;
342 1.31 christos kva = (void *)addr;
343 1.1 augustss for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
344 1.6 gmcgarry mp = &(*mp)->next)
345 1.24 kent continue;
346 1.1 augustss m = *mp;
347 1.6 gmcgarry if (m == NULL) {
348 1.6 gmcgarry printf("bba_freem: freeing unallocated memory\n");
349 1.1 augustss return;
350 1.1 augustss }
351 1.1 augustss *mp = m->next;
352 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
353 1.1 augustss
354 1.24 kent seg.ds_addr = m->addr;
355 1.24 kent seg.ds_len = m->size;
356 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
357 1.39 jmcneill kmem_free(m, sizeof(struct bba_mem));
358 1.1 augustss }
359 1.1 augustss
360 1.1 augustss
361 1.28 thorpej static size_t
362 1.24 kent bba_round_buffersize(void *addr, int direction, size_t size)
363 1.1 augustss {
364 1.24 kent
365 1.26 kleink DPRINTF(("bba_round_buffersize: size=%zu\n", size));
366 1.24 kent return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE :
367 1.24 kent roundup(size, IOASIC_DMA_BLOCKSIZE);
368 1.1 augustss }
369 1.1 augustss
370 1.1 augustss
371 1.28 thorpej static int
372 1.24 kent bba_halt_output(void *addr)
373 1.1 augustss {
374 1.24 kent struct bba_softc *sc;
375 1.24 kent struct bba_dma_state *d;
376 1.24 kent uint32_t ssr;
377 1.1 augustss
378 1.24 kent sc = addr;
379 1.24 kent d = &sc->sc_tx_dma_state;
380 1.1 augustss /* disable any DMA */
381 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
382 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
383 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
384 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
385 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
386 1.1 augustss
387 1.1 augustss if (d->active) {
388 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
389 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
390 1.1 augustss d->active = 0;
391 1.1 augustss }
392 1.1 augustss
393 1.1 augustss return 0;
394 1.1 augustss }
395 1.1 augustss
396 1.1 augustss
397 1.28 thorpej static int
398 1.24 kent bba_halt_input(void *addr)
399 1.1 augustss {
400 1.24 kent struct bba_softc *sc;
401 1.24 kent struct bba_dma_state *d;
402 1.24 kent uint32_t ssr;
403 1.1 augustss
404 1.24 kent sc = addr;
405 1.24 kent d = &sc->sc_rx_dma_state;
406 1.1 augustss /* disable any DMA */
407 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
408 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
409 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
410 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
411 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
412 1.1 augustss
413 1.1 augustss if (d->active) {
414 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
415 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
416 1.1 augustss d->active = 0;
417 1.1 augustss }
418 1.1 augustss
419 1.1 augustss return 0;
420 1.1 augustss }
421 1.1 augustss
422 1.1 augustss
423 1.28 thorpej static int
424 1.24 kent bba_getdev(void *addr, struct audio_device *retp)
425 1.1 augustss {
426 1.24 kent
427 1.1 augustss *retp = bba_device;
428 1.1 augustss return 0;
429 1.1 augustss }
430 1.1 augustss
431 1.1 augustss
432 1.28 thorpej static int
433 1.24 kent bba_trigger_output(void *addr, void *start, void *end, int blksize,
434 1.24 kent void (*intr)(void *), void *arg,
435 1.24 kent const audio_params_t *param)
436 1.1 augustss {
437 1.24 kent struct bba_softc *sc;
438 1.24 kent struct bba_dma_state *d;
439 1.24 kent uint32_t ssr;
440 1.23 kent tc_addr_t phys, nphys;
441 1.24 kent int state;
442 1.1 augustss
443 1.1 augustss DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
444 1.6 gmcgarry addr, start, end, blksize, intr, arg));
445 1.24 kent sc = addr;
446 1.24 kent d = &sc->sc_tx_dma_state;
447 1.24 kent state = 0;
448 1.6 gmcgarry
449 1.6 gmcgarry /* disable any DMA */
450 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
451 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
452 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
453 1.1 augustss
454 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
455 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
456 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
457 1.1 augustss printf("bba_trigger_output: can't create DMA map\n");
458 1.1 augustss goto bad;
459 1.1 augustss }
460 1.1 augustss state |= 1;
461 1.1 augustss
462 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
463 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) {
464 1.6 gmcgarry printf("bba_trigger_output: can't load DMA map\n");
465 1.1 augustss goto bad;
466 1.1 augustss }
467 1.1 augustss state |= 2;
468 1.1 augustss
469 1.1 augustss d->intr = intr;
470 1.1 augustss d->intr_arg = arg;
471 1.1 augustss d->curseg = 1;
472 1.1 augustss
473 1.1 augustss /* get physical address of buffer start */
474 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
475 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
476 1.1 augustss
477 1.1 augustss /* setup DMA pointer */
478 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
479 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
480 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
481 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
482 1.1 augustss
483 1.1 augustss /* kick off DMA */
484 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_T;
485 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
486 1.1 augustss
487 1.1 augustss d->active = 1;
488 1.1 augustss
489 1.1 augustss return 0;
490 1.1 augustss
491 1.1 augustss bad:
492 1.1 augustss if (state & 2)
493 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
494 1.1 augustss if (state & 1)
495 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
496 1.1 augustss return 1;
497 1.1 augustss }
498 1.1 augustss
499 1.1 augustss
500 1.28 thorpej static int
501 1.24 kent bba_trigger_input(void *addr, void *start, void *end, int blksize,
502 1.24 kent void (*intr)(void *), void *arg, const audio_params_t *param)
503 1.1 augustss {
504 1.24 kent struct bba_softc *sc;
505 1.24 kent struct bba_dma_state *d;
506 1.23 kent tc_addr_t phys, nphys;
507 1.37 tsutsui uint32_t ssr;
508 1.1 augustss int state = 0;
509 1.1 augustss
510 1.1 augustss DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
511 1.6 gmcgarry addr, start, end, blksize, intr, arg));
512 1.38 tsutsui sc = addr;
513 1.24 kent d = &sc->sc_rx_dma_state;
514 1.24 kent state = 0;
515 1.6 gmcgarry
516 1.6 gmcgarry /* disable any DMA */
517 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
518 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
519 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
520 1.1 augustss
521 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
522 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
523 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
524 1.1 augustss printf("bba_trigger_input: can't create DMA map\n");
525 1.1 augustss goto bad;
526 1.1 augustss }
527 1.1 augustss state |= 1;
528 1.1 augustss
529 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
530 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) {
531 1.1 augustss printf("bba_trigger_input: can't load DMA map\n");
532 1.1 augustss goto bad;
533 1.1 augustss }
534 1.1 augustss state |= 2;
535 1.1 augustss
536 1.1 augustss d->intr = intr;
537 1.1 augustss d->intr_arg = arg;
538 1.1 augustss d->curseg = 1;
539 1.1 augustss
540 1.1 augustss /* get physical address of buffer start */
541 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
542 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
543 1.1 augustss
544 1.1 augustss /* setup DMA pointer */
545 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
546 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
547 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
548 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
549 1.1 augustss
550 1.1 augustss /* kick off DMA */
551 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_R;
552 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
553 1.1 augustss
554 1.1 augustss d->active = 1;
555 1.1 augustss
556 1.1 augustss return 0;
557 1.1 augustss
558 1.1 augustss bad:
559 1.1 augustss if (state & 2)
560 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
561 1.1 augustss if (state & 1)
562 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
563 1.1 augustss return 1;
564 1.1 augustss }
565 1.1 augustss
566 1.39 jmcneill static void
567 1.39 jmcneill bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread)
568 1.39 jmcneill {
569 1.39 jmcneill struct bba_softc *bsc = opaque;
570 1.39 jmcneill struct am7930_softc *sc = &bsc->sc_am7930;
571 1.39 jmcneill
572 1.39 jmcneill *intr = &sc->sc_intr_lock;
573 1.39 jmcneill *thread = &sc->sc_lock;
574 1.39 jmcneill }
575 1.39 jmcneill
576 1.28 thorpej static int
577 1.24 kent bba_intr(void *addr)
578 1.1 augustss {
579 1.24 kent struct bba_softc *sc;
580 1.1 augustss struct bba_dma_state *d;
581 1.1 augustss tc_addr_t nphys;
582 1.39 jmcneill int mask;
583 1.1 augustss
584 1.24 kent sc = addr;
585 1.39 jmcneill mutex_enter(&sc->sc_am7930.sc_intr_lock);
586 1.1 augustss
587 1.1 augustss mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
588 1.1 augustss
589 1.1 augustss if (mask & IOASIC_INTR_ISDN_TXLOAD) {
590 1.1 augustss d = &sc->sc_tx_dma_state;
591 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
592 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
593 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
594 1.6 gmcgarry IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
595 1.1 augustss if (d->intr != NULL)
596 1.1 augustss (*d->intr)(d->intr_arg);
597 1.1 augustss }
598 1.1 augustss if (mask & IOASIC_INTR_ISDN_RXLOAD) {
599 1.1 augustss d = &sc->sc_rx_dma_state;
600 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
601 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
602 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
603 1.6 gmcgarry IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
604 1.1 augustss if (d->intr != NULL)
605 1.1 augustss (*d->intr)(d->intr_arg);
606 1.1 augustss }
607 1.1 augustss
608 1.39 jmcneill mutex_exit(&sc->sc_am7930.sc_intr_lock);
609 1.1 augustss
610 1.1 augustss return 0;
611 1.6 gmcgarry }
612 1.6 gmcgarry
613 1.28 thorpej static int
614 1.24 kent bba_get_props(void *addr)
615 1.6 gmcgarry {
616 1.24 kent
617 1.24 kent return AUDIO_PROP_MMAP | am7930_get_props(addr);
618 1.6 gmcgarry }
619 1.6 gmcgarry
620 1.28 thorpej static paddr_t
621 1.24 kent bba_mappage(void *addr, void *mem, off_t offset, int prot)
622 1.6 gmcgarry {
623 1.24 kent struct bba_softc *sc;
624 1.24 kent struct bba_mem **mp;
625 1.6 gmcgarry bus_dma_segment_t seg;
626 1.31 christos void *kva;
627 1.6 gmcgarry
628 1.24 kent sc = addr;
629 1.31 christos kva = (void *)mem;
630 1.6 gmcgarry for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
631 1.6 gmcgarry mp = &(*mp)->next)
632 1.24 kent continue;
633 1.6 gmcgarry if (*mp == NULL || offset < 0) {
634 1.6 gmcgarry return -1;
635 1.6 gmcgarry }
636 1.6 gmcgarry
637 1.24 kent seg.ds_addr = (*mp)->addr;
638 1.24 kent seg.ds_len = (*mp)->size;
639 1.6 gmcgarry
640 1.24 kent return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset,
641 1.6 gmcgarry prot, BUS_DMA_WAITOK);
642 1.1 augustss }
643 1.1 augustss
644 1.23 kent static stream_filter_t *
645 1.23 kent bba_input_conv(struct audio_softc *sc, const audio_params_t *from,
646 1.23 kent const audio_params_t *to)
647 1.23 kent {
648 1.23 kent return auconv_nocontext_filter_factory(bba_input_conv_fetch_to);
649 1.23 kent }
650 1.23 kent
651 1.23 kent static int
652 1.39 jmcneill bba_input_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self,
653 1.39 jmcneill audio_stream_t *dst, int max_used)
654 1.23 kent {
655 1.23 kent stream_filter_t *this;
656 1.23 kent int m, err;
657 1.23 kent
658 1.23 kent this = (stream_filter_t *)self;
659 1.39 jmcneill if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used * 4)))
660 1.23 kent return err;
661 1.23 kent m = dst->end - dst->start;
662 1.41 riastrad m = uimin(m, max_used);
663 1.23 kent FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) {
664 1.25 drochner *d = ((*(const uint32_t *)s) >> 16) & 0xff;
665 1.23 kent } FILTER_LOOP_EPILOGUE(this->src, dst);
666 1.23 kent return 0;
667 1.1 augustss }
668 1.1 augustss
669 1.23 kent static stream_filter_t *
670 1.23 kent bba_output_conv(struct audio_softc *sc, const audio_params_t *from,
671 1.23 kent const audio_params_t *to)
672 1.23 kent {
673 1.23 kent return auconv_nocontext_filter_factory(bba_output_conv_fetch_to);
674 1.23 kent }
675 1.23 kent
676 1.23 kent static int
677 1.39 jmcneill bba_output_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self,
678 1.39 jmcneill audio_stream_t *dst, int max_used)
679 1.23 kent {
680 1.23 kent stream_filter_t *this;
681 1.23 kent int m, err;
682 1.23 kent
683 1.23 kent this = (stream_filter_t *)self;
684 1.23 kent max_used = (max_used + 3) & ~3;
685 1.39 jmcneill if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used / 4)))
686 1.23 kent return err;
687 1.23 kent m = (dst->end - dst->start) & ~3;
688 1.41 riastrad m = uimin(m, max_used);
689 1.23 kent FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) {
690 1.23 kent *(uint32_t *)d = (*s << 16);
691 1.23 kent } FILTER_LOOP_EPILOGUE(this->src, dst);
692 1.23 kent return 0;
693 1.1 augustss }
694 1.1 augustss
695 1.28 thorpej static int
696 1.24 kent bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param)
697 1.1 augustss {
698 1.24 kent
699 1.24 kent return IOASIC_DMA_BLOCKSIZE;
700 1.1 augustss }
701 1.1 augustss
702 1.1 augustss
703 1.1 augustss /* indirect write */
704 1.28 thorpej static void
705 1.24 kent bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val)
706 1.1 augustss {
707 1.1 augustss
708 1.24 kent DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
709 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
710 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
711 1.1 augustss }
712 1.1 augustss
713 1.1 augustss
714 1.28 thorpej static void
715 1.24 kent bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val)
716 1.1 augustss {
717 1.1 augustss
718 1.24 kent DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
719 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
720 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
721 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
722 1.1 augustss }
723 1.1 augustss
724 1.1 augustss
725 1.28 thorpej static uint16_t
726 1.24 kent bba_codec_iread16(struct am7930_softc *sc, int reg)
727 1.1 augustss {
728 1.24 kent uint16_t val;
729 1.1 augustss
730 1.24 kent DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg));
731 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
732 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
733 1.1 augustss val |= bba_codec_dread(sc, AM7930_DREG_DR);
734 1.1 augustss
735 1.1 augustss return val;
736 1.1 augustss }
737 1.1 augustss
738 1.1 augustss
739 1.1 augustss /* indirect read */
740 1.28 thorpej static uint8_t
741 1.24 kent bba_codec_iread(struct am7930_softc *sc, int reg)
742 1.1 augustss {
743 1.24 kent uint8_t val;
744 1.1 augustss
745 1.24 kent DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg));
746 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
747 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR);
748 1.1 augustss
749 1.1 augustss DPRINTF(("read 0x%x (%d)\n", val, val));
750 1.1 augustss
751 1.1 augustss return val;
752 1.1 augustss }
753 1.1 augustss
754 1.1 augustss /* direct write */
755 1.28 thorpej static void
756 1.24 kent bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val)
757 1.1 augustss {
758 1.24 kent struct bba_softc *sc;
759 1.1 augustss
760 1.24 kent sc = (struct bba_softc *)asc;
761 1.24 kent DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
762 1.1 augustss
763 1.9 thorpej #if defined(__alpha__)
764 1.5 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
765 1.9 thorpej reg << 2, val << 8);
766 1.9 thorpej #else
767 1.9 thorpej bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
768 1.9 thorpej reg << 6, val);
769 1.9 thorpej #endif
770 1.1 augustss }
771 1.1 augustss
772 1.1 augustss /* direct read */
773 1.28 thorpej static uint8_t
774 1.24 kent bba_codec_dread(struct am7930_softc *asc, int reg)
775 1.1 augustss {
776 1.24 kent struct bba_softc *sc;
777 1.1 augustss
778 1.24 kent sc = (struct bba_softc *)asc;
779 1.24 kent DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg));
780 1.1 augustss
781 1.9 thorpej #if defined(__alpha__)
782 1.9 thorpej return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
783 1.9 thorpej reg << 2) >> 8) & 0xff);
784 1.9 thorpej #else
785 1.9 thorpej return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
786 1.9 thorpej reg << 6) & 0xff);
787 1.9 thorpej #endif
788 1.1 augustss }
789