bba.c revision 1.45 1 1.45 isaki /* $NetBSD: bba.c,v 1.45 2020/08/29 03:24:31 isaki Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * Redistribution and use in source and binary forms, with or without
8 1.1 augustss * modification, are permitted provided that the following conditions
9 1.1 augustss * are met:
10 1.1 augustss * 1. Redistributions of source code must retain the above copyright
11 1.1 augustss * notice, this list of conditions and the following disclaimer.
12 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 augustss * notice, this list of conditions and the following disclaimer in the
14 1.1 augustss * documentation and/or other materials provided with the distribution.
15 1.1 augustss *
16 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
27 1.1 augustss */
28 1.1 augustss
29 1.1 augustss /* maxine/alpha baseboard audio (bba) */
30 1.15 lukem
31 1.15 lukem #include <sys/cdefs.h>
32 1.45 isaki __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.45 2020/08/29 03:24:31 isaki Exp $");
33 1.1 augustss
34 1.1 augustss #include <sys/param.h>
35 1.1 augustss #include <sys/systm.h>
36 1.1 augustss #include <sys/kernel.h>
37 1.1 augustss #include <sys/device.h>
38 1.39 jmcneill #include <sys/kmem.h>
39 1.1 augustss
40 1.32 ad #include <sys/bus.h>
41 1.1 augustss #include <machine/autoconf.h>
42 1.32 ad #include <sys/cpu.h>
43 1.1 augustss
44 1.1 augustss #include <sys/audioio.h>
45 1.43 isaki #include <dev/audio/audio_if.h>
46 1.1 augustss
47 1.1 augustss #include <dev/ic/am7930reg.h>
48 1.1 augustss #include <dev/ic/am7930var.h>
49 1.1 augustss
50 1.1 augustss #include <dev/tc/tcvar.h>
51 1.1 augustss #include <dev/tc/ioasicreg.h>
52 1.1 augustss #include <dev/tc/ioasicvar.h>
53 1.1 augustss
54 1.43 isaki /* include mulaw.c (not .h file) here to expand mulaw32 */
55 1.43 isaki void audio_mulaw32_to_internal(audio_filter_arg_t *);
56 1.43 isaki void audio_internal_to_mulaw32(audio_filter_arg_t *);
57 1.43 isaki #define MULAW32
58 1.43 isaki #include <dev/audio/mulaw.c>
59 1.43 isaki
60 1.1 augustss #ifdef AUDIO_DEBUG
61 1.1 augustss #define DPRINTF(x) if (am7930debug) printf x
62 1.1 augustss #else
63 1.1 augustss #define DPRINTF(x)
64 1.1 augustss #endif /* AUDIO_DEBUG */
65 1.1 augustss
66 1.1 augustss #define BBA_MAX_DMA_SEGMENTS 16
67 1.9 thorpej #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE)
68 1.9 thorpej #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE
69 1.6 gmcgarry #define BBA_DMABUF_BOUNDARY 0
70 1.1 augustss
71 1.1 augustss struct bba_mem {
72 1.24 kent struct bba_mem *next;
73 1.1 augustss bus_addr_t addr;
74 1.1 augustss bus_size_t size;
75 1.31 christos void *kva;
76 1.1 augustss };
77 1.1 augustss
78 1.1 augustss struct bba_dma_state {
79 1.20 wiz bus_dmamap_t dmam; /* DMA map */
80 1.1 augustss int active;
81 1.20 wiz int curseg; /* current segment in DMA buffer */
82 1.24 kent void (*intr)(void *); /* higher-level audio handler */
83 1.1 augustss void *intr_arg;
84 1.1 augustss };
85 1.1 augustss
86 1.1 augustss struct bba_softc {
87 1.1 augustss struct am7930_softc sc_am7930; /* glue to MI code */
88 1.1 augustss
89 1.1 augustss bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */
90 1.1 augustss bus_space_handle_t sc_bsh;
91 1.1 augustss bus_dma_tag_t sc_dmat;
92 1.1 augustss bus_space_handle_t sc_codec_bsh; /* codec bus space handle */
93 1.1 augustss
94 1.1 augustss struct bba_mem *sc_mem_head; /* list of buffers */
95 1.1 augustss
96 1.1 augustss struct bba_dma_state sc_tx_dma_state;
97 1.1 augustss struct bba_dma_state sc_rx_dma_state;
98 1.1 augustss };
99 1.1 augustss
100 1.36 cegger static int bba_match(device_t, cfdata_t, void *);
101 1.36 cegger static void bba_attach(device_t, device_t, void *);
102 1.1 augustss
103 1.38 tsutsui CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc),
104 1.18 thorpej bba_match, bba_attach, NULL, NULL);
105 1.1 augustss
106 1.1 augustss /*
107 1.1 augustss * Define our interface into the am7930 MI driver.
108 1.1 augustss */
109 1.1 augustss
110 1.30 he static uint8_t bba_codec_iread(struct am7930_softc *, int);
111 1.28 thorpej static uint16_t bba_codec_iread16(struct am7930_softc *, int);
112 1.28 thorpej static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t);
113 1.28 thorpej static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t);
114 1.28 thorpej static void bba_onopen(struct am7930_softc *);
115 1.28 thorpej static void bba_onclose(struct am7930_softc *);
116 1.28 thorpej
117 1.1 augustss struct am7930_glue bba_glue = {
118 1.1 augustss bba_codec_iread,
119 1.1 augustss bba_codec_iwrite,
120 1.1 augustss bba_codec_iread16,
121 1.1 augustss bba_codec_iwrite16,
122 1.1 augustss bba_onopen,
123 1.1 augustss bba_onclose,
124 1.1 augustss };
125 1.1 augustss
126 1.1 augustss /*
127 1.1 augustss * Define our interface to the higher level audio driver.
128 1.1 augustss */
129 1.1 augustss
130 1.43 isaki static int bba_query_format(void *, audio_format_query_t *);
131 1.43 isaki static int bba_set_format(void *, int,
132 1.43 isaki const audio_params_t *, const audio_params_t *,
133 1.43 isaki audio_filter_reg_t *, audio_filter_reg_t *);
134 1.28 thorpej static int bba_round_blocksize(void *, int, int, const audio_params_t *);
135 1.28 thorpej static int bba_halt_output(void *);
136 1.28 thorpej static int bba_halt_input(void *);
137 1.28 thorpej static int bba_getdev(void *, struct audio_device *);
138 1.39 jmcneill static void *bba_allocm(void *, int, size_t);
139 1.39 jmcneill static void bba_freem(void *, void *, size_t);
140 1.28 thorpej static size_t bba_round_buffersize(void *, int, size_t);
141 1.28 thorpej static int bba_trigger_output(void *, void *, void *, int,
142 1.28 thorpej void (*)(void *), void *,
143 1.28 thorpej const audio_params_t *);
144 1.28 thorpej static int bba_trigger_input(void *, void *, void *, int,
145 1.28 thorpej void (*)(void *), void *,
146 1.28 thorpej const audio_params_t *);
147 1.39 jmcneill static void bba_get_locks(void *opaque, kmutex_t **intr,
148 1.39 jmcneill kmutex_t **thread);
149 1.1 augustss
150 1.28 thorpej static const struct audio_hw_if sa_hw_if = {
151 1.42 isaki .open = am7930_open,
152 1.42 isaki .close = am7930_close,
153 1.43 isaki .query_format = bba_query_format,
154 1.43 isaki .set_format = bba_set_format,
155 1.42 isaki .round_blocksize = bba_round_blocksize, /* md */
156 1.42 isaki .commit_settings = am7930_commit_settings,
157 1.42 isaki .halt_output = bba_halt_output, /* md */
158 1.42 isaki .halt_input = bba_halt_input, /* md */
159 1.42 isaki .getdev = bba_getdev,
160 1.42 isaki .set_port = am7930_set_port,
161 1.42 isaki .get_port = am7930_get_port,
162 1.42 isaki .query_devinfo = am7930_query_devinfo,
163 1.42 isaki .allocm = bba_allocm, /* md */
164 1.42 isaki .freem = bba_freem, /* md */
165 1.42 isaki .round_buffersize = bba_round_buffersize, /* md */
166 1.44 isaki .get_props = am7930_get_props,
167 1.42 isaki .trigger_output = bba_trigger_output, /* md */
168 1.42 isaki .trigger_input = bba_trigger_input, /* md */
169 1.42 isaki .get_locks = bba_get_locks,
170 1.1 augustss };
171 1.1 augustss
172 1.28 thorpej static struct audio_device bba_device = {
173 1.1 augustss "am7930",
174 1.1 augustss "x",
175 1.1 augustss "bba"
176 1.1 augustss };
177 1.1 augustss
178 1.43 isaki static const struct audio_format bba_format = {
179 1.43 isaki .mode = AUMODE_PLAY | AUMODE_RECORD,
180 1.43 isaki .encoding = AUDIO_ENCODING_ULAW, /* XXX */
181 1.43 isaki .validbits = 32,
182 1.43 isaki .precision = 32,
183 1.43 isaki .channels = 1,
184 1.43 isaki .channel_mask = AUFMT_MONAURAL,
185 1.43 isaki .frequency_type = 1,
186 1.43 isaki .frequency = { 8000 },
187 1.43 isaki };
188 1.43 isaki
189 1.28 thorpej static int bba_intr(void *);
190 1.28 thorpej static void bba_reset(struct bba_softc *, int);
191 1.37 tsutsui static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t);
192 1.28 thorpej static uint8_t bba_codec_dread(struct am7930_softc *, int);
193 1.24 kent
194 1.28 thorpej static int
195 1.36 cegger bba_match(device_t parent, cfdata_t cf, void *aux)
196 1.1 augustss {
197 1.24 kent struct ioasicdev_attach_args *ia;
198 1.1 augustss
199 1.24 kent ia = aux;
200 1.6 gmcgarry if (strcmp(ia->iada_modname, "isdn") != 0 &&
201 1.6 gmcgarry strcmp(ia->iada_modname, "AMD79c30") != 0)
202 1.6 gmcgarry return 0;
203 1.1 augustss
204 1.1 augustss return 1;
205 1.1 augustss }
206 1.1 augustss
207 1.1 augustss
208 1.28 thorpej static void
209 1.36 cegger bba_attach(device_t parent, device_t self, void *aux)
210 1.24 kent {
211 1.24 kent struct ioasicdev_attach_args *ia;
212 1.24 kent struct bba_softc *sc;
213 1.24 kent struct am7930_softc *asc;
214 1.29 thorpej struct ioasic_softc *iosc = device_private(parent);
215 1.1 augustss
216 1.24 kent ia = aux;
217 1.27 thorpej sc = device_private(self);
218 1.24 kent asc = &sc->sc_am7930;
219 1.38 tsutsui asc->sc_dev = self;
220 1.29 thorpej sc->sc_bst = iosc->sc_bst;
221 1.29 thorpej sc->sc_bsh = iosc->sc_bsh;
222 1.29 thorpej sc->sc_dmat = iosc->sc_dmat;
223 1.1 augustss
224 1.1 augustss /* get the bus space handle for codec */
225 1.1 augustss if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
226 1.6 gmcgarry ia->iada_offset, 0, &sc->sc_codec_bsh)) {
227 1.38 tsutsui aprint_error_dev(self, "unable to map device\n");
228 1.1 augustss return;
229 1.1 augustss }
230 1.1 augustss
231 1.1 augustss printf("\n");
232 1.1 augustss
233 1.45 isaki bba_reset(sc, 1);
234 1.1 augustss
235 1.1 augustss /*
236 1.1 augustss * Set up glue for MI code early; we use some of it here.
237 1.1 augustss */
238 1.1 augustss asc->sc_glue = &bba_glue;
239 1.1 augustss
240 1.1 augustss /*
241 1.1 augustss * MI initialisation. We will be doing DMA.
242 1.1 augustss */
243 1.1 augustss am7930_init(asc, AUDIOAMD_DMA_MODE);
244 1.1 augustss
245 1.1 augustss ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
246 1.6 gmcgarry bba_intr, sc);
247 1.1 augustss
248 1.38 tsutsui audio_attach_mi(&sa_hw_if, asc, self);
249 1.1 augustss }
250 1.1 augustss
251 1.1 augustss
252 1.28 thorpej static void
253 1.24 kent bba_onopen(struct am7930_softc *sc)
254 1.1 augustss {
255 1.1 augustss }
256 1.1 augustss
257 1.1 augustss
258 1.28 thorpej static void
259 1.24 kent bba_onclose(struct am7930_softc *sc)
260 1.1 augustss {
261 1.1 augustss }
262 1.1 augustss
263 1.1 augustss
264 1.28 thorpej static void
265 1.24 kent bba_reset(struct bba_softc *sc, int reset)
266 1.1 augustss {
267 1.24 kent uint32_t ssr;
268 1.1 augustss
269 1.1 augustss /* disable any DMA and reset the codec */
270 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
271 1.1 augustss ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
272 1.1 augustss if (reset)
273 1.1 augustss ssr &= ~IOASIC_CSR_ISDN_ENABLE;
274 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
275 1.1 augustss DELAY(10); /* 400ns required for codec to reset */
276 1.1 augustss
277 1.1 augustss /* initialise DMA pointers */
278 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
279 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
280 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
281 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
282 1.1 augustss
283 1.1 augustss /* take out of reset state */
284 1.1 augustss if (reset) {
285 1.1 augustss ssr |= IOASIC_CSR_ISDN_ENABLE;
286 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
287 1.1 augustss }
288 1.1 augustss }
289 1.1 augustss
290 1.1 augustss
291 1.28 thorpej static void *
292 1.39 jmcneill bba_allocm(void *addr, int direction, size_t size)
293 1.1 augustss {
294 1.24 kent struct am7930_softc *asc;
295 1.24 kent struct bba_softc *sc;
296 1.1 augustss bus_dma_segment_t seg;
297 1.1 augustss int rseg;
298 1.31 christos void *kva;
299 1.1 augustss struct bba_mem *m;
300 1.24 kent int state;
301 1.1 augustss
302 1.26 kleink DPRINTF(("bba_allocm: size = %zu\n", size));
303 1.24 kent asc = addr;
304 1.24 kent sc = addr;
305 1.24 kent state = 0;
306 1.6 gmcgarry
307 1.6 gmcgarry if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN,
308 1.39 jmcneill BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) {
309 1.38 tsutsui aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n");
310 1.1 augustss goto bad;
311 1.1 augustss }
312 1.1 augustss state |= 1;
313 1.1 augustss
314 1.1 augustss if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
315 1.39 jmcneill &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) {
316 1.38 tsutsui aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n");
317 1.1 augustss goto bad;
318 1.1 augustss }
319 1.1 augustss state |= 2;
320 1.1 augustss
321 1.39 jmcneill m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP);
322 1.1 augustss m->addr = seg.ds_addr;
323 1.1 augustss m->size = seg.ds_len;
324 1.24 kent m->kva = kva;
325 1.24 kent m->next = sc->sc_mem_head;
326 1.24 kent sc->sc_mem_head = m;
327 1.1 augustss
328 1.24 kent return (void *)kva;
329 1.1 augustss
330 1.1 augustss bad:
331 1.1 augustss if (state & 2)
332 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, size);
333 1.1 augustss if (state & 1)
334 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
335 1.1 augustss return NULL;
336 1.1 augustss }
337 1.1 augustss
338 1.1 augustss
339 1.28 thorpej static void
340 1.39 jmcneill bba_freem(void *addr, void *ptr, size_t size)
341 1.1 augustss {
342 1.24 kent struct bba_softc *sc;
343 1.24 kent struct bba_mem **mp, *m;
344 1.1 augustss bus_dma_segment_t seg;
345 1.31 christos void *kva;
346 1.1 augustss
347 1.24 kent sc = addr;
348 1.31 christos kva = (void *)addr;
349 1.1 augustss for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
350 1.6 gmcgarry mp = &(*mp)->next)
351 1.24 kent continue;
352 1.1 augustss m = *mp;
353 1.6 gmcgarry if (m == NULL) {
354 1.6 gmcgarry printf("bba_freem: freeing unallocated memory\n");
355 1.1 augustss return;
356 1.1 augustss }
357 1.1 augustss *mp = m->next;
358 1.1 augustss bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
359 1.1 augustss
360 1.24 kent seg.ds_addr = m->addr;
361 1.24 kent seg.ds_len = m->size;
362 1.1 augustss bus_dmamem_free(sc->sc_dmat, &seg, 1);
363 1.39 jmcneill kmem_free(m, sizeof(struct bba_mem));
364 1.1 augustss }
365 1.1 augustss
366 1.1 augustss
367 1.28 thorpej static size_t
368 1.24 kent bba_round_buffersize(void *addr, int direction, size_t size)
369 1.1 augustss {
370 1.24 kent
371 1.26 kleink DPRINTF(("bba_round_buffersize: size=%zu\n", size));
372 1.24 kent return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE :
373 1.24 kent roundup(size, IOASIC_DMA_BLOCKSIZE);
374 1.1 augustss }
375 1.1 augustss
376 1.1 augustss
377 1.28 thorpej static int
378 1.24 kent bba_halt_output(void *addr)
379 1.1 augustss {
380 1.24 kent struct bba_softc *sc;
381 1.24 kent struct bba_dma_state *d;
382 1.24 kent uint32_t ssr;
383 1.1 augustss
384 1.24 kent sc = addr;
385 1.24 kent d = &sc->sc_tx_dma_state;
386 1.1 augustss /* disable any DMA */
387 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
388 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
389 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
390 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
391 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
392 1.1 augustss
393 1.1 augustss if (d->active) {
394 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
395 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
396 1.1 augustss d->active = 0;
397 1.1 augustss }
398 1.1 augustss
399 1.1 augustss return 0;
400 1.1 augustss }
401 1.1 augustss
402 1.1 augustss
403 1.28 thorpej static int
404 1.24 kent bba_halt_input(void *addr)
405 1.1 augustss {
406 1.24 kent struct bba_softc *sc;
407 1.24 kent struct bba_dma_state *d;
408 1.24 kent uint32_t ssr;
409 1.1 augustss
410 1.24 kent sc = addr;
411 1.24 kent d = &sc->sc_rx_dma_state;
412 1.1 augustss /* disable any DMA */
413 1.1 augustss ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
414 1.1 augustss ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
415 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
416 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
417 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
418 1.1 augustss
419 1.1 augustss if (d->active) {
420 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
421 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
422 1.1 augustss d->active = 0;
423 1.1 augustss }
424 1.1 augustss
425 1.1 augustss return 0;
426 1.1 augustss }
427 1.1 augustss
428 1.1 augustss
429 1.28 thorpej static int
430 1.24 kent bba_getdev(void *addr, struct audio_device *retp)
431 1.1 augustss {
432 1.24 kent
433 1.1 augustss *retp = bba_device;
434 1.1 augustss return 0;
435 1.1 augustss }
436 1.1 augustss
437 1.1 augustss
438 1.28 thorpej static int
439 1.24 kent bba_trigger_output(void *addr, void *start, void *end, int blksize,
440 1.24 kent void (*intr)(void *), void *arg,
441 1.24 kent const audio_params_t *param)
442 1.1 augustss {
443 1.24 kent struct bba_softc *sc;
444 1.24 kent struct bba_dma_state *d;
445 1.24 kent uint32_t ssr;
446 1.23 kent tc_addr_t phys, nphys;
447 1.24 kent int state;
448 1.1 augustss
449 1.1 augustss DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
450 1.6 gmcgarry addr, start, end, blksize, intr, arg));
451 1.24 kent sc = addr;
452 1.24 kent d = &sc->sc_tx_dma_state;
453 1.24 kent state = 0;
454 1.6 gmcgarry
455 1.6 gmcgarry /* disable any DMA */
456 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
457 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
458 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
459 1.1 augustss
460 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
461 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
462 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
463 1.1 augustss printf("bba_trigger_output: can't create DMA map\n");
464 1.1 augustss goto bad;
465 1.1 augustss }
466 1.1 augustss state |= 1;
467 1.1 augustss
468 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
469 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) {
470 1.45 isaki printf("bba_trigger_output: can't load DMA map\n");
471 1.1 augustss goto bad;
472 1.1 augustss }
473 1.1 augustss state |= 2;
474 1.1 augustss
475 1.1 augustss d->intr = intr;
476 1.1 augustss d->intr_arg = arg;
477 1.1 augustss d->curseg = 1;
478 1.1 augustss
479 1.1 augustss /* get physical address of buffer start */
480 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
481 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
482 1.1 augustss
483 1.1 augustss /* setup DMA pointer */
484 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
485 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
486 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
487 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
488 1.1 augustss
489 1.1 augustss /* kick off DMA */
490 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_T;
491 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
492 1.1 augustss
493 1.1 augustss d->active = 1;
494 1.1 augustss
495 1.1 augustss return 0;
496 1.1 augustss
497 1.1 augustss bad:
498 1.1 augustss if (state & 2)
499 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
500 1.1 augustss if (state & 1)
501 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
502 1.1 augustss return 1;
503 1.1 augustss }
504 1.1 augustss
505 1.1 augustss
506 1.28 thorpej static int
507 1.24 kent bba_trigger_input(void *addr, void *start, void *end, int blksize,
508 1.24 kent void (*intr)(void *), void *arg, const audio_params_t *param)
509 1.1 augustss {
510 1.24 kent struct bba_softc *sc;
511 1.24 kent struct bba_dma_state *d;
512 1.23 kent tc_addr_t phys, nphys;
513 1.37 tsutsui uint32_t ssr;
514 1.1 augustss int state = 0;
515 1.1 augustss
516 1.1 augustss DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
517 1.6 gmcgarry addr, start, end, blksize, intr, arg));
518 1.38 tsutsui sc = addr;
519 1.24 kent d = &sc->sc_rx_dma_state;
520 1.24 kent state = 0;
521 1.6 gmcgarry
522 1.6 gmcgarry /* disable any DMA */
523 1.6 gmcgarry ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
524 1.6 gmcgarry ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
525 1.6 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
526 1.1 augustss
527 1.1 augustss if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
528 1.9 thorpej BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE,
529 1.9 thorpej BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) {
530 1.1 augustss printf("bba_trigger_input: can't create DMA map\n");
531 1.1 augustss goto bad;
532 1.1 augustss }
533 1.1 augustss state |= 1;
534 1.1 augustss
535 1.1 augustss if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
536 1.13 thorpej (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) {
537 1.1 augustss printf("bba_trigger_input: can't load DMA map\n");
538 1.1 augustss goto bad;
539 1.1 augustss }
540 1.1 augustss state |= 2;
541 1.1 augustss
542 1.1 augustss d->intr = intr;
543 1.1 augustss d->intr_arg = arg;
544 1.1 augustss d->curseg = 1;
545 1.1 augustss
546 1.1 augustss /* get physical address of buffer start */
547 1.2 gmcgarry phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr;
548 1.2 gmcgarry nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr;
549 1.1 augustss
550 1.1 augustss /* setup DMA pointer */
551 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
552 1.6 gmcgarry IOASIC_DMA_ADDR(phys));
553 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
554 1.6 gmcgarry IOASIC_DMA_ADDR(nphys));
555 1.1 augustss
556 1.1 augustss /* kick off DMA */
557 1.1 augustss ssr |= IOASIC_CSR_DMAEN_ISDN_R;
558 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
559 1.1 augustss
560 1.1 augustss d->active = 1;
561 1.1 augustss
562 1.1 augustss return 0;
563 1.1 augustss
564 1.1 augustss bad:
565 1.1 augustss if (state & 2)
566 1.1 augustss bus_dmamap_unload(sc->sc_dmat, d->dmam);
567 1.1 augustss if (state & 1)
568 1.1 augustss bus_dmamap_destroy(sc->sc_dmat, d->dmam);
569 1.1 augustss return 1;
570 1.1 augustss }
571 1.1 augustss
572 1.39 jmcneill static void
573 1.39 jmcneill bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread)
574 1.39 jmcneill {
575 1.39 jmcneill struct bba_softc *bsc = opaque;
576 1.39 jmcneill struct am7930_softc *sc = &bsc->sc_am7930;
577 1.39 jmcneill
578 1.39 jmcneill *intr = &sc->sc_intr_lock;
579 1.39 jmcneill *thread = &sc->sc_lock;
580 1.39 jmcneill }
581 1.39 jmcneill
582 1.28 thorpej static int
583 1.24 kent bba_intr(void *addr)
584 1.1 augustss {
585 1.24 kent struct bba_softc *sc;
586 1.1 augustss struct bba_dma_state *d;
587 1.1 augustss tc_addr_t nphys;
588 1.39 jmcneill int mask;
589 1.1 augustss
590 1.24 kent sc = addr;
591 1.39 jmcneill mutex_enter(&sc->sc_am7930.sc_intr_lock);
592 1.1 augustss
593 1.1 augustss mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
594 1.1 augustss
595 1.1 augustss if (mask & IOASIC_INTR_ISDN_TXLOAD) {
596 1.1 augustss d = &sc->sc_tx_dma_state;
597 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
598 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
599 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
600 1.6 gmcgarry IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
601 1.1 augustss if (d->intr != NULL)
602 1.1 augustss (*d->intr)(d->intr_arg);
603 1.1 augustss }
604 1.1 augustss if (mask & IOASIC_INTR_ISDN_RXLOAD) {
605 1.1 augustss d = &sc->sc_rx_dma_state;
606 1.1 augustss d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
607 1.1 augustss nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
608 1.1 augustss bus_space_write_4(sc->sc_bst, sc->sc_bsh,
609 1.6 gmcgarry IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
610 1.1 augustss if (d->intr != NULL)
611 1.1 augustss (*d->intr)(d->intr_arg);
612 1.1 augustss }
613 1.1 augustss
614 1.39 jmcneill mutex_exit(&sc->sc_am7930.sc_intr_lock);
615 1.1 augustss
616 1.1 augustss return 0;
617 1.6 gmcgarry }
618 1.6 gmcgarry
619 1.28 thorpej static int
620 1.43 isaki bba_query_format(void *addr, audio_format_query_t *afp)
621 1.6 gmcgarry {
622 1.6 gmcgarry
623 1.43 isaki return audio_query_format(&bba_format, 1, afp);
624 1.23 kent }
625 1.23 kent
626 1.23 kent static int
627 1.43 isaki bba_set_format(void *addr, int setmode,
628 1.43 isaki const audio_params_t *play, const audio_params_t *rec,
629 1.43 isaki audio_filter_reg_t *pfil, audio_filter_reg_t *rfil)
630 1.23 kent {
631 1.23 kent
632 1.43 isaki if ((setmode & AUMODE_PLAY) != 0) {
633 1.43 isaki pfil->codec = audio_internal_to_mulaw32;
634 1.43 isaki }
635 1.43 isaki if ((setmode & AUMODE_RECORD) != 0) {
636 1.43 isaki rfil->codec = audio_mulaw32_to_internal;
637 1.43 isaki }
638 1.23 kent
639 1.23 kent return 0;
640 1.1 augustss }
641 1.1 augustss
642 1.28 thorpej static int
643 1.24 kent bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param)
644 1.1 augustss {
645 1.24 kent
646 1.24 kent return IOASIC_DMA_BLOCKSIZE;
647 1.1 augustss }
648 1.1 augustss
649 1.1 augustss
650 1.1 augustss /* indirect write */
651 1.28 thorpej static void
652 1.24 kent bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val)
653 1.1 augustss {
654 1.1 augustss
655 1.24 kent DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
656 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
657 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
658 1.1 augustss }
659 1.1 augustss
660 1.1 augustss
661 1.28 thorpej static void
662 1.24 kent bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val)
663 1.1 augustss {
664 1.1 augustss
665 1.24 kent DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
666 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
667 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val);
668 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
669 1.1 augustss }
670 1.1 augustss
671 1.1 augustss
672 1.28 thorpej static uint16_t
673 1.24 kent bba_codec_iread16(struct am7930_softc *sc, int reg)
674 1.1 augustss {
675 1.24 kent uint16_t val;
676 1.1 augustss
677 1.24 kent DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg));
678 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
679 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
680 1.1 augustss val |= bba_codec_dread(sc, AM7930_DREG_DR);
681 1.1 augustss
682 1.1 augustss return val;
683 1.1 augustss }
684 1.1 augustss
685 1.1 augustss
686 1.1 augustss /* indirect read */
687 1.28 thorpej static uint8_t
688 1.24 kent bba_codec_iread(struct am7930_softc *sc, int reg)
689 1.1 augustss {
690 1.24 kent uint8_t val;
691 1.1 augustss
692 1.24 kent DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg));
693 1.1 augustss bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
694 1.1 augustss val = bba_codec_dread(sc, AM7930_DREG_DR);
695 1.1 augustss
696 1.1 augustss DPRINTF(("read 0x%x (%d)\n", val, val));
697 1.1 augustss
698 1.1 augustss return val;
699 1.1 augustss }
700 1.1 augustss
701 1.1 augustss /* direct write */
702 1.28 thorpej static void
703 1.24 kent bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val)
704 1.1 augustss {
705 1.24 kent struct bba_softc *sc;
706 1.1 augustss
707 1.24 kent sc = (struct bba_softc *)asc;
708 1.24 kent DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));
709 1.1 augustss
710 1.9 thorpej #if defined(__alpha__)
711 1.5 gmcgarry bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
712 1.9 thorpej reg << 2, val << 8);
713 1.9 thorpej #else
714 1.9 thorpej bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh,
715 1.9 thorpej reg << 6, val);
716 1.9 thorpej #endif
717 1.1 augustss }
718 1.1 augustss
719 1.1 augustss /* direct read */
720 1.28 thorpej static uint8_t
721 1.24 kent bba_codec_dread(struct am7930_softc *asc, int reg)
722 1.1 augustss {
723 1.24 kent struct bba_softc *sc;
724 1.1 augustss
725 1.24 kent sc = (struct bba_softc *)asc;
726 1.24 kent DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg));
727 1.1 augustss
728 1.9 thorpej #if defined(__alpha__)
729 1.9 thorpej return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
730 1.9 thorpej reg << 2) >> 8) & 0xff);
731 1.9 thorpej #else
732 1.9 thorpej return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh,
733 1.9 thorpej reg << 6) & 0xff);
734 1.9 thorpej #endif
735 1.1 augustss }
736