bba.c revision 1.23
1 /* $NetBSD: bba.c,v 1.23 2005/01/10 22:01:37 kent Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* maxine/alpha baseboard audio (bba) */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.23 2005/01/10 22:01:37 kent Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <machine/bus.h> 48 #include <machine/autoconf.h> 49 #include <machine/cpu.h> 50 51 #include <sys/audioio.h> 52 #include <dev/audio_if.h> 53 #include <dev/auconv.h> 54 55 #include <dev/ic/am7930reg.h> 56 #include <dev/ic/am7930var.h> 57 58 #include <dev/tc/tcvar.h> 59 #include <dev/tc/ioasicreg.h> 60 #include <dev/tc/ioasicvar.h> 61 62 #ifdef AUDIO_DEBUG 63 #define DPRINTF(x) if (am7930debug) printf x 64 #else 65 #define DPRINTF(x) 66 #endif /* AUDIO_DEBUG */ 67 68 #define BBA_MAX_DMA_SEGMENTS 16 69 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 70 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 71 #define BBA_DMABUF_BOUNDARY 0 72 73 struct bba_mem { 74 struct bba_mem *next; 75 bus_addr_t addr; 76 bus_size_t size; 77 caddr_t kva; 78 }; 79 80 struct bba_dma_state { 81 bus_dmamap_t dmam; /* DMA map */ 82 int active; 83 int curseg; /* current segment in DMA buffer */ 84 void (*intr)__P((void *)); /* higher-level audio handler */ 85 void *intr_arg; 86 }; 87 88 struct bba_softc { 89 struct am7930_softc sc_am7930; /* glue to MI code */ 90 91 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 92 bus_space_handle_t sc_bsh; 93 bus_dma_tag_t sc_dmat; 94 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 95 96 struct bba_mem *sc_mem_head; /* list of buffers */ 97 98 struct bba_dma_state sc_tx_dma_state; 99 struct bba_dma_state sc_rx_dma_state; 100 }; 101 102 int bba_match __P((struct device *, struct cfdata *, void *)); 103 void bba_attach __P((struct device *, struct device *, void *)); 104 105 CFATTACH_DECL(bba, sizeof(struct bba_softc), 106 bba_match, bba_attach, NULL, NULL); 107 108 /* 109 * Define our interface into the am7930 MI driver. 110 */ 111 112 u_int8_t bba_codec_iread __P((struct am7930_softc *, int)); 113 u_int16_t bba_codec_iread16 __P((struct am7930_softc *, int)); 114 void bba_codec_iwrite __P((struct am7930_softc *, int, u_int8_t)); 115 void bba_codec_iwrite16 __P((struct am7930_softc *, int, u_int16_t)); 116 void bba_onopen __P((struct am7930_softc *sc)); 117 void bba_onclose __P((struct am7930_softc *sc)); 118 static stream_filter_factory_t bba_output_conv; 119 static stream_filter_factory_t bba_input_conv; 120 static int bba_output_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int); 121 static int bba_input_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int); 122 123 struct am7930_glue bba_glue = { 124 bba_codec_iread, 125 bba_codec_iwrite, 126 bba_codec_iread16, 127 bba_codec_iwrite16, 128 bba_onopen, 129 bba_onclose, 130 4, 131 bba_input_conv, 132 bba_output_conv, 133 }; 134 135 /* 136 * Define our interface to the higher level audio driver. 137 */ 138 139 int bba_round_blocksize __P((void *, int, int, const audio_params_t *)); 140 int bba_halt_output __P((void *)); 141 int bba_halt_input __P((void *)); 142 int bba_getdev __P((void *, struct audio_device *)); 143 void *bba_allocm __P((void *, int, size_t, struct malloc_type *, int)); 144 void bba_freem __P((void *, void *, struct malloc_type *)); 145 size_t bba_round_buffersize __P((void *, int, size_t)); 146 int bba_get_props __P((void *)); 147 paddr_t bba_mappage __P((void *, void *, off_t, int)); 148 int bba_trigger_output __P((void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *)); 150 int bba_trigger_input __P((void *, void *, void *, int, 151 void (*)(void *), void *, const audio_params_t *)); 152 153 const struct audio_hw_if sa_hw_if = { 154 am7930_open, 155 am7930_close, 156 0, 157 am7930_query_encoding, 158 am7930_set_params, 159 bba_round_blocksize, /* md */ 160 am7930_commit_settings, 161 0, 162 0, 163 0, 164 0, 165 bba_halt_output, /* md */ 166 bba_halt_input, /* md */ 167 0, 168 bba_getdev, 169 0, 170 am7930_set_port, 171 am7930_get_port, 172 am7930_query_devinfo, 173 bba_allocm, /* md */ 174 bba_freem, /* md */ 175 bba_round_buffersize, /* md */ 176 bba_mappage, 177 bba_get_props, 178 bba_trigger_output, /* md */ 179 bba_trigger_input, /* md */ 180 0, 181 }; 182 183 struct audio_device bba_device = { 184 "am7930", 185 "x", 186 "bba" 187 }; 188 189 int bba_intr __P((void *)); 190 void bba_reset __P((struct bba_softc *, int)); 191 void bba_codec_dwrite __P((struct am7930_softc *, int, u_int8_t)); 192 u_int8_t bba_codec_dread __P((struct am7930_softc *, int)); 193 194 int bba_match(parent, cf, aux) 195 struct device *parent; 196 struct cfdata *cf; 197 void *aux; 198 { 199 struct ioasicdev_attach_args *ia = aux; 200 201 if (strcmp(ia->iada_modname, "isdn") != 0 && 202 strcmp(ia->iada_modname, "AMD79c30") != 0) 203 return 0; 204 205 return 1; 206 } 207 208 209 void 210 bba_attach(parent, self, aux) 211 struct device *parent; 212 struct device *self; 213 void *aux; 214 { 215 struct ioasicdev_attach_args *ia = aux; 216 struct bba_softc *sc = (struct bba_softc *)self; 217 struct am7930_softc *asc = &sc->sc_am7930; 218 219 sc->sc_bst = ((struct ioasic_softc *)parent)->sc_bst; 220 sc->sc_bsh = ((struct ioasic_softc *)parent)->sc_bsh; 221 sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat; 222 223 /* get the bus space handle for codec */ 224 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 225 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 226 printf("%s: unable to map device\n", asc->sc_dev.dv_xname); 227 return; 228 } 229 230 printf("\n"); 231 232 bba_reset(sc,1); 233 234 /* 235 * Set up glue for MI code early; we use some of it here. 236 */ 237 asc->sc_glue = &bba_glue; 238 239 /* 240 * MI initialisation. We will be doing DMA. 241 */ 242 am7930_init(asc, AUDIOAMD_DMA_MODE); 243 244 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 245 bba_intr, sc); 246 247 audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev); 248 } 249 250 251 void 252 bba_onopen(sc) 253 struct am7930_softc *sc; 254 { 255 } 256 257 258 void 259 bba_onclose(sc) 260 struct am7930_softc *sc; 261 { 262 } 263 264 265 void 266 bba_reset(sc, reset) 267 struct bba_softc *sc; 268 int reset; 269 { 270 u_int32_t ssr; 271 272 /* disable any DMA and reset the codec */ 273 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 274 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 275 if (reset) 276 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 277 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 278 DELAY(10); /* 400ns required for codec to reset */ 279 280 /* initialise DMA pointers */ 281 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 282 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 283 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 284 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 285 286 /* take out of reset state */ 287 if (reset) { 288 ssr |= IOASIC_CSR_ISDN_ENABLE; 289 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 290 } 291 292 } 293 294 295 void * 296 bba_allocm(addr, direction, size, pool, flags) 297 void *addr; 298 int direction; 299 size_t size; 300 struct malloc_type *pool; 301 int flags; 302 { 303 struct am7930_softc *asc = addr; 304 struct bba_softc *sc = addr; 305 bus_dma_segment_t seg; 306 int rseg; 307 caddr_t kva; 308 struct bba_mem *m; 309 int w; 310 int state = 0; 311 312 DPRINTF(("bba_allocm: size = %d\n",size)); 313 314 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 315 316 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 317 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) { 318 printf("%s: can't allocate DMA buffer\n", 319 asc->sc_dev.dv_xname); 320 goto bad; 321 } 322 state |= 1; 323 324 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 325 &kva, w | BUS_DMA_COHERENT)) { 326 printf("%s: can't map DMA buffer\n", asc->sc_dev.dv_xname); 327 goto bad; 328 } 329 state |= 2; 330 331 m = malloc(sizeof(struct bba_mem), pool, flags); 332 if (m == NULL) 333 goto bad; 334 m->addr = seg.ds_addr; 335 m->size = seg.ds_len; 336 m->kva = kva; 337 m->next = sc->sc_mem_head; 338 sc->sc_mem_head = m; 339 340 return (void *)kva; 341 342 bad: 343 if (state & 2) 344 bus_dmamem_unmap(sc->sc_dmat, kva, size); 345 if (state & 1) 346 bus_dmamem_free(sc->sc_dmat, &seg, 1); 347 return NULL; 348 } 349 350 351 void 352 bba_freem(addr, ptr, pool) 353 void *addr; 354 void *ptr; 355 struct malloc_type *pool; 356 { 357 struct bba_softc *sc = addr; 358 struct bba_mem **mp, *m; 359 bus_dma_segment_t seg; 360 caddr_t kva = (caddr_t)addr; 361 362 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 363 mp = &(*mp)->next) 364 /* nothing */ ; 365 m = *mp; 366 if (m == NULL) { 367 printf("bba_freem: freeing unallocated memory\n"); 368 return; 369 } 370 *mp = m->next; 371 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 372 373 seg.ds_addr = m->addr; 374 seg.ds_len = m->size; 375 bus_dmamem_free(sc->sc_dmat, &seg, 1); 376 free(m, pool); 377 } 378 379 380 size_t 381 bba_round_buffersize(addr, direction, size) 382 void *addr; 383 int direction; 384 size_t size; 385 { 386 DPRINTF(("bba_round_buffersize: size=%d\n", size)); 387 388 return (size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 389 roundup(size, IOASIC_DMA_BLOCKSIZE)); 390 } 391 392 393 int 394 bba_halt_output(addr) 395 void *addr; 396 { 397 struct bba_softc *sc = addr; 398 struct bba_dma_state *d = &sc->sc_tx_dma_state; 399 u_int32_t ssr; 400 401 /* disable any DMA */ 402 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 403 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 404 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 405 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 406 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 407 408 if (d->active) { 409 bus_dmamap_unload(sc->sc_dmat, d->dmam); 410 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 411 d->active = 0; 412 } 413 414 return 0; 415 } 416 417 418 int 419 bba_halt_input(addr) 420 void *addr; 421 { 422 struct bba_softc *sc = addr; 423 struct bba_dma_state *d = &sc->sc_rx_dma_state; 424 u_int32_t ssr; 425 426 /* disable any DMA */ 427 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 428 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 429 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 430 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 431 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 432 433 if (d->active) { 434 bus_dmamap_unload(sc->sc_dmat, d->dmam); 435 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 436 d->active = 0; 437 } 438 439 return 0; 440 } 441 442 443 int 444 bba_getdev(addr, retp) 445 void *addr; 446 struct audio_device *retp; 447 { 448 *retp = bba_device; 449 return 0; 450 } 451 452 453 int 454 bba_trigger_output(addr, start, end, blksize, intr, arg, param) 455 void *addr; 456 void *start, *end; 457 int blksize; 458 void (*intr) __P((void *)); 459 void *arg; 460 const audio_params_t *param; 461 { 462 struct bba_softc *sc = addr; 463 struct bba_dma_state *d = &sc->sc_tx_dma_state; 464 u_int32_t ssr; 465 tc_addr_t phys, nphys; 466 int state = 0; 467 468 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 469 addr, start, end, blksize, intr, arg)); 470 471 /* disable any DMA */ 472 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 473 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 474 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 475 476 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 477 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 478 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 479 printf("bba_trigger_output: can't create DMA map\n"); 480 goto bad; 481 } 482 state |= 1; 483 484 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 485 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 486 printf("bba_trigger_output: can't load DMA map\n"); 487 goto bad; 488 } 489 state |= 2; 490 491 d->intr = intr; 492 d->intr_arg = arg; 493 d->curseg = 1; 494 495 /* get physical address of buffer start */ 496 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 497 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 498 499 /* setup DMA pointer */ 500 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 501 IOASIC_DMA_ADDR(phys)); 502 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 503 IOASIC_DMA_ADDR(nphys)); 504 505 /* kick off DMA */ 506 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 507 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 508 509 d->active = 1; 510 511 return 0; 512 513 bad: 514 if (state & 2) 515 bus_dmamap_unload(sc->sc_dmat, d->dmam); 516 if (state & 1) 517 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 518 return 1; 519 } 520 521 522 int 523 bba_trigger_input(addr, start, end, blksize, intr, arg, param) 524 void *addr; 525 void *start, *end; 526 int blksize; 527 void (*intr) __P((void *)); 528 void *arg; 529 const audio_params_t *param; 530 { 531 struct bba_softc *sc = (struct bba_softc *)addr; 532 struct bba_dma_state *d = &sc->sc_rx_dma_state; 533 tc_addr_t phys, nphys; 534 u_int32_t ssr; 535 int state = 0; 536 537 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 538 addr, start, end, blksize, intr, arg)); 539 540 /* disable any DMA */ 541 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 542 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 543 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 544 545 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 546 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 547 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 548 printf("bba_trigger_input: can't create DMA map\n"); 549 goto bad; 550 } 551 state |= 1; 552 553 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 554 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 555 printf("bba_trigger_input: can't load DMA map\n"); 556 goto bad; 557 } 558 state |= 2; 559 560 d->intr = intr; 561 d->intr_arg = arg; 562 d->curseg = 1; 563 564 /* get physical address of buffer start */ 565 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 566 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 567 568 /* setup DMA pointer */ 569 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 570 IOASIC_DMA_ADDR(phys)); 571 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 572 IOASIC_DMA_ADDR(nphys)); 573 574 /* kick off DMA */ 575 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 576 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 577 578 d->active = 1; 579 580 return 0; 581 582 bad: 583 if (state & 2) 584 bus_dmamap_unload(sc->sc_dmat, d->dmam); 585 if (state & 1) 586 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 587 return 1; 588 } 589 590 int 591 bba_intr(addr) 592 void *addr; 593 { 594 struct bba_softc *sc = addr; 595 struct bba_dma_state *d; 596 tc_addr_t nphys; 597 int s, mask; 598 599 s = splaudio(); 600 601 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 602 603 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 604 d = &sc->sc_tx_dma_state; 605 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 606 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 607 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 608 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 609 if (d->intr != NULL) 610 (*d->intr)(d->intr_arg); 611 } 612 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 613 d = &sc->sc_rx_dma_state; 614 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 615 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 616 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 617 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 618 if (d->intr != NULL) 619 (*d->intr)(d->intr_arg); 620 } 621 622 splx(s); 623 624 return 0; 625 } 626 627 int 628 bba_get_props(addr) 629 void *addr; 630 { 631 return (AUDIO_PROP_MMAP | am7930_get_props(addr)); 632 } 633 634 paddr_t 635 bba_mappage(addr, mem, offset, prot) 636 void *addr; 637 void *mem; 638 off_t offset; 639 int prot; 640 { 641 struct bba_softc *sc = addr; 642 struct bba_mem **mp; 643 bus_dma_segment_t seg; 644 caddr_t kva = (caddr_t)mem; 645 646 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 647 mp = &(*mp)->next) 648 /* nothing */ ; 649 if (*mp == NULL || offset < 0) { 650 return -1; 651 } 652 653 seg.ds_addr = (*mp)->addr; 654 seg.ds_len = (*mp)->size; 655 656 return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset, 657 prot, BUS_DMA_WAITOK); 658 } 659 660 661 static stream_filter_t * 662 bba_input_conv(struct audio_softc *sc, const audio_params_t *from, 663 const audio_params_t *to) 664 { 665 return auconv_nocontext_filter_factory(bba_input_conv_fetch_to); 666 } 667 668 static int 669 bba_input_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 670 int max_used) 671 { 672 stream_filter_t *this; 673 int m, err; 674 675 this = (stream_filter_t *)self; 676 if ((err = this->prev->fetch_to(this->prev, this->src, max_used * 4))) 677 return err; 678 m = dst->end - dst->start; 679 m = min(m, max_used); 680 FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) { 681 *d = ((*(uint32_t *)s) >> 16) & 0xff; 682 } FILTER_LOOP_EPILOGUE(this->src, dst); 683 return 0; 684 } 685 686 static stream_filter_t * 687 bba_output_conv(struct audio_softc *sc, const audio_params_t *from, 688 const audio_params_t *to) 689 { 690 return auconv_nocontext_filter_factory(bba_output_conv_fetch_to); 691 } 692 693 static int 694 bba_output_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 695 int max_used) 696 { 697 stream_filter_t *this; 698 int m, err; 699 700 this = (stream_filter_t *)self; 701 max_used = (max_used + 3) & ~3; 702 if ((err = this->prev->fetch_to(this->prev, this->src, max_used / 4))) 703 return err; 704 m = (dst->end - dst->start) & ~3; 705 m = min(m, max_used); 706 FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) { 707 *(uint32_t *)d = (*s << 16); 708 } FILTER_LOOP_EPILOGUE(this->src, dst); 709 return 0; 710 } 711 712 713 int 714 bba_round_blocksize(addr, blk, mode, param) 715 void *addr; 716 int blk; 717 int mode; 718 const audio_params_t *param; 719 { 720 return (IOASIC_DMA_BLOCKSIZE); 721 } 722 723 724 /* indirect write */ 725 void 726 bba_codec_iwrite(sc, reg, val) 727 struct am7930_softc *sc; 728 int reg; 729 u_int8_t val; 730 { 731 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val)); 732 733 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 734 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 735 } 736 737 738 void 739 bba_codec_iwrite16(sc, reg, val) 740 struct am7930_softc *sc; 741 int reg; 742 u_int16_t val; 743 { 744 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n",sc,reg,val)); 745 746 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 747 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 748 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 749 } 750 751 752 u_int16_t 753 bba_codec_iread16(sc, reg) 754 struct am7930_softc *sc; 755 int reg; 756 { 757 u_int16_t val; 758 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n",sc,reg)); 759 760 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 761 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 762 val |= bba_codec_dread(sc, AM7930_DREG_DR); 763 764 return val; 765 } 766 767 768 /* indirect read */ 769 u_int8_t 770 bba_codec_iread(sc, reg) 771 struct am7930_softc *sc; 772 int reg; 773 { 774 u_int8_t val; 775 776 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n",sc,reg)); 777 778 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 779 val = bba_codec_dread(sc, AM7930_DREG_DR); 780 781 DPRINTF(("read 0x%x (%d)\n", val, val)); 782 783 return val; 784 } 785 786 /* direct write */ 787 void 788 bba_codec_dwrite(asc, reg, val) 789 struct am7930_softc *asc; 790 int reg; 791 u_int8_t val; 792 { 793 struct bba_softc *sc = (struct bba_softc *)asc; 794 795 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val)); 796 797 #if defined(__alpha__) 798 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 799 reg << 2, val << 8); 800 #else 801 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 802 reg << 6, val); 803 #endif 804 } 805 806 /* direct read */ 807 u_int8_t 808 bba_codec_dread(asc, reg) 809 struct am7930_softc *asc; 810 int reg; 811 { 812 struct bba_softc *sc = (struct bba_softc *)asc; 813 814 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n",sc,reg)); 815 816 #if defined(__alpha__) 817 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 818 reg << 2) >> 8) & 0xff); 819 #else 820 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 821 reg << 6) & 0xff); 822 #endif 823 } 824
Indexes created Fri Sep 26 08:10:20 GMT 2025