bba.c revision 1.26
1 /* $NetBSD: bba.c,v 1.26 2005/12/02 19:26:14 kleink Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* maxine/alpha baseboard audio (bba) */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.26 2005/12/02 19:26:14 kleink Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <machine/bus.h> 48 #include <machine/autoconf.h> 49 #include <machine/cpu.h> 50 51 #include <sys/audioio.h> 52 #include <dev/audio_if.h> 53 #include <dev/auconv.h> 54 55 #include <dev/ic/am7930reg.h> 56 #include <dev/ic/am7930var.h> 57 58 #include <dev/tc/tcvar.h> 59 #include <dev/tc/ioasicreg.h> 60 #include <dev/tc/ioasicvar.h> 61 62 #ifdef AUDIO_DEBUG 63 #define DPRINTF(x) if (am7930debug) printf x 64 #else 65 #define DPRINTF(x) 66 #endif /* AUDIO_DEBUG */ 67 68 #define BBA_MAX_DMA_SEGMENTS 16 69 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 70 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 71 #define BBA_DMABUF_BOUNDARY 0 72 73 struct bba_mem { 74 struct bba_mem *next; 75 bus_addr_t addr; 76 bus_size_t size; 77 caddr_t kva; 78 }; 79 80 struct bba_dma_state { 81 bus_dmamap_t dmam; /* DMA map */ 82 int active; 83 int curseg; /* current segment in DMA buffer */ 84 void (*intr)(void *); /* higher-level audio handler */ 85 void *intr_arg; 86 }; 87 88 struct bba_softc { 89 struct am7930_softc sc_am7930; /* glue to MI code */ 90 91 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 92 bus_space_handle_t sc_bsh; 93 bus_dma_tag_t sc_dmat; 94 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 95 96 struct bba_mem *sc_mem_head; /* list of buffers */ 97 98 struct bba_dma_state sc_tx_dma_state; 99 struct bba_dma_state sc_rx_dma_state; 100 }; 101 102 int bba_match(struct device *, struct cfdata *, void *); 103 void bba_attach(struct device *, struct device *, void *); 104 105 CFATTACH_DECL(bba, sizeof(struct bba_softc), 106 bba_match, bba_attach, NULL, NULL); 107 108 /* 109 * Define our interface into the am7930 MI driver. 110 */ 111 112 uint8_t bba_codec_iread(struct am7930_softc *, int); 113 uint16_t bba_codec_iread16(struct am7930_softc *, int); 114 void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 115 void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 116 void bba_onopen(struct am7930_softc *); 117 void bba_onclose(struct am7930_softc *); 118 static stream_filter_factory_t bba_output_conv; 119 static stream_filter_factory_t bba_input_conv; 120 static int bba_output_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int); 121 static int bba_input_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, int); 122 123 struct am7930_glue bba_glue = { 124 bba_codec_iread, 125 bba_codec_iwrite, 126 bba_codec_iread16, 127 bba_codec_iwrite16, 128 bba_onopen, 129 bba_onclose, 130 4, 131 bba_input_conv, 132 bba_output_conv, 133 }; 134 135 /* 136 * Define our interface to the higher level audio driver. 137 */ 138 139 int bba_round_blocksize(void *, int, int, const audio_params_t *); 140 int bba_halt_output(void *); 141 int bba_halt_input(void *); 142 int bba_getdev(void *, struct audio_device *); 143 void *bba_allocm(void *, int, size_t, struct malloc_type *, int); 144 void bba_freem(void *, void *, struct malloc_type *); 145 size_t bba_round_buffersize(void *, int, size_t); 146 int bba_get_props(void *); 147 paddr_t bba_mappage(void *, void *, off_t, int); 148 int bba_trigger_output(void *, void *, void *, int, 149 void (*)(void *), void *, const audio_params_t *); 150 int bba_trigger_input(void *, void *, void *, int, 151 void (*)(void *), void *, const audio_params_t *); 152 153 const struct audio_hw_if sa_hw_if = { 154 am7930_open, 155 am7930_close, 156 0, 157 am7930_query_encoding, 158 am7930_set_params, 159 bba_round_blocksize, /* md */ 160 am7930_commit_settings, 161 0, 162 0, 163 0, 164 0, 165 bba_halt_output, /* md */ 166 bba_halt_input, /* md */ 167 0, 168 bba_getdev, 169 0, 170 am7930_set_port, 171 am7930_get_port, 172 am7930_query_devinfo, 173 bba_allocm, /* md */ 174 bba_freem, /* md */ 175 bba_round_buffersize, /* md */ 176 bba_mappage, 177 bba_get_props, 178 bba_trigger_output, /* md */ 179 bba_trigger_input, /* md */ 180 0, 181 }; 182 183 struct audio_device bba_device = { 184 "am7930", 185 "x", 186 "bba" 187 }; 188 189 int bba_intr(void *); 190 void bba_reset(struct bba_softc *, int); 191 void bba_codec_dwrite(struct am7930_softc *, int, u_int8_t); 192 uint8_t bba_codec_dread(struct am7930_softc *, int); 193 194 int 195 bba_match(struct device *parent, struct cfdata *cf, void *aux) 196 { 197 struct ioasicdev_attach_args *ia; 198 199 ia = aux; 200 if (strcmp(ia->iada_modname, "isdn") != 0 && 201 strcmp(ia->iada_modname, "AMD79c30") != 0) 202 return 0; 203 204 return 1; 205 } 206 207 208 void 209 bba_attach(struct device *parent, struct device *self, void *aux) 210 { 211 struct ioasicdev_attach_args *ia; 212 struct bba_softc *sc; 213 struct am7930_softc *asc; 214 215 ia = aux; 216 sc = (struct bba_softc *)self; 217 asc = &sc->sc_am7930; 218 sc->sc_bst = ((struct ioasic_softc *)parent)->sc_bst; 219 sc->sc_bsh = ((struct ioasic_softc *)parent)->sc_bsh; 220 sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat; 221 222 /* get the bus space handle for codec */ 223 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 224 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 225 printf("%s: unable to map device\n", asc->sc_dev.dv_xname); 226 return; 227 } 228 229 printf("\n"); 230 231 bba_reset(sc,1); 232 233 /* 234 * Set up glue for MI code early; we use some of it here. 235 */ 236 asc->sc_glue = &bba_glue; 237 238 /* 239 * MI initialisation. We will be doing DMA. 240 */ 241 am7930_init(asc, AUDIOAMD_DMA_MODE); 242 243 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 244 bba_intr, sc); 245 246 audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev); 247 } 248 249 250 void 251 bba_onopen(struct am7930_softc *sc) 252 { 253 } 254 255 256 void 257 bba_onclose(struct am7930_softc *sc) 258 { 259 } 260 261 262 void 263 bba_reset(struct bba_softc *sc, int reset) 264 { 265 uint32_t ssr; 266 267 /* disable any DMA and reset the codec */ 268 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 269 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 270 if (reset) 271 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 272 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 273 DELAY(10); /* 400ns required for codec to reset */ 274 275 /* initialise DMA pointers */ 276 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 277 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 278 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 279 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 280 281 /* take out of reset state */ 282 if (reset) { 283 ssr |= IOASIC_CSR_ISDN_ENABLE; 284 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 285 } 286 287 } 288 289 290 void * 291 bba_allocm(void *addr, int direction, size_t size, 292 struct malloc_type *pool, int flags) 293 { 294 struct am7930_softc *asc; 295 struct bba_softc *sc; 296 bus_dma_segment_t seg; 297 int rseg; 298 caddr_t kva; 299 struct bba_mem *m; 300 int w; 301 int state; 302 303 DPRINTF(("bba_allocm: size = %zu\n", size)); 304 asc = addr; 305 sc = addr; 306 state = 0; 307 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 308 309 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 310 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) { 311 printf("%s: can't allocate DMA buffer\n", 312 asc->sc_dev.dv_xname); 313 goto bad; 314 } 315 state |= 1; 316 317 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 318 &kva, w | BUS_DMA_COHERENT)) { 319 printf("%s: can't map DMA buffer\n", asc->sc_dev.dv_xname); 320 goto bad; 321 } 322 state |= 2; 323 324 m = malloc(sizeof(struct bba_mem), pool, flags); 325 if (m == NULL) 326 goto bad; 327 m->addr = seg.ds_addr; 328 m->size = seg.ds_len; 329 m->kva = kva; 330 m->next = sc->sc_mem_head; 331 sc->sc_mem_head = m; 332 333 return (void *)kva; 334 335 bad: 336 if (state & 2) 337 bus_dmamem_unmap(sc->sc_dmat, kva, size); 338 if (state & 1) 339 bus_dmamem_free(sc->sc_dmat, &seg, 1); 340 return NULL; 341 } 342 343 344 void 345 bba_freem(void *addr, void *ptr, struct malloc_type *pool) 346 { 347 struct bba_softc *sc; 348 struct bba_mem **mp, *m; 349 bus_dma_segment_t seg; 350 caddr_t kva; 351 352 sc = addr; 353 kva = (caddr_t)addr; 354 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 355 mp = &(*mp)->next) 356 continue; 357 m = *mp; 358 if (m == NULL) { 359 printf("bba_freem: freeing unallocated memory\n"); 360 return; 361 } 362 *mp = m->next; 363 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 364 365 seg.ds_addr = m->addr; 366 seg.ds_len = m->size; 367 bus_dmamem_free(sc->sc_dmat, &seg, 1); 368 free(m, pool); 369 } 370 371 372 size_t 373 bba_round_buffersize(void *addr, int direction, size_t size) 374 { 375 376 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 377 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 378 roundup(size, IOASIC_DMA_BLOCKSIZE); 379 } 380 381 382 int 383 bba_halt_output(void *addr) 384 { 385 struct bba_softc *sc; 386 struct bba_dma_state *d; 387 uint32_t ssr; 388 389 sc = addr; 390 d = &sc->sc_tx_dma_state; 391 /* disable any DMA */ 392 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 393 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 394 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 395 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 396 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 397 398 if (d->active) { 399 bus_dmamap_unload(sc->sc_dmat, d->dmam); 400 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 401 d->active = 0; 402 } 403 404 return 0; 405 } 406 407 408 int 409 bba_halt_input(void *addr) 410 { 411 struct bba_softc *sc; 412 struct bba_dma_state *d; 413 uint32_t ssr; 414 415 sc = addr; 416 d = &sc->sc_rx_dma_state; 417 /* disable any DMA */ 418 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 419 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 420 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 421 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 422 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 423 424 if (d->active) { 425 bus_dmamap_unload(sc->sc_dmat, d->dmam); 426 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 427 d->active = 0; 428 } 429 430 return 0; 431 } 432 433 434 int 435 bba_getdev(void *addr, struct audio_device *retp) 436 { 437 438 *retp = bba_device; 439 return 0; 440 } 441 442 443 int 444 bba_trigger_output(void *addr, void *start, void *end, int blksize, 445 void (*intr)(void *), void *arg, 446 const audio_params_t *param) 447 { 448 struct bba_softc *sc; 449 struct bba_dma_state *d; 450 uint32_t ssr; 451 tc_addr_t phys, nphys; 452 int state; 453 454 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 455 addr, start, end, blksize, intr, arg)); 456 sc = addr; 457 d = &sc->sc_tx_dma_state; 458 state = 0; 459 460 /* disable any DMA */ 461 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 462 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 463 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 464 465 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 466 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 467 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 468 printf("bba_trigger_output: can't create DMA map\n"); 469 goto bad; 470 } 471 state |= 1; 472 473 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 474 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 475 printf("bba_trigger_output: can't load DMA map\n"); 476 goto bad; 477 } 478 state |= 2; 479 480 d->intr = intr; 481 d->intr_arg = arg; 482 d->curseg = 1; 483 484 /* get physical address of buffer start */ 485 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 486 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 487 488 /* setup DMA pointer */ 489 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 490 IOASIC_DMA_ADDR(phys)); 491 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 492 IOASIC_DMA_ADDR(nphys)); 493 494 /* kick off DMA */ 495 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 496 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 497 498 d->active = 1; 499 500 return 0; 501 502 bad: 503 if (state & 2) 504 bus_dmamap_unload(sc->sc_dmat, d->dmam); 505 if (state & 1) 506 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 507 return 1; 508 } 509 510 511 int 512 bba_trigger_input(void *addr, void *start, void *end, int blksize, 513 void (*intr)(void *), void *arg, const audio_params_t *param) 514 { 515 struct bba_softc *sc; 516 struct bba_dma_state *d; 517 tc_addr_t phys, nphys; 518 u_int32_t ssr; 519 int state = 0; 520 521 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 522 addr, start, end, blksize, intr, arg)); 523 sc = (struct bba_softc *)addr; 524 d = &sc->sc_rx_dma_state; 525 state = 0; 526 527 /* disable any DMA */ 528 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 529 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 530 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 531 532 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 533 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 534 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 535 printf("bba_trigger_input: can't create DMA map\n"); 536 goto bad; 537 } 538 state |= 1; 539 540 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 541 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 542 printf("bba_trigger_input: can't load DMA map\n"); 543 goto bad; 544 } 545 state |= 2; 546 547 d->intr = intr; 548 d->intr_arg = arg; 549 d->curseg = 1; 550 551 /* get physical address of buffer start */ 552 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 553 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 554 555 /* setup DMA pointer */ 556 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 557 IOASIC_DMA_ADDR(phys)); 558 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 559 IOASIC_DMA_ADDR(nphys)); 560 561 /* kick off DMA */ 562 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 563 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 564 565 d->active = 1; 566 567 return 0; 568 569 bad: 570 if (state & 2) 571 bus_dmamap_unload(sc->sc_dmat, d->dmam); 572 if (state & 1) 573 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 574 return 1; 575 } 576 577 int 578 bba_intr(void *addr) 579 { 580 struct bba_softc *sc; 581 struct bba_dma_state *d; 582 tc_addr_t nphys; 583 int s, mask; 584 585 sc = addr; 586 s = splaudio(); 587 588 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 589 590 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 591 d = &sc->sc_tx_dma_state; 592 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 593 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 594 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 595 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 596 if (d->intr != NULL) 597 (*d->intr)(d->intr_arg); 598 } 599 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 600 d = &sc->sc_rx_dma_state; 601 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 602 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 603 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 604 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 605 if (d->intr != NULL) 606 (*d->intr)(d->intr_arg); 607 } 608 609 splx(s); 610 611 return 0; 612 } 613 614 int 615 bba_get_props(void *addr) 616 { 617 618 return AUDIO_PROP_MMAP | am7930_get_props(addr); 619 } 620 621 paddr_t 622 bba_mappage(void *addr, void *mem, off_t offset, int prot) 623 { 624 struct bba_softc *sc; 625 struct bba_mem **mp; 626 bus_dma_segment_t seg; 627 caddr_t kva; 628 629 sc = addr; 630 kva = (caddr_t)mem; 631 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 632 mp = &(*mp)->next) 633 continue; 634 if (*mp == NULL || offset < 0) { 635 return -1; 636 } 637 638 seg.ds_addr = (*mp)->addr; 639 seg.ds_len = (*mp)->size; 640 641 return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset, 642 prot, BUS_DMA_WAITOK); 643 } 644 645 static stream_filter_t * 646 bba_input_conv(struct audio_softc *sc, const audio_params_t *from, 647 const audio_params_t *to) 648 { 649 return auconv_nocontext_filter_factory(bba_input_conv_fetch_to); 650 } 651 652 static int 653 bba_input_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 654 int max_used) 655 { 656 stream_filter_t *this; 657 int m, err; 658 659 this = (stream_filter_t *)self; 660 if ((err = this->prev->fetch_to(this->prev, this->src, max_used * 4))) 661 return err; 662 m = dst->end - dst->start; 663 m = min(m, max_used); 664 FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) { 665 *d = ((*(const uint32_t *)s) >> 16) & 0xff; 666 } FILTER_LOOP_EPILOGUE(this->src, dst); 667 return 0; 668 } 669 670 static stream_filter_t * 671 bba_output_conv(struct audio_softc *sc, const audio_params_t *from, 672 const audio_params_t *to) 673 { 674 return auconv_nocontext_filter_factory(bba_output_conv_fetch_to); 675 } 676 677 static int 678 bba_output_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 679 int max_used) 680 { 681 stream_filter_t *this; 682 int m, err; 683 684 this = (stream_filter_t *)self; 685 max_used = (max_used + 3) & ~3; 686 if ((err = this->prev->fetch_to(this->prev, this->src, max_used / 4))) 687 return err; 688 m = (dst->end - dst->start) & ~3; 689 m = min(m, max_used); 690 FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) { 691 *(uint32_t *)d = (*s << 16); 692 } FILTER_LOOP_EPILOGUE(this->src, dst); 693 return 0; 694 } 695 696 int 697 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 698 { 699 700 return IOASIC_DMA_BLOCKSIZE; 701 } 702 703 704 /* indirect write */ 705 void 706 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 707 { 708 709 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 710 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 711 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 712 } 713 714 715 void 716 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 717 { 718 719 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 720 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 721 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 722 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 723 } 724 725 726 uint16_t 727 bba_codec_iread16(struct am7930_softc *sc, int reg) 728 { 729 uint16_t val; 730 731 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 732 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 733 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 734 val |= bba_codec_dread(sc, AM7930_DREG_DR); 735 736 return val; 737 } 738 739 740 /* indirect read */ 741 uint8_t 742 bba_codec_iread(struct am7930_softc *sc, int reg) 743 { 744 uint8_t val; 745 746 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 747 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 748 val = bba_codec_dread(sc, AM7930_DREG_DR); 749 750 DPRINTF(("read 0x%x (%d)\n", val, val)); 751 752 return val; 753 } 754 755 /* direct write */ 756 void 757 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 758 { 759 struct bba_softc *sc; 760 761 sc = (struct bba_softc *)asc; 762 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 763 764 #if defined(__alpha__) 765 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 766 reg << 2, val << 8); 767 #else 768 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 769 reg << 6, val); 770 #endif 771 } 772 773 /* direct read */ 774 uint8_t 775 bba_codec_dread(struct am7930_softc *asc, int reg) 776 { 777 struct bba_softc *sc; 778 779 sc = (struct bba_softc *)asc; 780 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 781 782 #if defined(__alpha__) 783 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 784 reg << 2) >> 8) & 0xff); 785 #else 786 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 787 reg << 6) & 0xff); 788 #endif 789 } 790
Indexes created Fri Sep 26 08:10:20 GMT 2025