bba.c revision 1.37
1 /* $NetBSD: bba.c,v 1.37 2009/08/22 17:38:06 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* maxine/alpha baseboard audio (bba) */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.37 2009/08/22 17:38:06 tsutsui Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/malloc.h> 39 40 #include <sys/bus.h> 41 #include <machine/autoconf.h> 42 #include <sys/cpu.h> 43 44 #include <sys/audioio.h> 45 #include <dev/audio_if.h> 46 #include <dev/auconv.h> 47 48 #include <dev/ic/am7930reg.h> 49 #include <dev/ic/am7930var.h> 50 51 #include <dev/tc/tcvar.h> 52 #include <dev/tc/ioasicreg.h> 53 #include <dev/tc/ioasicvar.h> 54 55 #ifdef AUDIO_DEBUG 56 #define DPRINTF(x) if (am7930debug) printf x 57 #else 58 #define DPRINTF(x) 59 #endif /* AUDIO_DEBUG */ 60 61 #define BBA_MAX_DMA_SEGMENTS 16 62 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 63 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 64 #define BBA_DMABUF_BOUNDARY 0 65 66 struct bba_mem { 67 struct bba_mem *next; 68 bus_addr_t addr; 69 bus_size_t size; 70 void *kva; 71 }; 72 73 struct bba_dma_state { 74 bus_dmamap_t dmam; /* DMA map */ 75 int active; 76 int curseg; /* current segment in DMA buffer */ 77 void (*intr)(void *); /* higher-level audio handler */ 78 void *intr_arg; 79 }; 80 81 struct bba_softc { 82 struct am7930_softc sc_am7930; /* glue to MI code */ 83 84 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 85 bus_space_handle_t sc_bsh; 86 bus_dma_tag_t sc_dmat; 87 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 88 89 struct bba_mem *sc_mem_head; /* list of buffers */ 90 91 struct bba_dma_state sc_tx_dma_state; 92 struct bba_dma_state sc_rx_dma_state; 93 }; 94 95 static int bba_match(device_t, cfdata_t, void *); 96 static void bba_attach(device_t, device_t, void *); 97 98 CFATTACH_DECL(bba, sizeof(struct bba_softc), 99 bba_match, bba_attach, NULL, NULL); 100 101 /* 102 * Define our interface into the am7930 MI driver. 103 */ 104 105 static uint8_t bba_codec_iread(struct am7930_softc *, int); 106 static uint16_t bba_codec_iread16(struct am7930_softc *, int); 107 static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 108 static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 109 static void bba_onopen(struct am7930_softc *); 110 static void bba_onclose(struct am7930_softc *); 111 112 static stream_filter_factory_t bba_output_conv; 113 static stream_filter_factory_t bba_input_conv; 114 static int bba_output_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, 115 int); 116 static int bba_input_conv_fetch_to(stream_fetcher_t *, audio_stream_t *, 117 int); 118 119 struct am7930_glue bba_glue = { 120 bba_codec_iread, 121 bba_codec_iwrite, 122 bba_codec_iread16, 123 bba_codec_iwrite16, 124 bba_onopen, 125 bba_onclose, 126 4, 127 bba_input_conv, 128 bba_output_conv, 129 }; 130 131 /* 132 * Define our interface to the higher level audio driver. 133 */ 134 135 static int bba_round_blocksize(void *, int, int, const audio_params_t *); 136 static int bba_halt_output(void *); 137 static int bba_halt_input(void *); 138 static int bba_getdev(void *, struct audio_device *); 139 static void *bba_allocm(void *, int, size_t, struct malloc_type *, int); 140 static void bba_freem(void *, void *, struct malloc_type *); 141 static size_t bba_round_buffersize(void *, int, size_t); 142 static int bba_get_props(void *); 143 static paddr_t bba_mappage(void *, void *, off_t, int); 144 static int bba_trigger_output(void *, void *, void *, int, 145 void (*)(void *), void *, 146 const audio_params_t *); 147 static int bba_trigger_input(void *, void *, void *, int, 148 void (*)(void *), void *, 149 const audio_params_t *); 150 151 static const struct audio_hw_if sa_hw_if = { 152 am7930_open, 153 am7930_close, 154 0, 155 am7930_query_encoding, 156 am7930_set_params, 157 bba_round_blocksize, /* md */ 158 am7930_commit_settings, 159 0, 160 0, 161 0, 162 0, 163 bba_halt_output, /* md */ 164 bba_halt_input, /* md */ 165 0, 166 bba_getdev, 167 0, 168 am7930_set_port, 169 am7930_get_port, 170 am7930_query_devinfo, 171 bba_allocm, /* md */ 172 bba_freem, /* md */ 173 bba_round_buffersize, /* md */ 174 bba_mappage, 175 bba_get_props, 176 bba_trigger_output, /* md */ 177 bba_trigger_input, /* md */ 178 0, 179 }; 180 181 static struct audio_device bba_device = { 182 "am7930", 183 "x", 184 "bba" 185 }; 186 187 static int bba_intr(void *); 188 static void bba_reset(struct bba_softc *, int); 189 static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t); 190 static uint8_t bba_codec_dread(struct am7930_softc *, int); 191 192 static int 193 bba_match(device_t parent, cfdata_t cf, void *aux) 194 { 195 struct ioasicdev_attach_args *ia; 196 197 ia = aux; 198 if (strcmp(ia->iada_modname, "isdn") != 0 && 199 strcmp(ia->iada_modname, "AMD79c30") != 0) 200 return 0; 201 202 return 1; 203 } 204 205 206 static void 207 bba_attach(device_t parent, device_t self, void *aux) 208 { 209 struct ioasicdev_attach_args *ia; 210 struct bba_softc *sc; 211 struct am7930_softc *asc; 212 struct ioasic_softc *iosc = device_private(parent); 213 214 ia = aux; 215 sc = device_private(self); 216 asc = &sc->sc_am7930; 217 sc->sc_bst = iosc->sc_bst; 218 sc->sc_bsh = iosc->sc_bsh; 219 sc->sc_dmat = iosc->sc_dmat; 220 221 /* get the bus space handle for codec */ 222 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 223 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 224 aprint_error_dev(&asc->sc_dev, "unable to map device\n"); 225 return; 226 } 227 228 printf("\n"); 229 230 bba_reset(sc,1); 231 232 /* 233 * Set up glue for MI code early; we use some of it here. 234 */ 235 asc->sc_glue = &bba_glue; 236 237 /* 238 * MI initialisation. We will be doing DMA. 239 */ 240 am7930_init(asc, AUDIOAMD_DMA_MODE); 241 242 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 243 bba_intr, sc); 244 245 audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev); 246 } 247 248 249 static void 250 bba_onopen(struct am7930_softc *sc) 251 { 252 } 253 254 255 static void 256 bba_onclose(struct am7930_softc *sc) 257 { 258 } 259 260 261 static void 262 bba_reset(struct bba_softc *sc, int reset) 263 { 264 uint32_t ssr; 265 266 /* disable any DMA and reset the codec */ 267 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 268 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 269 if (reset) 270 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 271 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 272 DELAY(10); /* 400ns required for codec to reset */ 273 274 /* initialise DMA pointers */ 275 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 276 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 277 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 278 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 279 280 /* take out of reset state */ 281 if (reset) { 282 ssr |= IOASIC_CSR_ISDN_ENABLE; 283 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 284 } 285 286 } 287 288 289 static void * 290 bba_allocm(void *addr, int direction, size_t size, 291 struct malloc_type *pool, int flags) 292 { 293 struct am7930_softc *asc; 294 struct bba_softc *sc; 295 bus_dma_segment_t seg; 296 int rseg; 297 void *kva; 298 struct bba_mem *m; 299 int w; 300 int state; 301 302 DPRINTF(("bba_allocm: size = %zu\n", size)); 303 asc = addr; 304 sc = addr; 305 state = 0; 306 w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK; 307 308 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 309 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, w)) { 310 aprint_error_dev(&asc->sc_dev, "can't allocate DMA buffer\n"); 311 goto bad; 312 } 313 state |= 1; 314 315 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 316 &kva, w | BUS_DMA_COHERENT)) { 317 aprint_error_dev(&asc->sc_dev, "can't map DMA buffer\n"); 318 goto bad; 319 } 320 state |= 2; 321 322 m = malloc(sizeof(struct bba_mem), pool, flags); 323 if (m == NULL) 324 goto bad; 325 m->addr = seg.ds_addr; 326 m->size = seg.ds_len; 327 m->kva = kva; 328 m->next = sc->sc_mem_head; 329 sc->sc_mem_head = m; 330 331 return (void *)kva; 332 333 bad: 334 if (state & 2) 335 bus_dmamem_unmap(sc->sc_dmat, kva, size); 336 if (state & 1) 337 bus_dmamem_free(sc->sc_dmat, &seg, 1); 338 return NULL; 339 } 340 341 342 static void 343 bba_freem(void *addr, void *ptr, struct malloc_type *pool) 344 { 345 struct bba_softc *sc; 346 struct bba_mem **mp, *m; 347 bus_dma_segment_t seg; 348 void *kva; 349 350 sc = addr; 351 kva = (void *)addr; 352 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 353 mp = &(*mp)->next) 354 continue; 355 m = *mp; 356 if (m == NULL) { 357 printf("bba_freem: freeing unallocated memory\n"); 358 return; 359 } 360 *mp = m->next; 361 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 362 363 seg.ds_addr = m->addr; 364 seg.ds_len = m->size; 365 bus_dmamem_free(sc->sc_dmat, &seg, 1); 366 free(m, pool); 367 } 368 369 370 static size_t 371 bba_round_buffersize(void *addr, int direction, size_t size) 372 { 373 374 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 375 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 376 roundup(size, IOASIC_DMA_BLOCKSIZE); 377 } 378 379 380 static int 381 bba_halt_output(void *addr) 382 { 383 struct bba_softc *sc; 384 struct bba_dma_state *d; 385 uint32_t ssr; 386 387 sc = addr; 388 d = &sc->sc_tx_dma_state; 389 /* disable any DMA */ 390 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 391 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 392 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 393 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 394 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 395 396 if (d->active) { 397 bus_dmamap_unload(sc->sc_dmat, d->dmam); 398 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 399 d->active = 0; 400 } 401 402 return 0; 403 } 404 405 406 static int 407 bba_halt_input(void *addr) 408 { 409 struct bba_softc *sc; 410 struct bba_dma_state *d; 411 uint32_t ssr; 412 413 sc = addr; 414 d = &sc->sc_rx_dma_state; 415 /* disable any DMA */ 416 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 417 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 418 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 419 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 420 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 421 422 if (d->active) { 423 bus_dmamap_unload(sc->sc_dmat, d->dmam); 424 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 425 d->active = 0; 426 } 427 428 return 0; 429 } 430 431 432 static int 433 bba_getdev(void *addr, struct audio_device *retp) 434 { 435 436 *retp = bba_device; 437 return 0; 438 } 439 440 441 static int 442 bba_trigger_output(void *addr, void *start, void *end, int blksize, 443 void (*intr)(void *), void *arg, 444 const audio_params_t *param) 445 { 446 struct bba_softc *sc; 447 struct bba_dma_state *d; 448 uint32_t ssr; 449 tc_addr_t phys, nphys; 450 int state; 451 452 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 453 addr, start, end, blksize, intr, arg)); 454 sc = addr; 455 d = &sc->sc_tx_dma_state; 456 state = 0; 457 458 /* disable any DMA */ 459 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 460 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 461 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 462 463 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 464 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 465 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 466 printf("bba_trigger_output: can't create DMA map\n"); 467 goto bad; 468 } 469 state |= 1; 470 471 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 472 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 473 printf("bba_trigger_output: can't load DMA map\n"); 474 goto bad; 475 } 476 state |= 2; 477 478 d->intr = intr; 479 d->intr_arg = arg; 480 d->curseg = 1; 481 482 /* get physical address of buffer start */ 483 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 484 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 485 486 /* setup DMA pointer */ 487 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 488 IOASIC_DMA_ADDR(phys)); 489 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 490 IOASIC_DMA_ADDR(nphys)); 491 492 /* kick off DMA */ 493 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 494 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 495 496 d->active = 1; 497 498 return 0; 499 500 bad: 501 if (state & 2) 502 bus_dmamap_unload(sc->sc_dmat, d->dmam); 503 if (state & 1) 504 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 505 return 1; 506 } 507 508 509 static int 510 bba_trigger_input(void *addr, void *start, void *end, int blksize, 511 void (*intr)(void *), void *arg, const audio_params_t *param) 512 { 513 struct bba_softc *sc; 514 struct bba_dma_state *d; 515 tc_addr_t phys, nphys; 516 uint32_t ssr; 517 int state = 0; 518 519 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 520 addr, start, end, blksize, intr, arg)); 521 sc = (struct bba_softc *)addr; 522 d = &sc->sc_rx_dma_state; 523 state = 0; 524 525 /* disable any DMA */ 526 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 527 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 528 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 529 530 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 531 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 532 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 533 printf("bba_trigger_input: can't create DMA map\n"); 534 goto bad; 535 } 536 state |= 1; 537 538 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 539 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 540 printf("bba_trigger_input: can't load DMA map\n"); 541 goto bad; 542 } 543 state |= 2; 544 545 d->intr = intr; 546 d->intr_arg = arg; 547 d->curseg = 1; 548 549 /* get physical address of buffer start */ 550 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 551 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 552 553 /* setup DMA pointer */ 554 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 555 IOASIC_DMA_ADDR(phys)); 556 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 557 IOASIC_DMA_ADDR(nphys)); 558 559 /* kick off DMA */ 560 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 561 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 562 563 d->active = 1; 564 565 return 0; 566 567 bad: 568 if (state & 2) 569 bus_dmamap_unload(sc->sc_dmat, d->dmam); 570 if (state & 1) 571 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 572 return 1; 573 } 574 575 static int 576 bba_intr(void *addr) 577 { 578 struct bba_softc *sc; 579 struct bba_dma_state *d; 580 tc_addr_t nphys; 581 int s, mask; 582 583 sc = addr; 584 s = splaudio(); 585 586 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 587 588 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 589 d = &sc->sc_tx_dma_state; 590 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 591 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 592 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 593 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 594 if (d->intr != NULL) 595 (*d->intr)(d->intr_arg); 596 } 597 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 598 d = &sc->sc_rx_dma_state; 599 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 600 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 601 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 602 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 603 if (d->intr != NULL) 604 (*d->intr)(d->intr_arg); 605 } 606 607 splx(s); 608 609 return 0; 610 } 611 612 static int 613 bba_get_props(void *addr) 614 { 615 616 return AUDIO_PROP_MMAP | am7930_get_props(addr); 617 } 618 619 static paddr_t 620 bba_mappage(void *addr, void *mem, off_t offset, int prot) 621 { 622 struct bba_softc *sc; 623 struct bba_mem **mp; 624 bus_dma_segment_t seg; 625 void *kva; 626 627 sc = addr; 628 kva = (void *)mem; 629 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 630 mp = &(*mp)->next) 631 continue; 632 if (*mp == NULL || offset < 0) { 633 return -1; 634 } 635 636 seg.ds_addr = (*mp)->addr; 637 seg.ds_len = (*mp)->size; 638 639 return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset, 640 prot, BUS_DMA_WAITOK); 641 } 642 643 static stream_filter_t * 644 bba_input_conv(struct audio_softc *sc, const audio_params_t *from, 645 const audio_params_t *to) 646 { 647 return auconv_nocontext_filter_factory(bba_input_conv_fetch_to); 648 } 649 650 static int 651 bba_input_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 652 int max_used) 653 { 654 stream_filter_t *this; 655 int m, err; 656 657 this = (stream_filter_t *)self; 658 if ((err = this->prev->fetch_to(this->prev, this->src, max_used * 4))) 659 return err; 660 m = dst->end - dst->start; 661 m = min(m, max_used); 662 FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) { 663 *d = ((*(const uint32_t *)s) >> 16) & 0xff; 664 } FILTER_LOOP_EPILOGUE(this->src, dst); 665 return 0; 666 } 667 668 static stream_filter_t * 669 bba_output_conv(struct audio_softc *sc, const audio_params_t *from, 670 const audio_params_t *to) 671 { 672 return auconv_nocontext_filter_factory(bba_output_conv_fetch_to); 673 } 674 675 static int 676 bba_output_conv_fetch_to(stream_fetcher_t *self, audio_stream_t *dst, 677 int max_used) 678 { 679 stream_filter_t *this; 680 int m, err; 681 682 this = (stream_filter_t *)self; 683 max_used = (max_used + 3) & ~3; 684 if ((err = this->prev->fetch_to(this->prev, this->src, max_used / 4))) 685 return err; 686 m = (dst->end - dst->start) & ~3; 687 m = min(m, max_used); 688 FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) { 689 *(uint32_t *)d = (*s << 16); 690 } FILTER_LOOP_EPILOGUE(this->src, dst); 691 return 0; 692 } 693 694 static int 695 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 696 { 697 698 return IOASIC_DMA_BLOCKSIZE; 699 } 700 701 702 /* indirect write */ 703 static void 704 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 705 { 706 707 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 708 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 709 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 710 } 711 712 713 static void 714 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 715 { 716 717 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 718 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 719 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 720 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 721 } 722 723 724 static uint16_t 725 bba_codec_iread16(struct am7930_softc *sc, int reg) 726 { 727 uint16_t val; 728 729 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 730 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 731 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 732 val |= bba_codec_dread(sc, AM7930_DREG_DR); 733 734 return val; 735 } 736 737 738 /* indirect read */ 739 static uint8_t 740 bba_codec_iread(struct am7930_softc *sc, int reg) 741 { 742 uint8_t val; 743 744 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 745 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 746 val = bba_codec_dread(sc, AM7930_DREG_DR); 747 748 DPRINTF(("read 0x%x (%d)\n", val, val)); 749 750 return val; 751 } 752 753 /* direct write */ 754 static void 755 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 756 { 757 struct bba_softc *sc; 758 759 sc = (struct bba_softc *)asc; 760 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 761 762 #if defined(__alpha__) 763 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 764 reg << 2, val << 8); 765 #else 766 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 767 reg << 6, val); 768 #endif 769 } 770 771 /* direct read */ 772 static uint8_t 773 bba_codec_dread(struct am7930_softc *asc, int reg) 774 { 775 struct bba_softc *sc; 776 777 sc = (struct bba_softc *)asc; 778 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 779 780 #if defined(__alpha__) 781 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 782 reg << 2) >> 8) & 0xff); 783 #else 784 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 785 reg << 6) & 0xff); 786 #endif 787 } 788
Indexes created Fri Sep 26 08:10:20 GMT 2025