bba.c revision 1.38.4.1
1 /* $NetBSD: bba.c,v 1.38.4.1 2011/11/20 10:56:19 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* maxine/alpha baseboard audio (bba) */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.38.4.1 2011/11/20 10:56:19 mrg Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/kmem.h> 39 40 #include <sys/bus.h> 41 #include <machine/autoconf.h> 42 #include <sys/cpu.h> 43 44 #include <sys/audioio.h> 45 #include <dev/audio_if.h> 46 #include <dev/auconv.h> 47 48 #include <dev/ic/am7930reg.h> 49 #include <dev/ic/am7930var.h> 50 51 #include <dev/tc/tcvar.h> 52 #include <dev/tc/ioasicreg.h> 53 #include <dev/tc/ioasicvar.h> 54 55 #ifdef AUDIO_DEBUG 56 #define DPRINTF(x) if (am7930debug) printf x 57 #else 58 #define DPRINTF(x) 59 #endif /* AUDIO_DEBUG */ 60 61 #define BBA_MAX_DMA_SEGMENTS 16 62 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 63 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 64 #define BBA_DMABUF_BOUNDARY 0 65 66 struct bba_mem { 67 struct bba_mem *next; 68 bus_addr_t addr; 69 bus_size_t size; 70 void *kva; 71 }; 72 73 struct bba_dma_state { 74 bus_dmamap_t dmam; /* DMA map */ 75 int active; 76 int curseg; /* current segment in DMA buffer */ 77 void (*intr)(void *); /* higher-level audio handler */ 78 void *intr_arg; 79 }; 80 81 struct bba_softc { 82 struct am7930_softc sc_am7930; /* glue to MI code */ 83 84 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 85 bus_space_handle_t sc_bsh; 86 bus_dma_tag_t sc_dmat; 87 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 88 89 struct bba_mem *sc_mem_head; /* list of buffers */ 90 91 struct bba_dma_state sc_tx_dma_state; 92 struct bba_dma_state sc_rx_dma_state; 93 }; 94 95 static int bba_match(device_t, cfdata_t, void *); 96 static void bba_attach(device_t, device_t, void *); 97 98 CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc), 99 bba_match, bba_attach, NULL, NULL); 100 101 /* 102 * Define our interface into the am7930 MI driver. 103 */ 104 105 static uint8_t bba_codec_iread(struct am7930_softc *, int); 106 static uint16_t bba_codec_iread16(struct am7930_softc *, int); 107 static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 108 static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 109 static void bba_onopen(struct am7930_softc *); 110 static void bba_onclose(struct am7930_softc *); 111 112 static stream_filter_factory_t bba_output_conv; 113 static stream_filter_factory_t bba_input_conv; 114 static int bba_output_conv_fetch_to(struct audio_softc *, stream_fetcher_t *, 115 audio_stream_t *, int); 116 static int bba_input_conv_fetch_to(struct audio_softc *, stream_fetcher_t *, 117 audio_stream_t *, int); 118 119 struct am7930_glue bba_glue = { 120 bba_codec_iread, 121 bba_codec_iwrite, 122 bba_codec_iread16, 123 bba_codec_iwrite16, 124 bba_onopen, 125 bba_onclose, 126 4, 127 bba_input_conv, 128 bba_output_conv, 129 }; 130 131 /* 132 * Define our interface to the higher level audio driver. 133 */ 134 135 static int bba_round_blocksize(void *, int, int, const audio_params_t *); 136 static int bba_halt_output(void *); 137 static int bba_halt_input(void *); 138 static int bba_getdev(void *, struct audio_device *); 139 static void *bba_allocm(void *, int, size_t); 140 static void bba_freem(void *, void *, size_t); 141 static size_t bba_round_buffersize(void *, int, size_t); 142 static int bba_get_props(void *); 143 static paddr_t bba_mappage(void *, void *, off_t, int); 144 static int bba_trigger_output(void *, void *, void *, int, 145 void (*)(void *), void *, 146 const audio_params_t *); 147 static int bba_trigger_input(void *, void *, void *, int, 148 void (*)(void *), void *, 149 const audio_params_t *); 150 static void bba_get_locks(void *opaque, kmutex_t **intr, 151 kmutex_t **thread); 152 153 static const struct audio_hw_if sa_hw_if = { 154 am7930_open, 155 am7930_close, 156 0, 157 am7930_query_encoding, 158 am7930_set_params, 159 bba_round_blocksize, /* md */ 160 am7930_commit_settings, 161 0, 162 0, 163 0, 164 0, 165 bba_halt_output, /* md */ 166 bba_halt_input, /* md */ 167 0, 168 bba_getdev, 169 0, 170 am7930_set_port, 171 am7930_get_port, 172 am7930_query_devinfo, 173 bba_allocm, /* md */ 174 bba_freem, /* md */ 175 bba_round_buffersize, /* md */ 176 bba_mappage, 177 bba_get_props, 178 bba_trigger_output, /* md */ 179 bba_trigger_input, /* md */ 180 0, 181 0, 182 bba_get_locks, 183 }; 184 185 static struct audio_device bba_device = { 186 "am7930", 187 "x", 188 "bba" 189 }; 190 191 static int bba_intr(void *); 192 static void bba_reset(struct bba_softc *, int); 193 static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t); 194 static uint8_t bba_codec_dread(struct am7930_softc *, int); 195 196 static int 197 bba_match(device_t parent, cfdata_t cf, void *aux) 198 { 199 struct ioasicdev_attach_args *ia; 200 201 ia = aux; 202 if (strcmp(ia->iada_modname, "isdn") != 0 && 203 strcmp(ia->iada_modname, "AMD79c30") != 0) 204 return 0; 205 206 return 1; 207 } 208 209 210 static void 211 bba_attach(device_t parent, device_t self, void *aux) 212 { 213 struct ioasicdev_attach_args *ia; 214 struct bba_softc *sc; 215 struct am7930_softc *asc; 216 struct ioasic_softc *iosc = device_private(parent); 217 218 ia = aux; 219 sc = device_private(self); 220 asc = &sc->sc_am7930; 221 asc->sc_dev = self; 222 sc->sc_bst = iosc->sc_bst; 223 sc->sc_bsh = iosc->sc_bsh; 224 sc->sc_dmat = iosc->sc_dmat; 225 226 /* get the bus space handle for codec */ 227 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 228 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 229 aprint_error_dev(self, "unable to map device\n"); 230 return; 231 } 232 233 printf("\n"); 234 235 bba_reset(sc,1); 236 237 /* 238 * Set up glue for MI code early; we use some of it here. 239 */ 240 asc->sc_glue = &bba_glue; 241 242 /* 243 * MI initialisation. We will be doing DMA. 244 */ 245 am7930_init(asc, AUDIOAMD_DMA_MODE); 246 247 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 248 bba_intr, sc); 249 250 audio_attach_mi(&sa_hw_if, asc, self); 251 } 252 253 254 static void 255 bba_onopen(struct am7930_softc *sc) 256 { 257 } 258 259 260 static void 261 bba_onclose(struct am7930_softc *sc) 262 { 263 } 264 265 266 static void 267 bba_reset(struct bba_softc *sc, int reset) 268 { 269 uint32_t ssr; 270 271 /* disable any DMA and reset the codec */ 272 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 273 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 274 if (reset) 275 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 276 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 277 DELAY(10); /* 400ns required for codec to reset */ 278 279 /* initialise DMA pointers */ 280 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 281 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 282 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 283 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 284 285 /* take out of reset state */ 286 if (reset) { 287 ssr |= IOASIC_CSR_ISDN_ENABLE; 288 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 289 } 290 291 } 292 293 294 static void * 295 bba_allocm(void *addr, int direction, size_t size) 296 { 297 struct am7930_softc *asc; 298 struct bba_softc *sc; 299 bus_dma_segment_t seg; 300 int rseg; 301 void *kva; 302 struct bba_mem *m; 303 int state; 304 305 DPRINTF(("bba_allocm: size = %zu\n", size)); 306 asc = addr; 307 sc = addr; 308 state = 0; 309 310 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 311 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) { 312 aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n"); 313 goto bad; 314 } 315 state |= 1; 316 317 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 318 &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) { 319 aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n"); 320 goto bad; 321 } 322 state |= 2; 323 324 m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP); 325 if (m == NULL) 326 goto bad; 327 m->addr = seg.ds_addr; 328 m->size = seg.ds_len; 329 m->kva = kva; 330 m->next = sc->sc_mem_head; 331 sc->sc_mem_head = m; 332 333 return (void *)kva; 334 335 bad: 336 if (state & 2) 337 bus_dmamem_unmap(sc->sc_dmat, kva, size); 338 if (state & 1) 339 bus_dmamem_free(sc->sc_dmat, &seg, 1); 340 return NULL; 341 } 342 343 344 static void 345 bba_freem(void *addr, void *ptr, size_t size) 346 { 347 struct bba_softc *sc; 348 struct bba_mem **mp, *m; 349 bus_dma_segment_t seg; 350 void *kva; 351 352 sc = addr; 353 kva = (void *)addr; 354 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 355 mp = &(*mp)->next) 356 continue; 357 m = *mp; 358 if (m == NULL) { 359 printf("bba_freem: freeing unallocated memory\n"); 360 return; 361 } 362 *mp = m->next; 363 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 364 365 seg.ds_addr = m->addr; 366 seg.ds_len = m->size; 367 bus_dmamem_free(sc->sc_dmat, &seg, 1); 368 kmem_free(m, sizeof(struct bba_mem)); 369 } 370 371 372 static size_t 373 bba_round_buffersize(void *addr, int direction, size_t size) 374 { 375 376 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 377 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 378 roundup(size, IOASIC_DMA_BLOCKSIZE); 379 } 380 381 382 static int 383 bba_halt_output(void *addr) 384 { 385 struct bba_softc *sc; 386 struct bba_dma_state *d; 387 uint32_t ssr; 388 389 sc = addr; 390 d = &sc->sc_tx_dma_state; 391 /* disable any DMA */ 392 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 393 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 394 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 395 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 396 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 397 398 if (d->active) { 399 bus_dmamap_unload(sc->sc_dmat, d->dmam); 400 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 401 d->active = 0; 402 } 403 404 return 0; 405 } 406 407 408 static int 409 bba_halt_input(void *addr) 410 { 411 struct bba_softc *sc; 412 struct bba_dma_state *d; 413 uint32_t ssr; 414 415 sc = addr; 416 d = &sc->sc_rx_dma_state; 417 /* disable any DMA */ 418 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 419 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 420 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 421 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 422 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 423 424 if (d->active) { 425 bus_dmamap_unload(sc->sc_dmat, d->dmam); 426 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 427 d->active = 0; 428 } 429 430 return 0; 431 } 432 433 434 static int 435 bba_getdev(void *addr, struct audio_device *retp) 436 { 437 438 *retp = bba_device; 439 return 0; 440 } 441 442 443 static int 444 bba_trigger_output(void *addr, void *start, void *end, int blksize, 445 void (*intr)(void *), void *arg, 446 const audio_params_t *param) 447 { 448 struct bba_softc *sc; 449 struct bba_dma_state *d; 450 uint32_t ssr; 451 tc_addr_t phys, nphys; 452 int state; 453 454 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 455 addr, start, end, blksize, intr, arg)); 456 sc = addr; 457 d = &sc->sc_tx_dma_state; 458 state = 0; 459 460 /* disable any DMA */ 461 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 462 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 463 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 464 465 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 466 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 467 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 468 printf("bba_trigger_output: can't create DMA map\n"); 469 goto bad; 470 } 471 state |= 1; 472 473 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 474 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 475 printf("bba_trigger_output: can't load DMA map\n"); 476 goto bad; 477 } 478 state |= 2; 479 480 d->intr = intr; 481 d->intr_arg = arg; 482 d->curseg = 1; 483 484 /* get physical address of buffer start */ 485 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 486 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 487 488 /* setup DMA pointer */ 489 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 490 IOASIC_DMA_ADDR(phys)); 491 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 492 IOASIC_DMA_ADDR(nphys)); 493 494 /* kick off DMA */ 495 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 496 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 497 498 d->active = 1; 499 500 return 0; 501 502 bad: 503 if (state & 2) 504 bus_dmamap_unload(sc->sc_dmat, d->dmam); 505 if (state & 1) 506 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 507 return 1; 508 } 509 510 511 static int 512 bba_trigger_input(void *addr, void *start, void *end, int blksize, 513 void (*intr)(void *), void *arg, const audio_params_t *param) 514 { 515 struct bba_softc *sc; 516 struct bba_dma_state *d; 517 tc_addr_t phys, nphys; 518 uint32_t ssr; 519 int state = 0; 520 521 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 522 addr, start, end, blksize, intr, arg)); 523 sc = addr; 524 d = &sc->sc_rx_dma_state; 525 state = 0; 526 527 /* disable any DMA */ 528 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 529 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 530 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 531 532 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 533 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 534 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 535 printf("bba_trigger_input: can't create DMA map\n"); 536 goto bad; 537 } 538 state |= 1; 539 540 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 541 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 542 printf("bba_trigger_input: can't load DMA map\n"); 543 goto bad; 544 } 545 state |= 2; 546 547 d->intr = intr; 548 d->intr_arg = arg; 549 d->curseg = 1; 550 551 /* get physical address of buffer start */ 552 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 553 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 554 555 /* setup DMA pointer */ 556 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 557 IOASIC_DMA_ADDR(phys)); 558 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 559 IOASIC_DMA_ADDR(nphys)); 560 561 /* kick off DMA */ 562 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 563 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 564 565 d->active = 1; 566 567 return 0; 568 569 bad: 570 if (state & 2) 571 bus_dmamap_unload(sc->sc_dmat, d->dmam); 572 if (state & 1) 573 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 574 return 1; 575 } 576 577 static void 578 bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread) 579 { 580 struct bba_softc *bsc = opaque; 581 struct am7930_softc *sc = &bsc->sc_am7930; 582 583 *intr = &sc->sc_intr_lock; 584 *thread = &sc->sc_lock; 585 } 586 587 static int 588 bba_intr(void *addr) 589 { 590 struct bba_softc *sc; 591 struct bba_dma_state *d; 592 tc_addr_t nphys; 593 int mask; 594 595 sc = addr; 596 mutex_enter(&sc->sc_am7930.sc_intr_lock); 597 598 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 599 600 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 601 d = &sc->sc_tx_dma_state; 602 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 603 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 604 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 605 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 606 if (d->intr != NULL) 607 (*d->intr)(d->intr_arg); 608 } 609 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 610 d = &sc->sc_rx_dma_state; 611 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 612 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 613 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 614 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 615 if (d->intr != NULL) 616 (*d->intr)(d->intr_arg); 617 } 618 619 mutex_exit(&sc->sc_am7930.sc_intr_lock); 620 621 return 0; 622 } 623 624 static int 625 bba_get_props(void *addr) 626 { 627 628 return AUDIO_PROP_MMAP | am7930_get_props(addr); 629 } 630 631 static paddr_t 632 bba_mappage(void *addr, void *mem, off_t offset, int prot) 633 { 634 struct bba_softc *sc; 635 struct bba_mem **mp; 636 bus_dma_segment_t seg; 637 void *kva; 638 639 sc = addr; 640 kva = (void *)mem; 641 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 642 mp = &(*mp)->next) 643 continue; 644 if (*mp == NULL || offset < 0) { 645 return -1; 646 } 647 648 seg.ds_addr = (*mp)->addr; 649 seg.ds_len = (*mp)->size; 650 651 return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset, 652 prot, BUS_DMA_WAITOK); 653 } 654 655 static stream_filter_t * 656 bba_input_conv(struct audio_softc *sc, const audio_params_t *from, 657 const audio_params_t *to) 658 { 659 return auconv_nocontext_filter_factory(bba_input_conv_fetch_to); 660 } 661 662 static int 663 bba_input_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self, 664 audio_stream_t *dst, int max_used) 665 { 666 stream_filter_t *this; 667 int m, err; 668 669 this = (stream_filter_t *)self; 670 if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used * 4))) 671 return err; 672 m = dst->end - dst->start; 673 m = min(m, max_used); 674 FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) { 675 *d = ((*(const uint32_t *)s) >> 16) & 0xff; 676 } FILTER_LOOP_EPILOGUE(this->src, dst); 677 return 0; 678 } 679 680 static stream_filter_t * 681 bba_output_conv(struct audio_softc *sc, const audio_params_t *from, 682 const audio_params_t *to) 683 { 684 return auconv_nocontext_filter_factory(bba_output_conv_fetch_to); 685 } 686 687 static int 688 bba_output_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self, 689 audio_stream_t *dst, int max_used) 690 { 691 stream_filter_t *this; 692 int m, err; 693 694 this = (stream_filter_t *)self; 695 max_used = (max_used + 3) & ~3; 696 if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used / 4))) 697 return err; 698 m = (dst->end - dst->start) & ~3; 699 m = min(m, max_used); 700 FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) { 701 *(uint32_t *)d = (*s << 16); 702 } FILTER_LOOP_EPILOGUE(this->src, dst); 703 return 0; 704 } 705 706 static int 707 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 708 { 709 710 return IOASIC_DMA_BLOCKSIZE; 711 } 712 713 714 /* indirect write */ 715 static void 716 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 717 { 718 719 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 720 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 721 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 722 } 723 724 725 static void 726 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 727 { 728 729 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 730 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 731 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 732 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 733 } 734 735 736 static uint16_t 737 bba_codec_iread16(struct am7930_softc *sc, int reg) 738 { 739 uint16_t val; 740 741 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 742 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 743 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 744 val |= bba_codec_dread(sc, AM7930_DREG_DR); 745 746 return val; 747 } 748 749 750 /* indirect read */ 751 static uint8_t 752 bba_codec_iread(struct am7930_softc *sc, int reg) 753 { 754 uint8_t val; 755 756 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 757 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 758 val = bba_codec_dread(sc, AM7930_DREG_DR); 759 760 DPRINTF(("read 0x%x (%d)\n", val, val)); 761 762 return val; 763 } 764 765 /* direct write */ 766 static void 767 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 768 { 769 struct bba_softc *sc; 770 771 sc = (struct bba_softc *)asc; 772 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 773 774 #if defined(__alpha__) 775 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 776 reg << 2, val << 8); 777 #else 778 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 779 reg << 6, val); 780 #endif 781 } 782 783 /* direct read */ 784 static uint8_t 785 bba_codec_dread(struct am7930_softc *asc, int reg) 786 { 787 struct bba_softc *sc; 788 789 sc = (struct bba_softc *)asc; 790 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 791 792 #if defined(__alpha__) 793 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 794 reg << 2) >> 8) & 0xff); 795 #else 796 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 797 reg << 6) & 0xff); 798 #endif 799 } 800
Indexes created Tue Oct 14 06:10:07 GMT 2025