bba.c revision 1.39
1 /* $NetBSD: bba.c,v 1.39 2011/11/23 23:07:36 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* maxine/alpha baseboard audio (bba) */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.39 2011/11/23 23:07:36 jmcneill Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/kmem.h> 39 40 #include <sys/bus.h> 41 #include <machine/autoconf.h> 42 #include <sys/cpu.h> 43 44 #include <sys/audioio.h> 45 #include <dev/audio_if.h> 46 #include <dev/auconv.h> 47 48 #include <dev/ic/am7930reg.h> 49 #include <dev/ic/am7930var.h> 50 51 #include <dev/tc/tcvar.h> 52 #include <dev/tc/ioasicreg.h> 53 #include <dev/tc/ioasicvar.h> 54 55 #ifdef AUDIO_DEBUG 56 #define DPRINTF(x) if (am7930debug) printf x 57 #else 58 #define DPRINTF(x) 59 #endif /* AUDIO_DEBUG */ 60 61 #define BBA_MAX_DMA_SEGMENTS 16 62 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 63 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 64 #define BBA_DMABUF_BOUNDARY 0 65 66 struct bba_mem { 67 struct bba_mem *next; 68 bus_addr_t addr; 69 bus_size_t size; 70 void *kva; 71 }; 72 73 struct bba_dma_state { 74 bus_dmamap_t dmam; /* DMA map */ 75 int active; 76 int curseg; /* current segment in DMA buffer */ 77 void (*intr)(void *); /* higher-level audio handler */ 78 void *intr_arg; 79 }; 80 81 struct bba_softc { 82 struct am7930_softc sc_am7930; /* glue to MI code */ 83 84 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 85 bus_space_handle_t sc_bsh; 86 bus_dma_tag_t sc_dmat; 87 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 88 89 struct bba_mem *sc_mem_head; /* list of buffers */ 90 91 struct bba_dma_state sc_tx_dma_state; 92 struct bba_dma_state sc_rx_dma_state; 93 }; 94 95 static int bba_match(device_t, cfdata_t, void *); 96 static void bba_attach(device_t, device_t, void *); 97 98 CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc), 99 bba_match, bba_attach, NULL, NULL); 100 101 /* 102 * Define our interface into the am7930 MI driver. 103 */ 104 105 static uint8_t bba_codec_iread(struct am7930_softc *, int); 106 static uint16_t bba_codec_iread16(struct am7930_softc *, int); 107 static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 108 static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 109 static void bba_onopen(struct am7930_softc *); 110 static void bba_onclose(struct am7930_softc *); 111 112 static stream_filter_factory_t bba_output_conv; 113 static stream_filter_factory_t bba_input_conv; 114 static int bba_output_conv_fetch_to(struct audio_softc *, stream_fetcher_t *, 115 audio_stream_t *, int); 116 static int bba_input_conv_fetch_to(struct audio_softc *, stream_fetcher_t *, 117 audio_stream_t *, int); 118 119 struct am7930_glue bba_glue = { 120 bba_codec_iread, 121 bba_codec_iwrite, 122 bba_codec_iread16, 123 bba_codec_iwrite16, 124 bba_onopen, 125 bba_onclose, 126 4, 127 bba_input_conv, 128 bba_output_conv, 129 }; 130 131 /* 132 * Define our interface to the higher level audio driver. 133 */ 134 135 static int bba_round_blocksize(void *, int, int, const audio_params_t *); 136 static int bba_halt_output(void *); 137 static int bba_halt_input(void *); 138 static int bba_getdev(void *, struct audio_device *); 139 static void *bba_allocm(void *, int, size_t); 140 static void bba_freem(void *, void *, size_t); 141 static size_t bba_round_buffersize(void *, int, size_t); 142 static int bba_get_props(void *); 143 static paddr_t bba_mappage(void *, void *, off_t, int); 144 static int bba_trigger_output(void *, void *, void *, int, 145 void (*)(void *), void *, 146 const audio_params_t *); 147 static int bba_trigger_input(void *, void *, void *, int, 148 void (*)(void *), void *, 149 const audio_params_t *); 150 static void bba_get_locks(void *opaque, kmutex_t **intr, 151 kmutex_t **thread); 152 153 static const struct audio_hw_if sa_hw_if = { 154 am7930_open, 155 am7930_close, 156 0, 157 am7930_query_encoding, 158 am7930_set_params, 159 bba_round_blocksize, /* md */ 160 am7930_commit_settings, 161 0, 162 0, 163 0, 164 0, 165 bba_halt_output, /* md */ 166 bba_halt_input, /* md */ 167 0, 168 bba_getdev, 169 0, 170 am7930_set_port, 171 am7930_get_port, 172 am7930_query_devinfo, 173 bba_allocm, /* md */ 174 bba_freem, /* md */ 175 bba_round_buffersize, /* md */ 176 bba_mappage, 177 bba_get_props, 178 bba_trigger_output, /* md */ 179 bba_trigger_input, /* md */ 180 0, 181 bba_get_locks, 182 }; 183 184 static struct audio_device bba_device = { 185 "am7930", 186 "x", 187 "bba" 188 }; 189 190 static int bba_intr(void *); 191 static void bba_reset(struct bba_softc *, int); 192 static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t); 193 static uint8_t bba_codec_dread(struct am7930_softc *, int); 194 195 static int 196 bba_match(device_t parent, cfdata_t cf, void *aux) 197 { 198 struct ioasicdev_attach_args *ia; 199 200 ia = aux; 201 if (strcmp(ia->iada_modname, "isdn") != 0 && 202 strcmp(ia->iada_modname, "AMD79c30") != 0) 203 return 0; 204 205 return 1; 206 } 207 208 209 static void 210 bba_attach(device_t parent, device_t self, void *aux) 211 { 212 struct ioasicdev_attach_args *ia; 213 struct bba_softc *sc; 214 struct am7930_softc *asc; 215 struct ioasic_softc *iosc = device_private(parent); 216 217 ia = aux; 218 sc = device_private(self); 219 asc = &sc->sc_am7930; 220 asc->sc_dev = self; 221 sc->sc_bst = iosc->sc_bst; 222 sc->sc_bsh = iosc->sc_bsh; 223 sc->sc_dmat = iosc->sc_dmat; 224 225 /* get the bus space handle for codec */ 226 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 227 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 228 aprint_error_dev(self, "unable to map device\n"); 229 return; 230 } 231 232 printf("\n"); 233 234 bba_reset(sc,1); 235 236 /* 237 * Set up glue for MI code early; we use some of it here. 238 */ 239 asc->sc_glue = &bba_glue; 240 241 /* 242 * MI initialisation. We will be doing DMA. 243 */ 244 am7930_init(asc, AUDIOAMD_DMA_MODE); 245 246 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 247 bba_intr, sc); 248 249 audio_attach_mi(&sa_hw_if, asc, self); 250 } 251 252 253 static void 254 bba_onopen(struct am7930_softc *sc) 255 { 256 } 257 258 259 static void 260 bba_onclose(struct am7930_softc *sc) 261 { 262 } 263 264 265 static void 266 bba_reset(struct bba_softc *sc, int reset) 267 { 268 uint32_t ssr; 269 270 /* disable any DMA and reset the codec */ 271 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 272 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 273 if (reset) 274 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 275 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 276 DELAY(10); /* 400ns required for codec to reset */ 277 278 /* initialise DMA pointers */ 279 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 280 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 281 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 282 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 283 284 /* take out of reset state */ 285 if (reset) { 286 ssr |= IOASIC_CSR_ISDN_ENABLE; 287 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 288 } 289 290 } 291 292 293 static void * 294 bba_allocm(void *addr, int direction, size_t size) 295 { 296 struct am7930_softc *asc; 297 struct bba_softc *sc; 298 bus_dma_segment_t seg; 299 int rseg; 300 void *kva; 301 struct bba_mem *m; 302 int state; 303 304 DPRINTF(("bba_allocm: size = %zu\n", size)); 305 asc = addr; 306 sc = addr; 307 state = 0; 308 309 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 310 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) { 311 aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n"); 312 goto bad; 313 } 314 state |= 1; 315 316 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 317 &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) { 318 aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n"); 319 goto bad; 320 } 321 state |= 2; 322 323 m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP); 324 if (m == NULL) 325 goto bad; 326 m->addr = seg.ds_addr; 327 m->size = seg.ds_len; 328 m->kva = kva; 329 m->next = sc->sc_mem_head; 330 sc->sc_mem_head = m; 331 332 return (void *)kva; 333 334 bad: 335 if (state & 2) 336 bus_dmamem_unmap(sc->sc_dmat, kva, size); 337 if (state & 1) 338 bus_dmamem_free(sc->sc_dmat, &seg, 1); 339 return NULL; 340 } 341 342 343 static void 344 bba_freem(void *addr, void *ptr, size_t size) 345 { 346 struct bba_softc *sc; 347 struct bba_mem **mp, *m; 348 bus_dma_segment_t seg; 349 void *kva; 350 351 sc = addr; 352 kva = (void *)addr; 353 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 354 mp = &(*mp)->next) 355 continue; 356 m = *mp; 357 if (m == NULL) { 358 printf("bba_freem: freeing unallocated memory\n"); 359 return; 360 } 361 *mp = m->next; 362 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 363 364 seg.ds_addr = m->addr; 365 seg.ds_len = m->size; 366 bus_dmamem_free(sc->sc_dmat, &seg, 1); 367 kmem_free(m, sizeof(struct bba_mem)); 368 } 369 370 371 static size_t 372 bba_round_buffersize(void *addr, int direction, size_t size) 373 { 374 375 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 376 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 377 roundup(size, IOASIC_DMA_BLOCKSIZE); 378 } 379 380 381 static int 382 bba_halt_output(void *addr) 383 { 384 struct bba_softc *sc; 385 struct bba_dma_state *d; 386 uint32_t ssr; 387 388 sc = addr; 389 d = &sc->sc_tx_dma_state; 390 /* disable any DMA */ 391 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 392 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 393 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 394 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 395 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 396 397 if (d->active) { 398 bus_dmamap_unload(sc->sc_dmat, d->dmam); 399 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 400 d->active = 0; 401 } 402 403 return 0; 404 } 405 406 407 static int 408 bba_halt_input(void *addr) 409 { 410 struct bba_softc *sc; 411 struct bba_dma_state *d; 412 uint32_t ssr; 413 414 sc = addr; 415 d = &sc->sc_rx_dma_state; 416 /* disable any DMA */ 417 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 418 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 419 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 420 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 421 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 422 423 if (d->active) { 424 bus_dmamap_unload(sc->sc_dmat, d->dmam); 425 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 426 d->active = 0; 427 } 428 429 return 0; 430 } 431 432 433 static int 434 bba_getdev(void *addr, struct audio_device *retp) 435 { 436 437 *retp = bba_device; 438 return 0; 439 } 440 441 442 static int 443 bba_trigger_output(void *addr, void *start, void *end, int blksize, 444 void (*intr)(void *), void *arg, 445 const audio_params_t *param) 446 { 447 struct bba_softc *sc; 448 struct bba_dma_state *d; 449 uint32_t ssr; 450 tc_addr_t phys, nphys; 451 int state; 452 453 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 454 addr, start, end, blksize, intr, arg)); 455 sc = addr; 456 d = &sc->sc_tx_dma_state; 457 state = 0; 458 459 /* disable any DMA */ 460 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 461 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 462 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 463 464 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 465 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 466 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 467 printf("bba_trigger_output: can't create DMA map\n"); 468 goto bad; 469 } 470 state |= 1; 471 472 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 473 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 474 printf("bba_trigger_output: can't load DMA map\n"); 475 goto bad; 476 } 477 state |= 2; 478 479 d->intr = intr; 480 d->intr_arg = arg; 481 d->curseg = 1; 482 483 /* get physical address of buffer start */ 484 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 485 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 486 487 /* setup DMA pointer */ 488 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 489 IOASIC_DMA_ADDR(phys)); 490 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 491 IOASIC_DMA_ADDR(nphys)); 492 493 /* kick off DMA */ 494 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 495 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 496 497 d->active = 1; 498 499 return 0; 500 501 bad: 502 if (state & 2) 503 bus_dmamap_unload(sc->sc_dmat, d->dmam); 504 if (state & 1) 505 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 506 return 1; 507 } 508 509 510 static int 511 bba_trigger_input(void *addr, void *start, void *end, int blksize, 512 void (*intr)(void *), void *arg, const audio_params_t *param) 513 { 514 struct bba_softc *sc; 515 struct bba_dma_state *d; 516 tc_addr_t phys, nphys; 517 uint32_t ssr; 518 int state = 0; 519 520 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 521 addr, start, end, blksize, intr, arg)); 522 sc = addr; 523 d = &sc->sc_rx_dma_state; 524 state = 0; 525 526 /* disable any DMA */ 527 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 528 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 529 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 530 531 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 532 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 533 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 534 printf("bba_trigger_input: can't create DMA map\n"); 535 goto bad; 536 } 537 state |= 1; 538 539 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 540 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 541 printf("bba_trigger_input: can't load DMA map\n"); 542 goto bad; 543 } 544 state |= 2; 545 546 d->intr = intr; 547 d->intr_arg = arg; 548 d->curseg = 1; 549 550 /* get physical address of buffer start */ 551 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 552 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 553 554 /* setup DMA pointer */ 555 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 556 IOASIC_DMA_ADDR(phys)); 557 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 558 IOASIC_DMA_ADDR(nphys)); 559 560 /* kick off DMA */ 561 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 562 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 563 564 d->active = 1; 565 566 return 0; 567 568 bad: 569 if (state & 2) 570 bus_dmamap_unload(sc->sc_dmat, d->dmam); 571 if (state & 1) 572 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 573 return 1; 574 } 575 576 static void 577 bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread) 578 { 579 struct bba_softc *bsc = opaque; 580 struct am7930_softc *sc = &bsc->sc_am7930; 581 582 *intr = &sc->sc_intr_lock; 583 *thread = &sc->sc_lock; 584 } 585 586 static int 587 bba_intr(void *addr) 588 { 589 struct bba_softc *sc; 590 struct bba_dma_state *d; 591 tc_addr_t nphys; 592 int mask; 593 594 sc = addr; 595 mutex_enter(&sc->sc_am7930.sc_intr_lock); 596 597 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 598 599 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 600 d = &sc->sc_tx_dma_state; 601 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 602 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 603 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 604 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 605 if (d->intr != NULL) 606 (*d->intr)(d->intr_arg); 607 } 608 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 609 d = &sc->sc_rx_dma_state; 610 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 611 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 612 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 613 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 614 if (d->intr != NULL) 615 (*d->intr)(d->intr_arg); 616 } 617 618 mutex_exit(&sc->sc_am7930.sc_intr_lock); 619 620 return 0; 621 } 622 623 static int 624 bba_get_props(void *addr) 625 { 626 627 return AUDIO_PROP_MMAP | am7930_get_props(addr); 628 } 629 630 static paddr_t 631 bba_mappage(void *addr, void *mem, off_t offset, int prot) 632 { 633 struct bba_softc *sc; 634 struct bba_mem **mp; 635 bus_dma_segment_t seg; 636 void *kva; 637 638 sc = addr; 639 kva = (void *)mem; 640 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 641 mp = &(*mp)->next) 642 continue; 643 if (*mp == NULL || offset < 0) { 644 return -1; 645 } 646 647 seg.ds_addr = (*mp)->addr; 648 seg.ds_len = (*mp)->size; 649 650 return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset, 651 prot, BUS_DMA_WAITOK); 652 } 653 654 static stream_filter_t * 655 bba_input_conv(struct audio_softc *sc, const audio_params_t *from, 656 const audio_params_t *to) 657 { 658 return auconv_nocontext_filter_factory(bba_input_conv_fetch_to); 659 } 660 661 static int 662 bba_input_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self, 663 audio_stream_t *dst, int max_used) 664 { 665 stream_filter_t *this; 666 int m, err; 667 668 this = (stream_filter_t *)self; 669 if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used * 4))) 670 return err; 671 m = dst->end - dst->start; 672 m = min(m, max_used); 673 FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) { 674 *d = ((*(const uint32_t *)s) >> 16) & 0xff; 675 } FILTER_LOOP_EPILOGUE(this->src, dst); 676 return 0; 677 } 678 679 static stream_filter_t * 680 bba_output_conv(struct audio_softc *sc, const audio_params_t *from, 681 const audio_params_t *to) 682 { 683 return auconv_nocontext_filter_factory(bba_output_conv_fetch_to); 684 } 685 686 static int 687 bba_output_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self, 688 audio_stream_t *dst, int max_used) 689 { 690 stream_filter_t *this; 691 int m, err; 692 693 this = (stream_filter_t *)self; 694 max_used = (max_used + 3) & ~3; 695 if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used / 4))) 696 return err; 697 m = (dst->end - dst->start) & ~3; 698 m = min(m, max_used); 699 FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) { 700 *(uint32_t *)d = (*s << 16); 701 } FILTER_LOOP_EPILOGUE(this->src, dst); 702 return 0; 703 } 704 705 static int 706 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 707 { 708 709 return IOASIC_DMA_BLOCKSIZE; 710 } 711 712 713 /* indirect write */ 714 static void 715 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 716 { 717 718 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 719 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 720 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 721 } 722 723 724 static void 725 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 726 { 727 728 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 729 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 730 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 731 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 732 } 733 734 735 static uint16_t 736 bba_codec_iread16(struct am7930_softc *sc, int reg) 737 { 738 uint16_t val; 739 740 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 741 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 742 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 743 val |= bba_codec_dread(sc, AM7930_DREG_DR); 744 745 return val; 746 } 747 748 749 /* indirect read */ 750 static uint8_t 751 bba_codec_iread(struct am7930_softc *sc, int reg) 752 { 753 uint8_t val; 754 755 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 756 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 757 val = bba_codec_dread(sc, AM7930_DREG_DR); 758 759 DPRINTF(("read 0x%x (%d)\n", val, val)); 760 761 return val; 762 } 763 764 /* direct write */ 765 static void 766 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 767 { 768 struct bba_softc *sc; 769 770 sc = (struct bba_softc *)asc; 771 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 772 773 #if defined(__alpha__) 774 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 775 reg << 2, val << 8); 776 #else 777 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 778 reg << 6, val); 779 #endif 780 } 781 782 /* direct read */ 783 static uint8_t 784 bba_codec_dread(struct am7930_softc *asc, int reg) 785 { 786 struct bba_softc *sc; 787 788 sc = (struct bba_softc *)asc; 789 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 790 791 #if defined(__alpha__) 792 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 793 reg << 2) >> 8) & 0xff); 794 #else 795 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 796 reg << 6) & 0xff); 797 #endif 798 } 799
Indexes created Mon Sep 29 21:09:56 GMT 2025