bba.c revision 1.42
1 /* $NetBSD: bba.c,v 1.42 2019/03/16 12:09:58 isaki Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* maxine/alpha baseboard audio (bba) */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.42 2019/03/16 12:09:58 isaki Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/kmem.h> 39 40 #include <sys/bus.h> 41 #include <machine/autoconf.h> 42 #include <sys/cpu.h> 43 44 #include <sys/audioio.h> 45 #include <dev/audio_if.h> 46 #include <dev/auconv.h> 47 48 #include <dev/ic/am7930reg.h> 49 #include <dev/ic/am7930var.h> 50 51 #include <dev/tc/tcvar.h> 52 #include <dev/tc/ioasicreg.h> 53 #include <dev/tc/ioasicvar.h> 54 55 #ifdef AUDIO_DEBUG 56 #define DPRINTF(x) if (am7930debug) printf x 57 #else 58 #define DPRINTF(x) 59 #endif /* AUDIO_DEBUG */ 60 61 #define BBA_MAX_DMA_SEGMENTS 16 62 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 63 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 64 #define BBA_DMABUF_BOUNDARY 0 65 66 struct bba_mem { 67 struct bba_mem *next; 68 bus_addr_t addr; 69 bus_size_t size; 70 void *kva; 71 }; 72 73 struct bba_dma_state { 74 bus_dmamap_t dmam; /* DMA map */ 75 int active; 76 int curseg; /* current segment in DMA buffer */ 77 void (*intr)(void *); /* higher-level audio handler */ 78 void *intr_arg; 79 }; 80 81 struct bba_softc { 82 struct am7930_softc sc_am7930; /* glue to MI code */ 83 84 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 85 bus_space_handle_t sc_bsh; 86 bus_dma_tag_t sc_dmat; 87 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 88 89 struct bba_mem *sc_mem_head; /* list of buffers */ 90 91 struct bba_dma_state sc_tx_dma_state; 92 struct bba_dma_state sc_rx_dma_state; 93 }; 94 95 static int bba_match(device_t, cfdata_t, void *); 96 static void bba_attach(device_t, device_t, void *); 97 98 CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc), 99 bba_match, bba_attach, NULL, NULL); 100 101 /* 102 * Define our interface into the am7930 MI driver. 103 */ 104 105 static uint8_t bba_codec_iread(struct am7930_softc *, int); 106 static uint16_t bba_codec_iread16(struct am7930_softc *, int); 107 static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 108 static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 109 static void bba_onopen(struct am7930_softc *); 110 static void bba_onclose(struct am7930_softc *); 111 112 static stream_filter_factory_t bba_output_conv; 113 static stream_filter_factory_t bba_input_conv; 114 static int bba_output_conv_fetch_to(struct audio_softc *, stream_fetcher_t *, 115 audio_stream_t *, int); 116 static int bba_input_conv_fetch_to(struct audio_softc *, stream_fetcher_t *, 117 audio_stream_t *, int); 118 119 struct am7930_glue bba_glue = { 120 bba_codec_iread, 121 bba_codec_iwrite, 122 bba_codec_iread16, 123 bba_codec_iwrite16, 124 bba_onopen, 125 bba_onclose, 126 4, 127 bba_input_conv, 128 bba_output_conv, 129 }; 130 131 /* 132 * Define our interface to the higher level audio driver. 133 */ 134 135 static int bba_round_blocksize(void *, int, int, const audio_params_t *); 136 static int bba_halt_output(void *); 137 static int bba_halt_input(void *); 138 static int bba_getdev(void *, struct audio_device *); 139 static void *bba_allocm(void *, int, size_t); 140 static void bba_freem(void *, void *, size_t); 141 static size_t bba_round_buffersize(void *, int, size_t); 142 static int bba_get_props(void *); 143 static paddr_t bba_mappage(void *, void *, off_t, int); 144 static int bba_trigger_output(void *, void *, void *, int, 145 void (*)(void *), void *, 146 const audio_params_t *); 147 static int bba_trigger_input(void *, void *, void *, int, 148 void (*)(void *), void *, 149 const audio_params_t *); 150 static void bba_get_locks(void *opaque, kmutex_t **intr, 151 kmutex_t **thread); 152 153 static const struct audio_hw_if sa_hw_if = { 154 .open = am7930_open, 155 .close = am7930_close, 156 .query_encoding = am7930_query_encoding, 157 .set_params = am7930_set_params, 158 .round_blocksize = bba_round_blocksize, /* md */ 159 .commit_settings = am7930_commit_settings, 160 .halt_output = bba_halt_output, /* md */ 161 .halt_input = bba_halt_input, /* md */ 162 .getdev = bba_getdev, 163 .set_port = am7930_set_port, 164 .get_port = am7930_get_port, 165 .query_devinfo = am7930_query_devinfo, 166 .allocm = bba_allocm, /* md */ 167 .freem = bba_freem, /* md */ 168 .round_buffersize = bba_round_buffersize, /* md */ 169 .mappage = bba_mappage, 170 .get_props = bba_get_props, 171 .trigger_output = bba_trigger_output, /* md */ 172 .trigger_input = bba_trigger_input, /* md */ 173 .get_locks = bba_get_locks, 174 }; 175 176 static struct audio_device bba_device = { 177 "am7930", 178 "x", 179 "bba" 180 }; 181 182 static int bba_intr(void *); 183 static void bba_reset(struct bba_softc *, int); 184 static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t); 185 static uint8_t bba_codec_dread(struct am7930_softc *, int); 186 187 static int 188 bba_match(device_t parent, cfdata_t cf, void *aux) 189 { 190 struct ioasicdev_attach_args *ia; 191 192 ia = aux; 193 if (strcmp(ia->iada_modname, "isdn") != 0 && 194 strcmp(ia->iada_modname, "AMD79c30") != 0) 195 return 0; 196 197 return 1; 198 } 199 200 201 static void 202 bba_attach(device_t parent, device_t self, void *aux) 203 { 204 struct ioasicdev_attach_args *ia; 205 struct bba_softc *sc; 206 struct am7930_softc *asc; 207 struct ioasic_softc *iosc = device_private(parent); 208 209 ia = aux; 210 sc = device_private(self); 211 asc = &sc->sc_am7930; 212 asc->sc_dev = self; 213 sc->sc_bst = iosc->sc_bst; 214 sc->sc_bsh = iosc->sc_bsh; 215 sc->sc_dmat = iosc->sc_dmat; 216 217 /* get the bus space handle for codec */ 218 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 219 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 220 aprint_error_dev(self, "unable to map device\n"); 221 return; 222 } 223 224 printf("\n"); 225 226 bba_reset(sc,1); 227 228 /* 229 * Set up glue for MI code early; we use some of it here. 230 */ 231 asc->sc_glue = &bba_glue; 232 233 /* 234 * MI initialisation. We will be doing DMA. 235 */ 236 am7930_init(asc, AUDIOAMD_DMA_MODE); 237 238 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 239 bba_intr, sc); 240 241 audio_attach_mi(&sa_hw_if, asc, self); 242 } 243 244 245 static void 246 bba_onopen(struct am7930_softc *sc) 247 { 248 } 249 250 251 static void 252 bba_onclose(struct am7930_softc *sc) 253 { 254 } 255 256 257 static void 258 bba_reset(struct bba_softc *sc, int reset) 259 { 260 uint32_t ssr; 261 262 /* disable any DMA and reset the codec */ 263 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 264 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 265 if (reset) 266 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 267 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 268 DELAY(10); /* 400ns required for codec to reset */ 269 270 /* initialise DMA pointers */ 271 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 272 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 273 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 274 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 275 276 /* take out of reset state */ 277 if (reset) { 278 ssr |= IOASIC_CSR_ISDN_ENABLE; 279 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 280 } 281 282 } 283 284 285 static void * 286 bba_allocm(void *addr, int direction, size_t size) 287 { 288 struct am7930_softc *asc; 289 struct bba_softc *sc; 290 bus_dma_segment_t seg; 291 int rseg; 292 void *kva; 293 struct bba_mem *m; 294 int state; 295 296 DPRINTF(("bba_allocm: size = %zu\n", size)); 297 asc = addr; 298 sc = addr; 299 state = 0; 300 301 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 302 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) { 303 aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n"); 304 goto bad; 305 } 306 state |= 1; 307 308 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 309 &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) { 310 aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n"); 311 goto bad; 312 } 313 state |= 2; 314 315 m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP); 316 m->addr = seg.ds_addr; 317 m->size = seg.ds_len; 318 m->kva = kva; 319 m->next = sc->sc_mem_head; 320 sc->sc_mem_head = m; 321 322 return (void *)kva; 323 324 bad: 325 if (state & 2) 326 bus_dmamem_unmap(sc->sc_dmat, kva, size); 327 if (state & 1) 328 bus_dmamem_free(sc->sc_dmat, &seg, 1); 329 return NULL; 330 } 331 332 333 static void 334 bba_freem(void *addr, void *ptr, size_t size) 335 { 336 struct bba_softc *sc; 337 struct bba_mem **mp, *m; 338 bus_dma_segment_t seg; 339 void *kva; 340 341 sc = addr; 342 kva = (void *)addr; 343 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 344 mp = &(*mp)->next) 345 continue; 346 m = *mp; 347 if (m == NULL) { 348 printf("bba_freem: freeing unallocated memory\n"); 349 return; 350 } 351 *mp = m->next; 352 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 353 354 seg.ds_addr = m->addr; 355 seg.ds_len = m->size; 356 bus_dmamem_free(sc->sc_dmat, &seg, 1); 357 kmem_free(m, sizeof(struct bba_mem)); 358 } 359 360 361 static size_t 362 bba_round_buffersize(void *addr, int direction, size_t size) 363 { 364 365 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 366 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 367 roundup(size, IOASIC_DMA_BLOCKSIZE); 368 } 369 370 371 static int 372 bba_halt_output(void *addr) 373 { 374 struct bba_softc *sc; 375 struct bba_dma_state *d; 376 uint32_t ssr; 377 378 sc = addr; 379 d = &sc->sc_tx_dma_state; 380 /* disable any DMA */ 381 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 382 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 383 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 384 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 385 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 386 387 if (d->active) { 388 bus_dmamap_unload(sc->sc_dmat, d->dmam); 389 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 390 d->active = 0; 391 } 392 393 return 0; 394 } 395 396 397 static int 398 bba_halt_input(void *addr) 399 { 400 struct bba_softc *sc; 401 struct bba_dma_state *d; 402 uint32_t ssr; 403 404 sc = addr; 405 d = &sc->sc_rx_dma_state; 406 /* disable any DMA */ 407 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 408 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 409 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 410 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 411 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 412 413 if (d->active) { 414 bus_dmamap_unload(sc->sc_dmat, d->dmam); 415 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 416 d->active = 0; 417 } 418 419 return 0; 420 } 421 422 423 static int 424 bba_getdev(void *addr, struct audio_device *retp) 425 { 426 427 *retp = bba_device; 428 return 0; 429 } 430 431 432 static int 433 bba_trigger_output(void *addr, void *start, void *end, int blksize, 434 void (*intr)(void *), void *arg, 435 const audio_params_t *param) 436 { 437 struct bba_softc *sc; 438 struct bba_dma_state *d; 439 uint32_t ssr; 440 tc_addr_t phys, nphys; 441 int state; 442 443 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 444 addr, start, end, blksize, intr, arg)); 445 sc = addr; 446 d = &sc->sc_tx_dma_state; 447 state = 0; 448 449 /* disable any DMA */ 450 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 451 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 452 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 453 454 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 455 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 456 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 457 printf("bba_trigger_output: can't create DMA map\n"); 458 goto bad; 459 } 460 state |= 1; 461 462 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 463 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 464 printf("bba_trigger_output: can't load DMA map\n"); 465 goto bad; 466 } 467 state |= 2; 468 469 d->intr = intr; 470 d->intr_arg = arg; 471 d->curseg = 1; 472 473 /* get physical address of buffer start */ 474 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 475 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 476 477 /* setup DMA pointer */ 478 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 479 IOASIC_DMA_ADDR(phys)); 480 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 481 IOASIC_DMA_ADDR(nphys)); 482 483 /* kick off DMA */ 484 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 485 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 486 487 d->active = 1; 488 489 return 0; 490 491 bad: 492 if (state & 2) 493 bus_dmamap_unload(sc->sc_dmat, d->dmam); 494 if (state & 1) 495 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 496 return 1; 497 } 498 499 500 static int 501 bba_trigger_input(void *addr, void *start, void *end, int blksize, 502 void (*intr)(void *), void *arg, const audio_params_t *param) 503 { 504 struct bba_softc *sc; 505 struct bba_dma_state *d; 506 tc_addr_t phys, nphys; 507 uint32_t ssr; 508 int state = 0; 509 510 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 511 addr, start, end, blksize, intr, arg)); 512 sc = addr; 513 d = &sc->sc_rx_dma_state; 514 state = 0; 515 516 /* disable any DMA */ 517 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 518 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 519 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 520 521 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 522 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 523 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 524 printf("bba_trigger_input: can't create DMA map\n"); 525 goto bad; 526 } 527 state |= 1; 528 529 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 530 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 531 printf("bba_trigger_input: can't load DMA map\n"); 532 goto bad; 533 } 534 state |= 2; 535 536 d->intr = intr; 537 d->intr_arg = arg; 538 d->curseg = 1; 539 540 /* get physical address of buffer start */ 541 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 542 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 543 544 /* setup DMA pointer */ 545 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 546 IOASIC_DMA_ADDR(phys)); 547 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 548 IOASIC_DMA_ADDR(nphys)); 549 550 /* kick off DMA */ 551 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 552 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 553 554 d->active = 1; 555 556 return 0; 557 558 bad: 559 if (state & 2) 560 bus_dmamap_unload(sc->sc_dmat, d->dmam); 561 if (state & 1) 562 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 563 return 1; 564 } 565 566 static void 567 bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread) 568 { 569 struct bba_softc *bsc = opaque; 570 struct am7930_softc *sc = &bsc->sc_am7930; 571 572 *intr = &sc->sc_intr_lock; 573 *thread = &sc->sc_lock; 574 } 575 576 static int 577 bba_intr(void *addr) 578 { 579 struct bba_softc *sc; 580 struct bba_dma_state *d; 581 tc_addr_t nphys; 582 int mask; 583 584 sc = addr; 585 mutex_enter(&sc->sc_am7930.sc_intr_lock); 586 587 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 588 589 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 590 d = &sc->sc_tx_dma_state; 591 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 592 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 593 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 594 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 595 if (d->intr != NULL) 596 (*d->intr)(d->intr_arg); 597 } 598 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 599 d = &sc->sc_rx_dma_state; 600 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 601 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 602 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 603 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 604 if (d->intr != NULL) 605 (*d->intr)(d->intr_arg); 606 } 607 608 mutex_exit(&sc->sc_am7930.sc_intr_lock); 609 610 return 0; 611 } 612 613 static int 614 bba_get_props(void *addr) 615 { 616 617 return AUDIO_PROP_MMAP | am7930_get_props(addr); 618 } 619 620 static paddr_t 621 bba_mappage(void *addr, void *mem, off_t offset, int prot) 622 { 623 struct bba_softc *sc; 624 struct bba_mem **mp; 625 bus_dma_segment_t seg; 626 void *kva; 627 628 sc = addr; 629 kva = (void *)mem; 630 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 631 mp = &(*mp)->next) 632 continue; 633 if (*mp == NULL || offset < 0) { 634 return -1; 635 } 636 637 seg.ds_addr = (*mp)->addr; 638 seg.ds_len = (*mp)->size; 639 640 return bus_dmamem_mmap(sc->sc_dmat, &seg, 1, offset, 641 prot, BUS_DMA_WAITOK); 642 } 643 644 static stream_filter_t * 645 bba_input_conv(struct audio_softc *sc, const audio_params_t *from, 646 const audio_params_t *to) 647 { 648 return auconv_nocontext_filter_factory(bba_input_conv_fetch_to); 649 } 650 651 static int 652 bba_input_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self, 653 audio_stream_t *dst, int max_used) 654 { 655 stream_filter_t *this; 656 int m, err; 657 658 this = (stream_filter_t *)self; 659 if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used * 4))) 660 return err; 661 m = dst->end - dst->start; 662 m = uimin(m, max_used); 663 FILTER_LOOP_PROLOGUE(this->src, 4, dst, 1, m) { 664 *d = ((*(const uint32_t *)s) >> 16) & 0xff; 665 } FILTER_LOOP_EPILOGUE(this->src, dst); 666 return 0; 667 } 668 669 static stream_filter_t * 670 bba_output_conv(struct audio_softc *sc, const audio_params_t *from, 671 const audio_params_t *to) 672 { 673 return auconv_nocontext_filter_factory(bba_output_conv_fetch_to); 674 } 675 676 static int 677 bba_output_conv_fetch_to(struct audio_softc *sc, stream_fetcher_t *self, 678 audio_stream_t *dst, int max_used) 679 { 680 stream_filter_t *this; 681 int m, err; 682 683 this = (stream_filter_t *)self; 684 max_used = (max_used + 3) & ~3; 685 if ((err = this->prev->fetch_to(sc, this->prev, this->src, max_used / 4))) 686 return err; 687 m = (dst->end - dst->start) & ~3; 688 m = uimin(m, max_used); 689 FILTER_LOOP_PROLOGUE(this->src, 1, dst, 4, m) { 690 *(uint32_t *)d = (*s << 16); 691 } FILTER_LOOP_EPILOGUE(this->src, dst); 692 return 0; 693 } 694 695 static int 696 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 697 { 698 699 return IOASIC_DMA_BLOCKSIZE; 700 } 701 702 703 /* indirect write */ 704 static void 705 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 706 { 707 708 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 709 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 710 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 711 } 712 713 714 static void 715 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 716 { 717 718 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 719 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 720 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 721 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 722 } 723 724 725 static uint16_t 726 bba_codec_iread16(struct am7930_softc *sc, int reg) 727 { 728 uint16_t val; 729 730 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 731 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 732 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 733 val |= bba_codec_dread(sc, AM7930_DREG_DR); 734 735 return val; 736 } 737 738 739 /* indirect read */ 740 static uint8_t 741 bba_codec_iread(struct am7930_softc *sc, int reg) 742 { 743 uint8_t val; 744 745 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 746 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 747 val = bba_codec_dread(sc, AM7930_DREG_DR); 748 749 DPRINTF(("read 0x%x (%d)\n", val, val)); 750 751 return val; 752 } 753 754 /* direct write */ 755 static void 756 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 757 { 758 struct bba_softc *sc; 759 760 sc = (struct bba_softc *)asc; 761 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 762 763 #if defined(__alpha__) 764 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 765 reg << 2, val << 8); 766 #else 767 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 768 reg << 6, val); 769 #endif 770 } 771 772 /* direct read */ 773 static uint8_t 774 bba_codec_dread(struct am7930_softc *asc, int reg) 775 { 776 struct bba_softc *sc; 777 778 sc = (struct bba_softc *)asc; 779 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 780 781 #if defined(__alpha__) 782 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 783 reg << 2) >> 8) & 0xff); 784 #else 785 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 786 reg << 6) & 0xff); 787 #endif 788 } 789
Indexes created Fri Sep 26 20:09:58 GMT 2025