bba.c revision 1.43
1 /* $NetBSD: bba.c,v 1.43 2019/05/08 13:40:19 isaki Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* maxine/alpha baseboard audio (bba) */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.43 2019/05/08 13:40:19 isaki Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/kmem.h> 39 40 #include <sys/bus.h> 41 #include <machine/autoconf.h> 42 #include <sys/cpu.h> 43 44 #include <sys/audioio.h> 45 #include <dev/audio/audio_if.h> 46 47 #include <dev/ic/am7930reg.h> 48 #include <dev/ic/am7930var.h> 49 50 #include <dev/tc/tcvar.h> 51 #include <dev/tc/ioasicreg.h> 52 #include <dev/tc/ioasicvar.h> 53 54 /* include mulaw.c (not .h file) here to expand mulaw32 */ 55 void audio_mulaw32_to_internal(audio_filter_arg_t *); 56 void audio_internal_to_mulaw32(audio_filter_arg_t *); 57 #define MULAW32 58 #include <dev/audio/mulaw.c> 59 60 #ifdef AUDIO_DEBUG 61 #define DPRINTF(x) if (am7930debug) printf x 62 #else 63 #define DPRINTF(x) 64 #endif /* AUDIO_DEBUG */ 65 66 #define BBA_MAX_DMA_SEGMENTS 16 67 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 68 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 69 #define BBA_DMABUF_BOUNDARY 0 70 71 struct bba_mem { 72 struct bba_mem *next; 73 bus_addr_t addr; 74 bus_size_t size; 75 void *kva; 76 }; 77 78 struct bba_dma_state { 79 bus_dmamap_t dmam; /* DMA map */ 80 int active; 81 int curseg; /* current segment in DMA buffer */ 82 void (*intr)(void *); /* higher-level audio handler */ 83 void *intr_arg; 84 }; 85 86 struct bba_softc { 87 struct am7930_softc sc_am7930; /* glue to MI code */ 88 89 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 90 bus_space_handle_t sc_bsh; 91 bus_dma_tag_t sc_dmat; 92 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 93 94 struct bba_mem *sc_mem_head; /* list of buffers */ 95 96 struct bba_dma_state sc_tx_dma_state; 97 struct bba_dma_state sc_rx_dma_state; 98 }; 99 100 static int bba_match(device_t, cfdata_t, void *); 101 static void bba_attach(device_t, device_t, void *); 102 103 CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc), 104 bba_match, bba_attach, NULL, NULL); 105 106 /* 107 * Define our interface into the am7930 MI driver. 108 */ 109 110 static uint8_t bba_codec_iread(struct am7930_softc *, int); 111 static uint16_t bba_codec_iread16(struct am7930_softc *, int); 112 static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 113 static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 114 static void bba_onopen(struct am7930_softc *); 115 static void bba_onclose(struct am7930_softc *); 116 117 struct am7930_glue bba_glue = { 118 bba_codec_iread, 119 bba_codec_iwrite, 120 bba_codec_iread16, 121 bba_codec_iwrite16, 122 bba_onopen, 123 bba_onclose, 124 }; 125 126 /* 127 * Define our interface to the higher level audio driver. 128 */ 129 130 static int bba_query_format(void *, audio_format_query_t *); 131 static int bba_set_format(void *, int, 132 const audio_params_t *, const audio_params_t *, 133 audio_filter_reg_t *, audio_filter_reg_t *); 134 static int bba_round_blocksize(void *, int, int, const audio_params_t *); 135 static int bba_halt_output(void *); 136 static int bba_halt_input(void *); 137 static int bba_getdev(void *, struct audio_device *); 138 static void *bba_allocm(void *, int, size_t); 139 static void bba_freem(void *, void *, size_t); 140 static size_t bba_round_buffersize(void *, int, size_t); 141 static int bba_get_props(void *); 142 static int bba_trigger_output(void *, void *, void *, int, 143 void (*)(void *), void *, 144 const audio_params_t *); 145 static int bba_trigger_input(void *, void *, void *, int, 146 void (*)(void *), void *, 147 const audio_params_t *); 148 static void bba_get_locks(void *opaque, kmutex_t **intr, 149 kmutex_t **thread); 150 151 static const struct audio_hw_if sa_hw_if = { 152 .open = am7930_open, 153 .close = am7930_close, 154 .query_format = bba_query_format, 155 .set_format = bba_set_format, 156 .round_blocksize = bba_round_blocksize, /* md */ 157 .commit_settings = am7930_commit_settings, 158 .halt_output = bba_halt_output, /* md */ 159 .halt_input = bba_halt_input, /* md */ 160 .getdev = bba_getdev, 161 .set_port = am7930_set_port, 162 .get_port = am7930_get_port, 163 .query_devinfo = am7930_query_devinfo, 164 .allocm = bba_allocm, /* md */ 165 .freem = bba_freem, /* md */ 166 .round_buffersize = bba_round_buffersize, /* md */ 167 .get_props = bba_get_props, 168 .trigger_output = bba_trigger_output, /* md */ 169 .trigger_input = bba_trigger_input, /* md */ 170 .get_locks = bba_get_locks, 171 }; 172 173 static struct audio_device bba_device = { 174 "am7930", 175 "x", 176 "bba" 177 }; 178 179 static const struct audio_format bba_format = { 180 .mode = AUMODE_PLAY | AUMODE_RECORD, 181 .encoding = AUDIO_ENCODING_ULAW, /* XXX */ 182 .validbits = 32, 183 .precision = 32, 184 .channels = 1, 185 .channel_mask = AUFMT_MONAURAL, 186 .frequency_type = 1, 187 .frequency = { 8000 }, 188 }; 189 190 static int bba_intr(void *); 191 static void bba_reset(struct bba_softc *, int); 192 static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t); 193 static uint8_t bba_codec_dread(struct am7930_softc *, int); 194 195 static int 196 bba_match(device_t parent, cfdata_t cf, void *aux) 197 { 198 struct ioasicdev_attach_args *ia; 199 200 ia = aux; 201 if (strcmp(ia->iada_modname, "isdn") != 0 && 202 strcmp(ia->iada_modname, "AMD79c30") != 0) 203 return 0; 204 205 return 1; 206 } 207 208 209 static void 210 bba_attach(device_t parent, device_t self, void *aux) 211 { 212 struct ioasicdev_attach_args *ia; 213 struct bba_softc *sc; 214 struct am7930_softc *asc; 215 struct ioasic_softc *iosc = device_private(parent); 216 217 ia = aux; 218 sc = device_private(self); 219 asc = &sc->sc_am7930; 220 asc->sc_dev = self; 221 sc->sc_bst = iosc->sc_bst; 222 sc->sc_bsh = iosc->sc_bsh; 223 sc->sc_dmat = iosc->sc_dmat; 224 225 /* get the bus space handle for codec */ 226 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 227 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 228 aprint_error_dev(self, "unable to map device\n"); 229 return; 230 } 231 232 printf("\n"); 233 234 bba_reset(sc,1); 235 236 /* 237 * Set up glue for MI code early; we use some of it here. 238 */ 239 asc->sc_glue = &bba_glue; 240 241 /* 242 * MI initialisation. We will be doing DMA. 243 */ 244 am7930_init(asc, AUDIOAMD_DMA_MODE); 245 246 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 247 bba_intr, sc); 248 249 audio_attach_mi(&sa_hw_if, asc, self); 250 } 251 252 253 static void 254 bba_onopen(struct am7930_softc *sc) 255 { 256 } 257 258 259 static void 260 bba_onclose(struct am7930_softc *sc) 261 { 262 } 263 264 265 static void 266 bba_reset(struct bba_softc *sc, int reset) 267 { 268 uint32_t ssr; 269 270 /* disable any DMA and reset the codec */ 271 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 272 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 273 if (reset) 274 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 275 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 276 DELAY(10); /* 400ns required for codec to reset */ 277 278 /* initialise DMA pointers */ 279 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 280 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 281 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 282 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 283 284 /* take out of reset state */ 285 if (reset) { 286 ssr |= IOASIC_CSR_ISDN_ENABLE; 287 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 288 } 289 290 } 291 292 293 static void * 294 bba_allocm(void *addr, int direction, size_t size) 295 { 296 struct am7930_softc *asc; 297 struct bba_softc *sc; 298 bus_dma_segment_t seg; 299 int rseg; 300 void *kva; 301 struct bba_mem *m; 302 int state; 303 304 DPRINTF(("bba_allocm: size = %zu\n", size)); 305 asc = addr; 306 sc = addr; 307 state = 0; 308 309 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 310 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) { 311 aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n"); 312 goto bad; 313 } 314 state |= 1; 315 316 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 317 &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) { 318 aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n"); 319 goto bad; 320 } 321 state |= 2; 322 323 m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP); 324 m->addr = seg.ds_addr; 325 m->size = seg.ds_len; 326 m->kva = kva; 327 m->next = sc->sc_mem_head; 328 sc->sc_mem_head = m; 329 330 return (void *)kva; 331 332 bad: 333 if (state & 2) 334 bus_dmamem_unmap(sc->sc_dmat, kva, size); 335 if (state & 1) 336 bus_dmamem_free(sc->sc_dmat, &seg, 1); 337 return NULL; 338 } 339 340 341 static void 342 bba_freem(void *addr, void *ptr, size_t size) 343 { 344 struct bba_softc *sc; 345 struct bba_mem **mp, *m; 346 bus_dma_segment_t seg; 347 void *kva; 348 349 sc = addr; 350 kva = (void *)addr; 351 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 352 mp = &(*mp)->next) 353 continue; 354 m = *mp; 355 if (m == NULL) { 356 printf("bba_freem: freeing unallocated memory\n"); 357 return; 358 } 359 *mp = m->next; 360 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 361 362 seg.ds_addr = m->addr; 363 seg.ds_len = m->size; 364 bus_dmamem_free(sc->sc_dmat, &seg, 1); 365 kmem_free(m, sizeof(struct bba_mem)); 366 } 367 368 369 static size_t 370 bba_round_buffersize(void *addr, int direction, size_t size) 371 { 372 373 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 374 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 375 roundup(size, IOASIC_DMA_BLOCKSIZE); 376 } 377 378 379 static int 380 bba_halt_output(void *addr) 381 { 382 struct bba_softc *sc; 383 struct bba_dma_state *d; 384 uint32_t ssr; 385 386 sc = addr; 387 d = &sc->sc_tx_dma_state; 388 /* disable any DMA */ 389 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 390 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 391 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 392 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 393 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 394 395 if (d->active) { 396 bus_dmamap_unload(sc->sc_dmat, d->dmam); 397 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 398 d->active = 0; 399 } 400 401 return 0; 402 } 403 404 405 static int 406 bba_halt_input(void *addr) 407 { 408 struct bba_softc *sc; 409 struct bba_dma_state *d; 410 uint32_t ssr; 411 412 sc = addr; 413 d = &sc->sc_rx_dma_state; 414 /* disable any DMA */ 415 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 416 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 417 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 418 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 419 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 420 421 if (d->active) { 422 bus_dmamap_unload(sc->sc_dmat, d->dmam); 423 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 424 d->active = 0; 425 } 426 427 return 0; 428 } 429 430 431 static int 432 bba_getdev(void *addr, struct audio_device *retp) 433 { 434 435 *retp = bba_device; 436 return 0; 437 } 438 439 440 static int 441 bba_trigger_output(void *addr, void *start, void *end, int blksize, 442 void (*intr)(void *), void *arg, 443 const audio_params_t *param) 444 { 445 struct bba_softc *sc; 446 struct bba_dma_state *d; 447 uint32_t ssr; 448 tc_addr_t phys, nphys; 449 int state; 450 451 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 452 addr, start, end, blksize, intr, arg)); 453 sc = addr; 454 d = &sc->sc_tx_dma_state; 455 state = 0; 456 457 /* disable any DMA */ 458 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 459 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 460 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 461 462 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 463 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 464 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 465 printf("bba_trigger_output: can't create DMA map\n"); 466 goto bad; 467 } 468 state |= 1; 469 470 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 471 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 472 printf("bba_trigger_output: can't load DMA map\n"); 473 goto bad; 474 } 475 state |= 2; 476 477 d->intr = intr; 478 d->intr_arg = arg; 479 d->curseg = 1; 480 481 /* get physical address of buffer start */ 482 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 483 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 484 485 /* setup DMA pointer */ 486 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 487 IOASIC_DMA_ADDR(phys)); 488 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 489 IOASIC_DMA_ADDR(nphys)); 490 491 /* kick off DMA */ 492 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 493 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 494 495 d->active = 1; 496 497 return 0; 498 499 bad: 500 if (state & 2) 501 bus_dmamap_unload(sc->sc_dmat, d->dmam); 502 if (state & 1) 503 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 504 return 1; 505 } 506 507 508 static int 509 bba_trigger_input(void *addr, void *start, void *end, int blksize, 510 void (*intr)(void *), void *arg, const audio_params_t *param) 511 { 512 struct bba_softc *sc; 513 struct bba_dma_state *d; 514 tc_addr_t phys, nphys; 515 uint32_t ssr; 516 int state = 0; 517 518 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 519 addr, start, end, blksize, intr, arg)); 520 sc = addr; 521 d = &sc->sc_rx_dma_state; 522 state = 0; 523 524 /* disable any DMA */ 525 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 526 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 527 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 528 529 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 530 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 531 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 532 printf("bba_trigger_input: can't create DMA map\n"); 533 goto bad; 534 } 535 state |= 1; 536 537 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 538 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 539 printf("bba_trigger_input: can't load DMA map\n"); 540 goto bad; 541 } 542 state |= 2; 543 544 d->intr = intr; 545 d->intr_arg = arg; 546 d->curseg = 1; 547 548 /* get physical address of buffer start */ 549 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 550 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 551 552 /* setup DMA pointer */ 553 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 554 IOASIC_DMA_ADDR(phys)); 555 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 556 IOASIC_DMA_ADDR(nphys)); 557 558 /* kick off DMA */ 559 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 560 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 561 562 d->active = 1; 563 564 return 0; 565 566 bad: 567 if (state & 2) 568 bus_dmamap_unload(sc->sc_dmat, d->dmam); 569 if (state & 1) 570 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 571 return 1; 572 } 573 574 static void 575 bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread) 576 { 577 struct bba_softc *bsc = opaque; 578 struct am7930_softc *sc = &bsc->sc_am7930; 579 580 *intr = &sc->sc_intr_lock; 581 *thread = &sc->sc_lock; 582 } 583 584 static int 585 bba_intr(void *addr) 586 { 587 struct bba_softc *sc; 588 struct bba_dma_state *d; 589 tc_addr_t nphys; 590 int mask; 591 592 sc = addr; 593 mutex_enter(&sc->sc_am7930.sc_intr_lock); 594 595 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 596 597 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 598 d = &sc->sc_tx_dma_state; 599 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 600 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 601 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 602 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 603 if (d->intr != NULL) 604 (*d->intr)(d->intr_arg); 605 } 606 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 607 d = &sc->sc_rx_dma_state; 608 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 609 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 610 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 611 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 612 if (d->intr != NULL) 613 (*d->intr)(d->intr_arg); 614 } 615 616 mutex_exit(&sc->sc_am7930.sc_intr_lock); 617 618 return 0; 619 } 620 621 static int 622 bba_get_props(void *addr) 623 { 624 625 return AUDIO_PROP_MMAP | am7930_get_props(addr); 626 } 627 628 static int 629 bba_query_format(void *addr, audio_format_query_t *afp) 630 { 631 632 return audio_query_format(&bba_format, 1, afp); 633 } 634 635 static int 636 bba_set_format(void *addr, int setmode, 637 const audio_params_t *play, const audio_params_t *rec, 638 audio_filter_reg_t *pfil, audio_filter_reg_t *rfil) 639 { 640 641 if ((setmode & AUMODE_PLAY) != 0) { 642 pfil->codec = audio_internal_to_mulaw32; 643 } 644 if ((setmode & AUMODE_RECORD) != 0) { 645 rfil->codec = audio_mulaw32_to_internal; 646 } 647 648 return 0; 649 } 650 651 static int 652 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 653 { 654 655 return IOASIC_DMA_BLOCKSIZE; 656 } 657 658 659 /* indirect write */ 660 static void 661 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 662 { 663 664 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 665 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 666 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 667 } 668 669 670 static void 671 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 672 { 673 674 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 675 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 676 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 677 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 678 } 679 680 681 static uint16_t 682 bba_codec_iread16(struct am7930_softc *sc, int reg) 683 { 684 uint16_t val; 685 686 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 687 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 688 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 689 val |= bba_codec_dread(sc, AM7930_DREG_DR); 690 691 return val; 692 } 693 694 695 /* indirect read */ 696 static uint8_t 697 bba_codec_iread(struct am7930_softc *sc, int reg) 698 { 699 uint8_t val; 700 701 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 702 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 703 val = bba_codec_dread(sc, AM7930_DREG_DR); 704 705 DPRINTF(("read 0x%x (%d)\n", val, val)); 706 707 return val; 708 } 709 710 /* direct write */ 711 static void 712 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 713 { 714 struct bba_softc *sc; 715 716 sc = (struct bba_softc *)asc; 717 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 718 719 #if defined(__alpha__) 720 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 721 reg << 2, val << 8); 722 #else 723 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 724 reg << 6, val); 725 #endif 726 } 727 728 /* direct read */ 729 static uint8_t 730 bba_codec_dread(struct am7930_softc *asc, int reg) 731 { 732 struct bba_softc *sc; 733 734 sc = (struct bba_softc *)asc; 735 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 736 737 #if defined(__alpha__) 738 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 739 reg << 2) >> 8) & 0xff); 740 #else 741 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 742 reg << 6) & 0xff); 743 #endif 744 } 745
Indexes created Sat Sep 27 21:09:56 GMT 2025