bba.c revision 1.44
1 /* $NetBSD: bba.c,v 1.44 2019/06/08 08:02:38 isaki Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* maxine/alpha baseboard audio (bba) */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: bba.c,v 1.44 2019/06/08 08:02:38 isaki Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/kmem.h> 39 40 #include <sys/bus.h> 41 #include <machine/autoconf.h> 42 #include <sys/cpu.h> 43 44 #include <sys/audioio.h> 45 #include <dev/audio/audio_if.h> 46 47 #include <dev/ic/am7930reg.h> 48 #include <dev/ic/am7930var.h> 49 50 #include <dev/tc/tcvar.h> 51 #include <dev/tc/ioasicreg.h> 52 #include <dev/tc/ioasicvar.h> 53 54 /* include mulaw.c (not .h file) here to expand mulaw32 */ 55 void audio_mulaw32_to_internal(audio_filter_arg_t *); 56 void audio_internal_to_mulaw32(audio_filter_arg_t *); 57 #define MULAW32 58 #include <dev/audio/mulaw.c> 59 60 #ifdef AUDIO_DEBUG 61 #define DPRINTF(x) if (am7930debug) printf x 62 #else 63 #define DPRINTF(x) 64 #endif /* AUDIO_DEBUG */ 65 66 #define BBA_MAX_DMA_SEGMENTS 16 67 #define BBA_DMABUF_SIZE (BBA_MAX_DMA_SEGMENTS*IOASIC_DMA_BLOCKSIZE) 68 #define BBA_DMABUF_ALIGN IOASIC_DMA_BLOCKSIZE 69 #define BBA_DMABUF_BOUNDARY 0 70 71 struct bba_mem { 72 struct bba_mem *next; 73 bus_addr_t addr; 74 bus_size_t size; 75 void *kva; 76 }; 77 78 struct bba_dma_state { 79 bus_dmamap_t dmam; /* DMA map */ 80 int active; 81 int curseg; /* current segment in DMA buffer */ 82 void (*intr)(void *); /* higher-level audio handler */ 83 void *intr_arg; 84 }; 85 86 struct bba_softc { 87 struct am7930_softc sc_am7930; /* glue to MI code */ 88 89 bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */ 90 bus_space_handle_t sc_bsh; 91 bus_dma_tag_t sc_dmat; 92 bus_space_handle_t sc_codec_bsh; /* codec bus space handle */ 93 94 struct bba_mem *sc_mem_head; /* list of buffers */ 95 96 struct bba_dma_state sc_tx_dma_state; 97 struct bba_dma_state sc_rx_dma_state; 98 }; 99 100 static int bba_match(device_t, cfdata_t, void *); 101 static void bba_attach(device_t, device_t, void *); 102 103 CFATTACH_DECL_NEW(bba, sizeof(struct bba_softc), 104 bba_match, bba_attach, NULL, NULL); 105 106 /* 107 * Define our interface into the am7930 MI driver. 108 */ 109 110 static uint8_t bba_codec_iread(struct am7930_softc *, int); 111 static uint16_t bba_codec_iread16(struct am7930_softc *, int); 112 static void bba_codec_iwrite(struct am7930_softc *, int, uint8_t); 113 static void bba_codec_iwrite16(struct am7930_softc *, int, uint16_t); 114 static void bba_onopen(struct am7930_softc *); 115 static void bba_onclose(struct am7930_softc *); 116 117 struct am7930_glue bba_glue = { 118 bba_codec_iread, 119 bba_codec_iwrite, 120 bba_codec_iread16, 121 bba_codec_iwrite16, 122 bba_onopen, 123 bba_onclose, 124 }; 125 126 /* 127 * Define our interface to the higher level audio driver. 128 */ 129 130 static int bba_query_format(void *, audio_format_query_t *); 131 static int bba_set_format(void *, int, 132 const audio_params_t *, const audio_params_t *, 133 audio_filter_reg_t *, audio_filter_reg_t *); 134 static int bba_round_blocksize(void *, int, int, const audio_params_t *); 135 static int bba_halt_output(void *); 136 static int bba_halt_input(void *); 137 static int bba_getdev(void *, struct audio_device *); 138 static void *bba_allocm(void *, int, size_t); 139 static void bba_freem(void *, void *, size_t); 140 static size_t bba_round_buffersize(void *, int, size_t); 141 static int bba_trigger_output(void *, void *, void *, int, 142 void (*)(void *), void *, 143 const audio_params_t *); 144 static int bba_trigger_input(void *, void *, void *, int, 145 void (*)(void *), void *, 146 const audio_params_t *); 147 static void bba_get_locks(void *opaque, kmutex_t **intr, 148 kmutex_t **thread); 149 150 static const struct audio_hw_if sa_hw_if = { 151 .open = am7930_open, 152 .close = am7930_close, 153 .query_format = bba_query_format, 154 .set_format = bba_set_format, 155 .round_blocksize = bba_round_blocksize, /* md */ 156 .commit_settings = am7930_commit_settings, 157 .halt_output = bba_halt_output, /* md */ 158 .halt_input = bba_halt_input, /* md */ 159 .getdev = bba_getdev, 160 .set_port = am7930_set_port, 161 .get_port = am7930_get_port, 162 .query_devinfo = am7930_query_devinfo, 163 .allocm = bba_allocm, /* md */ 164 .freem = bba_freem, /* md */ 165 .round_buffersize = bba_round_buffersize, /* md */ 166 .get_props = am7930_get_props, 167 .trigger_output = bba_trigger_output, /* md */ 168 .trigger_input = bba_trigger_input, /* md */ 169 .get_locks = bba_get_locks, 170 }; 171 172 static struct audio_device bba_device = { 173 "am7930", 174 "x", 175 "bba" 176 }; 177 178 static const struct audio_format bba_format = { 179 .mode = AUMODE_PLAY | AUMODE_RECORD, 180 .encoding = AUDIO_ENCODING_ULAW, /* XXX */ 181 .validbits = 32, 182 .precision = 32, 183 .channels = 1, 184 .channel_mask = AUFMT_MONAURAL, 185 .frequency_type = 1, 186 .frequency = { 8000 }, 187 }; 188 189 static int bba_intr(void *); 190 static void bba_reset(struct bba_softc *, int); 191 static void bba_codec_dwrite(struct am7930_softc *, int, uint8_t); 192 static uint8_t bba_codec_dread(struct am7930_softc *, int); 193 194 static int 195 bba_match(device_t parent, cfdata_t cf, void *aux) 196 { 197 struct ioasicdev_attach_args *ia; 198 199 ia = aux; 200 if (strcmp(ia->iada_modname, "isdn") != 0 && 201 strcmp(ia->iada_modname, "AMD79c30") != 0) 202 return 0; 203 204 return 1; 205 } 206 207 208 static void 209 bba_attach(device_t parent, device_t self, void *aux) 210 { 211 struct ioasicdev_attach_args *ia; 212 struct bba_softc *sc; 213 struct am7930_softc *asc; 214 struct ioasic_softc *iosc = device_private(parent); 215 216 ia = aux; 217 sc = device_private(self); 218 asc = &sc->sc_am7930; 219 asc->sc_dev = self; 220 sc->sc_bst = iosc->sc_bst; 221 sc->sc_bsh = iosc->sc_bsh; 222 sc->sc_dmat = iosc->sc_dmat; 223 224 /* get the bus space handle for codec */ 225 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, 226 ia->iada_offset, 0, &sc->sc_codec_bsh)) { 227 aprint_error_dev(self, "unable to map device\n"); 228 return; 229 } 230 231 printf("\n"); 232 233 bba_reset(sc,1); 234 235 /* 236 * Set up glue for MI code early; we use some of it here. 237 */ 238 asc->sc_glue = &bba_glue; 239 240 /* 241 * MI initialisation. We will be doing DMA. 242 */ 243 am7930_init(asc, AUDIOAMD_DMA_MODE); 244 245 ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE, 246 bba_intr, sc); 247 248 audio_attach_mi(&sa_hw_if, asc, self); 249 } 250 251 252 static void 253 bba_onopen(struct am7930_softc *sc) 254 { 255 } 256 257 258 static void 259 bba_onclose(struct am7930_softc *sc) 260 { 261 } 262 263 264 static void 265 bba_reset(struct bba_softc *sc, int reset) 266 { 267 uint32_t ssr; 268 269 /* disable any DMA and reset the codec */ 270 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 271 ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R); 272 if (reset) 273 ssr &= ~IOASIC_CSR_ISDN_ENABLE; 274 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 275 DELAY(10); /* 400ns required for codec to reset */ 276 277 /* initialise DMA pointers */ 278 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 279 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 280 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 281 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 282 283 /* take out of reset state */ 284 if (reset) { 285 ssr |= IOASIC_CSR_ISDN_ENABLE; 286 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 287 } 288 289 } 290 291 292 static void * 293 bba_allocm(void *addr, int direction, size_t size) 294 { 295 struct am7930_softc *asc; 296 struct bba_softc *sc; 297 bus_dma_segment_t seg; 298 int rseg; 299 void *kva; 300 struct bba_mem *m; 301 int state; 302 303 DPRINTF(("bba_allocm: size = %zu\n", size)); 304 asc = addr; 305 sc = addr; 306 state = 0; 307 308 if (bus_dmamem_alloc(sc->sc_dmat, size, BBA_DMABUF_ALIGN, 309 BBA_DMABUF_BOUNDARY, &seg, 1, &rseg, BUS_DMA_WAITOK)) { 310 aprint_error_dev(asc->sc_dev, "can't allocate DMA buffer\n"); 311 goto bad; 312 } 313 state |= 1; 314 315 if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 316 &kva, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) { 317 aprint_error_dev(asc->sc_dev, "can't map DMA buffer\n"); 318 goto bad; 319 } 320 state |= 2; 321 322 m = kmem_alloc(sizeof(struct bba_mem), KM_SLEEP); 323 m->addr = seg.ds_addr; 324 m->size = seg.ds_len; 325 m->kva = kva; 326 m->next = sc->sc_mem_head; 327 sc->sc_mem_head = m; 328 329 return (void *)kva; 330 331 bad: 332 if (state & 2) 333 bus_dmamem_unmap(sc->sc_dmat, kva, size); 334 if (state & 1) 335 bus_dmamem_free(sc->sc_dmat, &seg, 1); 336 return NULL; 337 } 338 339 340 static void 341 bba_freem(void *addr, void *ptr, size_t size) 342 { 343 struct bba_softc *sc; 344 struct bba_mem **mp, *m; 345 bus_dma_segment_t seg; 346 void *kva; 347 348 sc = addr; 349 kva = (void *)addr; 350 for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva; 351 mp = &(*mp)->next) 352 continue; 353 m = *mp; 354 if (m == NULL) { 355 printf("bba_freem: freeing unallocated memory\n"); 356 return; 357 } 358 *mp = m->next; 359 bus_dmamem_unmap(sc->sc_dmat, kva, m->size); 360 361 seg.ds_addr = m->addr; 362 seg.ds_len = m->size; 363 bus_dmamem_free(sc->sc_dmat, &seg, 1); 364 kmem_free(m, sizeof(struct bba_mem)); 365 } 366 367 368 static size_t 369 bba_round_buffersize(void *addr, int direction, size_t size) 370 { 371 372 DPRINTF(("bba_round_buffersize: size=%zu\n", size)); 373 return size > BBA_DMABUF_SIZE ? BBA_DMABUF_SIZE : 374 roundup(size, IOASIC_DMA_BLOCKSIZE); 375 } 376 377 378 static int 379 bba_halt_output(void *addr) 380 { 381 struct bba_softc *sc; 382 struct bba_dma_state *d; 383 uint32_t ssr; 384 385 sc = addr; 386 d = &sc->sc_tx_dma_state; 387 /* disable any DMA */ 388 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 389 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 390 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 391 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1); 392 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1); 393 394 if (d->active) { 395 bus_dmamap_unload(sc->sc_dmat, d->dmam); 396 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 397 d->active = 0; 398 } 399 400 return 0; 401 } 402 403 404 static int 405 bba_halt_input(void *addr) 406 { 407 struct bba_softc *sc; 408 struct bba_dma_state *d; 409 uint32_t ssr; 410 411 sc = addr; 412 d = &sc->sc_rx_dma_state; 413 /* disable any DMA */ 414 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 415 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 416 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 417 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1); 418 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1); 419 420 if (d->active) { 421 bus_dmamap_unload(sc->sc_dmat, d->dmam); 422 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 423 d->active = 0; 424 } 425 426 return 0; 427 } 428 429 430 static int 431 bba_getdev(void *addr, struct audio_device *retp) 432 { 433 434 *retp = bba_device; 435 return 0; 436 } 437 438 439 static int 440 bba_trigger_output(void *addr, void *start, void *end, int blksize, 441 void (*intr)(void *), void *arg, 442 const audio_params_t *param) 443 { 444 struct bba_softc *sc; 445 struct bba_dma_state *d; 446 uint32_t ssr; 447 tc_addr_t phys, nphys; 448 int state; 449 450 DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 451 addr, start, end, blksize, intr, arg)); 452 sc = addr; 453 d = &sc->sc_tx_dma_state; 454 state = 0; 455 456 /* disable any DMA */ 457 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 458 ssr &= ~IOASIC_CSR_DMAEN_ISDN_T; 459 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 460 461 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 462 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 463 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 464 printf("bba_trigger_output: can't create DMA map\n"); 465 goto bad; 466 } 467 state |= 1; 468 469 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 470 (char *)end - (char *)start, NULL, BUS_DMA_WRITE|BUS_DMA_NOWAIT)) { 471 printf("bba_trigger_output: can't load DMA map\n"); 472 goto bad; 473 } 474 state |= 2; 475 476 d->intr = intr; 477 d->intr_arg = arg; 478 d->curseg = 1; 479 480 /* get physical address of buffer start */ 481 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 482 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 483 484 /* setup DMA pointer */ 485 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, 486 IOASIC_DMA_ADDR(phys)); 487 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, 488 IOASIC_DMA_ADDR(nphys)); 489 490 /* kick off DMA */ 491 ssr |= IOASIC_CSR_DMAEN_ISDN_T; 492 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 493 494 d->active = 1; 495 496 return 0; 497 498 bad: 499 if (state & 2) 500 bus_dmamap_unload(sc->sc_dmat, d->dmam); 501 if (state & 1) 502 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 503 return 1; 504 } 505 506 507 static int 508 bba_trigger_input(void *addr, void *start, void *end, int blksize, 509 void (*intr)(void *), void *arg, const audio_params_t *param) 510 { 511 struct bba_softc *sc; 512 struct bba_dma_state *d; 513 tc_addr_t phys, nphys; 514 uint32_t ssr; 515 int state = 0; 516 517 DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 518 addr, start, end, blksize, intr, arg)); 519 sc = addr; 520 d = &sc->sc_rx_dma_state; 521 state = 0; 522 523 /* disable any DMA */ 524 ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR); 525 ssr &= ~IOASIC_CSR_DMAEN_ISDN_R; 526 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 527 528 if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start, 529 BBA_MAX_DMA_SEGMENTS, IOASIC_DMA_BLOCKSIZE, 530 BBA_DMABUF_BOUNDARY, BUS_DMA_NOWAIT, &d->dmam)) { 531 printf("bba_trigger_input: can't create DMA map\n"); 532 goto bad; 533 } 534 state |= 1; 535 536 if (bus_dmamap_load(sc->sc_dmat, d->dmam, start, 537 (char *)end - (char *)start, NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) { 538 printf("bba_trigger_input: can't load DMA map\n"); 539 goto bad; 540 } 541 state |= 2; 542 543 d->intr = intr; 544 d->intr_arg = arg; 545 d->curseg = 1; 546 547 /* get physical address of buffer start */ 548 phys = (tc_addr_t)d->dmam->dm_segs[0].ds_addr; 549 nphys = (tc_addr_t)d->dmam->dm_segs[1].ds_addr; 550 551 /* setup DMA pointer */ 552 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, 553 IOASIC_DMA_ADDR(phys)); 554 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, 555 IOASIC_DMA_ADDR(nphys)); 556 557 /* kick off DMA */ 558 ssr |= IOASIC_CSR_DMAEN_ISDN_R; 559 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr); 560 561 d->active = 1; 562 563 return 0; 564 565 bad: 566 if (state & 2) 567 bus_dmamap_unload(sc->sc_dmat, d->dmam); 568 if (state & 1) 569 bus_dmamap_destroy(sc->sc_dmat, d->dmam); 570 return 1; 571 } 572 573 static void 574 bba_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread) 575 { 576 struct bba_softc *bsc = opaque; 577 struct am7930_softc *sc = &bsc->sc_am7930; 578 579 *intr = &sc->sc_intr_lock; 580 *thread = &sc->sc_lock; 581 } 582 583 static int 584 bba_intr(void *addr) 585 { 586 struct bba_softc *sc; 587 struct bba_dma_state *d; 588 tc_addr_t nphys; 589 int mask; 590 591 sc = addr; 592 mutex_enter(&sc->sc_am7930.sc_intr_lock); 593 594 mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR); 595 596 if (mask & IOASIC_INTR_ISDN_TXLOAD) { 597 d = &sc->sc_tx_dma_state; 598 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 599 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 600 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 601 IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 602 if (d->intr != NULL) 603 (*d->intr)(d->intr_arg); 604 } 605 if (mask & IOASIC_INTR_ISDN_RXLOAD) { 606 d = &sc->sc_rx_dma_state; 607 d->curseg = (d->curseg+1) % d->dmam->dm_nsegs; 608 nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr; 609 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 610 IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys)); 611 if (d->intr != NULL) 612 (*d->intr)(d->intr_arg); 613 } 614 615 mutex_exit(&sc->sc_am7930.sc_intr_lock); 616 617 return 0; 618 } 619 620 static int 621 bba_query_format(void *addr, audio_format_query_t *afp) 622 { 623 624 return audio_query_format(&bba_format, 1, afp); 625 } 626 627 static int 628 bba_set_format(void *addr, int setmode, 629 const audio_params_t *play, const audio_params_t *rec, 630 audio_filter_reg_t *pfil, audio_filter_reg_t *rfil) 631 { 632 633 if ((setmode & AUMODE_PLAY) != 0) { 634 pfil->codec = audio_internal_to_mulaw32; 635 } 636 if ((setmode & AUMODE_RECORD) != 0) { 637 rfil->codec = audio_mulaw32_to_internal; 638 } 639 640 return 0; 641 } 642 643 static int 644 bba_round_blocksize(void *addr, int blk, int mode, const audio_params_t *param) 645 { 646 647 return IOASIC_DMA_BLOCKSIZE; 648 } 649 650 651 /* indirect write */ 652 static void 653 bba_codec_iwrite(struct am7930_softc *sc, int reg, uint8_t val) 654 { 655 656 DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 657 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 658 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 659 } 660 661 662 static void 663 bba_codec_iwrite16(struct am7930_softc *sc, int reg, uint16_t val) 664 { 665 666 DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 667 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 668 bba_codec_dwrite(sc, AM7930_DREG_DR, val); 669 bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8); 670 } 671 672 673 static uint16_t 674 bba_codec_iread16(struct am7930_softc *sc, int reg) 675 { 676 uint16_t val; 677 678 DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n", sc, reg)); 679 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 680 val = bba_codec_dread(sc, AM7930_DREG_DR) << 8; 681 val |= bba_codec_dread(sc, AM7930_DREG_DR); 682 683 return val; 684 } 685 686 687 /* indirect read */ 688 static uint8_t 689 bba_codec_iread(struct am7930_softc *sc, int reg) 690 { 691 uint8_t val; 692 693 DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n", sc, reg)); 694 bba_codec_dwrite(sc, AM7930_DREG_CR, reg); 695 val = bba_codec_dread(sc, AM7930_DREG_DR); 696 697 DPRINTF(("read 0x%x (%d)\n", val, val)); 698 699 return val; 700 } 701 702 /* direct write */ 703 static void 704 bba_codec_dwrite(struct am7930_softc *asc, int reg, uint8_t val) 705 { 706 struct bba_softc *sc; 707 708 sc = (struct bba_softc *)asc; 709 DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val)); 710 711 #if defined(__alpha__) 712 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 713 reg << 2, val << 8); 714 #else 715 bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, 716 reg << 6, val); 717 #endif 718 } 719 720 /* direct read */ 721 static uint8_t 722 bba_codec_dread(struct am7930_softc *asc, int reg) 723 { 724 struct bba_softc *sc; 725 726 sc = (struct bba_softc *)asc; 727 DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n", sc, reg)); 728 729 #if defined(__alpha__) 730 return ((bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 731 reg << 2) >> 8) & 0xff); 732 #else 733 return (bus_space_read_4(sc->sc_bst, sc->sc_codec_bsh, 734 reg << 6) & 0xff); 735 #endif 736 } 737
Indexes created Sun Sep 28 12:09:53 GMT 2025