if_le_ioasic.c revision 1.10
1 /* $NetBSD: if_le_ioasic.c,v 1.10 1998/01/19 02:49:48 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 /* 31 * LANCE on DEC IOCTL ASIC. 32 */ 33 34 #include <sys/cdefs.h> /* RCS ID & macro defns */ 35 __KERNEL_RCSID(0, "$NetBSD: if_le_ioasic.c,v 1.10 1998/01/19 02:49:48 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/mbuf.h> 40 #include <sys/syslog.h> 41 #include <sys/socket.h> 42 #include <sys/device.h> 43 44 #include <net/if.h> 45 #include <net/if_ether.h> 46 #include <net/if_media.h> 47 48 #ifdef INET 49 #include <netinet/in.h> 50 #include <netinet/if_inarp.h> 51 #endif 52 53 #include <dev/ic/am7990reg.h> 54 #include <dev/ic/am7990var.h> 55 56 #include <dev/tc/if_levar.h> 57 #include <dev/tc/tcvar.h> 58 #include <dev/tc/ioasicvar.h> 59 60 extern caddr_t le_iomem; 61 62 int le_ioasic_match __P((struct device *, struct cfdata *, void *)); 63 void le_ioasic_attach __P((struct device *, struct device *, void *)); 64 65 hide void le_ioasic_copytobuf_gap2 __P((struct am7990_softc *, void *, 66 int, int)); 67 hide void le_ioasic_copyfrombuf_gap2 __P((struct am7990_softc *, void *, 68 int, int)); 69 70 hide void le_ioasic_copytobuf_gap16 __P((struct am7990_softc *, void *, 71 int, int)); 72 hide void le_ioasic_copyfrombuf_gap16 __P((struct am7990_softc *, void *, 73 int, int)); 74 hide void le_ioasic_zerobuf_gap16 __P((struct am7990_softc *, int, int)); 75 76 struct cfattach le_ioasic_ca = { 77 sizeof(struct le_softc), le_ioasic_match, le_ioasic_attach 78 }; 79 80 int 81 le_ioasic_match(parent, match, aux) 82 struct device *parent; 83 struct cfdata *match; 84 void *aux; 85 { 86 struct ioasicdev_attach_args *d = aux; 87 88 if (!ioasic_submatch(match, aux)) 89 return (0); 90 if (strncmp("lance", d->iada_modname, TC_ROM_LLEN)) 91 return (0); 92 93 return (1); 94 } 95 96 void 97 le_ioasic_attach(parent, self, aux) 98 struct device *parent, *self; 99 void *aux; 100 { 101 struct ioasicdev_attach_args *d = aux; 102 register struct le_softc *lesc = (void *)self; 103 register struct am7990_softc *sc = &lesc->sc_am7990; 104 105 lesc->sc_r1 = (struct lereg1 *) 106 TC_DENSE_TO_SPARSE(TC_PHYS_TO_UNCACHED(d->iada_addr)); 107 sc->sc_mem = (void *)TC_PHYS_TO_UNCACHED(le_iomem); 108 109 sc->sc_copytodesc = le_ioasic_copytobuf_gap2; 110 sc->sc_copyfromdesc = le_ioasic_copyfrombuf_gap2; 111 sc->sc_copytobuf = le_ioasic_copytobuf_gap16; 112 sc->sc_copyfrombuf = le_ioasic_copyfrombuf_gap16; 113 sc->sc_zerobuf = le_ioasic_zerobuf_gap16; 114 115 if (le_iomem == 0) { 116 printf("%s: DMA area not set up\n", sc->sc_dev.dv_xname); 117 return; 118 } 119 120 #ifndef __alpha__ 121 ioasic_lance_dma_setup(le_iomem); /* XXX more thought */ 122 #endif 123 124 dec_le_common_attach(sc, ioasic_lance_ether_address()); 125 126 ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_NET, 127 am7990_intr, sc); 128 } 129 130 /* 131 * Special memory access functions needed by ioasic-attached LANCE 132 * chips. 133 */ 134 135 /* 136 * gap2: two bytes of data followed by two bytes of pad. 137 * 138 * Buffers must be 4-byte aligned. The code doesn't worry about 139 * doing an extra byte. 140 */ 141 142 void 143 le_ioasic_copytobuf_gap2(sc, fromv, boff, len) 144 struct am7990_softc *sc; 145 void *fromv; 146 int boff; 147 register int len; 148 { 149 volatile caddr_t buf = sc->sc_mem; 150 register caddr_t from = fromv; 151 register volatile u_int16_t *bptr; 152 153 if (boff & 0x1) { 154 /* handle unaligned first byte */ 155 bptr = ((volatile u_int16_t *)buf) + (boff - 1); 156 *bptr = (*from++ << 8) | (*bptr & 0xff); 157 bptr += 2; 158 len--; 159 } else 160 bptr = ((volatile u_int16_t *)buf) + boff; 161 while (len > 1) { 162 *bptr = (from[1] << 8) | (from[0] & 0xff); 163 bptr += 2; 164 from += 2; 165 len -= 2; 166 } 167 if (len == 1) 168 *bptr = (u_int16_t)*from; 169 } 170 171 void 172 le_ioasic_copyfrombuf_gap2(sc, tov, boff, len) 173 struct am7990_softc *sc; 174 void *tov; 175 int boff, len; 176 { 177 volatile caddr_t buf = sc->sc_mem; 178 register caddr_t to = tov; 179 register volatile u_int16_t *bptr; 180 register u_int16_t tmp; 181 182 if (boff & 0x1) { 183 /* handle unaligned first byte */ 184 bptr = ((volatile u_int16_t *)buf) + (boff - 1); 185 *to++ = (*bptr >> 8) & 0xff; 186 bptr += 2; 187 len--; 188 } else 189 bptr = ((volatile u_int16_t *)buf) + boff; 190 while (len > 1) { 191 tmp = *bptr; 192 *to++ = tmp & 0xff; 193 *to++ = (tmp >> 8) & 0xff; 194 bptr += 2; 195 len -= 2; 196 } 197 if (len == 1) 198 *to = *bptr & 0xff; 199 } 200 201 /* 202 * gap16: 16 bytes of data followed by 16 bytes of pad. 203 * 204 * Buffers must be 32-byte aligned. 205 */ 206 207 void 208 le_ioasic_copytobuf_gap16(sc, fromv, boff, len) 209 struct am7990_softc *sc; 210 void *fromv; 211 int boff; 212 register int len; 213 { 214 volatile caddr_t buf = sc->sc_mem; 215 register caddr_t from = fromv; 216 register caddr_t bptr; 217 218 bptr = buf + ((boff << 1) & ~0x1f); 219 boff &= 0xf; 220 221 /* 222 * Dispose of boff so destination of subsequent copies is 223 * 16-byte aligned. 224 */ 225 if (boff) { 226 register int xfer; 227 xfer = min(len, 16 - boff); 228 bcopy(from, bptr + boff, xfer); 229 from += xfer; 230 bptr += 32; 231 len -= xfer; 232 } 233 234 /* Destination of copies is now 16-byte aligned. */ 235 if (len >= 16) 236 switch ((u_long)from & (sizeof(u_int32_t) -1)) { 237 case 2: 238 /* Ethernet headers make this the dominant case. */ 239 do { 240 register u_int32_t *dst = (u_int32_t*)bptr; 241 register u_int16_t t0; 242 register u_int32_t t1, t2, t3, t4; 243 244 /* read from odd-16-bit-aligned, cached src */ 245 t0 = *(u_int16_t*)from; 246 t1 = *(u_int32_t*)(from+2); 247 t2 = *(u_int32_t*)(from+6); 248 t3 = *(u_int32_t*)(from+10); 249 t4 = *(u_int16_t*)(from+14); 250 251 /* DMA buffer is uncached on mips */ 252 dst[0] = t0 | (t1 << 16); 253 dst[1] = (t1 >> 16) | (t2 << 16); 254 dst[2] = (t2 >> 16) | (t3 << 16); 255 dst[3] = (t3 >> 16) | (t4 << 16); 256 257 from += 16; 258 bptr += 32; 259 len -= 16; 260 } while (len >= 16); 261 break; 262 263 case 0: 264 do { 265 register u_int32_t *src = (u_int32_t*)from; 266 register u_int32_t *dst = (u_int32_t*)bptr; 267 register u_int32_t t0, t1, t2, t3; 268 269 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3]; 270 dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; 271 272 from += 16; 273 bptr += 32; 274 len -= 16; 275 } while (len >= 16); 276 break; 277 278 default: 279 /* Does odd-aligned case ever happen? */ 280 do { 281 bcopy(from, bptr, 16); 282 from += 16; 283 bptr += 32; 284 len -= 16; 285 } while (len >= 16); 286 break; 287 } 288 if (len) 289 bcopy(from, bptr, len); 290 } 291 292 void 293 le_ioasic_copyfrombuf_gap16(sc, tov, boff, len) 294 struct am7990_softc *sc; 295 void *tov; 296 int boff, len; 297 { 298 volatile caddr_t buf = sc->sc_mem; 299 register caddr_t to = tov; 300 register caddr_t bptr; 301 302 bptr = buf + ((boff << 1) & ~0x1f); 303 boff &= 0xf; 304 305 /* Dispose of boff. source of copy is subsequently 16-byte aligned. */ 306 if (boff) { 307 register int xfer; 308 xfer = min(len, 16 - boff); 309 bcopy(bptr+boff, to, xfer); 310 to += xfer; 311 bptr += 32; 312 len -= xfer; 313 } 314 if (len >= 16) 315 switch ((u_long)to & (sizeof(u_int32_t) -1)) { 316 case 2: 317 /* 318 * to is aligned to an odd 16-bit boundary. Ethernet headers 319 * make this the dominant case (98% or more). 320 */ 321 do { 322 register u_int32_t *src = (u_int32_t*)bptr; 323 register u_int32_t t0, t1, t2, t3; 324 325 /* read from uncached aligned DMA buf */ 326 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3]; 327 328 /* write to odd-16-bit-word aligned dst */ 329 *(u_int16_t *) (to+0) = (u_short) t0; 330 *(u_int32_t *) (to+2) = (t0 >> 16) | (t1 << 16); 331 *(u_int32_t *) (to+6) = (t1 >> 16) | (t2 << 16); 332 *(u_int32_t *) (to+10) = (t2 >> 16) | (t3 << 16); 333 *(u_int16_t *) (to+14) = (t3 >> 16); 334 bptr += 32; 335 to += 16; 336 len -= 16; 337 } while (len > 16); 338 break; 339 case 0: 340 /* 32-bit aligned aligned copy. Rare. */ 341 do { 342 register u_int32_t *src = (u_int32_t*)bptr; 343 register u_int32_t *dst = (u_int32_t*)to; 344 register u_int32_t t0, t1, t2, t3; 345 346 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3]; 347 dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; 348 to += 16; 349 bptr += 32; 350 len -= 16; 351 } while (len > 16); 352 break; 353 354 /* XXX Does odd-byte-aligned case ever happen? */ 355 default: 356 do { 357 bcopy(bptr, to, 16); 358 to += 16; 359 bptr += 32; 360 len -= 16; 361 } while (len > 16); 362 break; 363 } 364 if (len) 365 bcopy(bptr, to, len); 366 } 367 368 void 369 le_ioasic_zerobuf_gap16(sc, boff, len) 370 struct am7990_softc *sc; 371 int boff, len; 372 { 373 volatile caddr_t buf = sc->sc_mem; 374 register caddr_t bptr; 375 register int xfer; 376 377 bptr = buf + ((boff << 1) & ~0x1f); 378 boff &= 0xf; 379 xfer = min(len, 16 - boff); 380 while (len > 0) { 381 bzero(bptr + boff, xfer); 382 bptr += 32; 383 boff = 0; 384 len -= xfer; 385 xfer = min(len, 16); 386 } 387 } 388
Indexes created Tue Sep 30 11:09:46 GMT 2025