if_le_ioasic.c revision 1.11
1 /* $NetBSD: if_le_ioasic.c,v 1.11 1998/07/05 00:51:25 jonathan Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 /* 31 * LANCE on DEC IOCTL ASIC. 32 */ 33 34 #include <sys/cdefs.h> /* RCS ID & macro defns */ 35 __KERNEL_RCSID(0, "$NetBSD: if_le_ioasic.c,v 1.11 1998/07/05 00:51:25 jonathan Exp $"); 36 37 #include "opt_inet.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 46 #include <net/if.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 50 #ifdef INET 51 #include <netinet/in.h> 52 #include <netinet/if_inarp.h> 53 #endif 54 55 #include <dev/ic/am7990reg.h> 56 #include <dev/ic/am7990var.h> 57 58 #include <dev/tc/if_levar.h> 59 #include <dev/tc/tcvar.h> 60 #include <dev/tc/ioasicvar.h> 61 62 extern caddr_t le_iomem; 63 64 int le_ioasic_match __P((struct device *, struct cfdata *, void *)); 65 void le_ioasic_attach __P((struct device *, struct device *, void *)); 66 67 hide void le_ioasic_copytobuf_gap2 __P((struct am7990_softc *, void *, 68 int, int)); 69 hide void le_ioasic_copyfrombuf_gap2 __P((struct am7990_softc *, void *, 70 int, int)); 71 72 hide void le_ioasic_copytobuf_gap16 __P((struct am7990_softc *, void *, 73 int, int)); 74 hide void le_ioasic_copyfrombuf_gap16 __P((struct am7990_softc *, void *, 75 int, int)); 76 hide void le_ioasic_zerobuf_gap16 __P((struct am7990_softc *, int, int)); 77 78 struct cfattach le_ioasic_ca = { 79 sizeof(struct le_softc), le_ioasic_match, le_ioasic_attach 80 }; 81 82 int 83 le_ioasic_match(parent, match, aux) 84 struct device *parent; 85 struct cfdata *match; 86 void *aux; 87 { 88 struct ioasicdev_attach_args *d = aux; 89 90 if (!ioasic_submatch(match, aux)) 91 return (0); 92 if (strncmp("lance", d->iada_modname, TC_ROM_LLEN)) 93 return (0); 94 95 return (1); 96 } 97 98 void 99 le_ioasic_attach(parent, self, aux) 100 struct device *parent, *self; 101 void *aux; 102 { 103 struct ioasicdev_attach_args *d = aux; 104 register struct le_softc *lesc = (void *)self; 105 register struct am7990_softc *sc = &lesc->sc_am7990; 106 107 lesc->sc_r1 = (struct lereg1 *) 108 TC_DENSE_TO_SPARSE(TC_PHYS_TO_UNCACHED(d->iada_addr)); 109 sc->sc_mem = (void *)TC_PHYS_TO_UNCACHED(le_iomem); 110 111 sc->sc_copytodesc = le_ioasic_copytobuf_gap2; 112 sc->sc_copyfromdesc = le_ioasic_copyfrombuf_gap2; 113 sc->sc_copytobuf = le_ioasic_copytobuf_gap16; 114 sc->sc_copyfrombuf = le_ioasic_copyfrombuf_gap16; 115 sc->sc_zerobuf = le_ioasic_zerobuf_gap16; 116 117 if (le_iomem == 0) { 118 printf("%s: DMA area not set up\n", sc->sc_dev.dv_xname); 119 return; 120 } 121 122 #ifndef __alpha__ 123 ioasic_lance_dma_setup(le_iomem); /* XXX more thought */ 124 #endif 125 126 dec_le_common_attach(sc, ioasic_lance_ether_address()); 127 128 ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_NET, 129 am7990_intr, sc); 130 } 131 132 /* 133 * Special memory access functions needed by ioasic-attached LANCE 134 * chips. 135 */ 136 137 /* 138 * gap2: two bytes of data followed by two bytes of pad. 139 * 140 * Buffers must be 4-byte aligned. The code doesn't worry about 141 * doing an extra byte. 142 */ 143 144 void 145 le_ioasic_copytobuf_gap2(sc, fromv, boff, len) 146 struct am7990_softc *sc; 147 void *fromv; 148 int boff; 149 register int len; 150 { 151 volatile caddr_t buf = sc->sc_mem; 152 register caddr_t from = fromv; 153 register volatile u_int16_t *bptr; 154 155 if (boff & 0x1) { 156 /* handle unaligned first byte */ 157 bptr = ((volatile u_int16_t *)buf) + (boff - 1); 158 *bptr = (*from++ << 8) | (*bptr & 0xff); 159 bptr += 2; 160 len--; 161 } else 162 bptr = ((volatile u_int16_t *)buf) + boff; 163 while (len > 1) { 164 *bptr = (from[1] << 8) | (from[0] & 0xff); 165 bptr += 2; 166 from += 2; 167 len -= 2; 168 } 169 if (len == 1) 170 *bptr = (u_int16_t)*from; 171 } 172 173 void 174 le_ioasic_copyfrombuf_gap2(sc, tov, boff, len) 175 struct am7990_softc *sc; 176 void *tov; 177 int boff, len; 178 { 179 volatile caddr_t buf = sc->sc_mem; 180 register caddr_t to = tov; 181 register volatile u_int16_t *bptr; 182 register u_int16_t tmp; 183 184 if (boff & 0x1) { 185 /* handle unaligned first byte */ 186 bptr = ((volatile u_int16_t *)buf) + (boff - 1); 187 *to++ = (*bptr >> 8) & 0xff; 188 bptr += 2; 189 len--; 190 } else 191 bptr = ((volatile u_int16_t *)buf) + boff; 192 while (len > 1) { 193 tmp = *bptr; 194 *to++ = tmp & 0xff; 195 *to++ = (tmp >> 8) & 0xff; 196 bptr += 2; 197 len -= 2; 198 } 199 if (len == 1) 200 *to = *bptr & 0xff; 201 } 202 203 /* 204 * gap16: 16 bytes of data followed by 16 bytes of pad. 205 * 206 * Buffers must be 32-byte aligned. 207 */ 208 209 void 210 le_ioasic_copytobuf_gap16(sc, fromv, boff, len) 211 struct am7990_softc *sc; 212 void *fromv; 213 int boff; 214 register int len; 215 { 216 volatile caddr_t buf = sc->sc_mem; 217 register caddr_t from = fromv; 218 register caddr_t bptr; 219 220 bptr = buf + ((boff << 1) & ~0x1f); 221 boff &= 0xf; 222 223 /* 224 * Dispose of boff so destination of subsequent copies is 225 * 16-byte aligned. 226 */ 227 if (boff) { 228 register int xfer; 229 xfer = min(len, 16 - boff); 230 bcopy(from, bptr + boff, xfer); 231 from += xfer; 232 bptr += 32; 233 len -= xfer; 234 } 235 236 /* Destination of copies is now 16-byte aligned. */ 237 if (len >= 16) 238 switch ((u_long)from & (sizeof(u_int32_t) -1)) { 239 case 2: 240 /* Ethernet headers make this the dominant case. */ 241 do { 242 register u_int32_t *dst = (u_int32_t*)bptr; 243 register u_int16_t t0; 244 register u_int32_t t1, t2, t3, t4; 245 246 /* read from odd-16-bit-aligned, cached src */ 247 t0 = *(u_int16_t*)from; 248 t1 = *(u_int32_t*)(from+2); 249 t2 = *(u_int32_t*)(from+6); 250 t3 = *(u_int32_t*)(from+10); 251 t4 = *(u_int16_t*)(from+14); 252 253 /* DMA buffer is uncached on mips */ 254 dst[0] = t0 | (t1 << 16); 255 dst[1] = (t1 >> 16) | (t2 << 16); 256 dst[2] = (t2 >> 16) | (t3 << 16); 257 dst[3] = (t3 >> 16) | (t4 << 16); 258 259 from += 16; 260 bptr += 32; 261 len -= 16; 262 } while (len >= 16); 263 break; 264 265 case 0: 266 do { 267 register u_int32_t *src = (u_int32_t*)from; 268 register u_int32_t *dst = (u_int32_t*)bptr; 269 register u_int32_t t0, t1, t2, t3; 270 271 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3]; 272 dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; 273 274 from += 16; 275 bptr += 32; 276 len -= 16; 277 } while (len >= 16); 278 break; 279 280 default: 281 /* Does odd-aligned case ever happen? */ 282 do { 283 bcopy(from, bptr, 16); 284 from += 16; 285 bptr += 32; 286 len -= 16; 287 } while (len >= 16); 288 break; 289 } 290 if (len) 291 bcopy(from, bptr, len); 292 } 293 294 void 295 le_ioasic_copyfrombuf_gap16(sc, tov, boff, len) 296 struct am7990_softc *sc; 297 void *tov; 298 int boff, len; 299 { 300 volatile caddr_t buf = sc->sc_mem; 301 register caddr_t to = tov; 302 register caddr_t bptr; 303 304 bptr = buf + ((boff << 1) & ~0x1f); 305 boff &= 0xf; 306 307 /* Dispose of boff. source of copy is subsequently 16-byte aligned. */ 308 if (boff) { 309 register int xfer; 310 xfer = min(len, 16 - boff); 311 bcopy(bptr+boff, to, xfer); 312 to += xfer; 313 bptr += 32; 314 len -= xfer; 315 } 316 if (len >= 16) 317 switch ((u_long)to & (sizeof(u_int32_t) -1)) { 318 case 2: 319 /* 320 * to is aligned to an odd 16-bit boundary. Ethernet headers 321 * make this the dominant case (98% or more). 322 */ 323 do { 324 register u_int32_t *src = (u_int32_t*)bptr; 325 register u_int32_t t0, t1, t2, t3; 326 327 /* read from uncached aligned DMA buf */ 328 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3]; 329 330 /* write to odd-16-bit-word aligned dst */ 331 *(u_int16_t *) (to+0) = (u_short) t0; 332 *(u_int32_t *) (to+2) = (t0 >> 16) | (t1 << 16); 333 *(u_int32_t *) (to+6) = (t1 >> 16) | (t2 << 16); 334 *(u_int32_t *) (to+10) = (t2 >> 16) | (t3 << 16); 335 *(u_int16_t *) (to+14) = (t3 >> 16); 336 bptr += 32; 337 to += 16; 338 len -= 16; 339 } while (len > 16); 340 break; 341 case 0: 342 /* 32-bit aligned aligned copy. Rare. */ 343 do { 344 register u_int32_t *src = (u_int32_t*)bptr; 345 register u_int32_t *dst = (u_int32_t*)to; 346 register u_int32_t t0, t1, t2, t3; 347 348 t0 = src[0]; t1 = src[1]; t2 = src[2]; t3 = src[3]; 349 dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; 350 to += 16; 351 bptr += 32; 352 len -= 16; 353 } while (len > 16); 354 break; 355 356 /* XXX Does odd-byte-aligned case ever happen? */ 357 default: 358 do { 359 bcopy(bptr, to, 16); 360 to += 16; 361 bptr += 32; 362 len -= 16; 363 } while (len > 16); 364 break; 365 } 366 if (len) 367 bcopy(bptr, to, len); 368 } 369 370 void 371 le_ioasic_zerobuf_gap16(sc, boff, len) 372 struct am7990_softc *sc; 373 int boff, len; 374 { 375 volatile caddr_t buf = sc->sc_mem; 376 register caddr_t bptr; 377 register int xfer; 378 379 bptr = buf + ((boff << 1) & ~0x1f); 380 boff &= 0xf; 381 xfer = min(len, 16 - boff); 382 while (len > 0) { 383 bzero(bptr + boff, xfer); 384 bptr += 32; 385 boff = 0; 386 len -= xfer; 387 xfer = min(len, 16); 388 } 389 } 390
Indexes created Tue Sep 30 07:10:03 GMT 2025