px.c revision 1.36
1 /* $NetBSD: px.c,v 1.36 2009/05/12 14:47:04 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for DEC PixelStamp graphics adapters (PMAG-C). 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: px.c,v 1.36 2009/05/12 14:47:04 cegger Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 #include <sys/callout.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #if defined(pmax) 48 #include <mips/cpuregs.h> 49 #elif defined(alpha) 50 #include <alpha/alpha_cpu.h> 51 #endif 52 53 #include <machine/autoconf.h> 54 #include <sys/cpu.h> 55 #include <sys/bus.h> 56 57 #include <dev/cons.h> 58 59 #include <dev/wscons/wsconsio.h> 60 #include <dev/wscons/wsdisplayvar.h> 61 62 #include <dev/ic/bt459reg.h> 63 64 #include <dev/tc/tcvar.h> 65 #include <dev/tc/sticreg.h> 66 #include <dev/tc/sticio.h> 67 #include <dev/tc/sticvar.h> 68 69 #define PX_STIC_POLL_OFFSET 0x000000 /* STIC DMA poll space */ 70 #define PX_STAMP_OFFSET 0x0c0000 /* pixelstamp space on STIC */ 71 #define PX_STIC_OFFSET 0x180000 /* STIC registers */ 72 #define PX_VDAC_OFFSET 0x200000 /* VDAC registers (bt459) */ 73 #define PX_VDAC_RESET_OFFSET 0x300000 /* VDAC reset register */ 74 #define PX_ROM_OFFSET 0x300000 /* ROM code */ 75 76 #define PX_BUF_COUNT 16 77 #define PX_BUF_INC(x) ((x + 1) & (PX_BUF_COUNT - 1)) 78 79 /* 80 * We need enough aligned memory to hold: 81 * 82 * - Xserver communication area (4096 bytes) 83 * - 16 packet buffers (4096 bytes each) 84 * - 2 image buffers (5120 bytes each) 85 * 86 */ 87 #define PX_BUF_SIZE \ 88 (STIC_PACKET_SIZE * PX_BUF_COUNT + STIC_IMGBUF_SIZE*2 + STIC_XCOMM_SIZE) 89 #define PX_BUF_ALIGN 32768 90 91 #define PXF_QUEUE 0x01 92 93 static void px_attach(device_t, device_t, void *); 94 static void px_init(struct stic_info *, int); 95 static int px_ioctl(struct stic_info *, u_long, void *, int, 96 struct lwp *); 97 static int px_match(device_t, cfdata_t, void *); 98 99 static int px_intr(void *); 100 static uint32_t *px_pbuf_get(struct stic_info *); 101 static int px_pbuf_post(struct stic_info *, u_int32_t *); 102 103 void px_cnattach(tc_addr_t); 104 105 struct px_softc { 106 device_t px_dev; 107 struct stic_info *px_si; 108 volatile u_int32_t *px_qpoll[PX_BUF_COUNT]; 109 }; 110 111 CFATTACH_DECL_NEW(px, sizeof(struct px_softc), 112 px_match, px_attach, NULL, NULL); 113 114 static int 115 px_match(device_t parent, cfdata_t match, void *aux) 116 { 117 struct tc_attach_args *ta; 118 119 ta = aux; 120 121 return (strncmp("PMAG-CA ", ta->ta_modname, TC_ROM_LLEN) == 0); 122 } 123 124 static void 125 px_attach(device_t parent, device_t self, void *aux) 126 { 127 struct stic_info *si; 128 struct tc_attach_args *ta; 129 struct px_softc *px; 130 int console, i; 131 u_long v; 132 133 px = device_private(self); 134 ta = (struct tc_attach_args *)aux; 135 136 px->px_dev = self; 137 138 if (ta->ta_addr == stic_consinfo.si_slotbase) { 139 si = &stic_consinfo; 140 console = 1; 141 } else { 142 if (stic_consinfo.si_slotbase == 0) 143 si = &stic_consinfo; 144 else { 145 si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT|M_ZERO); 146 } 147 si->si_slotbase = ta->ta_addr; 148 px_init(si, 0); 149 console = 0; 150 } 151 152 px->px_si = si; 153 si->si_dv = self; 154 tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, px_intr, si); 155 156 printf(": 8 plane, %dx%d stamp\n", si->si_stampw, si->si_stamph); 157 158 for (i = 0; i < PX_BUF_COUNT; i++) { 159 v = i * STIC_PACKET_SIZE + 160 si->si_buf_phys + STIC_XCOMM_SIZE; 161 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 162 px->px_qpoll[i] = (volatile u_int32_t *) 163 ((char *)si->si_slotbase + (v >> 9)); 164 } 165 166 stic_attach(self, si, console); 167 } 168 169 void 170 px_cnattach(tc_addr_t addr) 171 { 172 struct stic_info *si; 173 174 si = &stic_consinfo; 175 si->si_slotbase = addr; 176 px_init(si, 1); 177 stic_cnattach(si); 178 } 179 180 static void 181 px_init(struct stic_info *si, int bootstrap) 182 { 183 struct pglist pglist; 184 char *kva, *bva; 185 paddr_t bpa; 186 187 kva = (void *)si->si_slotbase; 188 189 /* 190 * Allocate memory for the packet buffers. It must be located below 191 * 8MB, since the STIC can't access outside that region. Also, due 192 * to the holes in STIC address space, each buffer mustn't cross a 193 * 32kB boundary. 194 */ 195 if (bootstrap) { 196 /* 197 * UVM won't be initialised at this point, so grab memory 198 * directly from vm_physmem[]. 199 */ 200 bva = (char *)uvm_pageboot_alloc(PX_BUF_SIZE + PX_BUF_ALIGN); 201 bpa = (STIC_KSEG_TO_PHYS(bva) + PX_BUF_ALIGN - 1) & 202 ~(PX_BUF_ALIGN - 1); 203 if (bpa + PX_BUF_SIZE > 8192*1024) 204 panic("px_init: allocation out of bounds"); 205 } else { 206 if (uvm_pglistalloc(PX_BUF_SIZE, 0, 8192*1024, PX_BUF_ALIGN, 207 0, &pglist, 1, 0) != 0) 208 panic("px_init: allocation failure"); 209 bpa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pglist)); 210 } 211 212 si->si_vdac = (u_int32_t *)(kva + PX_VDAC_OFFSET); 213 si->si_vdac_reset = (u_int32_t *)(kva + PX_VDAC_RESET_OFFSET); 214 si->si_stic = (volatile struct stic_regs *)(kva + PX_STIC_OFFSET); 215 si->si_stamp = (u_int32_t *)(kva + PX_STAMP_OFFSET); 216 si->si_buf = (u_int32_t *)TC_PHYS_TO_UNCACHED(bpa); 217 si->si_buf_phys = bpa; 218 si->si_buf_size = PX_BUF_SIZE; 219 si->si_disptype = WSDISPLAY_TYPE_PX; 220 si->si_depth = 8; 221 si->si_sxc = (volatile struct stic_xcomm *)si->si_buf; 222 223 si->si_pbuf_get = px_pbuf_get; 224 si->si_pbuf_post = px_pbuf_post; 225 si->si_ioctl = px_ioctl; 226 227 memset(si->si_buf, 0, PX_BUF_SIZE); 228 229 stic_init(si); 230 } 231 232 static int 233 px_intr(void *cookie) 234 { 235 volatile struct stic_regs *sr; 236 volatile struct stic_xcomm *sxc; 237 struct stic_info *si; 238 struct px_softc *px; 239 int state; 240 241 si = cookie; 242 px = (struct px_softc *)si->si_dv; 243 sr = si->si_stic; 244 state = sr->sr_ipdvint; 245 sxc = si->si_sxc; 246 247 /* 248 * Vertical-retrace condition. 249 * 250 * Clear the flag and flush out any waiting VDAC updates. We do 251 * this at retrace time to avoid producing `shearing' and other 252 * nasty artifacts. 253 */ 254 if ((state & STIC_INT_V) != 0) { 255 sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN; 256 tc_wmb(); 257 stic_flush(si); 258 } 259 260 /* 261 * Error condition. 262 * 263 * Simply clear the flag and report the error. 264 */ 265 if ((state & STIC_INT_E) != 0) { 266 aprint_error_dev(px->px_dev, "error intr, %x %x %x %x %x", 267 sr->sr_ipdvint, sr->sr_sticsr, sr->sr_buscsr, 268 sr->sr_busadr, sr->sr_busdat); 269 sr->sr_ipdvint = STIC_INT_E_WE | STIC_INT_E_EN; 270 tc_wmb(); 271 } 272 273 /* 274 * Check for queue stalls. 275 */ 276 if (sxc->sxc_tail != sxc->sxc_head && !sxc->sxc_busy) 277 state |= STIC_INT_P; 278 279 /* 280 * Packet-done condition. 281 * 282 * If packet queueing is enabled, clear the condition, and increment 283 * the tail (submitted) pointer. 284 */ 285 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P) != 0) { 286 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 287 tc_wmb(); 288 289 if (sxc->sxc_tail != sxc->sxc_head) { 290 sxc->sxc_done[sxc->sxc_tail] = 0; 291 sxc->sxc_tail = PX_BUF_INC(sxc->sxc_tail); 292 } 293 294 if (sxc->sxc_tail != sxc->sxc_head) { 295 if (*px->px_qpoll[sxc->sxc_tail] != STAMP_OK) { 296 sxc->sxc_nreject++; 297 sxc->sxc_busy = 0; 298 } else 299 sxc->sxc_busy = 1; 300 } else 301 sxc->sxc_busy = 0; 302 } 303 304 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P_EN) == 0) 305 printf("px_intr: STIC_INT_P_EN == 0\n"); 306 307 return (1); 308 } 309 310 static uint32_t * 311 px_pbuf_get(struct stic_info *si) 312 { 313 u_long off; 314 315 si->si_pbuf_select ^= STIC_PACKET_SIZE; 316 off = si->si_pbuf_select + STIC_XCOMM_SIZE; 317 return ((u_int32_t *)((char *)si->si_buf + off)); 318 } 319 320 static int 321 px_pbuf_post(struct stic_info *si, u_int32_t *buf) 322 { 323 volatile u_int32_t *poll, junk; 324 volatile struct stic_regs *sr; 325 u_long v; 326 int c; 327 328 sr = si->si_stic; 329 330 /* Get address of poll register for this buffer. */ 331 v = (u_long)STIC_KSEG_TO_PHYS(buf); 332 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 333 poll = (volatile u_int32_t *)((char *)si->si_slotbase + (v >> 9)); 334 335 /* 336 * Read the poll register and make sure the stamp wants to accept 337 * our packet. This read will initiate the DMA. Don't wait for 338 * ever, just in case something's wrong. 339 */ 340 tc_mb(); 341 342 for (c = STAMP_RETRIES; c != 0; c--) { 343 if ((sr->sr_ipdvint & STIC_INT_P) != 0) { 344 sr->sr_ipdvint = STIC_INT_P_WE; 345 tc_wmb(); 346 junk = *poll; 347 return (0); 348 } 349 DELAY(STAMP_DELAY); 350 } 351 352 /* STIC has lost the plot, punish it. */ 353 stic_reset(si); 354 return (-1); 355 } 356 357 static int 358 px_ioctl(struct stic_info *si, u_long cmd, void *data, int flag, 359 struct lwp *l) 360 { 361 volatile struct stic_xcomm *sxc; 362 volatile struct stic_regs *sr; 363 struct stic_xinfo *sxi; 364 int rv, s; 365 366 sr = si->si_stic; 367 368 switch (cmd) { 369 case STICIO_STARTQ: 370 if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED || 371 (si->si_hwflags & PXF_QUEUE) != 0) { 372 rv = EBUSY; 373 break; 374 } 375 376 sxc = si->si_sxc; 377 memset((void *)__UNVOLATILE(sxc->sxc_done), 0, 378 sizeof(sxc->sxc_done)); 379 sxc->sxc_head = 0; 380 sxc->sxc_tail = 0; 381 sxc->sxc_nreject = 0; 382 sxc->sxc_nstall = 0; 383 384 s = spltty(); 385 si->si_hwflags |= PXF_QUEUE; 386 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 387 tc_wmb(); 388 splx(s); 389 390 rv = 0; 391 break; 392 393 case STICIO_STOPQ: 394 s = spltty(); 395 si->si_hwflags &= ~PXF_QUEUE; 396 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P; 397 tc_wmb(); 398 splx(s); 399 rv = 0; 400 break; 401 402 case STICIO_GXINFO: 403 sxi = (struct stic_xinfo *)data; 404 sxi->sxi_unit = si->si_unit; 405 sxi->sxi_stampw = si->si_stampw; 406 sxi->sxi_stamph = si->si_stamph; 407 sxi->sxi_buf_size = si->si_buf_size; 408 sxi->sxi_buf_phys = (u_int)si->si_buf_phys; 409 sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE; 410 sxi->sxi_buf_pktcnt = PX_BUF_COUNT; 411 sxi->sxi_buf_imgoff = 412 STIC_XCOMM_SIZE + STIC_PACKET_SIZE * PX_BUF_COUNT; 413 rv = 0; 414 break; 415 416 default: 417 rv = EPASSTHROUGH; 418 break; 419 } 420 421 return (rv); 422 } 423
Indexes created Tue Sep 30 20:09:53 GMT 2025