px.c revision 1.9
1 /* $NetBSD: px.c,v 1.9 2001/09/18 19:51:23 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Driver for DEC PixelStamp graphics adapters (PMAG-C). 41 */ 42 43 #include <sys/param.h> 44 #include <sys/types.h> 45 #include <sys/systm.h> 46 #include <sys/device.h> 47 #include <sys/malloc.h> 48 #include <sys/callout.h> 49 50 #include <uvm/uvm_extern.h> 51 52 #if defined(pmax) 53 #include <mips/cpuregs.h> 54 #elif defined(alpha) 55 #include <alpha/alpha_cpu.h> 56 #endif 57 58 #include <machine/autoconf.h> 59 #include <machine/cpu.h> 60 #include <machine/bus.h> 61 62 #include <dev/cons.h> 63 64 #include <dev/wscons/wsconsio.h> 65 #include <dev/wscons/wsdisplayvar.h> 66 67 #include <dev/ic/bt459reg.h> 68 69 #include <dev/tc/tcvar.h> 70 #include <dev/tc/sticreg.h> 71 #include <dev/tc/sticio.h> 72 #include <dev/tc/sticvar.h> 73 74 #define PX_STIC_POLL_OFFSET 0x000000 /* STIC DMA poll space */ 75 #define PX_STAMP_OFFSET 0x0c0000 /* pixelstamp space on STIC */ 76 #define PX_STIC_OFFSET 0x180000 /* STIC registers */ 77 #define PX_VDAC_OFFSET 0x200000 /* VDAC registers (bt459) */ 78 #define PX_VDAC_RESET_OFFSET 0x300000 /* VDAC reset register */ 79 #define PX_ROM_OFFSET 0x300000 /* ROM code */ 80 81 #define PX_BUF_COUNT 16 82 #define PX_BUF_INC(x) ((x + 1) & (PX_BUF_COUNT - 1)) 83 84 /* 85 * We need enough aligned memory to hold: 86 * 87 * - Xserver communication area (4096 bytes) 88 * - 16 packet buffers (4096 bytes each) 89 * - 2 image buffers (5120 bytes each) 90 * 91 */ 92 #define PX_BUF_SIZE \ 93 (STIC_PACKET_SIZE * PX_BUF_COUNT + STIC_IMGBUF_SIZE*2 + STIC_XCOMM_SIZE) 94 #define PX_BUF_ALIGN 32768 95 96 #define PXF_QUEUE 0x01 97 98 void px_attach(struct device *, struct device *, void *); 99 void px_init(struct stic_info *, int); 100 int px_ioctl(struct stic_info *, u_long, caddr_t, int, struct proc *); 101 int px_match(struct device *, struct cfdata *, void *); 102 103 int px_intr(void *); 104 u_int32_t *px_pbuf_get(struct stic_info *); 105 int px_pbuf_post(struct stic_info *, u_int32_t *); 106 107 void px_cnattach(tc_addr_t); 108 109 struct px_softc { 110 struct device px_dv; 111 struct stic_info *px_si; 112 volatile u_int32_t *px_qpoll[PX_BUF_COUNT]; 113 }; 114 115 struct cfattach px_ca = { 116 sizeof(struct px_softc), px_match, px_attach 117 }; 118 119 int 120 px_match(struct device *parent, struct cfdata *match, void *aux) 121 { 122 struct tc_attach_args *ta; 123 124 ta = aux; 125 126 return (strncmp("PMAG-CA ", ta->ta_modname, TC_ROM_LLEN) == 0); 127 } 128 129 void 130 px_attach(struct device *parent, struct device *self, void *aux) 131 { 132 struct stic_info *si; 133 struct tc_attach_args *ta; 134 struct px_softc *px; 135 int console, i; 136 u_long v; 137 138 px = (struct px_softc *)self; 139 ta = (struct tc_attach_args *)aux; 140 141 if (ta->ta_addr == stic_consinfo.si_slotbase) { 142 si = &stic_consinfo; 143 console = 1; 144 } else { 145 if (stic_consinfo.si_slotbase == NULL) 146 si = &stic_consinfo; 147 else { 148 si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT); 149 memset(si, 0, sizeof(*si)); 150 } 151 si->si_slotbase = ta->ta_addr; 152 px_init(si, 0); 153 console = 0; 154 } 155 156 px->px_si = si; 157 si->si_dv = self; 158 tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, px_intr, si); 159 160 printf(": 8 plane, %dx%d stamp\n", si->si_stampw, si->si_stamph); 161 162 for (i = 0; i < PX_BUF_COUNT; i++) { 163 v = i * STIC_PACKET_SIZE + 164 si->si_buf_phys + STIC_XCOMM_SIZE; 165 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 166 px->px_qpoll[i] = (volatile u_int32_t *) 167 ((caddr_t)si->si_slotbase + (v >> 9)); 168 } 169 170 stic_attach(self, si, console); 171 } 172 173 void 174 px_cnattach(tc_addr_t addr) 175 { 176 struct stic_info *si; 177 178 si = &stic_consinfo; 179 si->si_slotbase = addr; 180 px_init(si, 1); 181 stic_cnattach(si); 182 } 183 184 void 185 px_init(struct stic_info *si, int bootstrap) 186 { 187 struct pglist pglist; 188 caddr_t kva, bva; 189 paddr_t bpa; 190 191 /* 192 * Allocate memory for the packet buffers. It must be located below 193 * 8MB, since the STIC can't access outside that region. Also, due 194 * to the holes in STIC address space, each buffer mustn't cross a 195 * 32kB boundary. 196 */ 197 if (bootstrap) { 198 /* 199 * UVM won't be initialised at this point, so grab memory 200 * directly from vm_physmem[]. 201 */ 202 bva = (caddr_t)uvm_pageboot_alloc(PX_BUF_SIZE + PX_BUF_ALIGN); 203 bpa = (STIC_KSEG_TO_PHYS(kva) + PX_BUF_ALIGN - 1) & 204 ~(PX_BUF_ALIGN - 1); 205 if (bpa + PX_BUF_SIZE > 8192*1024) 206 panic("px_init: allocation out of bounds"); 207 } else { 208 TAILQ_INIT(&pglist); 209 if (uvm_pglistalloc(PX_BUF_SIZE, 0, 8192*1024, PX_BUF_ALIGN, 210 0, &pglist, 1, 0) != 0) 211 panic("px_init: allocation failure"); 212 bpa = TAILQ_FIRST(&pglist)->phys_addr; 213 } 214 215 kva = (caddr_t)si->si_slotbase; 216 217 si->si_vdac = (u_int32_t *)(kva + PX_VDAC_OFFSET); 218 si->si_vdac_reset = (u_int32_t *)(kva + PX_VDAC_RESET_OFFSET); 219 si->si_stic = (volatile struct stic_regs *)(kva + PX_STIC_OFFSET); 220 si->si_stamp = (u_int32_t *)(kva + PX_STAMP_OFFSET); 221 si->si_buf = (u_int32_t *)TC_PHYS_TO_UNCACHED(bpa); 222 si->si_buf_phys = bpa; 223 si->si_buf_size = PX_BUF_SIZE; 224 si->si_disptype = WSDISPLAY_TYPE_PX; 225 si->si_depth = 8; 226 si->si_sxc = (volatile struct stic_xcomm *)si->si_buf; 227 228 si->si_pbuf_get = px_pbuf_get; 229 si->si_pbuf_post = px_pbuf_post; 230 si->si_ioctl = px_ioctl; 231 232 memset(si->si_buf, 0, PX_BUF_SIZE); 233 234 stic_init(si); 235 } 236 237 int 238 px_intr(void *cookie) 239 { 240 volatile struct stic_regs *sr; 241 volatile struct stic_xcomm *sxc; 242 struct stic_info *si; 243 struct px_softc *px; 244 int state; 245 246 si = cookie; 247 px = (struct px_softc *)si->si_dv; 248 sr = si->si_stic; 249 state = sr->sr_ipdvint; 250 sxc = si->si_sxc; 251 252 /* 253 * Vertical-retrace condition. 254 * 255 * Clear the flag and flush out any waiting VDAC updates. We do 256 * this at retrace time to avoid producing `shearing' and other 257 * nasty artifacts. 258 */ 259 if ((state & STIC_INT_V) != 0) { 260 sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN; 261 tc_wmb(); 262 stic_flush(si); 263 } 264 265 /* 266 * Error condition. 267 * 268 * Simply clear the flag and report the error. 269 */ 270 if ((state & STIC_INT_E) != 0) { 271 printf("%s: error intr, %x %x %x %x %x", px->px_dv.dv_xname, 272 sr->sr_ipdvint, sr->sr_sticsr, sr->sr_buscsr, 273 sr->sr_busadr, sr->sr_busdat); 274 sr->sr_ipdvint = STIC_INT_E_WE | STIC_INT_E_EN; 275 tc_wmb(); 276 } 277 278 /* 279 * Check for queue stalls. 280 */ 281 if (sxc->sxc_tail != sxc->sxc_head && !sxc->sxc_busy) 282 state |= STIC_INT_P; 283 284 /* 285 * Packet-done condition. 286 * 287 * If packet queueing is enabled, clear the condition, and increment 288 * the tail (submitted) pointer. 289 */ 290 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P) != 0) { 291 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 292 tc_wmb(); 293 294 if (sxc->sxc_tail != sxc->sxc_head) { 295 sxc->sxc_done[sxc->sxc_tail] = 0; 296 sxc->sxc_tail = PX_BUF_INC(sxc->sxc_tail); 297 } 298 299 if (sxc->sxc_tail != sxc->sxc_head) { 300 if (*px->px_qpoll[sxc->sxc_tail] != STAMP_OK) { 301 sxc->sxc_nreject++; 302 sxc->sxc_busy = 0; 303 } else 304 sxc->sxc_busy = 1; 305 } else 306 sxc->sxc_busy = 0; 307 } 308 309 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P_EN) == 0) 310 printf("px_intr: STIC_INT_P_EN == 0\n"); 311 312 return (1); 313 } 314 315 u_int32_t * 316 px_pbuf_get(struct stic_info *si) 317 { 318 u_long off; 319 320 si->si_pbuf_select ^= STIC_PACKET_SIZE; 321 off = si->si_pbuf_select + STIC_XCOMM_SIZE; 322 return ((u_int32_t *)((caddr_t)si->si_buf + off)); 323 } 324 325 int 326 px_pbuf_post(struct stic_info *si, u_int32_t *buf) 327 { 328 volatile u_int32_t *poll, junk; 329 volatile struct stic_regs *sr; 330 u_long v; 331 int c; 332 333 sr = si->si_stic; 334 335 /* Get address of poll register for this buffer. */ 336 v = (u_long)STIC_KSEG_TO_PHYS(buf); 337 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 338 poll = (volatile u_int32_t *)((caddr_t)si->si_slotbase + (v >> 9)); 339 340 /* 341 * Read the poll register and make sure the stamp wants to accept 342 * our packet. This read will initiate the DMA. Don't wait for 343 * ever, just in case something's wrong. 344 */ 345 tc_mb(); 346 347 for (c = STAMP_RETRIES; c != 0; c--) { 348 if ((sr->sr_ipdvint & STIC_INT_P) != 0) { 349 sr->sr_ipdvint = STIC_INT_P_WE; 350 tc_wmb(); 351 junk = *poll; 352 return (0); 353 } 354 DELAY(STAMP_DELAY); 355 } 356 357 /* STIC has lost the plot, punish it. */ 358 stic_reset(si); 359 return (-1); 360 } 361 362 int 363 px_ioctl(struct stic_info *si, u_long cmd, caddr_t data, int flag, 364 struct proc *p) 365 { 366 volatile struct stic_xcomm *sxc; 367 volatile struct stic_regs *sr; 368 struct stic_xinfo *sxi; 369 int rv, s; 370 371 sr = si->si_stic; 372 373 switch (cmd) { 374 case STICIO_STARTQ: 375 if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED || 376 (si->si_hwflags & PXF_QUEUE) != 0) { 377 rv = EBUSY; 378 break; 379 } 380 381 sxc = si->si_sxc; 382 memset((void *)sxc->sxc_done, 0, sizeof(sxc->sxc_done)); 383 sxc->sxc_head = 0; 384 sxc->sxc_tail = 0; 385 sxc->sxc_nreject = 0; 386 sxc->sxc_nstall = 0; 387 388 s = spltty(); 389 si->si_hwflags |= PXF_QUEUE; 390 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 391 tc_wmb(); 392 splx(s); 393 394 rv = 0; 395 break; 396 397 case STICIO_STOPQ: 398 s = spltty(); 399 si->si_hwflags &= ~PXF_QUEUE; 400 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P; 401 tc_wmb(); 402 splx(s); 403 rv = 0; 404 break; 405 406 case STICIO_GXINFO: 407 sxi = (struct stic_xinfo *)data; 408 sxi->sxi_unit = si->si_unit; 409 sxi->sxi_stampw = si->si_stampw; 410 sxi->sxi_stamph = si->si_stamph; 411 sxi->sxi_buf_size = si->si_buf_size; 412 sxi->sxi_buf_phys = (u_int)si->si_buf_phys; 413 sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE; 414 sxi->sxi_buf_pktcnt = PX_BUF_COUNT; 415 sxi->sxi_buf_imgoff = 416 STIC_XCOMM_SIZE + STIC_PACKET_SIZE * PX_BUF_COUNT; 417 rv = 0; 418 break; 419 420 default: 421 rv = ENOTTY; 422 break; 423 } 424 425 return (rv); 426 } 427
Indexes created Wed Oct 01 19:09:53 GMT 2025