Home | History | Annotate | Line # | Download | only in tc
sticreg.h revision 1.1.2.2 
      1 /*	$NetBSD: sticreg.h,v 1.1.2.2 1997/11/08 07:27:51 jonathan Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997 Jonathan Stone
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *      This product includes software developed by Jonathan Stone for
     18  *      the NetBSD Project.
     19  * 4. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Register definitions for the pixelstamp and stamp interface  chip (STIC)
     36  * used in PMAG-C 2-d and PMAG-D 3-d accelerated TurboChannel framebuffers.
     37  */
     38 
     39 #ifndef	_TC_STICREG_H_
     40 #define	_TC_STICREG_H_
     41 
     42 struct stic_regs {
     43 	volatile int32_t	stic__pad0, __pad1;
     44 	volatile int32_t        hsync;
     45 	volatile int32_t        hsync2;
     46 	volatile int32_t        hblank;
     47 	volatile int32_t        vsync;
     48 	volatile int32_t        vblank;
     49 	volatile int32_t        vtest;
     50 	volatile int32_t        ipdvint;
     51 	volatile int32_t	stic__pad2;
     52 	volatile int32_t        sticsr;
     53 	volatile int32_t        busdat;
     54 	volatile int32_t        busadr;
     55 	volatile int32_t        stic__pad3;
     56 	volatile int32_t        buscsr;
     57 	volatile int32_t        modcl;
     58 };
     59 
     60 #define STICADDR(x) ((volatile struct stic_regs*) (x))
     61 
     62 
     63 /*
     64  * Bit definitions for stic_regs.stic_csr.
     65  * these appear to exactly what the PROM tests use.
     66  */
     67 #define STIC_CSR_TSTFNC		0x00000003
     68 # define STIC_CSR_TSTFNC_NORMAL	0
     69 # define STIC_CSR_TSTFNC_PARITY	1
     70 # define STIC_CSR_TSTFNC_CNTPIX	2
     71 # define STIC_CSR_TSTFNC_TSTDAC	3
     72 #define STIC_CSR_CHECKPAR	0x00000004
     73 #define STIC_CSR_STARTVT	0x00000010
     74 #define STIC_CSR_START		0x00000020
     75 #define STIC_CSR_RESET		0x00000040
     76 #define STIC_CSR_STARTST	0x00000080
     77 
     78 /*
     79  * Bit definitions for stic_regs.int.
     80  * Three four-bit wide fields, for error (E), vertical-blank (V), and
     81  * packetbuf-done (P) intererupts, respectively.
     82  * The low-order three bits of each field are enable, requested,
     83  * and acknowledge bits. The top bit of each field is unused.
     84  */
     85 #define STIC_INT_E_EN		0x00000001
     86 #define STIC_INT_E		0x00000002
     87 #define STIC_INT_E_WE		0x00000004
     88 
     89 #define STIC_INT_V_EN		0x00000100
     90 #define STIC_INT_V		0x00000200
     91 #define STIC_INT_V_WE		0x00000400
     92 
     93 #define STIC_INT_P_EN		0x00010000
     94 #define STIC_INT_P		0x00020000
     95 #define STIC_INT_P_WE		0x00040000
     96 
     97 #define STIC_INT_WE	(STIC_INT_E_WE|STIC_INT_V_WE|STIC_INT_PE_WE)
     98 #define STIC_INT_CLR	(STIC_INT_E_EN|STIC_INT_V_EN|STIC_INT_P_EN)
     99 
    100 #endif	/* _TC_STICREG_H_ */
    101