sticreg.h revision 1.5
1 /* $NetBSD: sticreg.h,v 1.5 2001/09/18 19:51:23 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _TC_STICREG_H_ 40 #define _TC_STICREG_H_ 41 42 /* 43 * PixelStamp command packets take this general format: 44 * 45 * command word 46 * plane mask & primitive count 47 * always zero 48 * update method 49 * 50 * per-packet context (optional): 51 * line width 52 * xy mask 53 * cliping rectangle min & max 54 * rgb constant 55 * z constant 56 * 57 * per-primitive context (optional): 58 * xy mask 59 * xy mask address 60 * primitive data (vertices, spans info, video) 61 * line width 62 * halfspace equals conditions 63 * rgb flat, or rgb{1,2,3} smooth 64 * z flat, or z{1,2,3} smooth 65 */ 66 67 /* 68 * Command word. 69 */ 70 71 /* Base command */ 72 #define STAMP_CMD_POINTS (0x0000) 73 #define STAMP_CMD_LINES (0x0001) 74 #define STAMP_CMD_TRIANGLES (0x0002) 75 #define STAMP_CMD_COPYSPANS (0x0005) 76 #define STAMP_CMD_READSPANS (0x0006) 77 #define STAMP_CMD_WRITESPANS (0x0007) 78 #define STAMP_CMD_VIDEO (0x0008) 79 80 /* Color */ 81 #define STAMP_RGB_NONE (0x0000) 82 #define STAMP_RGB_CONST (0x0010) 83 #define STAMP_RGB_FLAT (0x0020) 84 #define STAMP_RGB_SMOOTH (0x0030) 85 86 /* Z */ 87 #define STAMP_Z_NONE (0x0000) 88 #define STAMP_Z_CONST (0x0040) 89 #define STAMP_Z_FLAT (0x0080) 90 #define STAMP_Z_SMOOTH (0x00c0) 91 92 /* XYMASK */ 93 #define STAMP_XY_NONE (0x0000) 94 #define STAMP_XY_PERPACKET (0x0100) 95 #define STAMP_XY_PERPRIMATIVE (0x0200) 96 97 /* Line width */ 98 #define STAMP_LW_NONE (0x0000) 99 #define STAMP_LW_PERPACKET (0x0400) 100 #define STAMP_LW_PERPRIMATIVE (0x0800) 101 102 /* Miscellaneous flags */ 103 #define STAMP_CLIPRECT (0x00080000) 104 #define STAMP_MESH (0x00200000) 105 #define STAMP_AALINE (0x00800000) 106 #define STAMP_HS_EQUALS (0x80000000) 107 108 /* 109 * Update word. 110 */ 111 112 /* XXX What does this do? Perhaps for 96-bit boards? */ 113 #define STAMP_PLANE_8X3 (0 << 5) 114 #define STAMP_PLANE_24 (1 << 5) 115 116 /* Write enable */ 117 #define STAMP_WE_SIGN (0x04 << 8) 118 #define STAMP_WE_XYMASK (0x02 << 8) 119 #define STAMP_WE_CLIPRECT (0x01 << 8) 120 #define STAMP_WE_NONE (0x00 << 8) 121 122 /* Pixel write method */ 123 #define STAMP_METHOD_CLEAR (0x60 << 12) 124 #define STAMP_METHOD_AND (0x14 << 12) 125 #define STAMP_METHOD_ANDREV (0x15 << 12) 126 #define STAMP_METHOD_COPY (0x20 << 12) 127 #define STAMP_METHOD_ANDINV (0x16 << 12) 128 #define STAMP_METHOD_NOOP (0x40 << 12) 129 #define STAMP_METHOD_XOR (0x11 << 12) 130 #define STAMP_METHOD_OR (0x0f << 12) 131 #define STAMP_METHOD_NOR (0x17 << 12) 132 #define STAMP_METHOD_EQUIV (0x10 << 12) 133 #define STAMP_METHOD_INV (0x4e << 12) 134 #define STAMP_METHOD_ORREV (0x0e << 12) 135 #define STAMP_METHOD_COPYINV (0x2d << 12) 136 #define STAMP_METHOD_ORINV (0x0d << 12) 137 #define STAMP_METHOD_NAND (0x0c << 12) 138 #define STAMP_METHOD_SET (0x6c << 12) 139 #define STAMP_METHOD_SUM (0x00 << 12) 140 #define STAMP_METHOD_DIFF (0x02 << 12) 141 #define STAMP_METHOD_REVDIFF (0x01 << 12) 142 143 /* Double buffering */ 144 #define STAMP_DB_NONE (0x00 << 28) 145 #define STAMP_DB_01 (0x01 << 28) 146 #define STAMP_DB_12 (0x02 << 28) 147 #define STAMP_DB_02 (0x04 << 28) 148 149 /* Miscellaneous flags */ 150 #define STAMP_UPDATE_ENABLE (1 << 0) 151 #define STAMP_SAVE_SIGN (1 << 6) 152 #define STAMP_SAVE_ALPHA (1 << 7) 153 #define STAMP_SUPERSAMPLE (1 << 11) 154 #define STAMP_SPAN (1 << 19) 155 #define STAMP_COPYSPAN_ALIGNED (1 << 20) 156 #define STAMP_MINMAX (1 << 21) 157 #define STAMP_MULT (1 << 22) 158 #define STAMP_MULTACC (1 << 23) 159 #define STAMP_HALF_BUFF (1 << 27) 160 #define STAMP_INITIALIZE (1 << 31) 161 162 /* 163 * XYMASK address calculation. 164 */ 165 #define XMASKADDR(sw, sx, a) (((a)-((sx) % (sw))) & 15) 166 #define YMASKADDR(sh, sy, b) (((b)-((sy) % (sh))) & 15) 167 #define XYMASKADDR(sw,sh,x,y,a,b) \ 168 (XMASKADDR(sw,x,a) << 16 | YMASKADDR(sh,y,b)) 169 170 /* 171 * Miscellenous constants. 172 */ 173 #define STIC_MAGIC_X 370 174 #define STIC_MAGIC_Y 37 175 176 /* 177 * Poll register magic values. 178 */ 179 #define STAMP_OK (0) 180 #define STAMP_BUSY (1) 181 #define STAMP_RETRIES (100000) 182 #define STAMP_DELAY (10) 183 184 /* 185 * STIC registers. 186 */ 187 struct stic_regs { 188 u_int32_t sr_pad0; 189 u_int32_t sr_pad1; 190 u_int32_t sr_hsync; 191 u_int32_t sr_hsync2; 192 u_int32_t sr_hblank; 193 u_int32_t sr_vsync; 194 u_int32_t sr_vblank; 195 u_int32_t sr_vtest; 196 u_int32_t sr_ipdvint; 197 u_int32_t sr_pad2; 198 u_int32_t sr_sticsr; 199 u_int32_t sr_busdat; 200 u_int32_t sr_busadr; 201 u_int32_t sr_pad3; 202 u_int32_t sr_buscsr; 203 u_int32_t sr_modcl; 204 } __attribute__ ((__packed__)); 205 206 /* 207 * Bit definitions for stic_regs::sticsr. 208 */ 209 #define STIC_CSR_TSTFNC 0x00000003 210 # define STIC_CSR_TSTFNC_NORMAL 0 211 # define STIC_CSR_TSTFNC_PARITY 1 212 # define STIC_CSR_TSTFNC_CNTPIX 2 213 # define STIC_CSR_TSTFNC_TSTDAC 3 214 #define STIC_CSR_CHECKPAR 0x00000004 215 #define STIC_CSR_STARTVT 0x00000010 216 #define STIC_CSR_START 0x00000020 217 #define STIC_CSR_RESET 0x00000040 218 #define STIC_CSR_STARTST 0x00000080 219 220 /* 221 * Bit definitions for stic_regs::int. Three four-bit wide fields, for 222 * error (E), vertical-blank (V), and packet-done (P) intererupts, 223 * respectively. The low-order three bits of each field are interrupt 224 * enable, condition flagged, and nybble write enable. The top bit of each 225 * field is unused. 226 */ 227 #define STIC_INT_E_EN 0x00000001 228 #define STIC_INT_E 0x00000002 229 #define STIC_INT_E_WE 0x00000004 230 231 #define STIC_INT_V_EN 0x00000100 232 #define STIC_INT_V 0x00000200 233 #define STIC_INT_V_WE 0x00000400 234 235 #define STIC_INT_P_EN 0x00010000 236 #define STIC_INT_P 0x00020000 237 #define STIC_INT_P_WE 0x00040000 238 239 #define STIC_INT_E_MASK (STIC_INT_E_EN | STIC_INT_E | STIC_INT_E_WE) 240 #define STIC_INT_V_MASK (STIC_INT_V_EN | STIC_INT_V | STIC_INT_V_WE) 241 #define STIC_INT_P_MASK (STIC_INT_P_EN | STIC_INT_P | STIC_INT_P_WE) 242 #define STIC_INT_MASK (STIC_INT_E_MASK | STIC_INT_P_MASK | STIC_INT_V_MASK) 243 244 #define STIC_INT_WE (STIC_INT_E_WE | STIC_INT_V_WE | STIC_INT_P_WE) 245 #define STIC_INT_CLR (STIC_INT_E_EN | STIC_INT_V_EN | STIC_INT_P_EN) 246 247 /* 248 * On DMA: reading from a STIC poll register causes load & execution of 249 * the packet at the correspoinding physical address. Either STAMP_OK 250 * or STAMP_BUSY will be returned to indicate status. 251 * 252 * The STIC sees only 23-bits (8MB) of address space. Bits 21-22 in 253 * physical address space map to bits 27-28, and bits 15-20 map to bits 254 * 18-23 in the STIC's warped view of the word. On the PXG, the STIC 255 * sees only the onboard SRAM (so any `physical addresses' are offsets 256 * into the beginning of the SRAM). 257 */ 258 259 #endif /* _TC_STICREG_H_ */ 260
Indexes created Mon Sep 29 13:09:55 GMT 2025