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tcds.c revision 1.1.4.1
      1  1.1.4.1   nathanw /* $NetBSD: tcds.c,v 1.1.4.1 2001/09/21 22:36:17 nathanw Exp $ */
      2      1.1  nisimura 
      3      1.1  nisimura /*-
      4      1.1  nisimura  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5      1.1  nisimura  * All rights reserved.
      6      1.1  nisimura  *
      7      1.1  nisimura  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1  nisimura  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9      1.1  nisimura  * NASA Ames Research Center.
     10      1.1  nisimura  *
     11      1.1  nisimura  * Redistribution and use in source and binary forms, with or without
     12      1.1  nisimura  * modification, are permitted provided that the following conditions
     13      1.1  nisimura  * are met:
     14      1.1  nisimura  * 1. Redistributions of source code must retain the above copyright
     15      1.1  nisimura  *    notice, this list of conditions and the following disclaimer.
     16      1.1  nisimura  * 2. Redistributions in binary form must reproduce the above copyright
     17      1.1  nisimura  *    notice, this list of conditions and the following disclaimer in the
     18      1.1  nisimura  *    documentation and/or other materials provided with the distribution.
     19      1.1  nisimura  * 3. All advertising materials mentioning features or use of this software
     20      1.1  nisimura  *    must display the following acknowledgement:
     21      1.1  nisimura  *	This product includes software developed by the NetBSD
     22      1.1  nisimura  *	Foundation, Inc. and its contributors.
     23      1.1  nisimura  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24      1.1  nisimura  *    contributors may be used to endorse or promote products derived
     25      1.1  nisimura  *    from this software without specific prior written permission.
     26      1.1  nisimura  *
     27      1.1  nisimura  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28      1.1  nisimura  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29      1.1  nisimura  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30      1.1  nisimura  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31      1.1  nisimura  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32      1.1  nisimura  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33      1.1  nisimura  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34      1.1  nisimura  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35      1.1  nisimura  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36      1.1  nisimura  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37      1.1  nisimura  * POSSIBILITY OF SUCH DAMAGE.
     38      1.1  nisimura  */
     39      1.1  nisimura 
     40      1.1  nisimura /*
     41      1.1  nisimura  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
     42      1.1  nisimura  * All rights reserved.
     43      1.1  nisimura  *
     44      1.1  nisimura  * Author: Keith Bostic, Chris G. Demetriou
     45      1.1  nisimura  *
     46      1.1  nisimura  * Permission to use, copy, modify and distribute this software and
     47      1.1  nisimura  * its documentation is hereby granted, provided that both the copyright
     48      1.1  nisimura  * notice and this permission notice appear in all copies of the
     49      1.1  nisimura  * software, derivative works or modified versions, and any portions
     50      1.1  nisimura  * thereof, and that both notices appear in supporting documentation.
     51      1.1  nisimura  *
     52      1.1  nisimura  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     53      1.1  nisimura  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     54      1.1  nisimura  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     55      1.1  nisimura  *
     56      1.1  nisimura  * Carnegie Mellon requests users of this software to return to
     57      1.1  nisimura  *
     58      1.1  nisimura  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     59      1.1  nisimura  *  School of Computer Science
     60      1.1  nisimura  *  Carnegie Mellon University
     61      1.1  nisimura  *  Pittsburgh PA 15213-3890
     62      1.1  nisimura  *
     63      1.1  nisimura  * any improvements or extensions that they make and grant Carnegie the
     64      1.1  nisimura  * rights to redistribute these changes.
     65      1.1  nisimura  */
     66      1.1  nisimura 
     67      1.1  nisimura #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     68      1.1  nisimura 
     69  1.1.4.1   nathanw __KERNEL_RCSID(0, "$NetBSD: tcds.c,v 1.1.4.1 2001/09/21 22:36:17 nathanw Exp $");
     70      1.1  nisimura 
     71      1.1  nisimura #include <sys/param.h>
     72      1.1  nisimura #include <sys/kernel.h>
     73      1.1  nisimura #include <sys/systm.h>
     74      1.1  nisimura #include <sys/device.h>
     75      1.1  nisimura #include <sys/malloc.h>
     76      1.1  nisimura 
     77      1.1  nisimura #ifdef __alpha__
     78      1.1  nisimura #include <machine/rpb.h>
     79      1.1  nisimura #endif /* __alpha__ */
     80      1.1  nisimura 
     81      1.1  nisimura #include <dev/scsipi/scsi_all.h>
     82      1.1  nisimura #include <dev/scsipi/scsipi_all.h>
     83      1.1  nisimura #include <dev/scsipi/scsiconf.h>
     84      1.1  nisimura 
     85      1.1  nisimura #include <dev/ic/ncr53c9xvar.h>
     86      1.1  nisimura 
     87      1.1  nisimura #include <machine/bus.h>
     88      1.1  nisimura 
     89      1.1  nisimura #include <dev/tc/tcvar.h>
     90      1.1  nisimura #include <dev/tc/tcdsreg.h>
     91      1.1  nisimura #include <dev/tc/tcdsvar.h>
     92      1.1  nisimura 
     93      1.1  nisimura #include "locators.h"
     94      1.1  nisimura 
     95      1.1  nisimura struct tcds_softc {
     96      1.1  nisimura 	struct	device sc_dv;
     97      1.1  nisimura 	bus_space_tag_t sc_bst;
     98      1.1  nisimura 	bus_space_handle_t sc_bsh;
     99      1.1  nisimura 	bus_dma_tag_t sc_dmat;
    100      1.1  nisimura 	void	*sc_cookie;
    101      1.1  nisimura 	int	sc_flags;
    102      1.1  nisimura 	struct tcds_slotconfig sc_slots[2];
    103      1.1  nisimura };
    104      1.1  nisimura 
    105      1.1  nisimura /* sc_flags */
    106      1.1  nisimura #define	TCDSF_BASEBOARD		0x01	/* baseboard on DEC 3000 */
    107      1.1  nisimura #define	TCDSF_FASTSCSI		0x02	/* supports Fast SCSI */
    108      1.1  nisimura 
    109      1.1  nisimura /* Definition of the driver for autoconfig. */
    110      1.1  nisimura int	tcdsmatch __P((struct device *, struct cfdata *, void *));
    111      1.1  nisimura void	tcdsattach __P((struct device *, struct device *, void *));
    112      1.1  nisimura int     tcdsprint __P((void *, const char *));
    113      1.1  nisimura int	tcdssubmatch __P((struct device *, struct cfdata *, void *));
    114      1.1  nisimura 
    115      1.1  nisimura struct cfattach tcds_ca = {
    116      1.1  nisimura 	sizeof(struct tcds_softc), tcdsmatch, tcdsattach,
    117      1.1  nisimura };
    118      1.1  nisimura 
    119      1.1  nisimura /*static*/ int	tcds_intr __P((void *));
    120      1.1  nisimura /*static*/ int	tcds_intrnull __P((void *));
    121      1.1  nisimura 
    122      1.1  nisimura struct tcds_device {
    123      1.1  nisimura 	const char *td_name;
    124      1.1  nisimura 	int td_flags;
    125      1.1  nisimura } tcds_devices[] = {
    126      1.1  nisimura #ifdef __alpha__
    127      1.1  nisimura 	{ "PMAZ-DS ",	TCDSF_BASEBOARD },
    128      1.1  nisimura 	{ "PMAZ-FS ",	TCDSF_BASEBOARD|TCDSF_FASTSCSI },
    129      1.1  nisimura #endif /* __alpha__ */
    130      1.1  nisimura 	{ "PMAZB-AA",	0 },
    131      1.1  nisimura 	{ "PMAZC-AA",	TCDSF_FASTSCSI },
    132      1.1  nisimura 	{ NULL,		0 },
    133      1.1  nisimura };
    134      1.1  nisimura 
    135      1.1  nisimura struct tcds_device *tcds_lookup __P((const char *));
    136      1.1  nisimura void	tcds_params __P((struct tcds_softc *, int, int *, int *));
    137      1.1  nisimura 
    138      1.1  nisimura struct tcds_device *
    139      1.1  nisimura tcds_lookup(modname)
    140      1.1  nisimura 	const char *modname;
    141      1.1  nisimura {
    142      1.1  nisimura 	struct tcds_device *td;
    143      1.1  nisimura 
    144      1.1  nisimura 	for (td = tcds_devices; td->td_name != NULL; td++)
    145      1.1  nisimura 		if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0)
    146      1.1  nisimura 			return (td);
    147      1.1  nisimura 
    148      1.1  nisimura 	return (NULL);
    149      1.1  nisimura }
    150      1.1  nisimura 
    151      1.1  nisimura int
    152      1.1  nisimura tcdsmatch(parent, cfdata, aux)
    153      1.1  nisimura 	struct device *parent;
    154      1.1  nisimura 	struct cfdata *cfdata;
    155      1.1  nisimura 	void *aux;
    156      1.1  nisimura {
    157      1.1  nisimura 	struct tc_attach_args *ta = aux;
    158      1.1  nisimura 
    159      1.1  nisimura 	return (tcds_lookup(ta->ta_modname) != NULL);
    160      1.1  nisimura }
    161      1.1  nisimura 
    162      1.1  nisimura void
    163      1.1  nisimura tcdsattach(parent, self, aux)
    164      1.1  nisimura 	struct device *parent, *self;
    165      1.1  nisimura 	void *aux;
    166      1.1  nisimura {
    167      1.1  nisimura 	struct tcds_softc *sc = (struct tcds_softc *)self;
    168      1.1  nisimura 	struct tc_attach_args *ta = aux;
    169      1.1  nisimura 	struct tcdsdev_attach_args tcdsdev;
    170      1.1  nisimura 	struct tcds_slotconfig *slotc;
    171      1.1  nisimura 	struct tcds_device *td;
    172      1.1  nisimura 	bus_space_handle_t sbsh[2];
    173      1.1  nisimura 	int i, gpi2;
    174      1.1  nisimura 	const struct evcnt *pevcnt;
    175      1.1  nisimura 
    176      1.1  nisimura 	td = tcds_lookup(ta->ta_modname);
    177      1.1  nisimura 	if (td == NULL)
    178      1.1  nisimura 		panic("\ntcdsattach: impossible");
    179      1.1  nisimura 
    180      1.1  nisimura 	printf(": TurboChannel Dual SCSI");
    181      1.1  nisimura 	if (td->td_flags & TCDSF_BASEBOARD)
    182      1.1  nisimura 		printf(" (baseboard)");
    183      1.1  nisimura 	printf("\n");
    184      1.1  nisimura 
    185      1.1  nisimura 	sc->sc_flags = td->td_flags;
    186      1.1  nisimura 
    187      1.1  nisimura 	sc->sc_bst = ta->ta_memt;
    188      1.1  nisimura 	sc->sc_dmat = ta->ta_dmat;
    189      1.1  nisimura 
    190      1.1  nisimura 	/*
    191      1.1  nisimura 	 * Map the device.
    192      1.1  nisimura 	 */
    193      1.1  nisimura 	if (bus_space_map(sc->sc_bst, ta->ta_addr,
    194      1.1  nisimura 	    (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) {
    195      1.1  nisimura 		printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
    196      1.1  nisimura 		return;
    197      1.1  nisimura 	}
    198      1.1  nisimura 
    199      1.1  nisimura 	/*
    200      1.1  nisimura 	 * Now, slice off two subregions for the individual NCR SCSI chips.
    201      1.1  nisimura 	 */
    202      1.1  nisimura 	if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET,
    203      1.1  nisimura 	    0x100, &sbsh[0]) ||
    204      1.1  nisimura 	    bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET,
    205      1.1  nisimura 	    0x100, &sbsh[1])) {
    206      1.1  nisimura 		printf("%s: unable to subregion SCSI chip space\n",
    207      1.1  nisimura 		    sc->sc_dv.dv_xname);
    208      1.1  nisimura 		return;
    209      1.1  nisimura 	}
    210      1.1  nisimura 
    211      1.1  nisimura 	sc->sc_cookie = ta->ta_cookie;
    212      1.1  nisimura 
    213      1.1  nisimura 	pevcnt = tc_intr_evcnt(parent, sc->sc_cookie);
    214      1.1  nisimura 	tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc);
    215      1.1  nisimura 
    216      1.1  nisimura 	/*
    217      1.1  nisimura 	 * XXX
    218      1.1  nisimura 	 * IMER apparently has some random (or, not so random, but still
    219      1.1  nisimura 	 * not useful) bits set in it when the system boots.  Clear it.
    220      1.1  nisimura 	 */
    221      1.1  nisimura 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0);
    222      1.1  nisimura 
    223      1.1  nisimura 	/* XXX Initial contents of CIR? */
    224      1.1  nisimura 
    225      1.1  nisimura 	/*
    226      1.1  nisimura 	 * Remember if GPI2 is set in the CIR; we'll need it later.
    227      1.1  nisimura 	 */
    228      1.1  nisimura 	gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) &
    229      1.1  nisimura 	    TCDS_CIR_GPI_2) != 0;
    230      1.1  nisimura 
    231      1.1  nisimura 	/*
    232      1.1  nisimura 	 * Set up the per-slot defintions for later use.
    233      1.1  nisimura 	 */
    234      1.1  nisimura 
    235      1.1  nisimura 	/* fill in common information first */
    236      1.1  nisimura 	for (i = 0; i < 2; i++) {
    237  1.1.4.1   nathanw 		char *cp;
    238      1.1  nisimura 
    239  1.1.4.1   nathanw 		slotc = &sc->sc_slots[i];
    240      1.1  nisimura 		bzero(slotc, sizeof *slotc);	/* clear everything */
    241      1.1  nisimura 
    242  1.1.4.1   nathanw 		cp = slotc->sc_name;
    243  1.1.4.1   nathanw 		snprintf(cp, sizeof(slotc->sc_name), "chip %d", i);
    244      1.1  nisimura 		evcnt_attach_dynamic(&slotc->sc_evcnt, EVCNT_TYPE_INTR,
    245      1.1  nisimura 		    pevcnt, sc->sc_dv.dv_xname, cp);
    246      1.1  nisimura 
    247      1.1  nisimura 		slotc->sc_slot = i;
    248      1.1  nisimura 		slotc->sc_bst = sc->sc_bst;
    249      1.1  nisimura 		slotc->sc_bsh = sc->sc_bsh;
    250      1.1  nisimura 		slotc->sc_intrhand = tcds_intrnull;
    251      1.1  nisimura 		slotc->sc_intrarg = (void *)(long)i;
    252      1.1  nisimura 	}
    253      1.1  nisimura 
    254      1.1  nisimura 	/* information for slot 0 */
    255      1.1  nisimura 	slotc = &sc->sc_slots[0];
    256      1.1  nisimura 	slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET;
    257      1.1  nisimura 	slotc->sc_intrmaskbits =
    258      1.1  nisimura 	    TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
    259      1.1  nisimura 	slotc->sc_intrbits = TCDS_CIR_SCSI0_INT;
    260      1.1  nisimura 	slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA;
    261      1.1  nisimura 	slotc->sc_errorbits = 0;				/* XXX */
    262      1.1  nisimura 	slotc->sc_sda = TCDS_SCSI0_DMA_ADDR;
    263      1.1  nisimura 	slotc->sc_dic = TCDS_SCSI0_DMA_INTR;
    264      1.1  nisimura 	slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0;
    265      1.1  nisimura 	slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1;
    266      1.1  nisimura 
    267      1.1  nisimura 	/* information for slot 1 */
    268      1.1  nisimura 	slotc = &sc->sc_slots[1];
    269      1.1  nisimura 	slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET;
    270      1.1  nisimura 	slotc->sc_intrmaskbits =
    271      1.1  nisimura 	    TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
    272      1.1  nisimura 	slotc->sc_intrbits = TCDS_CIR_SCSI1_INT;
    273      1.1  nisimura 	slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA;
    274      1.1  nisimura 	slotc->sc_errorbits = 0;				/* XXX */
    275      1.1  nisimura 	slotc->sc_sda = TCDS_SCSI1_DMA_ADDR;
    276      1.1  nisimura 	slotc->sc_dic = TCDS_SCSI1_DMA_INTR;
    277      1.1  nisimura 	slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0;
    278      1.1  nisimura 	slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1;
    279      1.1  nisimura 
    280      1.1  nisimura 	/* find the hardware attached to the TCDS ASIC */
    281      1.1  nisimura 	for (i = 0; i < 2; i++) {
    282      1.1  nisimura 		tcds_params(sc, i, &tcdsdev.tcdsda_id,
    283      1.1  nisimura 		    &tcdsdev.tcdsda_fast);
    284      1.1  nisimura 
    285      1.1  nisimura 		tcdsdev.tcdsda_bst = sc->sc_bst;
    286      1.1  nisimura 		tcdsdev.tcdsda_bsh = sbsh[i];
    287      1.1  nisimura 		tcdsdev.tcdsda_dmat = sc->sc_dmat;
    288      1.1  nisimura 		tcdsdev.tcdsda_chip = i;
    289      1.1  nisimura 		tcdsdev.tcdsda_sc = &sc->sc_slots[i];
    290      1.1  nisimura 		/*
    291      1.1  nisimura 		 * Determine the chip frequency.  TCDSF_FASTSCSI will be set
    292      1.1  nisimura 		 * for TC option cards.  For baseboard chips, GPI2 is set, for a
    293      1.1  nisimura 		 * 25MHz clock, else a 40MHz clock.
    294      1.1  nisimura 		 */
    295      1.1  nisimura 		if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) ||
    296      1.1  nisimura 		    sc->sc_flags & TCDSF_FASTSCSI) {
    297      1.1  nisimura 			tcdsdev.tcdsda_freq = 40000000;
    298      1.1  nisimura 			tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8;
    299      1.1  nisimura 		} else {
    300      1.1  nisimura 			tcdsdev.tcdsda_freq = 25000000;
    301      1.1  nisimura 			tcdsdev.tcdsda_period = 5;
    302      1.1  nisimura 		}
    303      1.1  nisimura 		if (sc->sc_flags & TCDSF_BASEBOARD)
    304      1.1  nisimura 			tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94;
    305      1.1  nisimura 		else
    306      1.1  nisimura 			tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96;
    307      1.1  nisimura 
    308      1.1  nisimura 		tcds_scsi_reset(tcdsdev.tcdsda_sc);
    309      1.1  nisimura 
    310      1.1  nisimura 		config_found_sm(self, &tcdsdev, tcdsprint, tcdssubmatch);
    311      1.1  nisimura #ifdef __alpha__
    312      1.1  nisimura 		/*
    313      1.1  nisimura 		 * The second SCSI chip isn't present on the baseboard TCDS
    314      1.1  nisimura 		 * on the DEC Alpha 3000/300 series.
    315      1.1  nisimura 		 */
    316      1.1  nisimura 		if (sc->sc_flags & TCDSF_BASEBOARD &&
    317      1.1  nisimura 		    cputype == ST_DEC_3000_300)
    318      1.1  nisimura 			break;
    319      1.1  nisimura #endif /* __alpha__ */
    320      1.1  nisimura 	}
    321      1.1  nisimura }
    322      1.1  nisimura 
    323      1.1  nisimura int
    324      1.1  nisimura tcdssubmatch(parent, cf, aux)
    325      1.1  nisimura 	struct device *parent;
    326      1.1  nisimura 	struct cfdata *cf;
    327      1.1  nisimura 	void *aux;
    328      1.1  nisimura {
    329      1.1  nisimura 	struct tcdsdev_attach_args *tcdsdev = aux;
    330      1.1  nisimura 
    331      1.1  nisimura 	if (cf->cf_loc[TCDSCF_CHIP] != TCDSCF_CHIP_DEFAULT &&
    332      1.1  nisimura 	    cf->cf_loc[TCDSCF_CHIP] != tcdsdev->tcdsda_chip)
    333      1.1  nisimura 		return (0);
    334      1.1  nisimura 
    335      1.1  nisimura 	return ((*cf->cf_attach->ca_match)(parent, cf, aux));
    336      1.1  nisimura }
    337      1.1  nisimura 
    338      1.1  nisimura int
    339      1.1  nisimura tcdsprint(aux, pnp)
    340      1.1  nisimura 	void *aux;
    341      1.1  nisimura 	const char *pnp;
    342      1.1  nisimura {
    343      1.1  nisimura 	struct tcdsdev_attach_args *tcdsdev = aux;
    344      1.1  nisimura 
    345      1.1  nisimura 	/* Only ASCs can attach to TCDSs; easy. */
    346      1.1  nisimura 	if (pnp)
    347      1.1  nisimura 		printf("asc at %s", pnp);
    348      1.1  nisimura 
    349      1.1  nisimura 	printf(" chip %d", tcdsdev->tcdsda_chip);
    350      1.1  nisimura 
    351      1.1  nisimura 	return (UNCONF);
    352      1.1  nisimura }
    353      1.1  nisimura 
    354      1.1  nisimura void
    355      1.1  nisimura tcds_intr_establish(tcds, slot, func, arg)
    356      1.1  nisimura 	struct device *tcds;
    357      1.1  nisimura 	int slot;
    358      1.1  nisimura 	int (*func) __P((void *));
    359      1.1  nisimura 	void *arg;
    360      1.1  nisimura {
    361      1.1  nisimura 	struct tcds_softc *sc = (struct tcds_softc *)tcds;
    362      1.1  nisimura 
    363      1.1  nisimura 	if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull)
    364      1.1  nisimura 		panic("tcds_intr_establish: chip %d twice", slot);
    365      1.1  nisimura 
    366      1.1  nisimura 	sc->sc_slots[slot].sc_intrhand = func;
    367      1.1  nisimura 	sc->sc_slots[slot].sc_intrarg = arg;
    368      1.1  nisimura 	tcds_scsi_reset(&sc->sc_slots[slot]);
    369      1.1  nisimura }
    370      1.1  nisimura 
    371      1.1  nisimura void
    372      1.1  nisimura tcds_intr_disestablish(tcds, slot)
    373      1.1  nisimura 	struct device *tcds;
    374      1.1  nisimura 	int slot;
    375      1.1  nisimura {
    376      1.1  nisimura 	struct tcds_softc *sc = (struct tcds_softc *)tcds;
    377      1.1  nisimura 
    378      1.1  nisimura 	if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
    379      1.1  nisimura 		panic("tcds_intr_disestablish: chip %d missing intr",
    380      1.1  nisimura 		    slot);
    381      1.1  nisimura 
    382      1.1  nisimura 	sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
    383      1.1  nisimura 	sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot;
    384      1.1  nisimura 
    385      1.1  nisimura 	tcds_dma_enable(&sc->sc_slots[slot], 0);
    386      1.1  nisimura 	tcds_scsi_enable(&sc->sc_slots[slot], 0);
    387      1.1  nisimura }
    388      1.1  nisimura 
    389      1.1  nisimura int
    390      1.1  nisimura tcds_intrnull(val)
    391      1.1  nisimura 	void *val;
    392      1.1  nisimura {
    393      1.1  nisimura 
    394      1.1  nisimura 	panic("tcds_intrnull: uncaught TCDS intr for chip %lu\n",
    395      1.1  nisimura 	    (u_long)val);
    396      1.1  nisimura }
    397      1.1  nisimura 
    398      1.1  nisimura void
    399      1.1  nisimura tcds_scsi_reset(sc)
    400      1.1  nisimura 	struct tcds_slotconfig *sc;
    401      1.1  nisimura {
    402      1.1  nisimura 	u_int32_t cir;
    403      1.1  nisimura 
    404      1.1  nisimura 	tcds_dma_enable(sc, 0);
    405      1.1  nisimura 	tcds_scsi_enable(sc, 0);
    406      1.1  nisimura 
    407      1.1  nisimura 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
    408      1.1  nisimura 	TCDS_CIR_CLR(cir, sc->sc_resetbits);
    409      1.1  nisimura 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
    410      1.1  nisimura 
    411      1.1  nisimura 	DELAY(1);
    412      1.1  nisimura 
    413      1.1  nisimura 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
    414      1.1  nisimura 	TCDS_CIR_SET(cir, sc->sc_resetbits);
    415      1.1  nisimura 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
    416      1.1  nisimura 
    417      1.1  nisimura 	tcds_scsi_enable(sc, 1);
    418      1.1  nisimura 	tcds_dma_enable(sc, 1);
    419      1.1  nisimura }
    420      1.1  nisimura 
    421      1.1  nisimura void
    422      1.1  nisimura tcds_scsi_enable(sc, on)
    423      1.1  nisimura 	struct tcds_slotconfig *sc;
    424      1.1  nisimura 	int on;
    425      1.1  nisimura {
    426      1.1  nisimura 	u_int32_t imer;
    427      1.1  nisimura 
    428      1.1  nisimura 	imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER);
    429      1.1  nisimura 
    430      1.1  nisimura 	if (on)
    431      1.1  nisimura 		imer |= sc->sc_intrmaskbits;
    432      1.1  nisimura 	else
    433      1.1  nisimura 		imer &= ~sc->sc_intrmaskbits;
    434      1.1  nisimura 
    435      1.1  nisimura 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer);
    436      1.1  nisimura }
    437      1.1  nisimura 
    438      1.1  nisimura void
    439      1.1  nisimura tcds_dma_enable(sc, on)
    440      1.1  nisimura 	struct tcds_slotconfig *sc;
    441      1.1  nisimura 	int on;
    442      1.1  nisimura {
    443      1.1  nisimura 	u_int32_t cir;
    444      1.1  nisimura 
    445      1.1  nisimura 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
    446      1.1  nisimura 
    447      1.1  nisimura 	/* XXX Clear/set IOSLOT/PBS bits. */
    448      1.1  nisimura 	if (on)
    449      1.1  nisimura 		TCDS_CIR_SET(cir, sc->sc_dmabits);
    450      1.1  nisimura 	else
    451      1.1  nisimura 		TCDS_CIR_CLR(cir, sc->sc_dmabits);
    452      1.1  nisimura 
    453      1.1  nisimura 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
    454      1.1  nisimura }
    455      1.1  nisimura 
    456      1.1  nisimura int
    457      1.1  nisimura tcds_scsi_isintr(sc, clear)
    458      1.1  nisimura 	struct tcds_slotconfig *sc;
    459      1.1  nisimura 	int clear;
    460      1.1  nisimura {
    461      1.1  nisimura 	u_int32_t cir;
    462      1.1  nisimura 
    463      1.1  nisimura 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
    464      1.1  nisimura 
    465      1.1  nisimura 	if ((cir & sc->sc_intrbits) != 0) {
    466      1.1  nisimura 		if (clear) {
    467      1.1  nisimura 			TCDS_CIR_CLR(cir, sc->sc_intrbits);
    468      1.1  nisimura 			bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR,
    469      1.1  nisimura 			    cir);
    470      1.1  nisimura 		}
    471      1.1  nisimura 		return (1);
    472      1.1  nisimura 	} else
    473      1.1  nisimura 		return (0);
    474      1.1  nisimura }
    475      1.1  nisimura 
    476      1.1  nisimura int
    477      1.1  nisimura tcds_scsi_iserr(sc)
    478      1.1  nisimura 	struct tcds_slotconfig *sc;
    479      1.1  nisimura {
    480      1.1  nisimura 	u_int32_t cir;
    481      1.1  nisimura 
    482      1.1  nisimura 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
    483      1.1  nisimura 	return ((cir & sc->sc_errorbits) != 0);
    484      1.1  nisimura }
    485      1.1  nisimura 
    486      1.1  nisimura int
    487      1.1  nisimura tcds_intr(arg)
    488      1.1  nisimura 	void *arg;
    489      1.1  nisimura {
    490      1.1  nisimura 	struct tcds_softc *sc = arg;
    491      1.1  nisimura 	u_int32_t ir, ir0;
    492      1.1  nisimura 
    493      1.1  nisimura 	/*
    494      1.1  nisimura 	 * XXX
    495      1.1  nisimura 	 * Copy and clear (gag!) the interrupts.
    496      1.1  nisimura 	 */
    497      1.1  nisimura 	ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
    498      1.1  nisimura 	TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR);
    499      1.1  nisimura 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0);
    500      1.1  nisimura 	tc_syncbus();
    501      1.1  nisimura 
    502      1.1  nisimura #define	INCRINTRCNT(slot)	sc->sc_slots[slot].sc_evcnt.ev_count++
    503      1.1  nisimura 
    504      1.1  nisimura #define	CHECKINTR(slot)							\
    505      1.1  nisimura 	if (ir & sc->sc_slots[slot].sc_intrbits) {			\
    506      1.1  nisimura 		INCRINTRCNT(slot);					\
    507      1.1  nisimura 		(void)(*sc->sc_slots[slot].sc_intrhand)			\
    508      1.1  nisimura 		    (sc->sc_slots[slot].sc_intrarg);			\
    509      1.1  nisimura 	}
    510      1.1  nisimura 	CHECKINTR(0);
    511      1.1  nisimura 	CHECKINTR(1);
    512      1.1  nisimura #undef CHECKINTR
    513      1.1  nisimura 
    514      1.1  nisimura #ifdef DIAGNOSTIC
    515      1.1  nisimura 	/*
    516      1.1  nisimura 	 * Interrupts not currently handled, but would like to know if they
    517      1.1  nisimura 	 * occur.
    518      1.1  nisimura 	 *
    519      1.1  nisimura 	 * XXX
    520      1.1  nisimura 	 * Don't know if we have to set the interrupt mask and enable bits
    521      1.1  nisimura 	 * in the IMER to allow some of them to happen?
    522      1.1  nisimura 	 */
    523      1.1  nisimura #define	PRINTINTR(msg, bits)						\
    524      1.1  nisimura 	if (ir & bits)							\
    525      1.1  nisimura 		printf("%s: %s", sc->sc_dv.dv_xname, msg);
    526      1.1  nisimura 	PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
    527      1.1  nisimura 	PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
    528      1.1  nisimura 	PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
    529      1.1  nisimura 	PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
    530      1.1  nisimura 	PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
    531      1.1  nisimura 	PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
    532      1.1  nisimura 	PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
    533      1.1  nisimura 	PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
    534      1.1  nisimura 	PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
    535      1.1  nisimura 	PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
    536      1.1  nisimura 	PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
    537      1.1  nisimura 	PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
    538      1.1  nisimura 	PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
    539      1.1  nisimura 	PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
    540      1.1  nisimura #undef PRINTINTR
    541      1.1  nisimura #endif
    542      1.1  nisimura 
    543      1.1  nisimura 	/*
    544      1.1  nisimura 	 * XXX
    545      1.1  nisimura 	 * The MACH source had this, with the comment:
    546      1.1  nisimura 	 *	This is wrong, but machine keeps dying.
    547      1.1  nisimura 	 */
    548      1.1  nisimura 	DELAY(1);
    549      1.1  nisimura 
    550      1.1  nisimura 	return (1);
    551      1.1  nisimura }
    552      1.1  nisimura 
    553      1.1  nisimura void
    554      1.1  nisimura tcds_params(sc, chip, idp, fastp)
    555      1.1  nisimura 	struct tcds_softc *sc;
    556      1.1  nisimura 	int chip, *idp, *fastp;
    557      1.1  nisimura {
    558      1.1  nisimura 	int id, fast;
    559      1.1  nisimura 	u_int32_t ids;
    560      1.1  nisimura 
    561      1.1  nisimura #ifdef __alpha__
    562      1.1  nisimura 	if (sc->sc_flags & TCDSF_BASEBOARD) {
    563      1.1  nisimura 		extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[];
    564      1.1  nisimura 
    565      1.1  nisimura 		id = dec_3000_scsiid[chip];
    566      1.1  nisimura 		fast = dec_3000_scsifast[chip];
    567      1.1  nisimura 	} else
    568      1.1  nisimura #endif /* __alpha__ */
    569      1.1  nisimura 	{
    570      1.1  nisimura 		/*
    571      1.1  nisimura 		 * SCSI IDs are stored in the EEPROM, along with whether or
    572      1.1  nisimura 		 * not the device is "fast".  Chip 0 is the high nibble,
    573      1.1  nisimura 		 * chip 1 the low nibble.
    574      1.1  nisimura 		 */
    575      1.1  nisimura 		ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS);
    576      1.1  nisimura 		if (chip == 0)
    577      1.1  nisimura 			ids >>= 4;
    578      1.1  nisimura 
    579      1.1  nisimura 		id = ids & 0x7;
    580      1.1  nisimura 		fast = ids & 0x8;
    581      1.1  nisimura 	}
    582      1.1  nisimura 
    583      1.1  nisimura 	if (id < 0 || id > 7) {
    584      1.1  nisimura 		printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n",
    585      1.1  nisimura 		    sc->sc_dv.dv_xname, id, chip);
    586      1.1  nisimura 		id = 7;
    587      1.1  nisimura 	}
    588      1.1  nisimura 
    589      1.1  nisimura 	if (fast)
    590      1.1  nisimura 		printf("%s: fast mode set for chip %d\n",
    591      1.1  nisimura 		    sc->sc_dv.dv_xname, chip);
    592      1.1  nisimura 
    593      1.1  nisimura 	*idp = id;
    594      1.1  nisimura 	*fastp = fast;
    595      1.1  nisimura }
    596