tcds.c revision 1.13 1 1.13 perry /* $NetBSD: tcds.c,v 1.13 2005/02/04 02:10:48 perry Exp $ */
2 1.1 nisimura
3 1.1 nisimura /*-
4 1.1 nisimura * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 nisimura * All rights reserved.
6 1.1 nisimura *
7 1.1 nisimura * This code is derived from software contributed to The NetBSD Foundation
8 1.1 nisimura * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 nisimura * NASA Ames Research Center.
10 1.1 nisimura *
11 1.1 nisimura * Redistribution and use in source and binary forms, with or without
12 1.1 nisimura * modification, are permitted provided that the following conditions
13 1.1 nisimura * are met:
14 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
15 1.1 nisimura * notice, this list of conditions and the following disclaimer.
16 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
18 1.1 nisimura * documentation and/or other materials provided with the distribution.
19 1.1 nisimura * 3. All advertising materials mentioning features or use of this software
20 1.1 nisimura * must display the following acknowledgement:
21 1.1 nisimura * This product includes software developed by the NetBSD
22 1.1 nisimura * Foundation, Inc. and its contributors.
23 1.1 nisimura * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 nisimura * contributors may be used to endorse or promote products derived
25 1.1 nisimura * from this software without specific prior written permission.
26 1.1 nisimura *
27 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 nisimura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 nisimura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 nisimura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 nisimura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 nisimura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 nisimura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 nisimura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 nisimura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 nisimura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 nisimura * POSSIBILITY OF SUCH DAMAGE.
38 1.1 nisimura */
39 1.1 nisimura
40 1.1 nisimura /*
41 1.1 nisimura * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
42 1.1 nisimura * All rights reserved.
43 1.1 nisimura *
44 1.1 nisimura * Author: Keith Bostic, Chris G. Demetriou
45 1.1 nisimura *
46 1.1 nisimura * Permission to use, copy, modify and distribute this software and
47 1.1 nisimura * its documentation is hereby granted, provided that both the copyright
48 1.1 nisimura * notice and this permission notice appear in all copies of the
49 1.1 nisimura * software, derivative works or modified versions, and any portions
50 1.1 nisimura * thereof, and that both notices appear in supporting documentation.
51 1.1 nisimura *
52 1.1 nisimura * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53 1.1 nisimura * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54 1.1 nisimura * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55 1.1 nisimura *
56 1.1 nisimura * Carnegie Mellon requests users of this software to return to
57 1.1 nisimura *
58 1.1 nisimura * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
59 1.1 nisimura * School of Computer Science
60 1.1 nisimura * Carnegie Mellon University
61 1.1 nisimura * Pittsburgh PA 15213-3890
62 1.1 nisimura *
63 1.1 nisimura * any improvements or extensions that they make and grant Carnegie the
64 1.1 nisimura * rights to redistribute these changes.
65 1.1 nisimura */
66 1.1 nisimura
67 1.3 lukem #include <sys/cdefs.h>
68 1.13 perry __KERNEL_RCSID(0, "$NetBSD: tcds.c,v 1.13 2005/02/04 02:10:48 perry Exp $");
69 1.1 nisimura
70 1.1 nisimura #include <sys/param.h>
71 1.1 nisimura #include <sys/kernel.h>
72 1.1 nisimura #include <sys/systm.h>
73 1.1 nisimura #include <sys/device.h>
74 1.1 nisimura #include <sys/malloc.h>
75 1.1 nisimura
76 1.1 nisimura #ifdef __alpha__
77 1.1 nisimura #include <machine/rpb.h>
78 1.1 nisimura #endif /* __alpha__ */
79 1.1 nisimura
80 1.1 nisimura #include <dev/scsipi/scsi_all.h>
81 1.1 nisimura #include <dev/scsipi/scsipi_all.h>
82 1.1 nisimura #include <dev/scsipi/scsiconf.h>
83 1.1 nisimura
84 1.1 nisimura #include <dev/ic/ncr53c9xvar.h>
85 1.1 nisimura
86 1.1 nisimura #include <machine/bus.h>
87 1.1 nisimura
88 1.1 nisimura #include <dev/tc/tcvar.h>
89 1.1 nisimura #include <dev/tc/tcdsreg.h>
90 1.1 nisimura #include <dev/tc/tcdsvar.h>
91 1.1 nisimura
92 1.1 nisimura #include "locators.h"
93 1.1 nisimura
94 1.1 nisimura struct tcds_softc {
95 1.1 nisimura struct device sc_dv;
96 1.1 nisimura bus_space_tag_t sc_bst;
97 1.1 nisimura bus_space_handle_t sc_bsh;
98 1.1 nisimura bus_dma_tag_t sc_dmat;
99 1.1 nisimura void *sc_cookie;
100 1.1 nisimura int sc_flags;
101 1.1 nisimura struct tcds_slotconfig sc_slots[2];
102 1.1 nisimura };
103 1.1 nisimura
104 1.1 nisimura /* sc_flags */
105 1.1 nisimura #define TCDSF_BASEBOARD 0x01 /* baseboard on DEC 3000 */
106 1.1 nisimura #define TCDSF_FASTSCSI 0x02 /* supports Fast SCSI */
107 1.1 nisimura
108 1.1 nisimura /* Definition of the driver for autoconfig. */
109 1.13 perry int tcdsmatch(struct device *, struct cfdata *, void *);
110 1.13 perry void tcdsattach(struct device *, struct device *, void *);
111 1.13 perry int tcdsprint(void *, const char *);
112 1.13 perry int tcdssubmatch(struct device *, struct cfdata *,
113 1.13 perry const locdesc_t *, void *);
114 1.1 nisimura
115 1.8 thorpej CFATTACH_DECL(tcds, sizeof(struct tcds_softc),
116 1.9 thorpej tcdsmatch, tcdsattach, NULL, NULL);
117 1.1 nisimura
118 1.13 perry /*static*/ int tcds_intr(void *);
119 1.13 perry /*static*/ int tcds_intrnull(void *);
120 1.1 nisimura
121 1.1 nisimura struct tcds_device {
122 1.1 nisimura const char *td_name;
123 1.1 nisimura int td_flags;
124 1.1 nisimura } tcds_devices[] = {
125 1.1 nisimura #ifdef __alpha__
126 1.1 nisimura { "PMAZ-DS ", TCDSF_BASEBOARD },
127 1.1 nisimura { "PMAZ-FS ", TCDSF_BASEBOARD|TCDSF_FASTSCSI },
128 1.1 nisimura #endif /* __alpha__ */
129 1.1 nisimura { "PMAZB-AA", 0 },
130 1.1 nisimura { "PMAZC-AA", TCDSF_FASTSCSI },
131 1.1 nisimura { NULL, 0 },
132 1.1 nisimura };
133 1.1 nisimura
134 1.13 perry struct tcds_device *tcds_lookup(const char *);
135 1.13 perry void tcds_params(struct tcds_softc *, int, int *, int *);
136 1.1 nisimura
137 1.1 nisimura struct tcds_device *
138 1.1 nisimura tcds_lookup(modname)
139 1.1 nisimura const char *modname;
140 1.1 nisimura {
141 1.1 nisimura struct tcds_device *td;
142 1.1 nisimura
143 1.1 nisimura for (td = tcds_devices; td->td_name != NULL; td++)
144 1.1 nisimura if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0)
145 1.1 nisimura return (td);
146 1.1 nisimura
147 1.1 nisimura return (NULL);
148 1.1 nisimura }
149 1.1 nisimura
150 1.1 nisimura int
151 1.1 nisimura tcdsmatch(parent, cfdata, aux)
152 1.1 nisimura struct device *parent;
153 1.1 nisimura struct cfdata *cfdata;
154 1.1 nisimura void *aux;
155 1.1 nisimura {
156 1.1 nisimura struct tc_attach_args *ta = aux;
157 1.1 nisimura
158 1.1 nisimura return (tcds_lookup(ta->ta_modname) != NULL);
159 1.1 nisimura }
160 1.1 nisimura
161 1.1 nisimura void
162 1.1 nisimura tcdsattach(parent, self, aux)
163 1.1 nisimura struct device *parent, *self;
164 1.1 nisimura void *aux;
165 1.1 nisimura {
166 1.1 nisimura struct tcds_softc *sc = (struct tcds_softc *)self;
167 1.1 nisimura struct tc_attach_args *ta = aux;
168 1.1 nisimura struct tcdsdev_attach_args tcdsdev;
169 1.1 nisimura struct tcds_slotconfig *slotc;
170 1.1 nisimura struct tcds_device *td;
171 1.1 nisimura bus_space_handle_t sbsh[2];
172 1.1 nisimura int i, gpi2;
173 1.1 nisimura const struct evcnt *pevcnt;
174 1.11 drochner int help[2];
175 1.11 drochner locdesc_t *ldesc = (void *)help; /* XXX */
176 1.1 nisimura
177 1.1 nisimura td = tcds_lookup(ta->ta_modname);
178 1.1 nisimura if (td == NULL)
179 1.1 nisimura panic("\ntcdsattach: impossible");
180 1.1 nisimura
181 1.1 nisimura printf(": TurboChannel Dual SCSI");
182 1.1 nisimura if (td->td_flags & TCDSF_BASEBOARD)
183 1.1 nisimura printf(" (baseboard)");
184 1.1 nisimura printf("\n");
185 1.1 nisimura
186 1.1 nisimura sc->sc_flags = td->td_flags;
187 1.1 nisimura
188 1.1 nisimura sc->sc_bst = ta->ta_memt;
189 1.1 nisimura sc->sc_dmat = ta->ta_dmat;
190 1.1 nisimura
191 1.1 nisimura /*
192 1.1 nisimura * Map the device.
193 1.1 nisimura */
194 1.1 nisimura if (bus_space_map(sc->sc_bst, ta->ta_addr,
195 1.1 nisimura (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) {
196 1.1 nisimura printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
197 1.1 nisimura return;
198 1.1 nisimura }
199 1.1 nisimura
200 1.1 nisimura /*
201 1.1 nisimura * Now, slice off two subregions for the individual NCR SCSI chips.
202 1.1 nisimura */
203 1.1 nisimura if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET,
204 1.1 nisimura 0x100, &sbsh[0]) ||
205 1.1 nisimura bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET,
206 1.1 nisimura 0x100, &sbsh[1])) {
207 1.1 nisimura printf("%s: unable to subregion SCSI chip space\n",
208 1.1 nisimura sc->sc_dv.dv_xname);
209 1.1 nisimura return;
210 1.1 nisimura }
211 1.1 nisimura
212 1.1 nisimura sc->sc_cookie = ta->ta_cookie;
213 1.1 nisimura
214 1.1 nisimura pevcnt = tc_intr_evcnt(parent, sc->sc_cookie);
215 1.1 nisimura tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc);
216 1.1 nisimura
217 1.1 nisimura /*
218 1.1 nisimura * XXX
219 1.1 nisimura * IMER apparently has some random (or, not so random, but still
220 1.1 nisimura * not useful) bits set in it when the system boots. Clear it.
221 1.1 nisimura */
222 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0);
223 1.1 nisimura
224 1.1 nisimura /* XXX Initial contents of CIR? */
225 1.1 nisimura
226 1.1 nisimura /*
227 1.1 nisimura * Remember if GPI2 is set in the CIR; we'll need it later.
228 1.1 nisimura */
229 1.1 nisimura gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) &
230 1.1 nisimura TCDS_CIR_GPI_2) != 0;
231 1.1 nisimura
232 1.1 nisimura /*
233 1.7 wiz * Set up the per-slot definitions for later use.
234 1.1 nisimura */
235 1.1 nisimura
236 1.1 nisimura /* fill in common information first */
237 1.1 nisimura for (i = 0; i < 2; i++) {
238 1.2 nisimura char *cp;
239 1.2 nisimura
240 1.1 nisimura slotc = &sc->sc_slots[i];
241 1.1 nisimura bzero(slotc, sizeof *slotc); /* clear everything */
242 1.1 nisimura
243 1.2 nisimura cp = slotc->sc_name;
244 1.2 nisimura snprintf(cp, sizeof(slotc->sc_name), "chip %d", i);
245 1.1 nisimura evcnt_attach_dynamic(&slotc->sc_evcnt, EVCNT_TYPE_INTR,
246 1.1 nisimura pevcnt, sc->sc_dv.dv_xname, cp);
247 1.1 nisimura
248 1.1 nisimura slotc->sc_slot = i;
249 1.1 nisimura slotc->sc_bst = sc->sc_bst;
250 1.1 nisimura slotc->sc_bsh = sc->sc_bsh;
251 1.1 nisimura slotc->sc_intrhand = tcds_intrnull;
252 1.1 nisimura slotc->sc_intrarg = (void *)(long)i;
253 1.1 nisimura }
254 1.1 nisimura
255 1.1 nisimura /* information for slot 0 */
256 1.1 nisimura slotc = &sc->sc_slots[0];
257 1.1 nisimura slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET;
258 1.1 nisimura slotc->sc_intrmaskbits =
259 1.1 nisimura TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
260 1.1 nisimura slotc->sc_intrbits = TCDS_CIR_SCSI0_INT;
261 1.1 nisimura slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA;
262 1.1 nisimura slotc->sc_errorbits = 0; /* XXX */
263 1.1 nisimura slotc->sc_sda = TCDS_SCSI0_DMA_ADDR;
264 1.1 nisimura slotc->sc_dic = TCDS_SCSI0_DMA_INTR;
265 1.1 nisimura slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0;
266 1.1 nisimura slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1;
267 1.1 nisimura
268 1.1 nisimura /* information for slot 1 */
269 1.1 nisimura slotc = &sc->sc_slots[1];
270 1.1 nisimura slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET;
271 1.1 nisimura slotc->sc_intrmaskbits =
272 1.1 nisimura TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
273 1.1 nisimura slotc->sc_intrbits = TCDS_CIR_SCSI1_INT;
274 1.1 nisimura slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA;
275 1.1 nisimura slotc->sc_errorbits = 0; /* XXX */
276 1.1 nisimura slotc->sc_sda = TCDS_SCSI1_DMA_ADDR;
277 1.1 nisimura slotc->sc_dic = TCDS_SCSI1_DMA_INTR;
278 1.1 nisimura slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0;
279 1.1 nisimura slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1;
280 1.1 nisimura
281 1.1 nisimura /* find the hardware attached to the TCDS ASIC */
282 1.1 nisimura for (i = 0; i < 2; i++) {
283 1.1 nisimura tcds_params(sc, i, &tcdsdev.tcdsda_id,
284 1.1 nisimura &tcdsdev.tcdsda_fast);
285 1.1 nisimura
286 1.1 nisimura tcdsdev.tcdsda_bst = sc->sc_bst;
287 1.1 nisimura tcdsdev.tcdsda_bsh = sbsh[i];
288 1.1 nisimura tcdsdev.tcdsda_dmat = sc->sc_dmat;
289 1.1 nisimura tcdsdev.tcdsda_chip = i;
290 1.1 nisimura tcdsdev.tcdsda_sc = &sc->sc_slots[i];
291 1.1 nisimura /*
292 1.1 nisimura * Determine the chip frequency. TCDSF_FASTSCSI will be set
293 1.1 nisimura * for TC option cards. For baseboard chips, GPI2 is set, for a
294 1.1 nisimura * 25MHz clock, else a 40MHz clock.
295 1.1 nisimura */
296 1.1 nisimura if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) ||
297 1.1 nisimura sc->sc_flags & TCDSF_FASTSCSI) {
298 1.1 nisimura tcdsdev.tcdsda_freq = 40000000;
299 1.1 nisimura tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8;
300 1.1 nisimura } else {
301 1.1 nisimura tcdsdev.tcdsda_freq = 25000000;
302 1.1 nisimura tcdsdev.tcdsda_period = 5;
303 1.1 nisimura }
304 1.1 nisimura if (sc->sc_flags & TCDSF_BASEBOARD)
305 1.1 nisimura tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94;
306 1.1 nisimura else
307 1.1 nisimura tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96;
308 1.1 nisimura
309 1.1 nisimura tcds_scsi_reset(tcdsdev.tcdsda_sc);
310 1.1 nisimura
311 1.11 drochner ldesc->len = 1;
312 1.11 drochner ldesc->locs[TCDSCF_CHIP] = i;
313 1.11 drochner
314 1.11 drochner config_found_sm_loc(self, "tcds", ldesc, &tcdsdev,
315 1.11 drochner tcdsprint, tcdssubmatch);
316 1.1 nisimura #ifdef __alpha__
317 1.1 nisimura /*
318 1.1 nisimura * The second SCSI chip isn't present on the baseboard TCDS
319 1.1 nisimura * on the DEC Alpha 3000/300 series.
320 1.1 nisimura */
321 1.1 nisimura if (sc->sc_flags & TCDSF_BASEBOARD &&
322 1.1 nisimura cputype == ST_DEC_3000_300)
323 1.1 nisimura break;
324 1.1 nisimura #endif /* __alpha__ */
325 1.1 nisimura }
326 1.1 nisimura }
327 1.1 nisimura
328 1.1 nisimura int
329 1.11 drochner tcdssubmatch(parent, cf, ldesc, aux)
330 1.1 nisimura struct device *parent;
331 1.1 nisimura struct cfdata *cf;
332 1.11 drochner const locdesc_t *ldesc;
333 1.1 nisimura void *aux;
334 1.1 nisimura {
335 1.1 nisimura
336 1.1 nisimura if (cf->cf_loc[TCDSCF_CHIP] != TCDSCF_CHIP_DEFAULT &&
337 1.11 drochner cf->cf_loc[TCDSCF_CHIP] != ldesc->locs[TCDSCF_CHIP])
338 1.1 nisimura return (0);
339 1.1 nisimura
340 1.4 thorpej return (config_match(parent, cf, aux));
341 1.1 nisimura }
342 1.1 nisimura
343 1.1 nisimura int
344 1.1 nisimura tcdsprint(aux, pnp)
345 1.1 nisimura void *aux;
346 1.1 nisimura const char *pnp;
347 1.1 nisimura {
348 1.1 nisimura struct tcdsdev_attach_args *tcdsdev = aux;
349 1.1 nisimura
350 1.1 nisimura /* Only ASCs can attach to TCDSs; easy. */
351 1.1 nisimura if (pnp)
352 1.10 thorpej aprint_normal("asc at %s", pnp);
353 1.1 nisimura
354 1.10 thorpej aprint_normal(" chip %d", tcdsdev->tcdsda_chip);
355 1.1 nisimura
356 1.1 nisimura return (UNCONF);
357 1.1 nisimura }
358 1.1 nisimura
359 1.1 nisimura void
360 1.1 nisimura tcds_intr_establish(tcds, slot, func, arg)
361 1.1 nisimura struct device *tcds;
362 1.1 nisimura int slot;
363 1.13 perry int (*func)(void *);
364 1.1 nisimura void *arg;
365 1.1 nisimura {
366 1.1 nisimura struct tcds_softc *sc = (struct tcds_softc *)tcds;
367 1.1 nisimura
368 1.1 nisimura if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull)
369 1.1 nisimura panic("tcds_intr_establish: chip %d twice", slot);
370 1.1 nisimura
371 1.1 nisimura sc->sc_slots[slot].sc_intrhand = func;
372 1.1 nisimura sc->sc_slots[slot].sc_intrarg = arg;
373 1.1 nisimura tcds_scsi_reset(&sc->sc_slots[slot]);
374 1.1 nisimura }
375 1.1 nisimura
376 1.1 nisimura void
377 1.1 nisimura tcds_intr_disestablish(tcds, slot)
378 1.1 nisimura struct device *tcds;
379 1.1 nisimura int slot;
380 1.1 nisimura {
381 1.1 nisimura struct tcds_softc *sc = (struct tcds_softc *)tcds;
382 1.1 nisimura
383 1.1 nisimura if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
384 1.1 nisimura panic("tcds_intr_disestablish: chip %d missing intr",
385 1.1 nisimura slot);
386 1.1 nisimura
387 1.1 nisimura sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
388 1.1 nisimura sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot;
389 1.1 nisimura
390 1.1 nisimura tcds_dma_enable(&sc->sc_slots[slot], 0);
391 1.1 nisimura tcds_scsi_enable(&sc->sc_slots[slot], 0);
392 1.1 nisimura }
393 1.1 nisimura
394 1.1 nisimura int
395 1.1 nisimura tcds_intrnull(val)
396 1.1 nisimura void *val;
397 1.1 nisimura {
398 1.1 nisimura
399 1.5 provos panic("tcds_intrnull: uncaught TCDS intr for chip %lu",
400 1.1 nisimura (u_long)val);
401 1.1 nisimura }
402 1.1 nisimura
403 1.1 nisimura void
404 1.1 nisimura tcds_scsi_reset(sc)
405 1.1 nisimura struct tcds_slotconfig *sc;
406 1.1 nisimura {
407 1.1 nisimura u_int32_t cir;
408 1.1 nisimura
409 1.1 nisimura tcds_dma_enable(sc, 0);
410 1.1 nisimura tcds_scsi_enable(sc, 0);
411 1.1 nisimura
412 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
413 1.1 nisimura TCDS_CIR_CLR(cir, sc->sc_resetbits);
414 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
415 1.1 nisimura
416 1.1 nisimura DELAY(1);
417 1.1 nisimura
418 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
419 1.1 nisimura TCDS_CIR_SET(cir, sc->sc_resetbits);
420 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
421 1.1 nisimura
422 1.1 nisimura tcds_scsi_enable(sc, 1);
423 1.1 nisimura tcds_dma_enable(sc, 1);
424 1.1 nisimura }
425 1.1 nisimura
426 1.1 nisimura void
427 1.1 nisimura tcds_scsi_enable(sc, on)
428 1.1 nisimura struct tcds_slotconfig *sc;
429 1.1 nisimura int on;
430 1.1 nisimura {
431 1.1 nisimura u_int32_t imer;
432 1.1 nisimura
433 1.1 nisimura imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER);
434 1.1 nisimura
435 1.1 nisimura if (on)
436 1.1 nisimura imer |= sc->sc_intrmaskbits;
437 1.1 nisimura else
438 1.1 nisimura imer &= ~sc->sc_intrmaskbits;
439 1.1 nisimura
440 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer);
441 1.1 nisimura }
442 1.1 nisimura
443 1.1 nisimura void
444 1.1 nisimura tcds_dma_enable(sc, on)
445 1.1 nisimura struct tcds_slotconfig *sc;
446 1.1 nisimura int on;
447 1.1 nisimura {
448 1.1 nisimura u_int32_t cir;
449 1.1 nisimura
450 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
451 1.1 nisimura
452 1.1 nisimura /* XXX Clear/set IOSLOT/PBS bits. */
453 1.1 nisimura if (on)
454 1.1 nisimura TCDS_CIR_SET(cir, sc->sc_dmabits);
455 1.1 nisimura else
456 1.1 nisimura TCDS_CIR_CLR(cir, sc->sc_dmabits);
457 1.1 nisimura
458 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
459 1.1 nisimura }
460 1.1 nisimura
461 1.1 nisimura int
462 1.1 nisimura tcds_scsi_isintr(sc, clear)
463 1.1 nisimura struct tcds_slotconfig *sc;
464 1.1 nisimura int clear;
465 1.1 nisimura {
466 1.1 nisimura u_int32_t cir;
467 1.1 nisimura
468 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
469 1.1 nisimura
470 1.1 nisimura if ((cir & sc->sc_intrbits) != 0) {
471 1.1 nisimura if (clear) {
472 1.1 nisimura TCDS_CIR_CLR(cir, sc->sc_intrbits);
473 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR,
474 1.1 nisimura cir);
475 1.1 nisimura }
476 1.1 nisimura return (1);
477 1.1 nisimura } else
478 1.1 nisimura return (0);
479 1.1 nisimura }
480 1.1 nisimura
481 1.1 nisimura int
482 1.1 nisimura tcds_scsi_iserr(sc)
483 1.1 nisimura struct tcds_slotconfig *sc;
484 1.1 nisimura {
485 1.1 nisimura u_int32_t cir;
486 1.1 nisimura
487 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
488 1.1 nisimura return ((cir & sc->sc_errorbits) != 0);
489 1.1 nisimura }
490 1.1 nisimura
491 1.1 nisimura int
492 1.1 nisimura tcds_intr(arg)
493 1.1 nisimura void *arg;
494 1.1 nisimura {
495 1.1 nisimura struct tcds_softc *sc = arg;
496 1.1 nisimura u_int32_t ir, ir0;
497 1.1 nisimura
498 1.1 nisimura /*
499 1.1 nisimura * XXX
500 1.1 nisimura * Copy and clear (gag!) the interrupts.
501 1.1 nisimura */
502 1.1 nisimura ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
503 1.1 nisimura TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR);
504 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0);
505 1.1 nisimura tc_syncbus();
506 1.1 nisimura
507 1.1 nisimura #define INCRINTRCNT(slot) sc->sc_slots[slot].sc_evcnt.ev_count++
508 1.1 nisimura
509 1.1 nisimura #define CHECKINTR(slot) \
510 1.1 nisimura if (ir & sc->sc_slots[slot].sc_intrbits) { \
511 1.1 nisimura INCRINTRCNT(slot); \
512 1.1 nisimura (void)(*sc->sc_slots[slot].sc_intrhand) \
513 1.1 nisimura (sc->sc_slots[slot].sc_intrarg); \
514 1.1 nisimura }
515 1.1 nisimura CHECKINTR(0);
516 1.1 nisimura CHECKINTR(1);
517 1.1 nisimura #undef CHECKINTR
518 1.1 nisimura
519 1.1 nisimura #ifdef DIAGNOSTIC
520 1.1 nisimura /*
521 1.1 nisimura * Interrupts not currently handled, but would like to know if they
522 1.1 nisimura * occur.
523 1.1 nisimura *
524 1.1 nisimura * XXX
525 1.1 nisimura * Don't know if we have to set the interrupt mask and enable bits
526 1.1 nisimura * in the IMER to allow some of them to happen?
527 1.1 nisimura */
528 1.1 nisimura #define PRINTINTR(msg, bits) \
529 1.1 nisimura if (ir & bits) \
530 1.1 nisimura printf("%s: %s", sc->sc_dv.dv_xname, msg);
531 1.1 nisimura PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
532 1.1 nisimura PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
533 1.1 nisimura PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
534 1.1 nisimura PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
535 1.1 nisimura PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
536 1.1 nisimura PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
537 1.1 nisimura PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
538 1.1 nisimura PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
539 1.1 nisimura PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
540 1.1 nisimura PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
541 1.1 nisimura PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
542 1.1 nisimura PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
543 1.1 nisimura PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
544 1.1 nisimura PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
545 1.1 nisimura #undef PRINTINTR
546 1.1 nisimura #endif
547 1.1 nisimura
548 1.1 nisimura /*
549 1.1 nisimura * XXX
550 1.1 nisimura * The MACH source had this, with the comment:
551 1.1 nisimura * This is wrong, but machine keeps dying.
552 1.1 nisimura */
553 1.1 nisimura DELAY(1);
554 1.1 nisimura
555 1.1 nisimura return (1);
556 1.1 nisimura }
557 1.1 nisimura
558 1.1 nisimura void
559 1.1 nisimura tcds_params(sc, chip, idp, fastp)
560 1.1 nisimura struct tcds_softc *sc;
561 1.1 nisimura int chip, *idp, *fastp;
562 1.1 nisimura {
563 1.1 nisimura int id, fast;
564 1.1 nisimura u_int32_t ids;
565 1.1 nisimura
566 1.1 nisimura #ifdef __alpha__
567 1.1 nisimura if (sc->sc_flags & TCDSF_BASEBOARD) {
568 1.1 nisimura extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[];
569 1.1 nisimura
570 1.1 nisimura id = dec_3000_scsiid[chip];
571 1.1 nisimura fast = dec_3000_scsifast[chip];
572 1.1 nisimura } else
573 1.1 nisimura #endif /* __alpha__ */
574 1.1 nisimura {
575 1.1 nisimura /*
576 1.1 nisimura * SCSI IDs are stored in the EEPROM, along with whether or
577 1.1 nisimura * not the device is "fast". Chip 0 is the high nibble,
578 1.1 nisimura * chip 1 the low nibble.
579 1.1 nisimura */
580 1.1 nisimura ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS);
581 1.1 nisimura if (chip == 0)
582 1.1 nisimura ids >>= 4;
583 1.1 nisimura
584 1.1 nisimura id = ids & 0x7;
585 1.1 nisimura fast = ids & 0x8;
586 1.1 nisimura }
587 1.1 nisimura
588 1.1 nisimura if (id < 0 || id > 7) {
589 1.1 nisimura printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n",
590 1.1 nisimura sc->sc_dv.dv_xname, id, chip);
591 1.1 nisimura id = 7;
592 1.1 nisimura }
593 1.1 nisimura
594 1.1 nisimura if (fast)
595 1.1 nisimura printf("%s: fast mode set for chip %d\n",
596 1.1 nisimura sc->sc_dv.dv_xname, chip);
597 1.1 nisimura
598 1.1 nisimura *idp = id;
599 1.1 nisimura *fastp = fast;
600 1.1 nisimura }
601