tcds.c revision 1.20 1 1.20 ad /* $NetBSD: tcds.c,v 1.20 2007/10/19 12:01:20 ad Exp $ */
2 1.1 nisimura
3 1.1 nisimura /*-
4 1.1 nisimura * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 nisimura * All rights reserved.
6 1.1 nisimura *
7 1.1 nisimura * This code is derived from software contributed to The NetBSD Foundation
8 1.1 nisimura * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 nisimura * NASA Ames Research Center.
10 1.1 nisimura *
11 1.1 nisimura * Redistribution and use in source and binary forms, with or without
12 1.1 nisimura * modification, are permitted provided that the following conditions
13 1.1 nisimura * are met:
14 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
15 1.1 nisimura * notice, this list of conditions and the following disclaimer.
16 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
18 1.1 nisimura * documentation and/or other materials provided with the distribution.
19 1.1 nisimura * 3. All advertising materials mentioning features or use of this software
20 1.1 nisimura * must display the following acknowledgement:
21 1.1 nisimura * This product includes software developed by the NetBSD
22 1.1 nisimura * Foundation, Inc. and its contributors.
23 1.1 nisimura * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 nisimura * contributors may be used to endorse or promote products derived
25 1.1 nisimura * from this software without specific prior written permission.
26 1.1 nisimura *
27 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 nisimura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 nisimura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 nisimura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 nisimura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 nisimura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 nisimura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 nisimura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 nisimura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 nisimura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 nisimura * POSSIBILITY OF SUCH DAMAGE.
38 1.1 nisimura */
39 1.1 nisimura
40 1.1 nisimura /*
41 1.1 nisimura * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
42 1.1 nisimura * All rights reserved.
43 1.1 nisimura *
44 1.1 nisimura * Author: Keith Bostic, Chris G. Demetriou
45 1.14 perry *
46 1.1 nisimura * Permission to use, copy, modify and distribute this software and
47 1.1 nisimura * its documentation is hereby granted, provided that both the copyright
48 1.1 nisimura * notice and this permission notice appear in all copies of the
49 1.1 nisimura * software, derivative works or modified versions, and any portions
50 1.1 nisimura * thereof, and that both notices appear in supporting documentation.
51 1.14 perry *
52 1.14 perry * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53 1.14 perry * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54 1.1 nisimura * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55 1.14 perry *
56 1.1 nisimura * Carnegie Mellon requests users of this software to return to
57 1.1 nisimura *
58 1.1 nisimura * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
59 1.1 nisimura * School of Computer Science
60 1.1 nisimura * Carnegie Mellon University
61 1.1 nisimura * Pittsburgh PA 15213-3890
62 1.1 nisimura *
63 1.1 nisimura * any improvements or extensions that they make and grant Carnegie the
64 1.1 nisimura * rights to redistribute these changes.
65 1.1 nisimura */
66 1.1 nisimura
67 1.3 lukem #include <sys/cdefs.h>
68 1.20 ad __KERNEL_RCSID(0, "$NetBSD: tcds.c,v 1.20 2007/10/19 12:01:20 ad Exp $");
69 1.1 nisimura
70 1.1 nisimura #include <sys/param.h>
71 1.1 nisimura #include <sys/kernel.h>
72 1.1 nisimura #include <sys/systm.h>
73 1.1 nisimura #include <sys/device.h>
74 1.1 nisimura #include <sys/malloc.h>
75 1.1 nisimura
76 1.1 nisimura #ifdef __alpha__
77 1.1 nisimura #include <machine/rpb.h>
78 1.1 nisimura #endif /* __alpha__ */
79 1.1 nisimura
80 1.1 nisimura #include <dev/scsipi/scsi_all.h>
81 1.1 nisimura #include <dev/scsipi/scsipi_all.h>
82 1.1 nisimura #include <dev/scsipi/scsiconf.h>
83 1.1 nisimura
84 1.1 nisimura #include <dev/ic/ncr53c9xvar.h>
85 1.1 nisimura
86 1.20 ad #include <sys/bus.h>
87 1.1 nisimura
88 1.1 nisimura #include <dev/tc/tcvar.h>
89 1.1 nisimura #include <dev/tc/tcdsreg.h>
90 1.1 nisimura #include <dev/tc/tcdsvar.h>
91 1.1 nisimura
92 1.1 nisimura #include "locators.h"
93 1.1 nisimura
94 1.1 nisimura struct tcds_softc {
95 1.1 nisimura struct device sc_dv;
96 1.1 nisimura bus_space_tag_t sc_bst;
97 1.1 nisimura bus_space_handle_t sc_bsh;
98 1.1 nisimura bus_dma_tag_t sc_dmat;
99 1.1 nisimura void *sc_cookie;
100 1.1 nisimura int sc_flags;
101 1.1 nisimura struct tcds_slotconfig sc_slots[2];
102 1.1 nisimura };
103 1.1 nisimura
104 1.1 nisimura /* sc_flags */
105 1.1 nisimura #define TCDSF_BASEBOARD 0x01 /* baseboard on DEC 3000 */
106 1.1 nisimura #define TCDSF_FASTSCSI 0x02 /* supports Fast SCSI */
107 1.1 nisimura
108 1.1 nisimura /* Definition of the driver for autoconfig. */
109 1.19 thorpej static int tcdsmatch(struct device *, struct cfdata *, void *);
110 1.19 thorpej static void tcdsattach(struct device *, struct device *, void *);
111 1.19 thorpej static int tcdsprint(void *, const char *);
112 1.1 nisimura
113 1.8 thorpej CFATTACH_DECL(tcds, sizeof(struct tcds_softc),
114 1.9 thorpej tcdsmatch, tcdsattach, NULL, NULL);
115 1.1 nisimura
116 1.13 perry /*static*/ int tcds_intr(void *);
117 1.13 perry /*static*/ int tcds_intrnull(void *);
118 1.1 nisimura
119 1.19 thorpej static const struct tcds_device {
120 1.1 nisimura const char *td_name;
121 1.1 nisimura int td_flags;
122 1.1 nisimura } tcds_devices[] = {
123 1.1 nisimura #ifdef __alpha__
124 1.1 nisimura { "PMAZ-DS ", TCDSF_BASEBOARD },
125 1.1 nisimura { "PMAZ-FS ", TCDSF_BASEBOARD|TCDSF_FASTSCSI },
126 1.1 nisimura #endif /* __alpha__ */
127 1.1 nisimura { "PMAZB-AA", 0 },
128 1.1 nisimura { "PMAZC-AA", TCDSF_FASTSCSI },
129 1.1 nisimura { NULL, 0 },
130 1.1 nisimura };
131 1.1 nisimura
132 1.19 thorpej static void tcds_params(struct tcds_softc *, int, int *, int *);
133 1.1 nisimura
134 1.19 thorpej static const struct tcds_device *
135 1.19 thorpej tcds_lookup(const char *modname)
136 1.1 nisimura {
137 1.19 thorpej const struct tcds_device *td;
138 1.1 nisimura
139 1.1 nisimura for (td = tcds_devices; td->td_name != NULL; td++)
140 1.1 nisimura if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0)
141 1.1 nisimura return (td);
142 1.1 nisimura
143 1.1 nisimura return (NULL);
144 1.1 nisimura }
145 1.1 nisimura
146 1.19 thorpej static int
147 1.19 thorpej tcdsmatch(struct device *parent, struct cfdata *cfdata, void *aux)
148 1.1 nisimura {
149 1.1 nisimura struct tc_attach_args *ta = aux;
150 1.1 nisimura
151 1.1 nisimura return (tcds_lookup(ta->ta_modname) != NULL);
152 1.1 nisimura }
153 1.1 nisimura
154 1.19 thorpej static void
155 1.19 thorpej tcdsattach(struct device *parent, struct device *self, void *aux)
156 1.1 nisimura {
157 1.18 thorpej struct tcds_softc *sc = device_private(self);
158 1.1 nisimura struct tc_attach_args *ta = aux;
159 1.1 nisimura struct tcdsdev_attach_args tcdsdev;
160 1.1 nisimura struct tcds_slotconfig *slotc;
161 1.19 thorpej const struct tcds_device *td;
162 1.1 nisimura bus_space_handle_t sbsh[2];
163 1.1 nisimura int i, gpi2;
164 1.1 nisimura const struct evcnt *pevcnt;
165 1.15 drochner int locs[TCDSCF_NLOCS];
166 1.1 nisimura
167 1.1 nisimura td = tcds_lookup(ta->ta_modname);
168 1.1 nisimura if (td == NULL)
169 1.1 nisimura panic("\ntcdsattach: impossible");
170 1.1 nisimura
171 1.1 nisimura printf(": TurboChannel Dual SCSI");
172 1.1 nisimura if (td->td_flags & TCDSF_BASEBOARD)
173 1.1 nisimura printf(" (baseboard)");
174 1.1 nisimura printf("\n");
175 1.1 nisimura
176 1.1 nisimura sc->sc_flags = td->td_flags;
177 1.1 nisimura
178 1.1 nisimura sc->sc_bst = ta->ta_memt;
179 1.1 nisimura sc->sc_dmat = ta->ta_dmat;
180 1.1 nisimura
181 1.1 nisimura /*
182 1.1 nisimura * Map the device.
183 1.1 nisimura */
184 1.1 nisimura if (bus_space_map(sc->sc_bst, ta->ta_addr,
185 1.1 nisimura (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) {
186 1.1 nisimura printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
187 1.1 nisimura return;
188 1.1 nisimura }
189 1.1 nisimura
190 1.1 nisimura /*
191 1.1 nisimura * Now, slice off two subregions for the individual NCR SCSI chips.
192 1.1 nisimura */
193 1.1 nisimura if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET,
194 1.1 nisimura 0x100, &sbsh[0]) ||
195 1.1 nisimura bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET,
196 1.1 nisimura 0x100, &sbsh[1])) {
197 1.1 nisimura printf("%s: unable to subregion SCSI chip space\n",
198 1.1 nisimura sc->sc_dv.dv_xname);
199 1.1 nisimura return;
200 1.1 nisimura }
201 1.1 nisimura
202 1.1 nisimura sc->sc_cookie = ta->ta_cookie;
203 1.1 nisimura
204 1.1 nisimura pevcnt = tc_intr_evcnt(parent, sc->sc_cookie);
205 1.1 nisimura tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc);
206 1.1 nisimura
207 1.1 nisimura /*
208 1.1 nisimura * XXX
209 1.1 nisimura * IMER apparently has some random (or, not so random, but still
210 1.1 nisimura * not useful) bits set in it when the system boots. Clear it.
211 1.1 nisimura */
212 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0);
213 1.1 nisimura
214 1.1 nisimura /* XXX Initial contents of CIR? */
215 1.1 nisimura
216 1.1 nisimura /*
217 1.1 nisimura * Remember if GPI2 is set in the CIR; we'll need it later.
218 1.1 nisimura */
219 1.1 nisimura gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) &
220 1.1 nisimura TCDS_CIR_GPI_2) != 0;
221 1.1 nisimura
222 1.1 nisimura /*
223 1.7 wiz * Set up the per-slot definitions for later use.
224 1.1 nisimura */
225 1.1 nisimura
226 1.1 nisimura /* fill in common information first */
227 1.1 nisimura for (i = 0; i < 2; i++) {
228 1.2 nisimura char *cp;
229 1.2 nisimura
230 1.1 nisimura slotc = &sc->sc_slots[i];
231 1.1 nisimura bzero(slotc, sizeof *slotc); /* clear everything */
232 1.1 nisimura
233 1.2 nisimura cp = slotc->sc_name;
234 1.2 nisimura snprintf(cp, sizeof(slotc->sc_name), "chip %d", i);
235 1.1 nisimura evcnt_attach_dynamic(&slotc->sc_evcnt, EVCNT_TYPE_INTR,
236 1.1 nisimura pevcnt, sc->sc_dv.dv_xname, cp);
237 1.1 nisimura
238 1.1 nisimura slotc->sc_slot = i;
239 1.1 nisimura slotc->sc_bst = sc->sc_bst;
240 1.1 nisimura slotc->sc_bsh = sc->sc_bsh;
241 1.1 nisimura slotc->sc_intrhand = tcds_intrnull;
242 1.1 nisimura slotc->sc_intrarg = (void *)(long)i;
243 1.1 nisimura }
244 1.1 nisimura
245 1.1 nisimura /* information for slot 0 */
246 1.1 nisimura slotc = &sc->sc_slots[0];
247 1.1 nisimura slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET;
248 1.1 nisimura slotc->sc_intrmaskbits =
249 1.1 nisimura TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
250 1.1 nisimura slotc->sc_intrbits = TCDS_CIR_SCSI0_INT;
251 1.1 nisimura slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA;
252 1.1 nisimura slotc->sc_errorbits = 0; /* XXX */
253 1.1 nisimura slotc->sc_sda = TCDS_SCSI0_DMA_ADDR;
254 1.1 nisimura slotc->sc_dic = TCDS_SCSI0_DMA_INTR;
255 1.1 nisimura slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0;
256 1.1 nisimura slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1;
257 1.1 nisimura
258 1.1 nisimura /* information for slot 1 */
259 1.1 nisimura slotc = &sc->sc_slots[1];
260 1.1 nisimura slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET;
261 1.1 nisimura slotc->sc_intrmaskbits =
262 1.1 nisimura TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
263 1.1 nisimura slotc->sc_intrbits = TCDS_CIR_SCSI1_INT;
264 1.1 nisimura slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA;
265 1.1 nisimura slotc->sc_errorbits = 0; /* XXX */
266 1.1 nisimura slotc->sc_sda = TCDS_SCSI1_DMA_ADDR;
267 1.1 nisimura slotc->sc_dic = TCDS_SCSI1_DMA_INTR;
268 1.1 nisimura slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0;
269 1.1 nisimura slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1;
270 1.1 nisimura
271 1.1 nisimura /* find the hardware attached to the TCDS ASIC */
272 1.1 nisimura for (i = 0; i < 2; i++) {
273 1.1 nisimura tcds_params(sc, i, &tcdsdev.tcdsda_id,
274 1.1 nisimura &tcdsdev.tcdsda_fast);
275 1.1 nisimura
276 1.1 nisimura tcdsdev.tcdsda_bst = sc->sc_bst;
277 1.1 nisimura tcdsdev.tcdsda_bsh = sbsh[i];
278 1.1 nisimura tcdsdev.tcdsda_dmat = sc->sc_dmat;
279 1.1 nisimura tcdsdev.tcdsda_chip = i;
280 1.1 nisimura tcdsdev.tcdsda_sc = &sc->sc_slots[i];
281 1.1 nisimura /*
282 1.1 nisimura * Determine the chip frequency. TCDSF_FASTSCSI will be set
283 1.1 nisimura * for TC option cards. For baseboard chips, GPI2 is set, for a
284 1.1 nisimura * 25MHz clock, else a 40MHz clock.
285 1.1 nisimura */
286 1.1 nisimura if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) ||
287 1.1 nisimura sc->sc_flags & TCDSF_FASTSCSI) {
288 1.1 nisimura tcdsdev.tcdsda_freq = 40000000;
289 1.1 nisimura tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8;
290 1.1 nisimura } else {
291 1.1 nisimura tcdsdev.tcdsda_freq = 25000000;
292 1.1 nisimura tcdsdev.tcdsda_period = 5;
293 1.1 nisimura }
294 1.1 nisimura if (sc->sc_flags & TCDSF_BASEBOARD)
295 1.1 nisimura tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94;
296 1.1 nisimura else
297 1.1 nisimura tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96;
298 1.1 nisimura
299 1.1 nisimura tcds_scsi_reset(tcdsdev.tcdsda_sc);
300 1.1 nisimura
301 1.15 drochner locs[TCDSCF_CHIP] = i;
302 1.11 drochner
303 1.15 drochner config_found_sm_loc(self, "tcds", locs, &tcdsdev,
304 1.16 drochner tcdsprint, config_stdsubmatch);
305 1.1 nisimura #ifdef __alpha__
306 1.1 nisimura /*
307 1.1 nisimura * The second SCSI chip isn't present on the baseboard TCDS
308 1.1 nisimura * on the DEC Alpha 3000/300 series.
309 1.1 nisimura */
310 1.1 nisimura if (sc->sc_flags & TCDSF_BASEBOARD &&
311 1.1 nisimura cputype == ST_DEC_3000_300)
312 1.1 nisimura break;
313 1.1 nisimura #endif /* __alpha__ */
314 1.1 nisimura }
315 1.1 nisimura }
316 1.1 nisimura
317 1.19 thorpej static int
318 1.19 thorpej tcdsprint(void *aux, const char *pnp)
319 1.1 nisimura {
320 1.1 nisimura struct tcdsdev_attach_args *tcdsdev = aux;
321 1.1 nisimura
322 1.1 nisimura /* Only ASCs can attach to TCDSs; easy. */
323 1.1 nisimura if (pnp)
324 1.10 thorpej aprint_normal("asc at %s", pnp);
325 1.1 nisimura
326 1.10 thorpej aprint_normal(" chip %d", tcdsdev->tcdsda_chip);
327 1.1 nisimura
328 1.1 nisimura return (UNCONF);
329 1.1 nisimura }
330 1.1 nisimura
331 1.1 nisimura void
332 1.19 thorpej tcds_intr_establish(struct device *tcds, int slot, int (*func)(void *),
333 1.19 thorpej void *arg)
334 1.1 nisimura {
335 1.19 thorpej struct tcds_softc *sc = device_private(tcds);
336 1.1 nisimura
337 1.1 nisimura if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull)
338 1.1 nisimura panic("tcds_intr_establish: chip %d twice", slot);
339 1.1 nisimura
340 1.1 nisimura sc->sc_slots[slot].sc_intrhand = func;
341 1.1 nisimura sc->sc_slots[slot].sc_intrarg = arg;
342 1.1 nisimura tcds_scsi_reset(&sc->sc_slots[slot]);
343 1.1 nisimura }
344 1.1 nisimura
345 1.1 nisimura void
346 1.19 thorpej tcds_intr_disestablish(struct device *tcds, int slot)
347 1.1 nisimura {
348 1.19 thorpej struct tcds_softc *sc = device_private(tcds);
349 1.1 nisimura
350 1.1 nisimura if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
351 1.1 nisimura panic("tcds_intr_disestablish: chip %d missing intr",
352 1.1 nisimura slot);
353 1.1 nisimura
354 1.1 nisimura sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
355 1.1 nisimura sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot;
356 1.1 nisimura
357 1.1 nisimura tcds_dma_enable(&sc->sc_slots[slot], 0);
358 1.1 nisimura tcds_scsi_enable(&sc->sc_slots[slot], 0);
359 1.1 nisimura }
360 1.1 nisimura
361 1.1 nisimura int
362 1.19 thorpej tcds_intrnull(void *val)
363 1.1 nisimura {
364 1.1 nisimura
365 1.5 provos panic("tcds_intrnull: uncaught TCDS intr for chip %lu",
366 1.1 nisimura (u_long)val);
367 1.1 nisimura }
368 1.1 nisimura
369 1.1 nisimura void
370 1.19 thorpej tcds_scsi_reset(struct tcds_slotconfig *sc)
371 1.1 nisimura {
372 1.1 nisimura u_int32_t cir;
373 1.1 nisimura
374 1.1 nisimura tcds_dma_enable(sc, 0);
375 1.1 nisimura tcds_scsi_enable(sc, 0);
376 1.1 nisimura
377 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
378 1.1 nisimura TCDS_CIR_CLR(cir, sc->sc_resetbits);
379 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
380 1.1 nisimura
381 1.1 nisimura DELAY(1);
382 1.1 nisimura
383 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
384 1.1 nisimura TCDS_CIR_SET(cir, sc->sc_resetbits);
385 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
386 1.1 nisimura
387 1.1 nisimura tcds_scsi_enable(sc, 1);
388 1.1 nisimura tcds_dma_enable(sc, 1);
389 1.1 nisimura }
390 1.1 nisimura
391 1.1 nisimura void
392 1.19 thorpej tcds_scsi_enable(struct tcds_slotconfig *sc, int on)
393 1.1 nisimura {
394 1.1 nisimura u_int32_t imer;
395 1.1 nisimura
396 1.1 nisimura imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER);
397 1.1 nisimura
398 1.1 nisimura if (on)
399 1.1 nisimura imer |= sc->sc_intrmaskbits;
400 1.1 nisimura else
401 1.1 nisimura imer &= ~sc->sc_intrmaskbits;
402 1.1 nisimura
403 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer);
404 1.1 nisimura }
405 1.1 nisimura
406 1.1 nisimura void
407 1.19 thorpej tcds_dma_enable(struct tcds_slotconfig *sc, int on)
408 1.1 nisimura {
409 1.1 nisimura u_int32_t cir;
410 1.1 nisimura
411 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
412 1.1 nisimura
413 1.1 nisimura /* XXX Clear/set IOSLOT/PBS bits. */
414 1.14 perry if (on)
415 1.1 nisimura TCDS_CIR_SET(cir, sc->sc_dmabits);
416 1.1 nisimura else
417 1.1 nisimura TCDS_CIR_CLR(cir, sc->sc_dmabits);
418 1.1 nisimura
419 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
420 1.1 nisimura }
421 1.1 nisimura
422 1.1 nisimura int
423 1.19 thorpej tcds_scsi_isintr(struct tcds_slotconfig *sc, int clear)
424 1.1 nisimura {
425 1.1 nisimura u_int32_t cir;
426 1.1 nisimura
427 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
428 1.1 nisimura
429 1.1 nisimura if ((cir & sc->sc_intrbits) != 0) {
430 1.1 nisimura if (clear) {
431 1.1 nisimura TCDS_CIR_CLR(cir, sc->sc_intrbits);
432 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR,
433 1.1 nisimura cir);
434 1.1 nisimura }
435 1.1 nisimura return (1);
436 1.1 nisimura } else
437 1.1 nisimura return (0);
438 1.1 nisimura }
439 1.1 nisimura
440 1.1 nisimura int
441 1.19 thorpej tcds_scsi_iserr(struct tcds_slotconfig *sc)
442 1.1 nisimura {
443 1.1 nisimura u_int32_t cir;
444 1.1 nisimura
445 1.1 nisimura cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
446 1.1 nisimura return ((cir & sc->sc_errorbits) != 0);
447 1.1 nisimura }
448 1.1 nisimura
449 1.1 nisimura int
450 1.19 thorpej tcds_intr(void *arg)
451 1.1 nisimura {
452 1.1 nisimura struct tcds_softc *sc = arg;
453 1.1 nisimura u_int32_t ir, ir0;
454 1.1 nisimura
455 1.1 nisimura /*
456 1.1 nisimura * XXX
457 1.1 nisimura * Copy and clear (gag!) the interrupts.
458 1.1 nisimura */
459 1.1 nisimura ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
460 1.1 nisimura TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR);
461 1.1 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0);
462 1.1 nisimura tc_syncbus();
463 1.1 nisimura
464 1.1 nisimura #define INCRINTRCNT(slot) sc->sc_slots[slot].sc_evcnt.ev_count++
465 1.1 nisimura
466 1.1 nisimura #define CHECKINTR(slot) \
467 1.1 nisimura if (ir & sc->sc_slots[slot].sc_intrbits) { \
468 1.1 nisimura INCRINTRCNT(slot); \
469 1.1 nisimura (void)(*sc->sc_slots[slot].sc_intrhand) \
470 1.1 nisimura (sc->sc_slots[slot].sc_intrarg); \
471 1.1 nisimura }
472 1.1 nisimura CHECKINTR(0);
473 1.1 nisimura CHECKINTR(1);
474 1.1 nisimura #undef CHECKINTR
475 1.1 nisimura
476 1.1 nisimura #ifdef DIAGNOSTIC
477 1.14 perry /*
478 1.1 nisimura * Interrupts not currently handled, but would like to know if they
479 1.1 nisimura * occur.
480 1.1 nisimura *
481 1.1 nisimura * XXX
482 1.1 nisimura * Don't know if we have to set the interrupt mask and enable bits
483 1.1 nisimura * in the IMER to allow some of them to happen?
484 1.1 nisimura */
485 1.1 nisimura #define PRINTINTR(msg, bits) \
486 1.1 nisimura if (ir & bits) \
487 1.1 nisimura printf("%s: %s", sc->sc_dv.dv_xname, msg);
488 1.1 nisimura PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
489 1.1 nisimura PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
490 1.1 nisimura PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
491 1.1 nisimura PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
492 1.1 nisimura PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
493 1.1 nisimura PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
494 1.1 nisimura PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
495 1.1 nisimura PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
496 1.1 nisimura PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
497 1.1 nisimura PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
498 1.1 nisimura PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
499 1.1 nisimura PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
500 1.1 nisimura PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
501 1.1 nisimura PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
502 1.1 nisimura #undef PRINTINTR
503 1.1 nisimura #endif
504 1.1 nisimura
505 1.1 nisimura /*
506 1.1 nisimura * XXX
507 1.1 nisimura * The MACH source had this, with the comment:
508 1.1 nisimura * This is wrong, but machine keeps dying.
509 1.1 nisimura */
510 1.1 nisimura DELAY(1);
511 1.1 nisimura
512 1.1 nisimura return (1);
513 1.1 nisimura }
514 1.1 nisimura
515 1.19 thorpej static void
516 1.19 thorpej tcds_params(struct tcds_softc *sc, int chip, int *idp, int *fastp)
517 1.1 nisimura {
518 1.1 nisimura int id, fast;
519 1.1 nisimura u_int32_t ids;
520 1.1 nisimura
521 1.1 nisimura #ifdef __alpha__
522 1.1 nisimura if (sc->sc_flags & TCDSF_BASEBOARD) {
523 1.1 nisimura extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[];
524 1.1 nisimura
525 1.1 nisimura id = dec_3000_scsiid[chip];
526 1.1 nisimura fast = dec_3000_scsifast[chip];
527 1.1 nisimura } else
528 1.1 nisimura #endif /* __alpha__ */
529 1.1 nisimura {
530 1.1 nisimura /*
531 1.1 nisimura * SCSI IDs are stored in the EEPROM, along with whether or
532 1.1 nisimura * not the device is "fast". Chip 0 is the high nibble,
533 1.1 nisimura * chip 1 the low nibble.
534 1.1 nisimura */
535 1.1 nisimura ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS);
536 1.1 nisimura if (chip == 0)
537 1.1 nisimura ids >>= 4;
538 1.1 nisimura
539 1.1 nisimura id = ids & 0x7;
540 1.1 nisimura fast = ids & 0x8;
541 1.1 nisimura }
542 1.1 nisimura
543 1.1 nisimura if (id < 0 || id > 7) {
544 1.1 nisimura printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n",
545 1.1 nisimura sc->sc_dv.dv_xname, id, chip);
546 1.1 nisimura id = 7;
547 1.1 nisimura }
548 1.1 nisimura
549 1.1 nisimura if (fast)
550 1.1 nisimura printf("%s: fast mode set for chip %d\n",
551 1.1 nisimura sc->sc_dv.dv_xname, chip);
552 1.1 nisimura
553 1.1 nisimura *idp = id;
554 1.1 nisimura *fastp = fast;
555 1.1 nisimura }
556