tcds.c revision 1.16
1 /* $NetBSD: tcds.c,v 1.16 2005/08/26 10:14:05 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Keith Bostic, Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: tcds.c,v 1.16 2005/08/26 10:14:05 drochner Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/kernel.h> 72 #include <sys/systm.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 76 #ifdef __alpha__ 77 #include <machine/rpb.h> 78 #endif /* __alpha__ */ 79 80 #include <dev/scsipi/scsi_all.h> 81 #include <dev/scsipi/scsipi_all.h> 82 #include <dev/scsipi/scsiconf.h> 83 84 #include <dev/ic/ncr53c9xvar.h> 85 86 #include <machine/bus.h> 87 88 #include <dev/tc/tcvar.h> 89 #include <dev/tc/tcdsreg.h> 90 #include <dev/tc/tcdsvar.h> 91 92 #include "locators.h" 93 94 struct tcds_softc { 95 struct device sc_dv; 96 bus_space_tag_t sc_bst; 97 bus_space_handle_t sc_bsh; 98 bus_dma_tag_t sc_dmat; 99 void *sc_cookie; 100 int sc_flags; 101 struct tcds_slotconfig sc_slots[2]; 102 }; 103 104 /* sc_flags */ 105 #define TCDSF_BASEBOARD 0x01 /* baseboard on DEC 3000 */ 106 #define TCDSF_FASTSCSI 0x02 /* supports Fast SCSI */ 107 108 /* Definition of the driver for autoconfig. */ 109 int tcdsmatch(struct device *, struct cfdata *, void *); 110 void tcdsattach(struct device *, struct device *, void *); 111 int tcdsprint(void *, const char *); 112 113 CFATTACH_DECL(tcds, sizeof(struct tcds_softc), 114 tcdsmatch, tcdsattach, NULL, NULL); 115 116 /*static*/ int tcds_intr(void *); 117 /*static*/ int tcds_intrnull(void *); 118 119 struct tcds_device { 120 const char *td_name; 121 int td_flags; 122 } tcds_devices[] = { 123 #ifdef __alpha__ 124 { "PMAZ-DS ", TCDSF_BASEBOARD }, 125 { "PMAZ-FS ", TCDSF_BASEBOARD|TCDSF_FASTSCSI }, 126 #endif /* __alpha__ */ 127 { "PMAZB-AA", 0 }, 128 { "PMAZC-AA", TCDSF_FASTSCSI }, 129 { NULL, 0 }, 130 }; 131 132 struct tcds_device *tcds_lookup(const char *); 133 void tcds_params(struct tcds_softc *, int, int *, int *); 134 135 struct tcds_device * 136 tcds_lookup(modname) 137 const char *modname; 138 { 139 struct tcds_device *td; 140 141 for (td = tcds_devices; td->td_name != NULL; td++) 142 if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0) 143 return (td); 144 145 return (NULL); 146 } 147 148 int 149 tcdsmatch(parent, cfdata, aux) 150 struct device *parent; 151 struct cfdata *cfdata; 152 void *aux; 153 { 154 struct tc_attach_args *ta = aux; 155 156 return (tcds_lookup(ta->ta_modname) != NULL); 157 } 158 159 void 160 tcdsattach(parent, self, aux) 161 struct device *parent, *self; 162 void *aux; 163 { 164 struct tcds_softc *sc = (struct tcds_softc *)self; 165 struct tc_attach_args *ta = aux; 166 struct tcdsdev_attach_args tcdsdev; 167 struct tcds_slotconfig *slotc; 168 struct tcds_device *td; 169 bus_space_handle_t sbsh[2]; 170 int i, gpi2; 171 const struct evcnt *pevcnt; 172 int locs[TCDSCF_NLOCS]; 173 174 td = tcds_lookup(ta->ta_modname); 175 if (td == NULL) 176 panic("\ntcdsattach: impossible"); 177 178 printf(": TurboChannel Dual SCSI"); 179 if (td->td_flags & TCDSF_BASEBOARD) 180 printf(" (baseboard)"); 181 printf("\n"); 182 183 sc->sc_flags = td->td_flags; 184 185 sc->sc_bst = ta->ta_memt; 186 sc->sc_dmat = ta->ta_dmat; 187 188 /* 189 * Map the device. 190 */ 191 if (bus_space_map(sc->sc_bst, ta->ta_addr, 192 (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) { 193 printf("%s: unable to map device\n", sc->sc_dv.dv_xname); 194 return; 195 } 196 197 /* 198 * Now, slice off two subregions for the individual NCR SCSI chips. 199 */ 200 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET, 201 0x100, &sbsh[0]) || 202 bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET, 203 0x100, &sbsh[1])) { 204 printf("%s: unable to subregion SCSI chip space\n", 205 sc->sc_dv.dv_xname); 206 return; 207 } 208 209 sc->sc_cookie = ta->ta_cookie; 210 211 pevcnt = tc_intr_evcnt(parent, sc->sc_cookie); 212 tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc); 213 214 /* 215 * XXX 216 * IMER apparently has some random (or, not so random, but still 217 * not useful) bits set in it when the system boots. Clear it. 218 */ 219 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0); 220 221 /* XXX Initial contents of CIR? */ 222 223 /* 224 * Remember if GPI2 is set in the CIR; we'll need it later. 225 */ 226 gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) & 227 TCDS_CIR_GPI_2) != 0; 228 229 /* 230 * Set up the per-slot definitions for later use. 231 */ 232 233 /* fill in common information first */ 234 for (i = 0; i < 2; i++) { 235 char *cp; 236 237 slotc = &sc->sc_slots[i]; 238 bzero(slotc, sizeof *slotc); /* clear everything */ 239 240 cp = slotc->sc_name; 241 snprintf(cp, sizeof(slotc->sc_name), "chip %d", i); 242 evcnt_attach_dynamic(&slotc->sc_evcnt, EVCNT_TYPE_INTR, 243 pevcnt, sc->sc_dv.dv_xname, cp); 244 245 slotc->sc_slot = i; 246 slotc->sc_bst = sc->sc_bst; 247 slotc->sc_bsh = sc->sc_bsh; 248 slotc->sc_intrhand = tcds_intrnull; 249 slotc->sc_intrarg = (void *)(long)i; 250 } 251 252 /* information for slot 0 */ 253 slotc = &sc->sc_slots[0]; 254 slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET; 255 slotc->sc_intrmaskbits = 256 TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB; 257 slotc->sc_intrbits = TCDS_CIR_SCSI0_INT; 258 slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA; 259 slotc->sc_errorbits = 0; /* XXX */ 260 slotc->sc_sda = TCDS_SCSI0_DMA_ADDR; 261 slotc->sc_dic = TCDS_SCSI0_DMA_INTR; 262 slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0; 263 slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1; 264 265 /* information for slot 1 */ 266 slotc = &sc->sc_slots[1]; 267 slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET; 268 slotc->sc_intrmaskbits = 269 TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB; 270 slotc->sc_intrbits = TCDS_CIR_SCSI1_INT; 271 slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA; 272 slotc->sc_errorbits = 0; /* XXX */ 273 slotc->sc_sda = TCDS_SCSI1_DMA_ADDR; 274 slotc->sc_dic = TCDS_SCSI1_DMA_INTR; 275 slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0; 276 slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1; 277 278 /* find the hardware attached to the TCDS ASIC */ 279 for (i = 0; i < 2; i++) { 280 tcds_params(sc, i, &tcdsdev.tcdsda_id, 281 &tcdsdev.tcdsda_fast); 282 283 tcdsdev.tcdsda_bst = sc->sc_bst; 284 tcdsdev.tcdsda_bsh = sbsh[i]; 285 tcdsdev.tcdsda_dmat = sc->sc_dmat; 286 tcdsdev.tcdsda_chip = i; 287 tcdsdev.tcdsda_sc = &sc->sc_slots[i]; 288 /* 289 * Determine the chip frequency. TCDSF_FASTSCSI will be set 290 * for TC option cards. For baseboard chips, GPI2 is set, for a 291 * 25MHz clock, else a 40MHz clock. 292 */ 293 if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) || 294 sc->sc_flags & TCDSF_FASTSCSI) { 295 tcdsdev.tcdsda_freq = 40000000; 296 tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8; 297 } else { 298 tcdsdev.tcdsda_freq = 25000000; 299 tcdsdev.tcdsda_period = 5; 300 } 301 if (sc->sc_flags & TCDSF_BASEBOARD) 302 tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94; 303 else 304 tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96; 305 306 tcds_scsi_reset(tcdsdev.tcdsda_sc); 307 308 locs[TCDSCF_CHIP] = i; 309 310 config_found_sm_loc(self, "tcds", locs, &tcdsdev, 311 tcdsprint, config_stdsubmatch); 312 #ifdef __alpha__ 313 /* 314 * The second SCSI chip isn't present on the baseboard TCDS 315 * on the DEC Alpha 3000/300 series. 316 */ 317 if (sc->sc_flags & TCDSF_BASEBOARD && 318 cputype == ST_DEC_3000_300) 319 break; 320 #endif /* __alpha__ */ 321 } 322 } 323 324 int 325 tcdsprint(aux, pnp) 326 void *aux; 327 const char *pnp; 328 { 329 struct tcdsdev_attach_args *tcdsdev = aux; 330 331 /* Only ASCs can attach to TCDSs; easy. */ 332 if (pnp) 333 aprint_normal("asc at %s", pnp); 334 335 aprint_normal(" chip %d", tcdsdev->tcdsda_chip); 336 337 return (UNCONF); 338 } 339 340 void 341 tcds_intr_establish(tcds, slot, func, arg) 342 struct device *tcds; 343 int slot; 344 int (*func)(void *); 345 void *arg; 346 { 347 struct tcds_softc *sc = (struct tcds_softc *)tcds; 348 349 if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull) 350 panic("tcds_intr_establish: chip %d twice", slot); 351 352 sc->sc_slots[slot].sc_intrhand = func; 353 sc->sc_slots[slot].sc_intrarg = arg; 354 tcds_scsi_reset(&sc->sc_slots[slot]); 355 } 356 357 void 358 tcds_intr_disestablish(tcds, slot) 359 struct device *tcds; 360 int slot; 361 { 362 struct tcds_softc *sc = (struct tcds_softc *)tcds; 363 364 if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull) 365 panic("tcds_intr_disestablish: chip %d missing intr", 366 slot); 367 368 sc->sc_slots[slot].sc_intrhand = tcds_intrnull; 369 sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot; 370 371 tcds_dma_enable(&sc->sc_slots[slot], 0); 372 tcds_scsi_enable(&sc->sc_slots[slot], 0); 373 } 374 375 int 376 tcds_intrnull(val) 377 void *val; 378 { 379 380 panic("tcds_intrnull: uncaught TCDS intr for chip %lu", 381 (u_long)val); 382 } 383 384 void 385 tcds_scsi_reset(sc) 386 struct tcds_slotconfig *sc; 387 { 388 u_int32_t cir; 389 390 tcds_dma_enable(sc, 0); 391 tcds_scsi_enable(sc, 0); 392 393 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 394 TCDS_CIR_CLR(cir, sc->sc_resetbits); 395 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 396 397 DELAY(1); 398 399 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 400 TCDS_CIR_SET(cir, sc->sc_resetbits); 401 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 402 403 tcds_scsi_enable(sc, 1); 404 tcds_dma_enable(sc, 1); 405 } 406 407 void 408 tcds_scsi_enable(sc, on) 409 struct tcds_slotconfig *sc; 410 int on; 411 { 412 u_int32_t imer; 413 414 imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER); 415 416 if (on) 417 imer |= sc->sc_intrmaskbits; 418 else 419 imer &= ~sc->sc_intrmaskbits; 420 421 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer); 422 } 423 424 void 425 tcds_dma_enable(sc, on) 426 struct tcds_slotconfig *sc; 427 int on; 428 { 429 u_int32_t cir; 430 431 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 432 433 /* XXX Clear/set IOSLOT/PBS bits. */ 434 if (on) 435 TCDS_CIR_SET(cir, sc->sc_dmabits); 436 else 437 TCDS_CIR_CLR(cir, sc->sc_dmabits); 438 439 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 440 } 441 442 int 443 tcds_scsi_isintr(sc, clear) 444 struct tcds_slotconfig *sc; 445 int clear; 446 { 447 u_int32_t cir; 448 449 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 450 451 if ((cir & sc->sc_intrbits) != 0) { 452 if (clear) { 453 TCDS_CIR_CLR(cir, sc->sc_intrbits); 454 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, 455 cir); 456 } 457 return (1); 458 } else 459 return (0); 460 } 461 462 int 463 tcds_scsi_iserr(sc) 464 struct tcds_slotconfig *sc; 465 { 466 u_int32_t cir; 467 468 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 469 return ((cir & sc->sc_errorbits) != 0); 470 } 471 472 int 473 tcds_intr(arg) 474 void *arg; 475 { 476 struct tcds_softc *sc = arg; 477 u_int32_t ir, ir0; 478 479 /* 480 * XXX 481 * Copy and clear (gag!) the interrupts. 482 */ 483 ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 484 TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR); 485 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0); 486 tc_syncbus(); 487 488 #define INCRINTRCNT(slot) sc->sc_slots[slot].sc_evcnt.ev_count++ 489 490 #define CHECKINTR(slot) \ 491 if (ir & sc->sc_slots[slot].sc_intrbits) { \ 492 INCRINTRCNT(slot); \ 493 (void)(*sc->sc_slots[slot].sc_intrhand) \ 494 (sc->sc_slots[slot].sc_intrarg); \ 495 } 496 CHECKINTR(0); 497 CHECKINTR(1); 498 #undef CHECKINTR 499 500 #ifdef DIAGNOSTIC 501 /* 502 * Interrupts not currently handled, but would like to know if they 503 * occur. 504 * 505 * XXX 506 * Don't know if we have to set the interrupt mask and enable bits 507 * in the IMER to allow some of them to happen? 508 */ 509 #define PRINTINTR(msg, bits) \ 510 if (ir & bits) \ 511 printf("%s: %s", sc->sc_dv.dv_xname, msg); 512 PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ); 513 PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ); 514 PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH); 515 PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH); 516 PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA); 517 PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA); 518 PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB); 519 PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB); 520 PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR); 521 PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR); 522 PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR); 523 PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR); 524 PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR); 525 PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR); 526 #undef PRINTINTR 527 #endif 528 529 /* 530 * XXX 531 * The MACH source had this, with the comment: 532 * This is wrong, but machine keeps dying. 533 */ 534 DELAY(1); 535 536 return (1); 537 } 538 539 void 540 tcds_params(sc, chip, idp, fastp) 541 struct tcds_softc *sc; 542 int chip, *idp, *fastp; 543 { 544 int id, fast; 545 u_int32_t ids; 546 547 #ifdef __alpha__ 548 if (sc->sc_flags & TCDSF_BASEBOARD) { 549 extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[]; 550 551 id = dec_3000_scsiid[chip]; 552 fast = dec_3000_scsifast[chip]; 553 } else 554 #endif /* __alpha__ */ 555 { 556 /* 557 * SCSI IDs are stored in the EEPROM, along with whether or 558 * not the device is "fast". Chip 0 is the high nibble, 559 * chip 1 the low nibble. 560 */ 561 ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS); 562 if (chip == 0) 563 ids >>= 4; 564 565 id = ids & 0x7; 566 fast = ids & 0x8; 567 } 568 569 if (id < 0 || id > 7) { 570 printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n", 571 sc->sc_dv.dv_xname, id, chip); 572 id = 7; 573 } 574 575 if (fast) 576 printf("%s: fast mode set for chip %d\n", 577 sc->sc_dv.dv_xname, chip); 578 579 *idp = id; 580 *fastp = fast; 581 } 582
Indexes created Wed Sep 24 05:09:52 GMT 2025