auvitek_i2c.c revision 1.9 1 1.9 thorpej /* $NetBSD: auvitek_i2c.c,v 1.9 2025/09/15 13:23:03 thorpej Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2010 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill /*
30 1.1 jmcneill * Auvitek AU0828 USB controller - I2C access ops
31 1.1 jmcneill */
32 1.1 jmcneill
33 1.1 jmcneill #include <sys/cdefs.h>
34 1.9 thorpej __KERNEL_RCSID(0, "$NetBSD: auvitek_i2c.c,v 1.9 2025/09/15 13:23:03 thorpej Exp $");
35 1.4 skrll
36 1.4 skrll #ifdef _KERNEL_OPT
37 1.4 skrll #include "opt_usb.h"
38 1.4 skrll #endif
39 1.1 jmcneill
40 1.1 jmcneill #include <sys/param.h>
41 1.1 jmcneill #include <sys/systm.h>
42 1.1 jmcneill #include <sys/device.h>
43 1.1 jmcneill #include <sys/conf.h>
44 1.1 jmcneill #include <sys/bus.h>
45 1.1 jmcneill #include <sys/module.h>
46 1.1 jmcneill
47 1.1 jmcneill #include <dev/usb/usb.h>
48 1.1 jmcneill #include <dev/usb/usbdi.h>
49 1.1 jmcneill #include <dev/usb/usbdi_util.h>
50 1.1 jmcneill #include <dev/usb/usbdevs.h>
51 1.1 jmcneill
52 1.1 jmcneill #include <dev/i2c/i2cvar.h>
53 1.1 jmcneill
54 1.1 jmcneill #include <dev/usb/auvitekreg.h>
55 1.1 jmcneill #include <dev/usb/auvitekvar.h>
56 1.1 jmcneill
57 1.3 jmcneill /* #define AUVITEK_I2C_DEBUG */
58 1.3 jmcneill
59 1.1 jmcneill static int auvitek_i2c_exec(void *, i2c_op_t, i2c_addr_t,
60 1.1 jmcneill const void *, size_t, void *, size_t, int);
61 1.1 jmcneill
62 1.1 jmcneill static int auvitek_i2c_read(struct auvitek_softc *, i2c_addr_t,
63 1.1 jmcneill uint8_t *, size_t);
64 1.1 jmcneill static int auvitek_i2c_write(struct auvitek_softc *, i2c_addr_t,
65 1.1 jmcneill const uint8_t *, size_t);
66 1.1 jmcneill static bool auvitek_i2c_wait(struct auvitek_softc *);
67 1.1 jmcneill static bool auvitek_i2c_wait_rdack(struct auvitek_softc *);
68 1.1 jmcneill static bool auvitek_i2c_wait_rddone(struct auvitek_softc *);
69 1.1 jmcneill static bool auvitek_i2c_wait_wrdone(struct auvitek_softc *);
70 1.1 jmcneill
71 1.1 jmcneill int
72 1.1 jmcneill auvitek_i2c_attach(struct auvitek_softc *sc)
73 1.1 jmcneill {
74 1.8 riastrad
75 1.5 thorpej iic_tag_init(&sc->sc_i2c);
76 1.1 jmcneill sc->sc_i2c.ic_cookie = sc;
77 1.1 jmcneill sc->sc_i2c.ic_exec = auvitek_i2c_exec;
78 1.1 jmcneill
79 1.3 jmcneill auvitek_i2c_rescan(sc, NULL, NULL);
80 1.3 jmcneill
81 1.8 riastrad sc->sc_i2c_attached = true;
82 1.8 riastrad
83 1.1 jmcneill return 0;
84 1.1 jmcneill }
85 1.1 jmcneill
86 1.1 jmcneill int
87 1.1 jmcneill auvitek_i2c_detach(struct auvitek_softc *sc, int flags)
88 1.1 jmcneill {
89 1.8 riastrad
90 1.8 riastrad if (!sc->sc_i2c_attached)
91 1.8 riastrad return 0;
92 1.8 riastrad
93 1.5 thorpej iic_tag_fini(&sc->sc_i2c);
94 1.1 jmcneill
95 1.1 jmcneill return 0;
96 1.1 jmcneill }
97 1.1 jmcneill
98 1.3 jmcneill void
99 1.3 jmcneill auvitek_i2c_rescan(struct auvitek_softc *sc, const char *ifattr,
100 1.3 jmcneill const int *locs)
101 1.3 jmcneill {
102 1.3 jmcneill #ifdef AUVITEK_I2C_DEBUG
103 1.3 jmcneill if (ifattr_match(ifattr, "i2cbus") && sc->sc_i2cdev == NULL) {
104 1.9 thorpej sc->sc_i2cdev = iicbus_attach(sc->sc_dev, &sc->sc_i2c);
105 1.3 jmcneill }
106 1.3 jmcneill #endif
107 1.3 jmcneill }
108 1.3 jmcneill
109 1.3 jmcneill void
110 1.3 jmcneill auvitek_i2c_childdet(struct auvitek_softc *sc, device_t child)
111 1.3 jmcneill {
112 1.3 jmcneill if (sc->sc_i2cdev == child)
113 1.3 jmcneill sc->sc_i2cdev = NULL;
114 1.3 jmcneill }
115 1.3 jmcneill
116 1.1 jmcneill static int
117 1.1 jmcneill auvitek_i2c_exec(void *opaque, i2c_op_t op, i2c_addr_t addr,
118 1.1 jmcneill const void *cmd, size_t cmdlen, void *vbuf, size_t buflen, int flags)
119 1.1 jmcneill {
120 1.1 jmcneill struct auvitek_softc *sc = opaque;
121 1.1 jmcneill
122 1.1 jmcneill if (I2C_OP_READ_P(op))
123 1.1 jmcneill return auvitek_i2c_read(sc, addr, vbuf, buflen);
124 1.1 jmcneill else
125 1.1 jmcneill return auvitek_i2c_write(sc, addr, cmd, cmdlen);
126 1.1 jmcneill }
127 1.1 jmcneill
128 1.1 jmcneill static int
129 1.1 jmcneill auvitek_i2c_read(struct auvitek_softc *sc, i2c_addr_t addr,
130 1.1 jmcneill uint8_t *buf, size_t buflen)
131 1.1 jmcneill {
132 1.1 jmcneill uint8_t v;
133 1.1 jmcneill unsigned int i;
134 1.1 jmcneill
135 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_MBMODE, 1);
136 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_CLKDIV, sc->sc_i2c_clkdiv);
137 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_DSTADDR, addr << 1);
138 1.1 jmcneill
139 1.1 jmcneill if (buflen == 0) {
140 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_TRIGGER,
141 1.1 jmcneill AU0828_I2C_TRIGGER_RD);
142 1.1 jmcneill if (auvitek_i2c_wait_rdack(sc) == false)
143 1.1 jmcneill return EBUSY;
144 1.1 jmcneill return 0;
145 1.1 jmcneill }
146 1.1 jmcneill
147 1.1 jmcneill for (i = 0; i < buflen; i++) {
148 1.1 jmcneill v = AU0828_I2C_TRIGGER_RD;
149 1.1 jmcneill if (i < (buflen - 1))
150 1.1 jmcneill v |= AU0828_I2C_TRIGGER_HOLD;
151 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_TRIGGER, v);
152 1.1 jmcneill
153 1.1 jmcneill if (auvitek_i2c_wait_rddone(sc) == false)
154 1.1 jmcneill return EBUSY;
155 1.1 jmcneill
156 1.1 jmcneill buf[i] = auvitek_read_1(sc, AU0828_REG_I2C_FIFORD);
157 1.1 jmcneill }
158 1.1 jmcneill
159 1.1 jmcneill if (auvitek_i2c_wait(sc) == false)
160 1.1 jmcneill return EBUSY;
161 1.1 jmcneill
162 1.1 jmcneill return 0;
163 1.1 jmcneill }
164 1.1 jmcneill
165 1.1 jmcneill static int
166 1.1 jmcneill auvitek_i2c_write(struct auvitek_softc *sc, i2c_addr_t addr,
167 1.1 jmcneill const uint8_t *buf, size_t buflen)
168 1.1 jmcneill {
169 1.1 jmcneill uint8_t v;
170 1.1 jmcneill unsigned int i, fifolen;
171 1.1 jmcneill
172 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_MBMODE, 1);
173 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_CLKDIV, sc->sc_i2c_clkdiv);
174 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_DSTADDR, addr << 1);
175 1.1 jmcneill
176 1.1 jmcneill if (buflen == 0) {
177 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_TRIGGER,
178 1.1 jmcneill AU0828_I2C_TRIGGER_RD);
179 1.1 jmcneill if (auvitek_i2c_wait(sc) == false)
180 1.1 jmcneill return EBUSY;
181 1.1 jmcneill if (auvitek_i2c_wait_rdack(sc) == false)
182 1.1 jmcneill return EBUSY;
183 1.1 jmcneill return 0;
184 1.1 jmcneill }
185 1.1 jmcneill
186 1.1 jmcneill fifolen = 0;
187 1.1 jmcneill for (i = 0; i < buflen; i++) {
188 1.1 jmcneill v = AU0828_I2C_TRIGGER_WR;
189 1.1 jmcneill if (i < (buflen - 1))
190 1.1 jmcneill v |= AU0828_I2C_TRIGGER_HOLD;
191 1.1 jmcneill
192 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_FIFOWR, buf[i]);
193 1.1 jmcneill ++fifolen;
194 1.1 jmcneill
195 1.1 jmcneill if (fifolen == 4 || i == (buflen - 1)) {
196 1.1 jmcneill auvitek_write_1(sc, AU0828_REG_I2C_TRIGGER, v);
197 1.1 jmcneill fifolen = 0;
198 1.1 jmcneill
199 1.1 jmcneill if (auvitek_i2c_wait_wrdone(sc) == false)
200 1.1 jmcneill return EBUSY;
201 1.1 jmcneill }
202 1.1 jmcneill }
203 1.1 jmcneill
204 1.1 jmcneill if (auvitek_i2c_wait(sc) == false)
205 1.1 jmcneill return EBUSY;
206 1.1 jmcneill
207 1.1 jmcneill return 0;
208 1.1 jmcneill }
209 1.1 jmcneill
210 1.1 jmcneill static bool
211 1.1 jmcneill auvitek_i2c_wait(struct auvitek_softc *sc)
212 1.1 jmcneill {
213 1.1 jmcneill uint8_t status;
214 1.1 jmcneill int retry = 1000;
215 1.1 jmcneill
216 1.1 jmcneill while (--retry > 0) {
217 1.1 jmcneill status = auvitek_read_1(sc, AU0828_REG_I2C_STATUS);
218 1.1 jmcneill if (!(status & AU0828_I2C_STATUS_BUSY))
219 1.1 jmcneill break;
220 1.1 jmcneill delay(10);
221 1.1 jmcneill }
222 1.1 jmcneill if (retry == 0)
223 1.1 jmcneill return false;
224 1.1 jmcneill
225 1.1 jmcneill return true;
226 1.1 jmcneill }
227 1.1 jmcneill
228 1.1 jmcneill static bool
229 1.1 jmcneill auvitek_i2c_wait_rdack(struct auvitek_softc *sc)
230 1.1 jmcneill {
231 1.1 jmcneill uint8_t status;
232 1.1 jmcneill int retry = 1000;
233 1.1 jmcneill
234 1.1 jmcneill while (--retry > 0) {
235 1.1 jmcneill status = auvitek_read_1(sc, AU0828_REG_I2C_STATUS);
236 1.1 jmcneill if (!(status & AU0828_I2C_STATUS_NO_RD_ACK))
237 1.1 jmcneill break;
238 1.1 jmcneill delay(10);
239 1.1 jmcneill }
240 1.1 jmcneill if (retry == 0)
241 1.1 jmcneill return false;
242 1.1 jmcneill
243 1.1 jmcneill return true;
244 1.1 jmcneill }
245 1.1 jmcneill
246 1.1 jmcneill static bool
247 1.1 jmcneill auvitek_i2c_wait_rddone(struct auvitek_softc *sc)
248 1.1 jmcneill {
249 1.1 jmcneill uint8_t status;
250 1.1 jmcneill int retry = 1000;
251 1.1 jmcneill
252 1.1 jmcneill while (--retry > 0) {
253 1.1 jmcneill status = auvitek_read_1(sc, AU0828_REG_I2C_STATUS);
254 1.1 jmcneill if (status & AU0828_I2C_STATUS_RD_DONE)
255 1.1 jmcneill break;
256 1.1 jmcneill delay(10);
257 1.1 jmcneill }
258 1.1 jmcneill if (retry == 0)
259 1.1 jmcneill return false;
260 1.1 jmcneill
261 1.1 jmcneill return true;
262 1.1 jmcneill }
263 1.1 jmcneill
264 1.1 jmcneill static bool
265 1.1 jmcneill auvitek_i2c_wait_wrdone(struct auvitek_softc *sc)
266 1.1 jmcneill {
267 1.1 jmcneill uint8_t status;
268 1.1 jmcneill int retry = 1000;
269 1.1 jmcneill
270 1.1 jmcneill while (--retry > 0) {
271 1.1 jmcneill status = auvitek_read_1(sc, AU0828_REG_I2C_STATUS);
272 1.1 jmcneill if (status & AU0828_I2C_STATUS_WR_DONE)
273 1.1 jmcneill break;
274 1.1 jmcneill delay(10);
275 1.1 jmcneill }
276 1.1 jmcneill if (retry == 0)
277 1.1 jmcneill return false;
278 1.1 jmcneill
279 1.1 jmcneill return true;
280 1.1 jmcneill }
281