1 1.1 jmcneill /* $NetBSD: auvitekreg.h,v 1.1 2010/12/27 15:42:11 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /*- 4 1.1 jmcneill * Copyright (c) 2010 Jared D. McNeill <jmcneill (at) invisible.ca> 5 1.1 jmcneill * All rights reserved. 6 1.1 jmcneill * 7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without 8 1.1 jmcneill * modification, are permitted provided that the following conditions 9 1.1 jmcneill * are met: 10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright 11 1.1 jmcneill * notice, this list of conditions and the following disclaimer. 12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the 14 1.1 jmcneill * documentation and/or other materials provided with the distribution. 15 1.1 jmcneill * 16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE. 27 1.1 jmcneill */ 28 1.1 jmcneill 29 1.1 jmcneill #ifndef _AUVITEKREG_H 30 1.1 jmcneill #define _AUVITEKREG_H 31 1.1 jmcneill 32 1.1 jmcneill #define AU0828_CMD_REQUEST_IN 0x00 33 1.1 jmcneill #define AU0828_CMD_REQUEST_OUT 0x01 34 1.1 jmcneill 35 1.1 jmcneill #define AU0828_REG_GPIO1_OUTEN 0x0000 36 1.1 jmcneill #define AU0828_REG_GPIO2_OUTEN 0x0001 37 1.1 jmcneill #define AU0828_REG_GPIO1_PINDIR 0x0002 38 1.1 jmcneill #define AU0828_REG_GPIO2_PINDIR 0x0003 39 1.1 jmcneill 40 1.1 jmcneill #define AU0828_REG_SENSOR_CTL 0x0100 41 1.1 jmcneill #define AU0828_REG_SENSORVBI_CTL 0x0103 42 1.1 jmcneill 43 1.1 jmcneill #define AU0828_REG_HPOS_LO 0x0110 44 1.1 jmcneill #define AU0828_REG_HPOS_HI 0x0111 45 1.1 jmcneill #define AU0828_REG_VPOS_LO 0x0112 46 1.1 jmcneill #define AU0828_REG_VPOS_HI 0x0113 47 1.1 jmcneill #define AU0828_REG_HRES_LO 0x0114 48 1.1 jmcneill #define AU0828_REG_HRES_HI 0x0115 49 1.1 jmcneill #define AU0828_REG_VRES_LO 0x0116 50 1.1 jmcneill #define AU0828_REG_VRES_HI 0x0117 51 1.1 jmcneill 52 1.1 jmcneill #define AU0828_REG_I2C_TRIGGER 0x0200 53 1.1 jmcneill #define AU0828_I2C_TRIGGER_WR 0x01 54 1.1 jmcneill #define AU0828_I2C_TRIGGER_RD 0x20 55 1.1 jmcneill #define AU0828_I2C_TRIGGER_HOLD 0x40 56 1.1 jmcneill #define AU0828_REG_I2C_STATUS 0x0201 57 1.1 jmcneill #define AU0828_I2C_STATUS_RD_DONE 0x01 58 1.1 jmcneill #define AU0828_I2C_STATUS_NO_RD_ACK 0x02 59 1.1 jmcneill #define AU0828_I2C_STATUS_WR_DONE 0x04 60 1.1 jmcneill #define AU0828_I2C_STATUS_NO_WR_ACK 0x08 61 1.1 jmcneill #define AU0828_I2C_STATUS_BUSY 0x10 62 1.1 jmcneill #define AU0828_REG_I2C_CLKDIV 0x0202 63 1.1 jmcneill #define AU0828_I2C_CLKDIV_250 0x07 64 1.1 jmcneill #define AU0828_I2C_CLKDIV_100 0x14 65 1.1 jmcneill #define AU0828_I2C_CLKDIV_30 0x40 66 1.1 jmcneill #define AU0828_REG_I2C_DSTADDR 0x0203 67 1.1 jmcneill #define AU0828_REG_I2C_FIFOWR 0x0205 68 1.1 jmcneill #define AU0828_REG_I2C_FIFORD 0x0209 69 1.1 jmcneill #define AU0828_REG_I2C_MBMODE 0x02ff 70 1.1 jmcneill 71 1.1 jmcneill #define AU0828_REG_AUDIOCTL 0x050c 72 1.1 jmcneill 73 1.1 jmcneill #define AU0828_REG_POWER_CTL 0x0600 74 1.1 jmcneill #define AU0828_POWER_EN 0x10 75 1.1 jmcneill 76 1.1 jmcneill #endif /* !_AUVITEKREG_H */ 77
Indexes created Fri Sep 26 20:09:58 GMT 2025