ehci.c revision 1.10 1 1.10 augustss /* $NetBSD: ehci.c,v 1.10 2001/11/19 02:57:16 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.5 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss * 3. All advertising materials mentioning features or use of this software
19 1.1 augustss * must display the following acknowledgement:
20 1.1 augustss * This product includes software developed by the NetBSD
21 1.1 augustss * Foundation, Inc. and its contributors.
22 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 augustss * contributors may be used to endorse or promote products derived
24 1.1 augustss * from this software without specific prior written permission.
25 1.1 augustss *
26 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
37 1.1 augustss */
38 1.1 augustss
39 1.1 augustss /*
40 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 1.1 augustss *
42 1.5 augustss * The EHCI 0.96 spec can be found at
43 1.3 augustss * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
44 1.7 augustss * and the USB 2.0 spec at
45 1.7 augustss * http://www.usb.org/developers/data/usb_20.zip
46 1.1 augustss *
47 1.1 augustss */
48 1.4 lukem
49 1.4 lukem #include <sys/cdefs.h>
50 1.10 augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.10 2001/11/19 02:57:16 augustss Exp $");
51 1.1 augustss
52 1.1 augustss #include <sys/param.h>
53 1.1 augustss #include <sys/systm.h>
54 1.1 augustss #include <sys/kernel.h>
55 1.1 augustss #include <sys/malloc.h>
56 1.1 augustss #include <sys/device.h>
57 1.1 augustss #include <sys/select.h>
58 1.1 augustss #include <sys/proc.h>
59 1.1 augustss #include <sys/queue.h>
60 1.1 augustss
61 1.1 augustss #include <machine/bus.h>
62 1.1 augustss #include <machine/endian.h>
63 1.1 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.1 augustss #include <dev/usb/usb_mem.h>
68 1.1 augustss #include <dev/usb/usb_quirks.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ehcireg.h>
71 1.1 augustss #include <dev/usb/ehcivar.h>
72 1.1 augustss
73 1.1 augustss #ifdef EHCI_DEBUG
74 1.1 augustss #define DPRINTF(x) if (ehcidebug) printf x
75 1.1 augustss #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
76 1.6 augustss int ehcidebug = 0;
77 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
78 1.1 augustss #else
79 1.1 augustss #define DPRINTF(x)
80 1.1 augustss #define DPRINTFN(n,x)
81 1.1 augustss #endif
82 1.1 augustss
83 1.5 augustss struct ehci_pipe {
84 1.5 augustss struct usbd_pipe pipe;
85 1.10 augustss ehci_soft_qh_t *sqh;
86 1.10 augustss union {
87 1.10 augustss ehci_soft_qtd_t *qtd;
88 1.10 augustss /* ehci_soft_itd_t *itd; */
89 1.10 augustss } tail;
90 1.10 augustss union {
91 1.10 augustss /* Control pipe */
92 1.10 augustss struct {
93 1.10 augustss usb_dma_t reqdma;
94 1.10 augustss u_int length;
95 1.10 augustss ehci_soft_qtd_t *setup, *data, *stat;
96 1.10 augustss } ctl;
97 1.10 augustss /* Interrupt pipe */
98 1.10 augustss /* Bulk pipe */
99 1.10 augustss struct {
100 1.10 augustss u_int length;
101 1.10 augustss int isread;
102 1.10 augustss } bulk;
103 1.10 augustss /* Iso pipe */
104 1.10 augustss } u;
105 1.5 augustss };
106 1.5 augustss
107 1.5 augustss Static void ehci_shutdown(void *);
108 1.5 augustss Static void ehci_power(int, void *);
109 1.5 augustss
110 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
111 1.5 augustss Static void ehci_poll(struct usbd_bus *);
112 1.5 augustss Static void ehci_softintr(void *);
113 1.5 augustss
114 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
115 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
116 1.5 augustss
117 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
118 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
119 1.5 augustss
120 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
121 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
122 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
123 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
124 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
125 1.5 augustss
126 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
127 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
128 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
129 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
130 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
131 1.5 augustss
132 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
133 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
134 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
135 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
136 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
137 1.5 augustss
138 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
139 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
140 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
141 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
142 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
143 1.5 augustss
144 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
145 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
146 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
147 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
148 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
149 1.5 augustss
150 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
151 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
152 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
153 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
154 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
155 1.5 augustss
156 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
157 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
158 1.5 augustss
159 1.5 augustss Static int ehci_str(usb_string_descriptor_t *, int, char *);
160 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
161 1.6 augustss Static void ehci_pcd_able(ehci_softc_t *, int);
162 1.6 augustss Static void ehci_pcd_enable(void *);
163 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
164 1.5 augustss
165 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
166 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
167 1.9 augustss
168 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
169 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
170 1.9 augustss
171 1.9 augustss Static void ehci_hash_add_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
172 1.9 augustss Static void ehci_hash_rem_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
173 1.9 augustss Static ehci_soft_qtd_t *ehci_hash_find_qtd(ehci_softc_t *, ehci_physaddr_t);
174 1.10 augustss Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
175 1.10 augustss Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
176 1.10 augustss ehci_soft_qh_t *);
177 1.10 augustss
178 1.10 augustss Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
179 1.10 augustss Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
180 1.9 augustss
181 1.5 augustss #ifdef EHCI_DEBUG
182 1.5 augustss Static void ehci_dumpregs(ehci_softc_t *);
183 1.6 augustss Static void ehci_dump(void);
184 1.6 augustss Static ehci_softc_t *theehci;
185 1.9 augustss Static void ehci_dump_link(ehci_link_t);
186 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
187 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
188 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
189 1.5 augustss #endif
190 1.5 augustss
191 1.5 augustss #define EHCI_INTR_ENDPT 1
192 1.5 augustss
193 1.5 augustss Static struct usbd_bus_methods ehci_bus_methods = {
194 1.5 augustss ehci_open,
195 1.5 augustss ehci_softintr,
196 1.5 augustss ehci_poll,
197 1.5 augustss ehci_allocm,
198 1.5 augustss ehci_freem,
199 1.5 augustss ehci_allocx,
200 1.5 augustss ehci_freex,
201 1.5 augustss };
202 1.5 augustss
203 1.5 augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
204 1.5 augustss ehci_root_ctrl_transfer,
205 1.5 augustss ehci_root_ctrl_start,
206 1.5 augustss ehci_root_ctrl_abort,
207 1.5 augustss ehci_root_ctrl_close,
208 1.5 augustss ehci_noop,
209 1.5 augustss ehci_root_ctrl_done,
210 1.5 augustss };
211 1.5 augustss
212 1.5 augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
213 1.5 augustss ehci_root_intr_transfer,
214 1.5 augustss ehci_root_intr_start,
215 1.5 augustss ehci_root_intr_abort,
216 1.5 augustss ehci_root_intr_close,
217 1.5 augustss ehci_noop,
218 1.5 augustss ehci_root_intr_done,
219 1.5 augustss };
220 1.5 augustss
221 1.5 augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
222 1.5 augustss ehci_device_ctrl_transfer,
223 1.5 augustss ehci_device_ctrl_start,
224 1.5 augustss ehci_device_ctrl_abort,
225 1.5 augustss ehci_device_ctrl_close,
226 1.5 augustss ehci_noop,
227 1.5 augustss ehci_device_ctrl_done,
228 1.5 augustss };
229 1.5 augustss
230 1.5 augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
231 1.5 augustss ehci_device_intr_transfer,
232 1.5 augustss ehci_device_intr_start,
233 1.5 augustss ehci_device_intr_abort,
234 1.5 augustss ehci_device_intr_close,
235 1.5 augustss ehci_device_clear_toggle,
236 1.5 augustss ehci_device_intr_done,
237 1.5 augustss };
238 1.5 augustss
239 1.5 augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
240 1.5 augustss ehci_device_bulk_transfer,
241 1.5 augustss ehci_device_bulk_start,
242 1.5 augustss ehci_device_bulk_abort,
243 1.5 augustss ehci_device_bulk_close,
244 1.5 augustss ehci_device_clear_toggle,
245 1.5 augustss ehci_device_bulk_done,
246 1.5 augustss };
247 1.5 augustss
248 1.5 augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
249 1.5 augustss ehci_device_isoc_transfer,
250 1.5 augustss ehci_device_isoc_start,
251 1.5 augustss ehci_device_isoc_abort,
252 1.5 augustss ehci_device_isoc_close,
253 1.5 augustss ehci_noop,
254 1.5 augustss ehci_device_isoc_done,
255 1.5 augustss };
256 1.5 augustss
257 1.1 augustss usbd_status
258 1.1 augustss ehci_init(ehci_softc_t *sc)
259 1.1 augustss {
260 1.3 augustss u_int32_t version, sparams, cparams, hcr;
261 1.3 augustss u_int i;
262 1.3 augustss usbd_status err;
263 1.3 augustss
264 1.3 augustss DPRINTF(("ehci_init: start\n"));
265 1.6 augustss #ifdef EHCI_DEBUG
266 1.6 augustss theehci = sc;
267 1.6 augustss #endif
268 1.3 augustss
269 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
270 1.3 augustss
271 1.3 augustss version = EREAD2(sc, EHCI_HCIVERSION);
272 1.3 augustss printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
273 1.3 augustss version >> 8, version & 0xff);
274 1.3 augustss
275 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
276 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
277 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
278 1.3 augustss if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
279 1.3 augustss printf("%s: wrong number of companions (%d != %d)\n",
280 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
281 1.3 augustss EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
282 1.3 augustss return (USBD_IOERROR);
283 1.3 augustss }
284 1.3 augustss if (sc->sc_ncomp > 0) {
285 1.3 augustss printf("%s: companion controller%s, %d port%s each:",
286 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
287 1.3 augustss EHCI_HCS_N_PCC(sparams),
288 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
289 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
290 1.3 augustss printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
291 1.3 augustss printf("\n");
292 1.3 augustss }
293 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
294 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
295 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
296 1.3 augustss
297 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
298 1.3 augustss
299 1.9 augustss for (i = 0; i < EHCI_HASH_SIZE; i++)
300 1.9 augustss LIST_INIT(&sc->sc_hash_qtds[i]);
301 1.9 augustss
302 1.3 augustss /* Reset the controller */
303 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
304 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
305 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
306 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
307 1.3 augustss for (i = 0; i < 100; i++) {
308 1.3 augustss delay(10);
309 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
310 1.3 augustss if (!hcr)
311 1.3 augustss break;
312 1.3 augustss }
313 1.3 augustss if (hcr) {
314 1.3 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
315 1.3 augustss return (USBD_IOERROR);
316 1.3 augustss }
317 1.3 augustss
318 1.3 augustss /* frame list size at default, read back what we got and use that */
319 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
320 1.3 augustss case 0: sc->sc_flsize = 1024*4; break;
321 1.3 augustss case 1: sc->sc_flsize = 512*4; break;
322 1.3 augustss case 2: sc->sc_flsize = 256*4; break;
323 1.3 augustss case 3: return (USBD_IOERROR);
324 1.3 augustss }
325 1.3 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
326 1.3 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
327 1.3 augustss if (err)
328 1.3 augustss return (err);
329 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
330 1.3 augustss
331 1.5 augustss /* Set up the bus struct. */
332 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
333 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
334 1.5 augustss
335 1.5 augustss sc->sc_powerhook = powerhook_establish(ehci_power, sc);
336 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
337 1.5 augustss
338 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
339 1.6 augustss
340 1.9 augustss /* Allocate dummy QH that starts the bulk list. */
341 1.9 augustss sc->sc_bulk_head = ehci_alloc_sqh(sc);
342 1.9 augustss if (sc->sc_bulk_head == NULL) {
343 1.9 augustss err = USBD_NOMEM;
344 1.9 augustss goto bad1;
345 1.9 augustss }
346 1.9 augustss memset(&sc->sc_bulk_head->qh, 0, sizeof(ehci_qtd_t));
347 1.10 augustss sc->sc_bulk_head->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE);
348 1.9 augustss sc->sc_bulk_head->qh.qh_qtd.qtd_status =
349 1.9 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
350 1.9 augustss sc->sc_bulk_head->qh.qh_link =
351 1.9 augustss htole32(EHCI_LINK_TERMINATE); /* XXX no bw reclaimation */
352 1.9 augustss sc->sc_bulk_head->next = NULL;
353 1.9 augustss #ifdef EHCI_DEBUG
354 1.9 augustss if (ehcidebug) {
355 1.9 augustss ehci_dump_sqh(sc->sc_bulk_head);
356 1.9 augustss }
357 1.9 augustss #endif
358 1.9 augustss
359 1.9 augustss /* Allocate dummy QH that starts the control list. */
360 1.9 augustss sc->sc_ctrl_head = ehci_alloc_sqh(sc);
361 1.9 augustss if (sc->sc_ctrl_head == NULL) {
362 1.9 augustss err = USBD_NOMEM;
363 1.9 augustss goto bad2;
364 1.9 augustss }
365 1.9 augustss memset(&sc->sc_ctrl_head->qh, 0, sizeof(ehci_qtd_t));
366 1.10 augustss sc->sc_ctrl_head->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE);
367 1.9 augustss sc->sc_ctrl_head->qh.qh_qtd.qtd_status =
368 1.9 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
369 1.9 augustss sc->sc_ctrl_head->qh.qh_endp = htole32(EHCI_QH_HRECL);
370 1.9 augustss sc->sc_ctrl_head->qh.qh_link =
371 1.9 augustss htole32(sc->sc_bulk_head->physaddr | EHCI_LINK_QH);
372 1.9 augustss sc->sc_ctrl_head = sc->sc_bulk_head;
373 1.9 augustss #ifdef EHCI_DEBUG
374 1.9 augustss if (ehcidebug) {
375 1.9 augustss ehci_dump_sqh(sc->sc_ctrl_head);
376 1.9 augustss }
377 1.9 augustss #endif
378 1.9 augustss
379 1.9 augustss /* Point to async list */
380 1.9 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR,
381 1.9 augustss sc->sc_ctrl_head->physaddr | EHCI_LINK_QH);
382 1.9 augustss
383 1.9 augustss usb_callout_init(sc->sc_tmo_pcd);
384 1.9 augustss
385 1.10 augustss lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
386 1.10 augustss
387 1.6 augustss /* Enable interrupts */
388 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
389 1.6 augustss
390 1.6 augustss /* Turn on controller */
391 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
392 1.6 augustss EHCI_CMD_ITC_8 | /* 8 microframes */
393 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
394 1.10 augustss EHCI_CMD_ASE |
395 1.6 augustss /* EHCI_CMD_PSE | */
396 1.6 augustss EHCI_CMD_RS);
397 1.6 augustss
398 1.6 augustss /* Take over port ownership */
399 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
400 1.6 augustss
401 1.8 augustss for (i = 0; i < 100; i++) {
402 1.8 augustss delay(10);
403 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
404 1.8 augustss if (!hcr)
405 1.8 augustss break;
406 1.8 augustss }
407 1.8 augustss if (hcr) {
408 1.8 augustss printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
409 1.8 augustss return (USBD_IOERROR);
410 1.8 augustss }
411 1.8 augustss
412 1.5 augustss return (USBD_NORMAL_COMPLETION);
413 1.9 augustss
414 1.9 augustss #if 0
415 1.9 augustss bad3:
416 1.9 augustss ehci_free_sqh(sc, sc->sc_bulk_head);
417 1.9 augustss #endif
418 1.9 augustss bad2:
419 1.9 augustss ehci_free_sqh(sc, sc->sc_ctrl_head);
420 1.9 augustss bad1:
421 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
422 1.9 augustss return (err);
423 1.1 augustss }
424 1.1 augustss
425 1.6 augustss Static int ehci_intr1(ehci_softc_t *);
426 1.6 augustss
427 1.1 augustss int
428 1.1 augustss ehci_intr(void *v)
429 1.1 augustss {
430 1.6 augustss ehci_softc_t *sc = v;
431 1.6 augustss
432 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
433 1.6 augustss if (sc->sc_bus.use_polling) {
434 1.6 augustss #ifdef DIAGNOSTIC
435 1.6 augustss printf("ehci_intr: ignored interrupt while polling\n");
436 1.6 augustss #endif
437 1.6 augustss return (0);
438 1.6 augustss }
439 1.6 augustss
440 1.6 augustss return (ehci_intr1(sc));
441 1.6 augustss }
442 1.6 augustss
443 1.6 augustss Static int
444 1.6 augustss ehci_intr1(ehci_softc_t *sc)
445 1.6 augustss {
446 1.6 augustss u_int32_t intrs, eintrs;
447 1.6 augustss
448 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
449 1.6 augustss
450 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
451 1.6 augustss if (sc == NULL) {
452 1.6 augustss #ifdef DIAGNOSTIC
453 1.6 augustss printf("ehci_intr: sc == NULL\n");
454 1.6 augustss #endif
455 1.6 augustss return (0);
456 1.6 augustss }
457 1.6 augustss
458 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
459 1.6 augustss
460 1.6 augustss if (!intrs)
461 1.6 augustss return (0);
462 1.6 augustss
463 1.6 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
464 1.6 augustss eintrs = intrs & sc->sc_eintrs;
465 1.6 augustss DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
466 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
467 1.6 augustss (u_int)eintrs));
468 1.6 augustss if (!eintrs)
469 1.6 augustss return (0);
470 1.6 augustss
471 1.6 augustss sc->sc_bus.intr_context++;
472 1.6 augustss sc->sc_bus.no_intrs++;
473 1.10 augustss if (eintrs & EHCI_STS_IAA) {
474 1.10 augustss DPRINTF(("ehci_intr1: door bell\n"));
475 1.10 augustss wakeup(&sc->sc_bulk_head);
476 1.10 augustss eintrs &= ~EHCI_STS_INT;
477 1.10 augustss }
478 1.6 augustss if (eintrs & EHCI_STS_INT) {
479 1.6 augustss DPRINTF(("ehci_intr1: something is done\n"));
480 1.6 augustss eintrs &= ~EHCI_STS_INT;
481 1.6 augustss }
482 1.6 augustss if (eintrs & EHCI_STS_ERRINT) {
483 1.6 augustss DPRINTF(("ehci_intr1: some error\n"));
484 1.6 augustss eintrs &= ~EHCI_STS_HSE;
485 1.6 augustss }
486 1.6 augustss if (eintrs & EHCI_STS_HSE) {
487 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
488 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
489 1.6 augustss /* XXX what else */
490 1.6 augustss }
491 1.6 augustss if (eintrs & EHCI_STS_PCD) {
492 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
493 1.6 augustss /*
494 1.6 augustss * Disable PCD interrupt for now, because it will be
495 1.6 augustss * on until the port has been reset.
496 1.6 augustss */
497 1.6 augustss ehci_pcd_able(sc, 0);
498 1.6 augustss /* Do not allow RHSC interrupts > 1 per second */
499 1.6 augustss usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
500 1.6 augustss eintrs &= ~EHCI_STS_PCD;
501 1.6 augustss }
502 1.6 augustss
503 1.6 augustss sc->sc_bus.intr_context--;
504 1.6 augustss
505 1.6 augustss if (eintrs != 0) {
506 1.6 augustss /* Block unprocessed interrupts. */
507 1.6 augustss sc->sc_eintrs &= ~eintrs;
508 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
509 1.6 augustss printf("%s: blocking intrs 0x%x\n",
510 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
511 1.6 augustss }
512 1.6 augustss
513 1.6 augustss return (1);
514 1.6 augustss }
515 1.6 augustss
516 1.6 augustss void
517 1.6 augustss ehci_pcd_able(ehci_softc_t *sc, int on)
518 1.6 augustss {
519 1.6 augustss DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
520 1.6 augustss if (on)
521 1.6 augustss sc->sc_eintrs |= EHCI_STS_PCD;
522 1.6 augustss else
523 1.6 augustss sc->sc_eintrs &= ~EHCI_STS_PCD;
524 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
525 1.6 augustss }
526 1.6 augustss
527 1.6 augustss void
528 1.6 augustss ehci_pcd_enable(void *v_sc)
529 1.6 augustss {
530 1.6 augustss ehci_softc_t *sc = v_sc;
531 1.6 augustss
532 1.6 augustss ehci_pcd_able(sc, 1);
533 1.6 augustss }
534 1.6 augustss
535 1.6 augustss void
536 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
537 1.6 augustss {
538 1.6 augustss usbd_pipe_handle pipe;
539 1.6 augustss struct ehci_pipe *opipe;
540 1.6 augustss u_char *p;
541 1.6 augustss int i, m;
542 1.6 augustss
543 1.6 augustss if (xfer == NULL) {
544 1.6 augustss /* Just ignore the change. */
545 1.6 augustss return;
546 1.6 augustss }
547 1.6 augustss
548 1.6 augustss pipe = xfer->pipe;
549 1.6 augustss opipe = (struct ehci_pipe *)pipe;
550 1.6 augustss
551 1.6 augustss p = KERNADDR(&xfer->dmabuf);
552 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
553 1.6 augustss memset(p, 0, xfer->length);
554 1.6 augustss for (i = 1; i <= m; i++) {
555 1.6 augustss /* Pick out CHANGE bits from the status reg. */
556 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
557 1.6 augustss p[i/8] |= 1 << (i%8);
558 1.6 augustss }
559 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
560 1.6 augustss xfer->actlen = xfer->length;
561 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
562 1.6 augustss
563 1.6 augustss usb_transfer_complete(xfer);
564 1.1 augustss }
565 1.1 augustss
566 1.5 augustss void
567 1.5 augustss ehci_softintr(void *v)
568 1.5 augustss {
569 1.5 augustss //ehci_softc_t *sc = v;
570 1.5 augustss }
571 1.5 augustss
572 1.5 augustss void
573 1.5 augustss ehci_poll(struct usbd_bus *bus)
574 1.5 augustss {
575 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
576 1.5 augustss #ifdef EHCI_DEBUG
577 1.5 augustss static int last;
578 1.5 augustss int new;
579 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
580 1.5 augustss if (new != last) {
581 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
582 1.5 augustss last = new;
583 1.5 augustss }
584 1.5 augustss #endif
585 1.5 augustss
586 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
587 1.5 augustss ehci_intr1(sc);
588 1.5 augustss }
589 1.5 augustss
590 1.1 augustss int
591 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
592 1.1 augustss {
593 1.1 augustss int rv = 0;
594 1.1 augustss
595 1.1 augustss if (sc->sc_child != NULL)
596 1.1 augustss rv = config_detach(sc->sc_child, flags);
597 1.1 augustss
598 1.1 augustss if (rv != 0)
599 1.1 augustss return (rv);
600 1.1 augustss
601 1.6 augustss usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
602 1.6 augustss
603 1.1 augustss if (sc->sc_powerhook != NULL)
604 1.1 augustss powerhook_disestablish(sc->sc_powerhook);
605 1.1 augustss if (sc->sc_shutdownhook != NULL)
606 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
607 1.1 augustss
608 1.1 augustss /* XXX free other data structures XXX */
609 1.1 augustss
610 1.1 augustss return (rv);
611 1.1 augustss }
612 1.1 augustss
613 1.1 augustss
614 1.1 augustss int
615 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
616 1.1 augustss {
617 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
618 1.1 augustss int rv = 0;
619 1.1 augustss
620 1.1 augustss switch (act) {
621 1.1 augustss case DVACT_ACTIVATE:
622 1.1 augustss return (EOPNOTSUPP);
623 1.1 augustss break;
624 1.1 augustss
625 1.1 augustss case DVACT_DEACTIVATE:
626 1.1 augustss if (sc->sc_child != NULL)
627 1.1 augustss rv = config_deactivate(sc->sc_child);
628 1.5 augustss sc->sc_dying = 1;
629 1.1 augustss break;
630 1.1 augustss }
631 1.1 augustss return (rv);
632 1.1 augustss }
633 1.1 augustss
634 1.5 augustss /*
635 1.5 augustss * Handle suspend/resume.
636 1.5 augustss *
637 1.5 augustss * We need to switch to polling mode here, because this routine is
638 1.5 augustss * called from an intterupt context. This is all right since we
639 1.5 augustss * are almost suspended anyway.
640 1.5 augustss */
641 1.5 augustss void
642 1.5 augustss ehci_power(int why, void *v)
643 1.5 augustss {
644 1.5 augustss ehci_softc_t *sc = v;
645 1.5 augustss //u_int32_t ctl;
646 1.5 augustss int s;
647 1.5 augustss
648 1.5 augustss #ifdef EHCI_DEBUG
649 1.5 augustss DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
650 1.5 augustss ehci_dumpregs(sc);
651 1.5 augustss #endif
652 1.5 augustss
653 1.5 augustss s = splhardusb();
654 1.5 augustss switch (why) {
655 1.5 augustss case PWR_SUSPEND:
656 1.5 augustss case PWR_STANDBY:
657 1.5 augustss sc->sc_bus.use_polling++;
658 1.5 augustss #if 0
659 1.5 augustss OOO
660 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
661 1.5 augustss if (sc->sc_control == 0) {
662 1.5 augustss /*
663 1.5 augustss * Preserve register values, in case that APM BIOS
664 1.5 augustss * does not recover them.
665 1.5 augustss */
666 1.5 augustss sc->sc_control = ctl;
667 1.5 augustss sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
668 1.5 augustss }
669 1.5 augustss ctl |= EHCI_HCFS_SUSPEND;
670 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
671 1.5 augustss #endif
672 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
673 1.5 augustss sc->sc_bus.use_polling--;
674 1.5 augustss break;
675 1.5 augustss case PWR_RESUME:
676 1.5 augustss sc->sc_bus.use_polling++;
677 1.5 augustss #if 0
678 1.5 augustss OOO
679 1.5 augustss /* Some broken BIOSes do not recover these values */
680 1.5 augustss OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
681 1.5 augustss OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
682 1.5 augustss OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
683 1.5 augustss if (sc->sc_intre)
684 1.5 augustss OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
685 1.5 augustss sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
686 1.5 augustss if (sc->sc_control)
687 1.5 augustss ctl = sc->sc_control;
688 1.5 augustss else
689 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL);
690 1.5 augustss ctl |= EHCI_HCFS_RESUME;
691 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
692 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
693 1.5 augustss ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
694 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
695 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
696 1.5 augustss sc->sc_control = sc->sc_intre = 0;
697 1.5 augustss #endif
698 1.5 augustss sc->sc_bus.use_polling--;
699 1.5 augustss break;
700 1.5 augustss case PWR_SOFTSUSPEND:
701 1.5 augustss case PWR_SOFTSTANDBY:
702 1.5 augustss case PWR_SOFTRESUME:
703 1.5 augustss break;
704 1.5 augustss }
705 1.5 augustss splx(s);
706 1.5 augustss }
707 1.5 augustss
708 1.5 augustss /*
709 1.5 augustss * Shut down the controller when the system is going down.
710 1.5 augustss */
711 1.5 augustss void
712 1.5 augustss ehci_shutdown(void *v)
713 1.5 augustss {
714 1.8 augustss ehci_softc_t *sc = v;
715 1.5 augustss
716 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
717 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
718 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
719 1.5 augustss }
720 1.5 augustss
721 1.5 augustss usbd_status
722 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
723 1.5 augustss {
724 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
725 1.5 augustss
726 1.5 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
727 1.5 augustss }
728 1.5 augustss
729 1.5 augustss void
730 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
731 1.5 augustss {
732 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
733 1.5 augustss
734 1.5 augustss usb_freemem(&sc->sc_bus, dma);
735 1.5 augustss }
736 1.5 augustss
737 1.5 augustss usbd_xfer_handle
738 1.5 augustss ehci_allocx(struct usbd_bus *bus)
739 1.5 augustss {
740 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
741 1.5 augustss usbd_xfer_handle xfer;
742 1.5 augustss
743 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
744 1.5 augustss if (xfer != NULL)
745 1.5 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
746 1.5 augustss else
747 1.5 augustss xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
748 1.5 augustss if (xfer != NULL)
749 1.5 augustss memset(xfer, 0, sizeof *xfer);
750 1.5 augustss return (xfer);
751 1.5 augustss }
752 1.5 augustss
753 1.5 augustss void
754 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
755 1.5 augustss {
756 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
757 1.5 augustss
758 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
759 1.5 augustss }
760 1.5 augustss
761 1.5 augustss Static void
762 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
763 1.5 augustss {
764 1.5 augustss #if 0
765 1.5 augustss OOO
766 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
767 1.5 augustss
768 1.5 augustss epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
769 1.5 augustss #endif
770 1.5 augustss }
771 1.5 augustss
772 1.5 augustss Static void
773 1.5 augustss ehci_noop(usbd_pipe_handle pipe)
774 1.5 augustss {
775 1.5 augustss }
776 1.5 augustss
777 1.5 augustss #ifdef EHCI_DEBUG
778 1.5 augustss void
779 1.5 augustss ehci_dumpregs(ehci_softc_t *sc)
780 1.5 augustss {
781 1.6 augustss int i;
782 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
783 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
784 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
785 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
786 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
787 1.6 augustss printf("port %d status=0x%08x\n", i,
788 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
789 1.6 augustss }
790 1.6 augustss
791 1.6 augustss void
792 1.6 augustss ehci_dump()
793 1.6 augustss {
794 1.6 augustss ehci_dumpregs(theehci);
795 1.5 augustss }
796 1.9 augustss
797 1.9 augustss void
798 1.9 augustss ehci_dump_link(ehci_link_t link)
799 1.9 augustss {
800 1.9 augustss printf("0x%08x<", link);
801 1.9 augustss switch (EHCI_LINK_TYPE(link)) {
802 1.9 augustss case EHCI_LINK_ITD: printf("ITD"); break;
803 1.9 augustss case EHCI_LINK_QH: printf("QH"); break;
804 1.9 augustss case EHCI_LINK_SITD: printf("SITD"); break;
805 1.9 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
806 1.9 augustss }
807 1.9 augustss if (link & EHCI_LINK_TERMINATE)
808 1.9 augustss printf(",T>");
809 1.9 augustss else
810 1.9 augustss printf(">");
811 1.9 augustss }
812 1.9 augustss
813 1.9 augustss void
814 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
815 1.9 augustss {
816 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
817 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
818 1.9 augustss }
819 1.9 augustss
820 1.9 augustss void
821 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
822 1.9 augustss {
823 1.9 augustss u_int32_t s;
824 1.9 augustss
825 1.9 augustss printf(" next="); ehci_dump_link(qtd->qtd_next);
826 1.9 augustss printf("altnext="); ehci_dump_link(qtd->qtd_altnext);
827 1.9 augustss printf("\n");
828 1.9 augustss s = qtd->qtd_status;
829 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
830 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
831 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
832 1.9 augustss printf(" cerr=%d pid=%d stat=0x%02x\n", EHCI_QTD_GET_CERR(s),
833 1.9 augustss EHCI_QTD_GET_PID(s), EHCI_QTD_GET_STATUS(s));
834 1.9 augustss for (s = 0; s < 5; s++)
835 1.9 augustss printf(" buffer[%d]=0x%08x\n", s, qtd->qtd_buffer[s]);
836 1.9 augustss }
837 1.9 augustss
838 1.9 augustss void
839 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
840 1.9 augustss {
841 1.9 augustss ehci_qh_t *qh = &sqh->qh;
842 1.9 augustss
843 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
844 1.9 augustss printf(" link="); ehci_dump_link(qh->qh_link); printf("\n");
845 1.9 augustss printf(" endp=0x%08x endphub=0x%08x\n", qh->qh_endp, qh->qh_endphub);
846 1.9 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd); printf("\n ");
847 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
848 1.9 augustss }
849 1.9 augustss
850 1.5 augustss #endif
851 1.5 augustss
852 1.5 augustss usbd_status
853 1.5 augustss ehci_open(usbd_pipe_handle pipe)
854 1.5 augustss {
855 1.5 augustss usbd_device_handle dev = pipe->device;
856 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
857 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
858 1.5 augustss u_int8_t addr = dev->address;
859 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
860 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
861 1.10 augustss ehci_soft_qh_t *sqh;
862 1.9 augustss ehci_soft_qtd_t *sqtd;
863 1.10 augustss usbd_status err;
864 1.10 augustss #if 0
865 1.5 augustss ehci_soft_itd_t *sitd;
866 1.5 augustss ehci_physaddr_t tdphys;
867 1.5 augustss u_int32_t fmt;
868 1.5 augustss int ival;
869 1.5 augustss #endif
870 1.10 augustss int s;
871 1.10 augustss int speed, naks;
872 1.5 augustss
873 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
874 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
875 1.5 augustss
876 1.5 augustss if (addr == sc->sc_addr) {
877 1.5 augustss switch (ed->bEndpointAddress) {
878 1.5 augustss case USB_CONTROL_ENDPOINT:
879 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
880 1.5 augustss break;
881 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
882 1.5 augustss pipe->methods = &ehci_root_intr_methods;
883 1.5 augustss break;
884 1.5 augustss default:
885 1.5 augustss return (USBD_INVAL);
886 1.5 augustss }
887 1.10 augustss return (USBD_NORMAL_COMPLETION);
888 1.10 augustss }
889 1.10 augustss
890 1.10 augustss speed = EHCI_QH_SPEED_HIGH; /* XXX */
891 1.10 augustss naks = 8; /* XXX */
892 1.10 augustss sqh = ehci_alloc_sqh(sc);
893 1.10 augustss if (sqh == NULL)
894 1.10 augustss goto bad0;
895 1.10 augustss /* qh_link filled when the QH is added */
896 1.10 augustss sqh->qh.qh_endp = htole32(
897 1.10 augustss EHCI_QH_SET_ADDR(addr) |
898 1.10 augustss EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
899 1.10 augustss EHCI_QH_SET_EPS(speed) | /* XXX */
900 1.10 augustss /* XXX EHCI_QH_DTC ? */
901 1.10 augustss EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
902 1.10 augustss (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
903 1.10 augustss EHCI_QH_CTL : 0) |
904 1.10 augustss EHCI_QH_SET_NRL(naks)
905 1.10 augustss );
906 1.10 augustss sqh->qh.qh_endphub = htole32(
907 1.10 augustss EHCI_QH_SET_MULT(1)
908 1.10 augustss );
909 1.10 augustss sqh->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE);
910 1.10 augustss
911 1.10 augustss epipe->sqh = sqh;
912 1.5 augustss #if 0
913 1.10 augustss if (xfertype == UE_CONTROL || xfertype == UE_BULK) {
914 1.10 augustss sqtd = ehci_alloc_sqtd(sc);
915 1.10 augustss if (sqtd == NULL) {
916 1.10 augustss ehci_free_sqtd(sc, sqtd);
917 1.10 augustss goto bad1;
918 1.10 augustss }
919 1.10 augustss epipe->tail.qtd = sqtd;
920 1.10 augustss tdphys = sqtd->physaddr;
921 1.10 augustss } else
922 1.9 augustss sqtd = NULL;
923 1.10 augustss #endif
924 1.5 augustss
925 1.10 augustss switch (xfertype) {
926 1.10 augustss case UE_CONTROL:
927 1.10 augustss pipe->methods = &ehci_device_ctrl_methods;
928 1.10 augustss err = usb_allocmem(&sc->sc_bus,
929 1.10 augustss sizeof(usb_device_request_t),
930 1.10 augustss 0, &epipe->u.ctl.reqdma);
931 1.10 augustss if (err)
932 1.10 augustss goto bad;
933 1.10 augustss s = splusb();
934 1.10 augustss ehci_add_qh(sqh, sc->sc_ctrl_head);
935 1.10 augustss splx(s);
936 1.10 augustss break;
937 1.10 augustss case UE_BULK:
938 1.10 augustss pipe->methods = &ehci_device_bulk_methods;
939 1.10 augustss s = splusb();
940 1.10 augustss ehci_add_qh(sqh, sc->sc_bulk_head);
941 1.10 augustss splx(s);
942 1.10 augustss break;
943 1.10 augustss default:
944 1.10 augustss return (USBD_INVAL);
945 1.5 augustss }
946 1.5 augustss return (USBD_NORMAL_COMPLETION);
947 1.5 augustss
948 1.5 augustss bad:
949 1.9 augustss if (sqtd != NULL)
950 1.9 augustss ehci_free_sqtd(sc, sqtd);
951 1.10 augustss /*bad1:*/
952 1.9 augustss if (sqh != NULL)
953 1.9 augustss ehci_free_sqh(sc, sqh);
954 1.5 augustss bad0:
955 1.5 augustss return (USBD_NOMEM);
956 1.10 augustss }
957 1.10 augustss
958 1.10 augustss /*
959 1.10 augustss * Add an ED to the schedule. Called at splusb().
960 1.10 augustss */
961 1.10 augustss void
962 1.10 augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
963 1.10 augustss {
964 1.10 augustss SPLUSBCHECK;
965 1.10 augustss
966 1.10 augustss sqh->next = head->next;
967 1.10 augustss sqh->qh.qh_link = head->qh.qh_link;
968 1.10 augustss head->next = sqh;
969 1.10 augustss head->qh.qh_link = htole32(sqh->physaddr);
970 1.10 augustss
971 1.10 augustss #ifdef EHCI_DEBUG
972 1.10 augustss if (ehcidebug > 0) {
973 1.10 augustss printf("ehci_add_qh:\n");
974 1.10 augustss ehci_dump_sqh(sqh);
975 1.10 augustss }
976 1.5 augustss #endif
977 1.5 augustss }
978 1.5 augustss
979 1.10 augustss /*
980 1.10 augustss * Remove an ED from the schedule. Called at splusb().
981 1.10 augustss */
982 1.10 augustss void
983 1.10 augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
984 1.10 augustss {
985 1.10 augustss ehci_soft_qh_t *p;
986 1.10 augustss int s;
987 1.10 augustss
988 1.10 augustss SPLUSBCHECK;
989 1.10 augustss /* XXX */
990 1.10 augustss for (p = head; p == NULL && p->next != sqh; p = p->next)
991 1.10 augustss ;
992 1.10 augustss if (p == NULL)
993 1.10 augustss panic("ehci_rem_qh: ED not found\n");
994 1.10 augustss p->next = sqh->next;
995 1.10 augustss p->qh.qh_link = sqh->qh.qh_link;
996 1.10 augustss
997 1.10 augustss /*
998 1.10 augustss * Now we must ensure that the HC has released all references to the
999 1.10 augustss * QH. We do this by asking for a Async Advance Doorbell interrupt
1000 1.10 augustss * and then we wait for the interrupt.
1001 1.10 augustss * To make this easier we first obtain exclusive use ofthe doorbell.
1002 1.10 augustss */
1003 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1004 1.10 augustss s = splhardusb();
1005 1.10 augustss /* ask for doorbell */
1006 1.10 augustss EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1007 1.10 augustss tsleep(&sc->sc_bulk_head, PZERO, "ehcidi", 0); /* wait for doorbell */
1008 1.10 augustss splx(s);
1009 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1010 1.10 augustss }
1011 1.10 augustss
1012 1.5 augustss /***********/
1013 1.5 augustss
1014 1.5 augustss /*
1015 1.5 augustss * Data structures and routines to emulate the root hub.
1016 1.5 augustss */
1017 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
1018 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1019 1.5 augustss UDESC_DEVICE, /* type */
1020 1.5 augustss {0x00, 0x02}, /* USB version */
1021 1.5 augustss UDCLASS_HUB, /* class */
1022 1.5 augustss UDSUBCLASS_HUB, /* subclass */
1023 1.5 augustss 0, /* protocol */
1024 1.5 augustss 64, /* max packet */
1025 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
1026 1.5 augustss 1,2,0, /* string indicies */
1027 1.5 augustss 1 /* # of configurations */
1028 1.5 augustss };
1029 1.5 augustss
1030 1.5 augustss Static usb_config_descriptor_t ehci_confd = {
1031 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1032 1.5 augustss UDESC_CONFIG,
1033 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1034 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1035 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1036 1.5 augustss 1,
1037 1.5 augustss 1,
1038 1.5 augustss 0,
1039 1.5 augustss UC_SELF_POWERED,
1040 1.5 augustss 0 /* max power */
1041 1.5 augustss };
1042 1.5 augustss
1043 1.5 augustss Static usb_interface_descriptor_t ehci_ifcd = {
1044 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1045 1.5 augustss UDESC_INTERFACE,
1046 1.5 augustss 0,
1047 1.5 augustss 0,
1048 1.5 augustss 1,
1049 1.5 augustss UICLASS_HUB,
1050 1.5 augustss UISUBCLASS_HUB,
1051 1.5 augustss 0,
1052 1.5 augustss 0
1053 1.5 augustss };
1054 1.5 augustss
1055 1.5 augustss Static usb_endpoint_descriptor_t ehci_endpd = {
1056 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1057 1.5 augustss UDESC_ENDPOINT,
1058 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
1059 1.5 augustss UE_INTERRUPT,
1060 1.5 augustss {8, 0}, /* max packet */
1061 1.5 augustss 255
1062 1.5 augustss };
1063 1.5 augustss
1064 1.5 augustss Static usb_hub_descriptor_t ehci_hubd = {
1065 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
1066 1.5 augustss UDESC_HUB,
1067 1.5 augustss 0,
1068 1.5 augustss {0,0},
1069 1.5 augustss 0,
1070 1.5 augustss 0,
1071 1.5 augustss {0},
1072 1.5 augustss };
1073 1.5 augustss
1074 1.5 augustss Static int
1075 1.5 augustss ehci_str(p, l, s)
1076 1.5 augustss usb_string_descriptor_t *p;
1077 1.5 augustss int l;
1078 1.5 augustss char *s;
1079 1.5 augustss {
1080 1.5 augustss int i;
1081 1.5 augustss
1082 1.5 augustss if (l == 0)
1083 1.5 augustss return (0);
1084 1.5 augustss p->bLength = 2 * strlen(s) + 2;
1085 1.5 augustss if (l == 1)
1086 1.5 augustss return (1);
1087 1.5 augustss p->bDescriptorType = UDESC_STRING;
1088 1.5 augustss l -= 2;
1089 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1090 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1091 1.5 augustss return (2*i+2);
1092 1.5 augustss }
1093 1.5 augustss
1094 1.5 augustss /*
1095 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1096 1.5 augustss */
1097 1.5 augustss Static usbd_status
1098 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1099 1.5 augustss {
1100 1.5 augustss usbd_status err;
1101 1.5 augustss
1102 1.5 augustss /* Insert last in queue. */
1103 1.5 augustss err = usb_insert_transfer(xfer);
1104 1.5 augustss if (err)
1105 1.5 augustss return (err);
1106 1.5 augustss
1107 1.5 augustss /* Pipe isn't running, start first */
1108 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1109 1.5 augustss }
1110 1.5 augustss
1111 1.5 augustss Static usbd_status
1112 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1113 1.5 augustss {
1114 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1115 1.5 augustss usb_device_request_t *req;
1116 1.5 augustss void *buf = NULL;
1117 1.5 augustss int port, i;
1118 1.5 augustss int s, len, value, index, l, totlen = 0;
1119 1.5 augustss usb_port_status_t ps;
1120 1.5 augustss usb_hub_descriptor_t hubd;
1121 1.5 augustss usbd_status err;
1122 1.5 augustss u_int32_t v;
1123 1.5 augustss
1124 1.5 augustss if (sc->sc_dying)
1125 1.5 augustss return (USBD_IOERROR);
1126 1.5 augustss
1127 1.5 augustss #ifdef DIAGNOSTIC
1128 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1129 1.5 augustss /* XXX panic */
1130 1.5 augustss return (USBD_INVAL);
1131 1.5 augustss #endif
1132 1.5 augustss req = &xfer->request;
1133 1.5 augustss
1134 1.5 augustss DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1135 1.5 augustss req->bmRequestType, req->bRequest));
1136 1.5 augustss
1137 1.5 augustss len = UGETW(req->wLength);
1138 1.5 augustss value = UGETW(req->wValue);
1139 1.5 augustss index = UGETW(req->wIndex);
1140 1.5 augustss
1141 1.5 augustss if (len != 0)
1142 1.5 augustss buf = KERNADDR(&xfer->dmabuf);
1143 1.5 augustss
1144 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1145 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1146 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1147 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1148 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1149 1.5 augustss /*
1150 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1151 1.5 augustss * for the integrated root hub.
1152 1.5 augustss */
1153 1.5 augustss break;
1154 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1155 1.5 augustss if (len > 0) {
1156 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1157 1.5 augustss totlen = 1;
1158 1.5 augustss }
1159 1.5 augustss break;
1160 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1161 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1162 1.5 augustss switch(value >> 8) {
1163 1.5 augustss case UDESC_DEVICE:
1164 1.5 augustss if ((value & 0xff) != 0) {
1165 1.5 augustss err = USBD_IOERROR;
1166 1.5 augustss goto ret;
1167 1.5 augustss }
1168 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1169 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1170 1.5 augustss memcpy(buf, &ehci_devd, l);
1171 1.5 augustss break;
1172 1.5 augustss case UDESC_CONFIG:
1173 1.5 augustss if ((value & 0xff) != 0) {
1174 1.5 augustss err = USBD_IOERROR;
1175 1.5 augustss goto ret;
1176 1.5 augustss }
1177 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1178 1.5 augustss memcpy(buf, &ehci_confd, l);
1179 1.5 augustss buf = (char *)buf + l;
1180 1.5 augustss len -= l;
1181 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1182 1.5 augustss totlen += l;
1183 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1184 1.5 augustss buf = (char *)buf + l;
1185 1.5 augustss len -= l;
1186 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1187 1.5 augustss totlen += l;
1188 1.5 augustss memcpy(buf, &ehci_endpd, l);
1189 1.5 augustss break;
1190 1.5 augustss case UDESC_STRING:
1191 1.5 augustss if (len == 0)
1192 1.5 augustss break;
1193 1.5 augustss *(u_int8_t *)buf = 0;
1194 1.5 augustss totlen = 1;
1195 1.5 augustss switch (value & 0xff) {
1196 1.5 augustss case 1: /* Vendor */
1197 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1198 1.5 augustss break;
1199 1.5 augustss case 2: /* Product */
1200 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1201 1.5 augustss break;
1202 1.5 augustss }
1203 1.5 augustss break;
1204 1.5 augustss default:
1205 1.5 augustss err = USBD_IOERROR;
1206 1.5 augustss goto ret;
1207 1.5 augustss }
1208 1.5 augustss break;
1209 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1210 1.5 augustss if (len > 0) {
1211 1.5 augustss *(u_int8_t *)buf = 0;
1212 1.5 augustss totlen = 1;
1213 1.5 augustss }
1214 1.5 augustss break;
1215 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1216 1.5 augustss if (len > 1) {
1217 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1218 1.5 augustss totlen = 2;
1219 1.5 augustss }
1220 1.5 augustss break;
1221 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1222 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1223 1.5 augustss if (len > 1) {
1224 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1225 1.5 augustss totlen = 2;
1226 1.5 augustss }
1227 1.5 augustss break;
1228 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1229 1.5 augustss if (value >= USB_MAX_DEVICES) {
1230 1.5 augustss err = USBD_IOERROR;
1231 1.5 augustss goto ret;
1232 1.5 augustss }
1233 1.5 augustss sc->sc_addr = value;
1234 1.5 augustss break;
1235 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1236 1.5 augustss if (value != 0 && value != 1) {
1237 1.5 augustss err = USBD_IOERROR;
1238 1.5 augustss goto ret;
1239 1.5 augustss }
1240 1.5 augustss sc->sc_conf = value;
1241 1.5 augustss break;
1242 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1243 1.5 augustss break;
1244 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1245 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1246 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1247 1.5 augustss err = USBD_IOERROR;
1248 1.5 augustss goto ret;
1249 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1250 1.5 augustss break;
1251 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1252 1.5 augustss break;
1253 1.5 augustss /* Hub requests */
1254 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1255 1.5 augustss break;
1256 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1257 1.5 augustss DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1258 1.5 augustss "port=%d feature=%d\n",
1259 1.5 augustss index, value));
1260 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1261 1.5 augustss err = USBD_IOERROR;
1262 1.5 augustss goto ret;
1263 1.5 augustss }
1264 1.5 augustss port = EHCI_PORTSC(index);
1265 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1266 1.5 augustss switch(value) {
1267 1.5 augustss case UHF_PORT_ENABLE:
1268 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1269 1.5 augustss break;
1270 1.5 augustss case UHF_PORT_SUSPEND:
1271 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1272 1.5 augustss break;
1273 1.5 augustss case UHF_PORT_POWER:
1274 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1275 1.5 augustss break;
1276 1.5 augustss case UHF_C_PORT_CONNECTION:
1277 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1278 1.5 augustss break;
1279 1.5 augustss case UHF_C_PORT_ENABLE:
1280 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1281 1.5 augustss break;
1282 1.5 augustss case UHF_C_PORT_SUSPEND:
1283 1.5 augustss /* how? */
1284 1.5 augustss break;
1285 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1286 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1287 1.5 augustss break;
1288 1.5 augustss case UHF_C_PORT_RESET:
1289 1.6 augustss sc->sc_isreset = 0;
1290 1.5 augustss break;
1291 1.5 augustss default:
1292 1.5 augustss err = USBD_IOERROR;
1293 1.5 augustss goto ret;
1294 1.5 augustss }
1295 1.5 augustss #if 0
1296 1.5 augustss switch(value) {
1297 1.5 augustss case UHF_C_PORT_CONNECTION:
1298 1.5 augustss case UHF_C_PORT_ENABLE:
1299 1.5 augustss case UHF_C_PORT_SUSPEND:
1300 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1301 1.5 augustss case UHF_C_PORT_RESET:
1302 1.5 augustss /* Enable RHSC interrupt if condition is cleared. */
1303 1.5 augustss if ((OREAD4(sc, port) >> 16) == 0)
1304 1.6 augustss ehci_pcd_able(sc, 1);
1305 1.5 augustss break;
1306 1.5 augustss default:
1307 1.5 augustss break;
1308 1.5 augustss }
1309 1.5 augustss #endif
1310 1.5 augustss break;
1311 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1312 1.5 augustss if (value != 0) {
1313 1.5 augustss err = USBD_IOERROR;
1314 1.5 augustss goto ret;
1315 1.5 augustss }
1316 1.5 augustss hubd = ehci_hubd;
1317 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1318 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1319 1.5 augustss USETW(hubd.wHubCharacteristics,
1320 1.5 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH);
1321 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1322 1.5 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1323 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1324 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1325 1.5 augustss l = min(len, hubd.bDescLength);
1326 1.5 augustss totlen = l;
1327 1.5 augustss memcpy(buf, &hubd, l);
1328 1.5 augustss break;
1329 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1330 1.5 augustss if (len != 4) {
1331 1.5 augustss err = USBD_IOERROR;
1332 1.5 augustss goto ret;
1333 1.5 augustss }
1334 1.5 augustss memset(buf, 0, len); /* ? XXX */
1335 1.5 augustss totlen = len;
1336 1.5 augustss break;
1337 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1338 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1339 1.5 augustss index));
1340 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1341 1.5 augustss err = USBD_IOERROR;
1342 1.5 augustss goto ret;
1343 1.5 augustss }
1344 1.5 augustss if (len != 4) {
1345 1.5 augustss err = USBD_IOERROR;
1346 1.5 augustss goto ret;
1347 1.5 augustss }
1348 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1349 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1350 1.5 augustss v));
1351 1.5 augustss i = 0;
1352 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1353 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1354 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1355 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1356 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1357 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1358 1.5 augustss USETW(ps.wPortStatus, i);
1359 1.5 augustss i = 0;
1360 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1361 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1362 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1363 1.6 augustss if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1364 1.5 augustss USETW(ps.wPortChange, i);
1365 1.5 augustss l = min(len, sizeof ps);
1366 1.5 augustss memcpy(buf, &ps, l);
1367 1.5 augustss totlen = l;
1368 1.5 augustss break;
1369 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1370 1.5 augustss err = USBD_IOERROR;
1371 1.5 augustss goto ret;
1372 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1373 1.5 augustss break;
1374 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1375 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1376 1.5 augustss err = USBD_IOERROR;
1377 1.5 augustss goto ret;
1378 1.5 augustss }
1379 1.5 augustss port = EHCI_PORTSC(index);
1380 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1381 1.5 augustss switch(value) {
1382 1.5 augustss case UHF_PORT_ENABLE:
1383 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
1384 1.5 augustss break;
1385 1.5 augustss case UHF_PORT_SUSPEND:
1386 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1387 1.5 augustss break;
1388 1.5 augustss case UHF_PORT_RESET:
1389 1.5 augustss DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1390 1.5 augustss index));
1391 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
1392 1.6 augustss /* Low speed device, give up ownership. */
1393 1.6 augustss ehci_disown(sc, index, 1);
1394 1.6 augustss break;
1395 1.6 augustss }
1396 1.8 augustss /* Start reset sequence. */
1397 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1398 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
1399 1.8 augustss /* Wait for reset to complete. */
1400 1.8 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY * 2);
1401 1.8 augustss /* Terminate reset sequence. */
1402 1.8 augustss EOWRITE4(sc, port, v);
1403 1.8 augustss /* Wait for HC to complete reset. */
1404 1.8 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE * 2);
1405 1.8 augustss v = EOREAD4(sc, port);
1406 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
1407 1.8 augustss if (v & EHCI_PS_PR) {
1408 1.8 augustss printf("%s: port reset timeout\n",
1409 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
1410 1.8 augustss return (USBD_TIMEOUT);
1411 1.5 augustss }
1412 1.8 augustss if (!(v & EHCI_PS_PE)) {
1413 1.6 augustss /* Not a high speed device, give up ownership.*/
1414 1.6 augustss ehci_disown(sc, index, 0);
1415 1.6 augustss break;
1416 1.6 augustss }
1417 1.6 augustss sc->sc_isreset = 1;
1418 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1419 1.6 augustss index, v));
1420 1.5 augustss break;
1421 1.5 augustss case UHF_PORT_POWER:
1422 1.5 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1423 1.5 augustss "%d\n", index));
1424 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
1425 1.5 augustss break;
1426 1.5 augustss default:
1427 1.5 augustss err = USBD_IOERROR;
1428 1.5 augustss goto ret;
1429 1.5 augustss }
1430 1.5 augustss break;
1431 1.5 augustss default:
1432 1.5 augustss err = USBD_IOERROR;
1433 1.5 augustss goto ret;
1434 1.5 augustss }
1435 1.5 augustss xfer->actlen = totlen;
1436 1.5 augustss err = USBD_NORMAL_COMPLETION;
1437 1.5 augustss ret:
1438 1.5 augustss xfer->status = err;
1439 1.5 augustss s = splusb();
1440 1.5 augustss usb_transfer_complete(xfer);
1441 1.5 augustss splx(s);
1442 1.5 augustss return (USBD_IN_PROGRESS);
1443 1.6 augustss }
1444 1.6 augustss
1445 1.6 augustss void
1446 1.6 augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1447 1.6 augustss {
1448 1.6 augustss int i, port;
1449 1.6 augustss u_int32_t v;
1450 1.6 augustss
1451 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1452 1.6 augustss #ifdef DIAGNOSTIC
1453 1.6 augustss if (sc->sc_npcomp != 0) {
1454 1.6 augustss i = (index-1) / sc->sc_npcomp;
1455 1.6 augustss if (i >= sc->sc_ncomp)
1456 1.6 augustss printf("%s: strange port\n",
1457 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
1458 1.6 augustss else
1459 1.6 augustss printf("%s: handing over %s speed device on "
1460 1.6 augustss "port %d to %s\n",
1461 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
1462 1.6 augustss lowspeed ? "low" : "full",
1463 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
1464 1.6 augustss } else {
1465 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1466 1.6 augustss }
1467 1.6 augustss #endif
1468 1.6 augustss port = EHCI_PORTSC(index);
1469 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1470 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
1471 1.5 augustss }
1472 1.5 augustss
1473 1.5 augustss /* Abort a root control request. */
1474 1.5 augustss Static void
1475 1.5 augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1476 1.5 augustss {
1477 1.5 augustss /* Nothing to do, all transfers are synchronous. */
1478 1.5 augustss }
1479 1.5 augustss
1480 1.5 augustss /* Close the root pipe. */
1481 1.5 augustss Static void
1482 1.5 augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
1483 1.5 augustss {
1484 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
1485 1.5 augustss /* Nothing to do. */
1486 1.5 augustss }
1487 1.5 augustss
1488 1.5 augustss void
1489 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
1490 1.5 augustss {
1491 1.5 augustss xfer->hcpriv = NULL;
1492 1.5 augustss }
1493 1.5 augustss
1494 1.5 augustss Static usbd_status
1495 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
1496 1.5 augustss {
1497 1.5 augustss usbd_status err;
1498 1.5 augustss
1499 1.5 augustss /* Insert last in queue. */
1500 1.5 augustss err = usb_insert_transfer(xfer);
1501 1.5 augustss if (err)
1502 1.5 augustss return (err);
1503 1.5 augustss
1504 1.5 augustss /* Pipe isn't running, start first */
1505 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1506 1.5 augustss }
1507 1.5 augustss
1508 1.5 augustss Static usbd_status
1509 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
1510 1.5 augustss {
1511 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
1512 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1513 1.5 augustss
1514 1.5 augustss if (sc->sc_dying)
1515 1.5 augustss return (USBD_IOERROR);
1516 1.5 augustss
1517 1.5 augustss sc->sc_intrxfer = xfer;
1518 1.5 augustss
1519 1.5 augustss return (USBD_IN_PROGRESS);
1520 1.5 augustss }
1521 1.5 augustss
1522 1.5 augustss /* Abort a root interrupt request. */
1523 1.5 augustss Static void
1524 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
1525 1.5 augustss {
1526 1.5 augustss int s;
1527 1.5 augustss
1528 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
1529 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
1530 1.5 augustss xfer->pipe->intrxfer = NULL;
1531 1.5 augustss }
1532 1.5 augustss xfer->status = USBD_CANCELLED;
1533 1.5 augustss s = splusb();
1534 1.5 augustss usb_transfer_complete(xfer);
1535 1.5 augustss splx(s);
1536 1.5 augustss }
1537 1.5 augustss
1538 1.5 augustss /* Close the root pipe. */
1539 1.5 augustss Static void
1540 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
1541 1.5 augustss {
1542 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1543 1.5 augustss
1544 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
1545 1.5 augustss
1546 1.5 augustss sc->sc_intrxfer = NULL;
1547 1.5 augustss }
1548 1.5 augustss
1549 1.5 augustss void
1550 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
1551 1.5 augustss {
1552 1.5 augustss xfer->hcpriv = NULL;
1553 1.9 augustss }
1554 1.9 augustss
1555 1.9 augustss /************************/
1556 1.9 augustss
1557 1.9 augustss ehci_soft_qh_t *
1558 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
1559 1.9 augustss {
1560 1.9 augustss ehci_soft_qh_t *sqh;
1561 1.9 augustss usbd_status err;
1562 1.9 augustss int i, offs;
1563 1.9 augustss usb_dma_t dma;
1564 1.9 augustss
1565 1.9 augustss if (sc->sc_freeqhs == NULL) {
1566 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1567 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1568 1.9 augustss EHCI_PAGE_SIZE, &dma);
1569 1.9 augustss if (err)
1570 1.9 augustss return (0);
1571 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1572 1.9 augustss offs = i * EHCI_SQH_SIZE;
1573 1.9 augustss sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
1574 1.9 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1575 1.9 augustss sqh->next = sc->sc_freeqhs;
1576 1.9 augustss sc->sc_freeqhs = sqh;
1577 1.9 augustss }
1578 1.9 augustss }
1579 1.9 augustss sqh = sc->sc_freeqhs;
1580 1.9 augustss sc->sc_freeqhs = sqh->next;
1581 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1582 1.9 augustss sqh->next = 0;
1583 1.9 augustss return (sqh);
1584 1.9 augustss }
1585 1.9 augustss
1586 1.9 augustss void
1587 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1588 1.9 augustss {
1589 1.9 augustss sqh->next = sc->sc_freeqhs;
1590 1.9 augustss sc->sc_freeqhs = sqh;
1591 1.9 augustss }
1592 1.9 augustss
1593 1.9 augustss ehci_soft_qtd_t *
1594 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
1595 1.9 augustss {
1596 1.9 augustss ehci_soft_qtd_t *sqtd;
1597 1.9 augustss usbd_status err;
1598 1.9 augustss int i, offs;
1599 1.9 augustss usb_dma_t dma;
1600 1.9 augustss int s;
1601 1.9 augustss
1602 1.9 augustss if (sc->sc_freeqtds == NULL) {
1603 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1604 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1605 1.9 augustss EHCI_PAGE_SIZE, &dma);
1606 1.9 augustss if (err)
1607 1.9 augustss return (NULL);
1608 1.9 augustss s = splusb();
1609 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1610 1.9 augustss offs = i * EHCI_SQTD_SIZE;
1611 1.9 augustss sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1612 1.9 augustss sqtd->physaddr = DMAADDR(&dma) + offs;
1613 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1614 1.9 augustss sc->sc_freeqtds = sqtd;
1615 1.9 augustss }
1616 1.9 augustss splx(s);
1617 1.9 augustss }
1618 1.9 augustss
1619 1.9 augustss s = splusb();
1620 1.9 augustss sqtd = sc->sc_freeqtds;
1621 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
1622 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1623 1.9 augustss sqtd->nextqtd = NULL;
1624 1.9 augustss sqtd->xfer = NULL;
1625 1.9 augustss ehci_hash_add_qtd(sc, sqtd);
1626 1.9 augustss splx(s);
1627 1.9 augustss
1628 1.9 augustss return (sqtd);
1629 1.9 augustss }
1630 1.9 augustss
1631 1.9 augustss void
1632 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1633 1.9 augustss {
1634 1.9 augustss int s;
1635 1.9 augustss
1636 1.9 augustss s = splusb();
1637 1.9 augustss ehci_hash_rem_qtd(sc, sqtd);
1638 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1639 1.9 augustss sc->sc_freeqtds = sqtd;
1640 1.9 augustss splx(s);
1641 1.9 augustss }
1642 1.9 augustss
1643 1.9 augustss /*
1644 1.9 augustss * When a transfer is completed the TD is added to the done queue by
1645 1.9 augustss * the host controller. This queue is the processed by software.
1646 1.9 augustss * Unfortunately the queue contains the physical address of the TD
1647 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1648 1.9 augustss * To make the translation possible (and fast) we use a hash table of
1649 1.9 augustss * TDs currently in the schedule. The physical address is used as the
1650 1.9 augustss * hash value.
1651 1.9 augustss */
1652 1.9 augustss
1653 1.9 augustss #define HASH(a) (((a) >> 4) % EHCI_HASH_SIZE)
1654 1.9 augustss /* Called at splusb() */
1655 1.9 augustss void
1656 1.9 augustss ehci_hash_add_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1657 1.9 augustss {
1658 1.9 augustss int h = HASH(sqtd->physaddr);
1659 1.9 augustss
1660 1.9 augustss SPLUSBCHECK;
1661 1.9 augustss
1662 1.9 augustss LIST_INSERT_HEAD(&sc->sc_hash_qtds[h], sqtd, hnext);
1663 1.9 augustss }
1664 1.9 augustss
1665 1.9 augustss /* Called at splusb() */
1666 1.9 augustss void
1667 1.9 augustss ehci_hash_rem_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1668 1.9 augustss {
1669 1.9 augustss SPLUSBCHECK;
1670 1.9 augustss
1671 1.9 augustss LIST_REMOVE(sqtd, hnext);
1672 1.9 augustss }
1673 1.9 augustss
1674 1.9 augustss ehci_soft_qtd_t *
1675 1.9 augustss ehci_hash_find_qtd(ehci_softc_t *sc, ehci_physaddr_t a)
1676 1.9 augustss {
1677 1.9 augustss int h = HASH(a);
1678 1.9 augustss ehci_soft_qtd_t *sqtd;
1679 1.9 augustss
1680 1.9 augustss for (sqtd = LIST_FIRST(&sc->sc_hash_qtds[h]);
1681 1.9 augustss sqtd != NULL;
1682 1.9 augustss sqtd = LIST_NEXT(sqtd, hnext))
1683 1.9 augustss if (sqtd->physaddr == a)
1684 1.9 augustss return (sqtd);
1685 1.9 augustss return (NULL);
1686 1.5 augustss }
1687 1.5 augustss
1688 1.10 augustss /*
1689 1.10 augustss * Close a reqular pipe.
1690 1.10 augustss * Assumes that there are no pending transactions.
1691 1.10 augustss */
1692 1.10 augustss void
1693 1.10 augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
1694 1.10 augustss {
1695 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1696 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1697 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
1698 1.10 augustss int s;
1699 1.10 augustss
1700 1.10 augustss s = splusb();
1701 1.10 augustss ehci_rem_qh(sc, sqh, head);
1702 1.10 augustss splx(s);
1703 1.10 augustss ehci_free_sqh(sc, epipe->sqh);
1704 1.10 augustss }
1705 1.10 augustss
1706 1.10 augustss /*
1707 1.10 augustss * Abort a device request.
1708 1.10 augustss * If this routine is called at splusb() it guarantees that the request
1709 1.10 augustss * will be removed from the hardware scheduling and that the callback
1710 1.10 augustss * for it will be called with USBD_CANCELLED status.
1711 1.10 augustss * It's impossible to guarantee that the requested transfer will not
1712 1.10 augustss * have happened since the hardware runs concurrently.
1713 1.10 augustss * If the transaction has already happened we rely on the ordinary
1714 1.10 augustss * interrupt processing to process it.
1715 1.10 augustss */
1716 1.10 augustss void
1717 1.10 augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1718 1.10 augustss {
1719 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
1720 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
1721 1.10 augustss #if 0
1722 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
1723 1.10 augustss ehci_soft_td_t *p, *n;
1724 1.10 augustss ehci_physaddr_t headp;
1725 1.10 augustss int s, hit;
1726 1.10 augustss #endif
1727 1.10 augustss
1728 1.10 augustss DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh));
1729 1.10 augustss
1730 1.10 augustss if (xfer->device->bus->intr_context || !curproc)
1731 1.10 augustss panic("ehci_abort_xfer: not in process context\n");
1732 1.10 augustss
1733 1.10 augustss }
1734 1.10 augustss
1735 1.5 augustss /************************/
1736 1.5 augustss
1737 1.10 augustss Static usbd_status
1738 1.10 augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
1739 1.10 augustss {
1740 1.10 augustss usbd_status err;
1741 1.10 augustss
1742 1.10 augustss /* Insert last in queue. */
1743 1.10 augustss err = usb_insert_transfer(xfer);
1744 1.10 augustss if (err)
1745 1.10 augustss return (err);
1746 1.10 augustss
1747 1.10 augustss /* Pipe isn't running, start first */
1748 1.10 augustss return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1749 1.10 augustss }
1750 1.10 augustss
1751 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1752 1.10 augustss
1753 1.10 augustss void
1754 1.10 augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
1755 1.10 augustss {
1756 1.10 augustss DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
1757 1.10 augustss
1758 1.10 augustss #ifdef DIAGNOSTIC
1759 1.10 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1760 1.10 augustss panic("ehci_ctrl_done: not a request\n");
1761 1.10 augustss }
1762 1.10 augustss #endif
1763 1.10 augustss xfer->hcpriv = NULL;
1764 1.10 augustss }
1765 1.10 augustss
1766 1.10 augustss /* Abort a device control request. */
1767 1.10 augustss Static void
1768 1.10 augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
1769 1.10 augustss {
1770 1.10 augustss DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
1771 1.10 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
1772 1.10 augustss }
1773 1.10 augustss
1774 1.10 augustss /* Close a device control pipe. */
1775 1.10 augustss Static void
1776 1.10 augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
1777 1.10 augustss {
1778 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1779 1.10 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
1780 1.10 augustss
1781 1.10 augustss DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
1782 1.10 augustss ehci_close_pipe(pipe, sc->sc_ctrl_head);
1783 1.10 augustss /*ehci_free_std(sc, epipe->tail.td);*/
1784 1.10 augustss }
1785 1.10 augustss
1786 1.10 augustss /************************/
1787 1.5 augustss
1788 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1789 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1790 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { }
1791 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { }
1792 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { }
1793 1.5 augustss
1794 1.10 augustss /************************/
1795 1.10 augustss
1796 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1797 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1798 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
1799 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
1800 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
1801 1.10 augustss
1802 1.10 augustss /************************/
1803 1.5 augustss
1804 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1805 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1806 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
1807 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
1808 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
1809