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ehci.c revision 1.123.12.1
      1  1.123.12.1     itohy /*	$NetBSD: ehci.c,v 1.123.12.1 2007/05/22 14:57:34 itohy Exp $ */
      2         1.1  augustss 
      3  1.123.12.1     itohy /*-
      4  1.123.12.1     itohy  * Copyright (c) 2004, 2005, 2007 The NetBSD Foundation, Inc.
      5         1.1  augustss  * All rights reserved.
      6         1.1  augustss  *
      7         1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8        1.61   mycroft  * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum.
      9         1.1  augustss  *
     10         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11         1.1  augustss  * modification, are permitted provided that the following conditions
     12         1.1  augustss  * are met:
     13         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18         1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     19         1.1  augustss  *    must display the following acknowledgement:
     20         1.1  augustss  *        This product includes software developed by the NetBSD
     21         1.1  augustss  *        Foundation, Inc. and its contributors.
     22         1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23         1.1  augustss  *    contributors may be used to endorse or promote products derived
     24         1.1  augustss  *    from this software without specific prior written permission.
     25         1.1  augustss  *
     26         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     37         1.1  augustss  */
     38         1.1  augustss 
     39         1.1  augustss /*
     40         1.3  augustss  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
     41         1.1  augustss  *
     42        1.35     enami  * The EHCI 1.0 spec can be found at
     43        1.34  augustss  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
     44         1.7  augustss  * and the USB 2.0 spec at
     45        1.43    ichiro  * http://www.usb.org/developers/docs/usb_20.zip
     46         1.1  augustss  *
     47         1.1  augustss  */
     48         1.4     lukem 
     49        1.52  jdolecek /*
     50        1.52  jdolecek  * TODO:
     51  1.123.12.1     itohy  * 1) The EHCI driver lacks support for isochronous transfers, so
     52        1.52  jdolecek  *    devices using them don't work.
     53        1.52  jdolecek  *
     54  1.123.12.1     itohy  * 2) Interrupt transfer scheduling does not manage the time available
     55  1.123.12.1     itohy  *    in each frame, so it is possible for the transfers to overrun
     56  1.123.12.1     itohy  *    the end of the frame.
     57        1.52  jdolecek  *
     58  1.123.12.1     itohy  * 3) Command failures are not recovered correctly.
     59  1.123.12.1     itohy  */
     60        1.52  jdolecek 
     61         1.4     lukem #include <sys/cdefs.h>
     62  1.123.12.1     itohy __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.123.12.1 2007/05/22 14:57:34 itohy Exp $");
     63  1.123.12.1     itohy /* __FBSDID("$FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/ehci.c,v 1.52 2006/10/19 01:15:58 iedowse Exp $"); */
     64        1.47  augustss 
     65  1.123.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
     66        1.47  augustss #include "ohci.h"
     67        1.47  augustss #include "uhci.h"
     68  1.123.12.1     itohy #endif
     69         1.1  augustss 
     70         1.1  augustss #include <sys/param.h>
     71         1.1  augustss #include <sys/systm.h>
     72         1.1  augustss #include <sys/kernel.h>
     73         1.1  augustss #include <sys/malloc.h>
     74  1.123.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
     75         1.1  augustss #include <sys/device.h>
     76         1.1  augustss #include <sys/select.h>
     77  1.123.12.1     itohy #elif defined(__FreeBSD__)
     78  1.123.12.1     itohy #include <sys/endian.h>
     79  1.123.12.1     itohy #include <sys/module.h>
     80  1.123.12.1     itohy #include <sys/bus.h>
     81  1.123.12.1     itohy #include <sys/lockmgr.h>
     82  1.123.12.1     itohy #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
     83  1.123.12.1     itohy #include <machine/cpu.h>
     84  1.123.12.1     itohy #endif
     85  1.123.12.1     itohy #endif
     86         1.1  augustss #include <sys/proc.h>
     87         1.1  augustss #include <sys/queue.h>
     88  1.123.12.1     itohy #include <sys/sysctl.h>
     89         1.1  augustss 
     90         1.1  augustss #include <machine/bus.h>
     91         1.1  augustss #include <machine/endian.h>
     92         1.1  augustss 
     93         1.1  augustss #include <dev/usb/usb.h>
     94         1.1  augustss #include <dev/usb/usbdi.h>
     95         1.1  augustss #include <dev/usb/usbdivar.h>
     96         1.1  augustss #include <dev/usb/usb_mem.h>
     97         1.1  augustss #include <dev/usb/usb_quirks.h>
     98         1.1  augustss 
     99         1.1  augustss #include <dev/usb/ehcireg.h>
    100         1.1  augustss #include <dev/usb/ehcivar.h>
    101         1.1  augustss 
    102  1.123.12.1     itohy #if defined(__FreeBSD__)
    103  1.123.12.1     itohy 
    104  1.123.12.1     itohy #define delay(d)                DELAY(d)
    105  1.123.12.1     itohy #endif
    106  1.123.12.1     itohy 
    107  1.123.12.1     itohy #ifdef USB_DEBUG
    108  1.123.12.1     itohy /* #define EHCI_DEBUG USB_DEBUG */
    109  1.123.12.1     itohy #define DPRINTF(x)	do { if (ehcidebug) logprintf x; } while (0)
    110  1.123.12.1     itohy #define DPRINTFN(n,x)	do { if (ehcidebug>(n)) logprintf x; } while (0)
    111         1.6  augustss int ehcidebug = 0;
    112  1.123.12.1     itohy #ifdef __FreeBSD__
    113  1.123.12.1     itohy SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
    114  1.123.12.1     itohy SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
    115  1.123.12.1     itohy 	   &ehcidebug, 0, "ehci debug level");
    116  1.123.12.1     itohy #endif
    117        1.15  augustss #ifndef __NetBSD__
    118         1.1  augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    119        1.15  augustss #endif
    120         1.1  augustss #else
    121         1.1  augustss #define DPRINTF(x)
    122         1.1  augustss #define DPRINTFN(n,x)
    123         1.1  augustss #endif
    124         1.1  augustss 
    125         1.5  augustss struct ehci_pipe {
    126         1.5  augustss 	struct usbd_pipe pipe;
    127        1.55   mycroft 
    128        1.10  augustss 	ehci_soft_qh_t *sqh;
    129        1.10  augustss 	union {
    130        1.10  augustss 		ehci_soft_qtd_t *qtd;
    131        1.10  augustss 		/* ehci_soft_itd_t *itd; */
    132        1.10  augustss 	} tail;
    133        1.10  augustss 	union {
    134        1.10  augustss 		/* Control pipe */
    135        1.10  augustss 		struct {
    136        1.10  augustss 			usb_dma_t reqdma;
    137        1.10  augustss 			u_int length;
    138        1.10  augustss 		} ctl;
    139        1.10  augustss 		/* Interrupt pipe */
    140        1.78  augustss 		struct {
    141        1.78  augustss 			u_int length;
    142        1.78  augustss 		} intr;
    143        1.10  augustss 		/* Bulk pipe */
    144        1.10  augustss 		struct {
    145        1.10  augustss 			u_int length;
    146        1.10  augustss 		} bulk;
    147        1.10  augustss 		/* Iso pipe */
    148        1.15  augustss 		/* XXX */
    149        1.10  augustss 	} u;
    150         1.5  augustss };
    151         1.5  augustss 
    152         1.5  augustss Static usbd_status	ehci_open(usbd_pipe_handle);
    153         1.5  augustss Static void		ehci_poll(struct usbd_bus *);
    154         1.5  augustss Static void		ehci_softintr(void *);
    155        1.11  augustss Static int		ehci_intr1(ehci_softc_t *);
    156        1.15  augustss Static void		ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
    157        1.18  augustss Static void		ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
    158        1.18  augustss Static void		ehci_idone(struct ehci_xfer *);
    159        1.15  augustss Static void		ehci_timeout(void *);
    160        1.15  augustss Static void		ehci_timeout_task(void *);
    161       1.108   xtraeme Static void		ehci_intrlist_timeout(void *);
    162         1.5  augustss 
    163  1.123.12.1     itohy Static usbd_status	ehci_prealloc(struct ehci_softc *, struct ehci_xfer *,
    164  1.123.12.1     itohy 			    size_t, int);
    165  1.123.12.1     itohy Static usbd_status	ehci_allocm(struct usbd_bus *, usbd_xfer_handle,
    166  1.123.12.1     itohy 			    void *, size_t);
    167  1.123.12.1     itohy Static void		ehci_freem(struct usbd_bus *, usbd_xfer_handle,
    168  1.123.12.1     itohy 			    enum usbd_waitflg);
    169  1.123.12.1     itohy 
    170  1.123.12.1     itohy Static usbd_status	ehci_map_alloc(usbd_xfer_handle);
    171  1.123.12.1     itohy Static void		ehci_map_free(usbd_xfer_handle);
    172  1.123.12.1     itohy Static void		ehci_mapm(usbd_xfer_handle, void *, size_t);
    173  1.123.12.1     itohy Static void		ehci_mapm_mbuf(usbd_xfer_handle, struct mbuf *);
    174  1.123.12.1     itohy Static void		ehci_unmapm(usbd_xfer_handle);
    175         1.5  augustss 
    176  1.123.12.1     itohy Static usbd_xfer_handle	ehci_allocx(struct usbd_bus *, usbd_pipe_handle,
    177  1.123.12.1     itohy 			    enum usbd_waitflg);
    178         1.5  augustss Static void		ehci_freex(struct usbd_bus *, usbd_xfer_handle);
    179         1.5  augustss 
    180         1.5  augustss Static usbd_status	ehci_root_ctrl_transfer(usbd_xfer_handle);
    181         1.5  augustss Static usbd_status	ehci_root_ctrl_start(usbd_xfer_handle);
    182         1.5  augustss Static void		ehci_root_ctrl_abort(usbd_xfer_handle);
    183         1.5  augustss Static void		ehci_root_ctrl_close(usbd_pipe_handle);
    184         1.5  augustss Static void		ehci_root_ctrl_done(usbd_xfer_handle);
    185         1.5  augustss 
    186         1.5  augustss Static usbd_status	ehci_root_intr_transfer(usbd_xfer_handle);
    187         1.5  augustss Static usbd_status	ehci_root_intr_start(usbd_xfer_handle);
    188         1.5  augustss Static void		ehci_root_intr_abort(usbd_xfer_handle);
    189         1.5  augustss Static void		ehci_root_intr_close(usbd_pipe_handle);
    190         1.5  augustss Static void		ehci_root_intr_done(usbd_xfer_handle);
    191         1.5  augustss 
    192         1.5  augustss Static usbd_status	ehci_device_ctrl_transfer(usbd_xfer_handle);
    193         1.5  augustss Static usbd_status	ehci_device_ctrl_start(usbd_xfer_handle);
    194         1.5  augustss Static void		ehci_device_ctrl_abort(usbd_xfer_handle);
    195         1.5  augustss Static void		ehci_device_ctrl_close(usbd_pipe_handle);
    196         1.5  augustss Static void		ehci_device_ctrl_done(usbd_xfer_handle);
    197         1.5  augustss 
    198         1.5  augustss Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle);
    199         1.5  augustss Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle);
    200         1.5  augustss Static void		ehci_device_bulk_abort(usbd_xfer_handle);
    201         1.5  augustss Static void		ehci_device_bulk_close(usbd_pipe_handle);
    202         1.5  augustss Static void		ehci_device_bulk_done(usbd_xfer_handle);
    203         1.5  augustss 
    204         1.5  augustss Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle);
    205         1.5  augustss Static usbd_status	ehci_device_intr_start(usbd_xfer_handle);
    206         1.5  augustss Static void		ehci_device_intr_abort(usbd_xfer_handle);
    207         1.5  augustss Static void		ehci_device_intr_close(usbd_pipe_handle);
    208         1.5  augustss Static void		ehci_device_intr_done(usbd_xfer_handle);
    209         1.5  augustss 
    210         1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle);
    211         1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle);
    212         1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle);
    213         1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle);
    214         1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle);
    215         1.5  augustss 
    216         1.5  augustss Static void		ehci_device_clear_toggle(usbd_pipe_handle pipe);
    217         1.5  augustss Static void		ehci_noop(usbd_pipe_handle pipe);
    218         1.5  augustss 
    219       1.104  christos Static int		ehci_str(usb_string_descriptor_t *, int, const char *);
    220         1.6  augustss Static void		ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
    221         1.6  augustss Static void		ehci_disown(ehci_softc_t *, int, int);
    222         1.5  augustss 
    223  1.123.12.1     itohy Static usbd_status	ehci_grow_sqtd(ehci_softc_t *);
    224         1.9  augustss Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
    225         1.9  augustss Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
    226         1.9  augustss 
    227         1.9  augustss Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
    228  1.123.12.1     itohy Static ehci_soft_qtd_t  *ehci_alloc_sqtd_norsv(ehci_softc_t *);
    229         1.9  augustss Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
    230  1.123.12.1     itohy Static void		ehci_free_sqtd_norsv(ehci_softc_t *, ehci_soft_qtd_t *);
    231        1.25  augustss Static usbd_status	ehci_alloc_sqtd_chain(struct ehci_pipe *,
    232        1.15  augustss 			    ehci_softc_t *, int, int, usbd_xfer_handle,
    233  1.123.12.1     itohy 			    ehci_soft_qtd_t *, ehci_soft_qtd_t *,
    234        1.15  augustss 			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
    235  1.123.12.1     itohy Static void		ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qh_t *,
    236  1.123.12.1     itohy 			    ehci_soft_qtd_t *, ehci_soft_qtd_t *);
    237  1.123.12.1     itohy Static void		ehci_free_desc_chunks(ehci_softc_t *,
    238  1.123.12.1     itohy 			    struct ehci_mdescs *);
    239        1.15  augustss 
    240        1.15  augustss Static usbd_status	ehci_device_request(usbd_xfer_handle xfer);
    241         1.9  augustss 
    242        1.78  augustss Static usbd_status	ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
    243        1.78  augustss 			    int ival);
    244        1.78  augustss 
    245  1.123.12.1     itohy Static void		ehci_add_qh(ehci_softc_t *sc, ehci_soft_qh_t *,
    246  1.123.12.1     itohy 				    ehci_soft_qh_t *);
    247        1.10  augustss Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
    248        1.10  augustss 				    ehci_soft_qh_t *);
    249  1.123.12.1     itohy Static void		ehci_activate_qh(ehci_softc_t *, ehci_soft_qh_t *,
    250  1.123.12.1     itohy 					 ehci_soft_qtd_t *);
    251        1.11  augustss Static void		ehci_sync_hc(ehci_softc_t *);
    252        1.10  augustss 
    253        1.10  augustss Static void		ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
    254        1.10  augustss Static void		ehci_abort_xfer(usbd_xfer_handle, usbd_status);
    255         1.9  augustss 
    256         1.5  augustss #ifdef EHCI_DEBUG
    257        1.18  augustss Static void		ehci_dump_regs(ehci_softc_t *);
    258       1.107  augustss void			ehci_dump(void);
    259         1.6  augustss Static ehci_softc_t 	*theehci;
    260        1.15  augustss Static void		ehci_dump_link(ehci_link_t, int);
    261        1.15  augustss Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
    262         1.9  augustss Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
    263         1.9  augustss Static void		ehci_dump_qtd(ehci_qtd_t *);
    264         1.9  augustss Static void		ehci_dump_sqh(ehci_soft_qh_t *);
    265        1.38    martin #ifdef DIAGNOSTIC
    266        1.18  augustss Static void		ehci_dump_exfer(struct ehci_xfer *);
    267         1.5  augustss #endif
    268        1.38    martin #endif
    269         1.5  augustss 
    270        1.11  augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
    271        1.11  augustss 
    272         1.5  augustss #define EHCI_INTR_ENDPT 1
    273         1.5  augustss 
    274        1.18  augustss #define ehci_add_intr_list(sc, ex) \
    275        1.18  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
    276        1.18  augustss #define ehci_del_intr_list(ex) \
    277        1.44  augustss 	do { \
    278        1.44  augustss 		LIST_REMOVE((ex), inext); \
    279        1.44  augustss 		(ex)->inext.le_prev = NULL; \
    280        1.44  augustss 	} while (0)
    281        1.44  augustss #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
    282        1.18  augustss 
    283       1.123  drochner Static const struct usbd_bus_methods ehci_bus_methods = {
    284         1.5  augustss 	ehci_open,
    285         1.5  augustss 	ehci_softintr,
    286         1.5  augustss 	ehci_poll,
    287         1.5  augustss 	ehci_allocm,
    288         1.5  augustss 	ehci_freem,
    289  1.123.12.1     itohy 	ehci_map_alloc,
    290  1.123.12.1     itohy 	ehci_map_free,
    291  1.123.12.1     itohy 	ehci_mapm,
    292  1.123.12.1     itohy 	ehci_mapm_mbuf,
    293  1.123.12.1     itohy 	ehci_unmapm,
    294         1.5  augustss 	ehci_allocx,
    295         1.5  augustss 	ehci_freex,
    296         1.5  augustss };
    297         1.5  augustss 
    298       1.123  drochner Static const struct usbd_pipe_methods ehci_root_ctrl_methods = {
    299         1.5  augustss 	ehci_root_ctrl_transfer,
    300         1.5  augustss 	ehci_root_ctrl_start,
    301         1.5  augustss 	ehci_root_ctrl_abort,
    302         1.5  augustss 	ehci_root_ctrl_close,
    303         1.5  augustss 	ehci_noop,
    304         1.5  augustss 	ehci_root_ctrl_done,
    305         1.5  augustss };
    306         1.5  augustss 
    307       1.123  drochner Static const struct usbd_pipe_methods ehci_root_intr_methods = {
    308         1.5  augustss 	ehci_root_intr_transfer,
    309         1.5  augustss 	ehci_root_intr_start,
    310         1.5  augustss 	ehci_root_intr_abort,
    311         1.5  augustss 	ehci_root_intr_close,
    312         1.5  augustss 	ehci_noop,
    313         1.5  augustss 	ehci_root_intr_done,
    314         1.5  augustss };
    315         1.5  augustss 
    316       1.123  drochner Static const struct usbd_pipe_methods ehci_device_ctrl_methods = {
    317         1.5  augustss 	ehci_device_ctrl_transfer,
    318         1.5  augustss 	ehci_device_ctrl_start,
    319         1.5  augustss 	ehci_device_ctrl_abort,
    320         1.5  augustss 	ehci_device_ctrl_close,
    321         1.5  augustss 	ehci_noop,
    322         1.5  augustss 	ehci_device_ctrl_done,
    323         1.5  augustss };
    324         1.5  augustss 
    325       1.123  drochner Static const struct usbd_pipe_methods ehci_device_intr_methods = {
    326         1.5  augustss 	ehci_device_intr_transfer,
    327         1.5  augustss 	ehci_device_intr_start,
    328         1.5  augustss 	ehci_device_intr_abort,
    329         1.5  augustss 	ehci_device_intr_close,
    330         1.5  augustss 	ehci_device_clear_toggle,
    331         1.5  augustss 	ehci_device_intr_done,
    332         1.5  augustss };
    333         1.5  augustss 
    334       1.123  drochner Static const struct usbd_pipe_methods ehci_device_bulk_methods = {
    335         1.5  augustss 	ehci_device_bulk_transfer,
    336         1.5  augustss 	ehci_device_bulk_start,
    337         1.5  augustss 	ehci_device_bulk_abort,
    338         1.5  augustss 	ehci_device_bulk_close,
    339         1.5  augustss 	ehci_device_clear_toggle,
    340         1.5  augustss 	ehci_device_bulk_done,
    341         1.5  augustss };
    342         1.5  augustss 
    343       1.123  drochner Static const struct usbd_pipe_methods ehci_device_isoc_methods = {
    344         1.5  augustss 	ehci_device_isoc_transfer,
    345         1.5  augustss 	ehci_device_isoc_start,
    346         1.5  augustss 	ehci_device_isoc_abort,
    347         1.5  augustss 	ehci_device_isoc_close,
    348         1.5  augustss 	ehci_noop,
    349         1.5  augustss 	ehci_device_isoc_done,
    350         1.5  augustss };
    351         1.5  augustss 
    352       1.123  drochner static const uint8_t revbits[EHCI_MAX_POLLRATE] = {
    353        1.95  augustss 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78,
    354        1.95  augustss 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c,
    355        1.95  augustss 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a,
    356        1.95  augustss 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e,
    357        1.95  augustss 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79,
    358        1.95  augustss 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d,
    359        1.95  augustss 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b,
    360        1.95  augustss 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f,
    361        1.94  augustss };
    362        1.94  augustss 
    363         1.1  augustss usbd_status
    364         1.1  augustss ehci_init(ehci_softc_t *sc)
    365         1.1  augustss {
    366       1.104  christos 	u_int32_t vers, sparams, cparams, hcr;
    367         1.3  augustss 	u_int i;
    368         1.3  augustss 	usbd_status err;
    369        1.11  augustss 	ehci_soft_qh_t *sqh;
    370        1.89  augustss 	u_int ncomp;
    371  1.123.12.1     itohy 	int lev;
    372         1.3  augustss 
    373         1.3  augustss 	DPRINTF(("ehci_init: start\n"));
    374         1.6  augustss #ifdef EHCI_DEBUG
    375         1.6  augustss 	theehci = sc;
    376         1.6  augustss #endif
    377         1.3  augustss 
    378         1.3  augustss 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
    379         1.3  augustss 
    380       1.104  christos 	vers = EREAD2(sc, EHCI_HCIVERSION);
    381       1.121        ad 	aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
    382       1.104  christos 	       vers >> 8, vers & 0xff);
    383         1.3  augustss 
    384         1.3  augustss 	sparams = EREAD4(sc, EHCI_HCSPARAMS);
    385         1.3  augustss 	DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
    386         1.6  augustss 	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
    387        1.89  augustss 	ncomp = EHCI_HCS_N_CC(sparams);
    388        1.89  augustss 	if (ncomp != sc->sc_ncomp) {
    389       1.121        ad 		aprint_verbose("%s: wrong number of companions (%d != %d)\n",
    390         1.3  augustss 		       USBDEVNAME(sc->sc_bus.bdev),
    391        1.89  augustss 		       ncomp, sc->sc_ncomp);
    392        1.89  augustss 		if (ncomp < sc->sc_ncomp)
    393        1.89  augustss 			sc->sc_ncomp = ncomp;
    394         1.3  augustss 	}
    395         1.3  augustss 	if (sc->sc_ncomp > 0) {
    396  1.123.12.1     itohy 		printf("%s: companion controller%s, %d port%s each:",
    397         1.3  augustss 		    USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
    398         1.3  augustss 		    EHCI_HCS_N_PCC(sparams),
    399         1.3  augustss 		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
    400         1.3  augustss 		for (i = 0; i < sc->sc_ncomp; i++)
    401  1.123.12.1     itohy 			printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
    402  1.123.12.1     itohy 		printf("\n");
    403         1.3  augustss 	}
    404         1.5  augustss 	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
    405         1.3  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    406         1.3  augustss 	DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
    407       1.106  augustss 	sc->sc_hasppc = EHCI_HCS_PPC(sparams);
    408        1.36  augustss 
    409        1.36  augustss 	if (EHCI_HCC_64BIT(cparams)) {
    410        1.36  augustss 		/* MUST clear segment register if 64 bit capable. */
    411        1.36  augustss 		EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
    412        1.36  augustss 	}
    413        1.33  augustss 
    414         1.3  augustss 	sc->sc_bus.usbrev = USBREV_2_0;
    415  1.123.12.1     itohy 	usb_dma_tag_init(&sc->sc_dmatag);
    416        1.90      fvdl 
    417         1.3  augustss 	/* Reset the controller */
    418         1.3  augustss 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    419         1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
    420         1.3  augustss 	usb_delay_ms(&sc->sc_bus, 1);
    421         1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
    422         1.3  augustss 	for (i = 0; i < 100; i++) {
    423        1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    424         1.3  augustss 		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
    425         1.3  augustss 		if (!hcr)
    426         1.3  augustss 			break;
    427         1.3  augustss 	}
    428         1.3  augustss 	if (hcr) {
    429  1.123.12.1     itohy 		printf("%s: reset timeout\n",
    430        1.41   thorpej 		    USBDEVNAME(sc->sc_bus.bdev));
    431         1.3  augustss 		return (USBD_IOERROR);
    432         1.3  augustss 	}
    433         1.3  augustss 
    434         1.3  augustss 	/* frame list size at default, read back what we got and use that */
    435         1.3  augustss 	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
    436        1.78  augustss 	case 0: sc->sc_flsize = 1024; break;
    437        1.78  augustss 	case 1: sc->sc_flsize = 512; break;
    438        1.78  augustss 	case 2: sc->sc_flsize = 256; break;
    439         1.3  augustss 	case 3: return (USBD_IOERROR);
    440         1.3  augustss 	}
    441  1.123.12.1     itohy 	err = usb_allocmem(&sc->sc_dmatag, sc->sc_flsize * sizeof(ehci_link_t),
    442        1.78  augustss 	    EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
    443         1.3  augustss 	if (err)
    444         1.3  augustss 		return (err);
    445         1.3  augustss 	DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
    446        1.78  augustss 	sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
    447        1.78  augustss 	EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
    448         1.3  augustss 
    449         1.5  augustss 	/* Set up the bus struct. */
    450         1.5  augustss 	sc->sc_bus.methods = &ehci_bus_methods;
    451         1.5  augustss 	sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
    452         1.5  augustss 
    453  1.123.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
    454       1.112  jmcneill 	sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
    455       1.112  jmcneill 	    ehci_power, sc);
    456         1.5  augustss 	sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
    457  1.123.12.1     itohy #endif
    458         1.5  augustss 
    459         1.6  augustss 	sc->sc_eintrs = EHCI_NORMAL_INTRS;
    460         1.6  augustss 
    461        1.78  augustss 	/*
    462  1.123.12.1     itohy 	 * Allocate the interrupt dummy QHs. These are arranged to give
    463  1.123.12.1     itohy 	 * poll intervals that are powers of 2 times 1ms.
    464        1.78  augustss 	 */
    465        1.78  augustss 	for (i = 0; i < EHCI_INTRQHS; i++) {
    466        1.78  augustss 		sqh = ehci_alloc_sqh(sc);
    467        1.78  augustss 		if (sqh == NULL) {
    468        1.78  augustss 			err = USBD_NOMEM;
    469        1.78  augustss 			goto bad1;
    470        1.78  augustss 		}
    471        1.78  augustss 		sc->sc_islots[i].sqh = sqh;
    472        1.78  augustss 	}
    473  1.123.12.1     itohy 	lev = 0;
    474        1.78  augustss 	for (i = 0; i < EHCI_INTRQHS; i++) {
    475  1.123.12.1     itohy 		if (i == EHCI_IQHIDX(lev + 1, 0))
    476  1.123.12.1     itohy 			lev++;
    477        1.78  augustss 		sqh = sc->sc_islots[i].sqh;
    478        1.78  augustss 		if (i == 0) {
    479        1.78  augustss 			/* The last (1ms) QH terminates. */
    480        1.78  augustss 			sqh->qh.qh_link = EHCI_NULL;
    481        1.78  augustss 			sqh->next = NULL;
    482        1.78  augustss 		} else {
    483        1.78  augustss 			/* Otherwise the next QH has half the poll interval */
    484  1.123.12.1     itohy 			sqh->next =
    485  1.123.12.1     itohy 			    sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
    486  1.123.12.1     itohy 			sqh->qh.qh_link = htole32(EHCI_SQH_DMAADDR(sqh->next) |
    487        1.78  augustss 			    EHCI_LINK_QH);
    488        1.78  augustss 		}
    489        1.78  augustss 		sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
    490  1.123.12.1     itohy 		sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
    491        1.78  augustss 		sqh->qh.qh_curqtd = EHCI_NULL;
    492        1.78  augustss 		sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    493        1.78  augustss 		sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    494        1.78  augustss 		sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    495        1.78  augustss 	}
    496        1.78  augustss 	/* Point the frame list at the last level (128ms). */
    497        1.78  augustss 	for (i = 0; i < sc->sc_flsize; i++) {
    498        1.94  augustss 		int j;
    499        1.94  augustss 
    500        1.94  augustss 		j = (i & ~(EHCI_MAX_POLLRATE-1)) |
    501        1.94  augustss 		    revbits[i & (EHCI_MAX_POLLRATE-1)];
    502        1.94  augustss 		sc->sc_flist[j] = htole32(EHCI_LINK_QH |
    503  1.123.12.1     itohy 		    EHCI_SQH_DMAADDR(sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES
    504  1.123.12.1     itohy 		    - 1, i)].sqh));
    505        1.78  augustss 	}
    506  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    507        1.78  augustss 
    508        1.11  augustss 	/* Allocate dummy QH that starts the async list. */
    509        1.11  augustss 	sqh = ehci_alloc_sqh(sc);
    510        1.11  augustss 	if (sqh == NULL) {
    511         1.9  augustss 		err = USBD_NOMEM;
    512         1.9  augustss 		goto bad1;
    513         1.9  augustss 	}
    514        1.11  augustss 	/* Fill the QH */
    515        1.11  augustss 	sqh->qh.qh_endp =
    516        1.11  augustss 	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
    517        1.11  augustss 	sqh->qh.qh_link =
    518  1.123.12.1     itohy 	    htole32(EHCI_SQH_DMAADDR(sqh) | EHCI_LINK_QH);
    519        1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
    520  1.123.12.1     itohy 	sqh->prev = sqh; /*It's a circular list.. */
    521  1.123.12.1     itohy 	sqh->next = sqh;
    522        1.11  augustss 	/* Fill the overlay qTD */
    523        1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    524        1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    525  1.123.12.1     itohy 	sqh->qh.qh_qtd.qtd_status = htole32(0);
    526         1.9  augustss #ifdef EHCI_DEBUG
    527         1.9  augustss 	if (ehcidebug) {
    528        1.27     enami 		ehci_dump_sqh(sqh);
    529         1.9  augustss 	}
    530         1.9  augustss #endif
    531  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    532         1.9  augustss 
    533         1.9  augustss 	/* Point to async list */
    534        1.11  augustss 	sc->sc_async_head = sqh;
    535  1.123.12.1     itohy 	EOWRITE4(sc, EHCI_ASYNCLISTADDR, EHCI_SQH_DMAADDR(sqh) | EHCI_LINK_QH);
    536         1.9  augustss 
    537       1.108   xtraeme 	usb_callout_init(sc->sc_tmo_intrlist);
    538         1.9  augustss 
    539        1.10  augustss 	lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
    540        1.10  augustss 
    541  1.123.12.1     itohy 	/* Enable interrupts */
    542  1.123.12.1     itohy 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    543  1.123.12.1     itohy 
    544         1.6  augustss 	/* Turn on controller */
    545         1.6  augustss 	EOWRITE4(sc, EHCI_USBCMD,
    546        1.88  augustss 		 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
    547         1.6  augustss 		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
    548        1.10  augustss 		 EHCI_CMD_ASE |
    549        1.78  augustss 		 EHCI_CMD_PSE |
    550         1.6  augustss 		 EHCI_CMD_RS);
    551         1.6  augustss 
    552         1.6  augustss 	/* Take over port ownership */
    553         1.6  augustss 	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
    554         1.6  augustss 
    555         1.8  augustss 	for (i = 0; i < 100; i++) {
    556        1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    557         1.8  augustss 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
    558         1.8  augustss 		if (!hcr)
    559         1.8  augustss 			break;
    560         1.8  augustss 	}
    561         1.8  augustss 	if (hcr) {
    562  1.123.12.1     itohy 		printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    563         1.8  augustss 		return (USBD_IOERROR);
    564         1.8  augustss 	}
    565         1.8  augustss 
    566       1.105  augustss 	/* Enable interrupts */
    567       1.105  augustss 	DPRINTFN(1,("ehci_init: enabling\n"));
    568       1.105  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    569       1.105  augustss 
    570         1.5  augustss 	return (USBD_NORMAL_COMPLETION);
    571         1.9  augustss 
    572         1.9  augustss #if 0
    573        1.11  augustss  bad2:
    574        1.15  augustss 	ehci_free_sqh(sc, sc->sc_async_head);
    575         1.9  augustss #endif
    576         1.9  augustss  bad1:
    577  1.123.12.1     itohy 	usb_freemem(&sc->sc_dmatag, &sc->sc_fldma);
    578  1.123.12.1     itohy 	usb_dma_tag_finish(&sc->sc_dmatag);
    579         1.9  augustss 	return (err);
    580         1.1  augustss }
    581         1.1  augustss 
    582         1.1  augustss int
    583         1.1  augustss ehci_intr(void *v)
    584         1.1  augustss {
    585         1.6  augustss 	ehci_softc_t *sc = v;
    586         1.6  augustss 
    587        1.17  augustss 	if (sc == NULL || sc->sc_dying)
    588        1.15  augustss 		return (0);
    589        1.15  augustss 
    590         1.6  augustss 	/* If we get an interrupt while polling, then just ignore it. */
    591         1.6  augustss 	if (sc->sc_bus.use_polling) {
    592        1.78  augustss 		u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    593        1.78  augustss 
    594        1.78  augustss 		if (intrs)
    595        1.78  augustss 			EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    596         1.6  augustss #ifdef DIAGNOSTIC
    597        1.65   mycroft 		DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
    598         1.6  augustss #endif
    599         1.6  augustss 		return (0);
    600         1.6  augustss 	}
    601         1.6  augustss 
    602        1.33  augustss 	return (ehci_intr1(sc));
    603         1.6  augustss }
    604         1.6  augustss 
    605         1.6  augustss Static int
    606         1.6  augustss ehci_intr1(ehci_softc_t *sc)
    607         1.6  augustss {
    608         1.6  augustss 	u_int32_t intrs, eintrs;
    609         1.6  augustss 
    610         1.6  augustss 	DPRINTFN(20,("ehci_intr1: enter\n"));
    611         1.6  augustss 
    612         1.6  augustss 	/* In case the interrupt occurs before initialization has completed. */
    613         1.6  augustss 	if (sc == NULL) {
    614         1.6  augustss #ifdef DIAGNOSTIC
    615        1.72  augustss 		printf("ehci_intr1: sc == NULL\n");
    616         1.6  augustss #endif
    617         1.6  augustss 		return (0);
    618         1.6  augustss 	}
    619         1.6  augustss 
    620         1.6  augustss 	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    621         1.6  augustss 	if (!intrs)
    622         1.6  augustss 		return (0);
    623         1.6  augustss 
    624         1.6  augustss 	eintrs = intrs & sc->sc_eintrs;
    625        1.72  augustss 	DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
    626         1.6  augustss 		     sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
    627         1.6  augustss 		     (u_int)eintrs));
    628         1.6  augustss 	if (!eintrs)
    629         1.6  augustss 		return (0);
    630         1.6  augustss 
    631        1.68   mycroft 	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    632         1.6  augustss 	sc->sc_bus.intr_context++;
    633         1.6  augustss 	sc->sc_bus.no_intrs++;
    634        1.10  augustss 	if (eintrs & EHCI_STS_IAA) {
    635        1.10  augustss 		DPRINTF(("ehci_intr1: door bell\n"));
    636        1.11  augustss 		wakeup(&sc->sc_async_head);
    637        1.20  augustss 		eintrs &= ~EHCI_STS_IAA;
    638        1.10  augustss 	}
    639        1.18  augustss 	if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
    640        1.46  augustss 		DPRINTFN(5,("ehci_intr1: %s %s\n",
    641        1.46  augustss 			    eintrs & EHCI_STS_INT ? "INT" : "",
    642        1.46  augustss 			    eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
    643        1.18  augustss 		usb_schedsoftintr(&sc->sc_bus);
    644        1.21  augustss 		eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
    645         1.6  augustss 	}
    646         1.6  augustss 	if (eintrs & EHCI_STS_HSE) {
    647         1.6  augustss 		printf("%s: unrecoverable error, controller halted\n",
    648         1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
    649         1.6  augustss 		/* XXX what else */
    650         1.6  augustss 	}
    651         1.6  augustss 	if (eintrs & EHCI_STS_PCD) {
    652         1.6  augustss 		ehci_pcd(sc, sc->sc_intrxfer);
    653         1.6  augustss 		eintrs &= ~EHCI_STS_PCD;
    654         1.6  augustss 	}
    655         1.6  augustss 
    656         1.6  augustss 	sc->sc_bus.intr_context--;
    657         1.6  augustss 
    658         1.6  augustss 	if (eintrs != 0) {
    659         1.6  augustss 		/* Block unprocessed interrupts. */
    660         1.6  augustss 		sc->sc_eintrs &= ~eintrs;
    661         1.6  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    662         1.6  augustss 		printf("%s: blocking intrs 0x%x\n",
    663         1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev), eintrs);
    664         1.6  augustss 	}
    665         1.6  augustss 
    666         1.6  augustss 	return (1);
    667         1.6  augustss }
    668         1.6  augustss 
    669         1.6  augustss 
    670         1.6  augustss void
    671         1.6  augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
    672         1.6  augustss {
    673         1.6  augustss 	usbd_pipe_handle pipe;
    674         1.6  augustss 	u_char *p;
    675         1.6  augustss 	int i, m;
    676         1.6  augustss 
    677         1.6  augustss 	if (xfer == NULL) {
    678         1.6  augustss 		/* Just ignore the change. */
    679         1.6  augustss 		return;
    680         1.6  augustss 	}
    681         1.6  augustss 
    682         1.6  augustss 	pipe = xfer->pipe;
    683         1.6  augustss 
    684  1.123.12.1     itohy 	p = xfer->hcbuffer;
    685         1.6  augustss 	m = min(sc->sc_noport, xfer->length * 8 - 1);
    686         1.6  augustss 	memset(p, 0, xfer->length);
    687         1.6  augustss 	for (i = 1; i <= m; i++) {
    688         1.6  augustss 		/* Pick out CHANGE bits from the status reg. */
    689         1.6  augustss 		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
    690         1.6  augustss 			p[i/8] |= 1 << (i%8);
    691         1.6  augustss 	}
    692         1.6  augustss 	DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
    693         1.6  augustss 	xfer->actlen = xfer->length;
    694         1.6  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    695         1.6  augustss 
    696  1.123.12.1     itohy 	usb_transfer_complete_dma(xfer, &sc->sc_dmatag, &EXFER(xfer)->dmabuf);
    697         1.1  augustss }
    698         1.1  augustss 
    699         1.5  augustss void
    700         1.5  augustss ehci_softintr(void *v)
    701         1.5  augustss {
    702        1.18  augustss 	ehci_softc_t *sc = v;
    703        1.53       chs 	struct ehci_xfer *ex, *nextex;
    704        1.18  augustss 
    705        1.18  augustss 	DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
    706        1.18  augustss 		     sc->sc_bus.intr_context));
    707        1.18  augustss 
    708        1.18  augustss 	sc->sc_bus.intr_context++;
    709        1.18  augustss 
    710        1.18  augustss 	/*
    711        1.18  augustss 	 * The only explanation I can think of for why EHCI is as brain dead
    712        1.18  augustss 	 * as UHCI interrupt-wise is that Intel was involved in both.
    713        1.18  augustss 	 * An interrupt just tells us that something is done, we have no
    714        1.18  augustss 	 * clue what, so we need to scan through all active transfers. :-(
    715        1.18  augustss 	 */
    716        1.53       chs 	for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
    717        1.53       chs 		nextex = LIST_NEXT(ex, inext);
    718        1.18  augustss 		ehci_check_intr(sc, ex);
    719        1.53       chs 	}
    720        1.18  augustss 
    721       1.108   xtraeme 	/* Schedule a callout to catch any dropped transactions. */
    722  1.123.12.1     itohy 	if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
    723  1.123.12.1     itohy 	    !LIST_EMPTY(&sc->sc_intrhead))
    724  1.123.12.1     itohy 		usb_callout(sc->sc_tmo_intrlist, hz / 5, ehci_intrlist_timeout,
    725  1.123.12.1     itohy 		   sc);
    726  1.123.12.1     itohy 
    727  1.123.12.1     itohy 	/* Schedule a callout to catch any dropped transactions. */
    728       1.108   xtraeme 	if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
    729       1.108   xtraeme 	    !LIST_EMPTY(&sc->sc_intrhead))
    730       1.108   xtraeme 		usb_callout(sc->sc_tmo_intrlist, hz,
    731       1.108   xtraeme 		    ehci_intrlist_timeout, sc);
    732       1.108   xtraeme 
    733        1.77  augustss #ifdef USB_USE_SOFTINTR
    734        1.29  augustss 	if (sc->sc_softwake) {
    735        1.29  augustss 		sc->sc_softwake = 0;
    736        1.29  augustss 		wakeup(&sc->sc_softwake);
    737        1.29  augustss 	}
    738        1.77  augustss #endif /* USB_USE_SOFTINTR */
    739        1.29  augustss 
    740        1.18  augustss 	sc->sc_bus.intr_context--;
    741        1.18  augustss }
    742        1.18  augustss 
    743        1.18  augustss /* Check for an interrupt. */
    744        1.18  augustss void
    745       1.115  christos ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
    746        1.18  augustss {
    747        1.18  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    748        1.18  augustss 	u_int32_t status;
    749        1.18  augustss 
    750        1.22  augustss 	DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
    751        1.18  augustss 
    752        1.18  augustss 	if (ex->sqtdstart == NULL) {
    753        1.18  augustss 		printf("ehci_check_intr: sqtdstart=NULL\n");
    754        1.18  augustss 		return;
    755        1.18  augustss 	}
    756        1.18  augustss 	lsqtd = ex->sqtdend;
    757        1.18  augustss #ifdef DIAGNOSTIC
    758        1.18  augustss 	if (lsqtd == NULL) {
    759        1.84  augustss 		printf("ehci_check_intr: lsqtd==0\n");
    760        1.18  augustss 		return;
    761        1.18  augustss 	}
    762        1.18  augustss #endif
    763        1.33  augustss 	/*
    764        1.18  augustss 	 * If the last TD is still active we need to check whether there
    765        1.18  augustss 	 * is a an error somewhere in the middle, or whether there was a
    766        1.18  augustss 	 * short packet (SPD and not ACTIVE).
    767        1.18  augustss 	 */
    768  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, lsqtd, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    769        1.18  augustss 	if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
    770        1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
    771        1.18  augustss 		for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
    772  1.123.12.1     itohy 			EHCI_SQTD_SYNC(sc, sqtd,
    773  1.123.12.1     itohy 			    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    774        1.18  augustss 			status = le32toh(sqtd->qtd.qtd_status);
    775        1.18  augustss 			/* If there's an active QTD the xfer isn't done. */
    776        1.18  augustss 			if (status & EHCI_QTD_ACTIVE)
    777        1.18  augustss 				break;
    778        1.18  augustss 			/* Any kind of error makes the xfer done. */
    779        1.18  augustss 			if (status & EHCI_QTD_HALTED)
    780        1.18  augustss 				goto done;
    781        1.18  augustss 			/* We want short packets, and it is short: it's done */
    782        1.58   mycroft 			if (EHCI_QTD_GET_BYTES(status) != 0)
    783        1.18  augustss 				goto done;
    784        1.18  augustss 		}
    785        1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
    786        1.18  augustss 			      ex, ex->sqtdstart));
    787        1.18  augustss 		return;
    788        1.18  augustss 	}
    789        1.18  augustss  done:
    790        1.18  augustss 	DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
    791        1.18  augustss 	usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
    792  1.123.12.1     itohy 	usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
    793        1.18  augustss 	ehci_idone(ex);
    794        1.18  augustss }
    795        1.18  augustss 
    796        1.18  augustss void
    797        1.18  augustss ehci_idone(struct ehci_xfer *ex)
    798        1.18  augustss {
    799        1.18  augustss 	usbd_xfer_handle xfer = &ex->xfer;
    800        1.18  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
    801  1.123.12.1     itohy 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
    802        1.82  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    803        1.82  augustss 	u_int32_t status = 0, nstatus = 0;
    804  1.123.12.1     itohy 	ehci_physaddr_t nextphys, altnextphys;
    805  1.123.12.1     itohy 	ehci_physaddr_t	stdma;
    806  1.123.12.1     itohy 	int actlen, cerr;
    807        1.18  augustss 
    808        1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
    809        1.18  augustss #ifdef DIAGNOSTIC
    810        1.18  augustss 	{
    811        1.18  augustss 		int s = splhigh();
    812        1.18  augustss 		if (ex->isdone) {
    813        1.18  augustss 			splx(s);
    814        1.18  augustss #ifdef EHCI_DEBUG
    815        1.18  augustss 			printf("ehci_idone: ex is done!\n   ");
    816        1.18  augustss 			ehci_dump_exfer(ex);
    817        1.18  augustss #else
    818        1.18  augustss 			printf("ehci_idone: ex=%p is done!\n", ex);
    819        1.18  augustss #endif
    820        1.18  augustss 			return;
    821        1.18  augustss 		}
    822        1.18  augustss 		ex->isdone = 1;
    823        1.18  augustss 		splx(s);
    824        1.18  augustss 	}
    825        1.18  augustss #endif
    826        1.18  augustss 
    827        1.18  augustss 	if (xfer->status == USBD_CANCELLED ||
    828        1.18  augustss 	    xfer->status == USBD_TIMEOUT) {
    829        1.18  augustss 		DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
    830        1.18  augustss 		return;
    831        1.18  augustss 	}
    832        1.18  augustss 
    833        1.18  augustss #ifdef EHCI_DEBUG
    834        1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
    835        1.18  augustss 	if (ehcidebug > 10)
    836        1.18  augustss 		ehci_dump_sqtds(ex->sqtdstart);
    837        1.18  augustss #endif
    838        1.18  augustss 
    839  1.123.12.1     itohy 	/*
    840  1.123.12.1     itohy 	 * Make sure that the QH overlay qTD does not reference any
    841  1.123.12.1     itohy 	 * of the qTDs we are about to free. This is probably only
    842  1.123.12.1     itohy 	 * necessary if the transfer is marked as HALTED.
    843  1.123.12.1     itohy 	 */
    844  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, epipe->sqh,
    845  1.123.12.1     itohy 	    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    846  1.123.12.1     itohy 	nextphys = EHCI_LINK_ADDR(le32toh(epipe->sqh->qh.qh_qtd.qtd_next));
    847  1.123.12.1     itohy 	altnextphys =
    848  1.123.12.1     itohy 	    EHCI_LINK_ADDR(le32toh(epipe->sqh->qh.qh_qtd.qtd_altnext));
    849  1.123.12.1     itohy 	for (sqtd = ex->sqtdstart; sqtd != ex->sqtdend->nextqtd;
    850  1.123.12.1     itohy 	     sqtd = sqtd->nextqtd) {
    851  1.123.12.1     itohy 		stdma = EHCI_SQTD_DMAADDR(sqtd);
    852  1.123.12.1     itohy 		if (stdma == nextphys) {
    853  1.123.12.1     itohy 			epipe->sqh->qh.qh_qtd.qtd_next =
    854  1.123.12.1     itohy 			    htole32(EHCI_SQTD_DMAADDR(ex->sqtdend->nextqtd));
    855  1.123.12.1     itohy 			DPRINTFN(4, ("ehci_idone: updated overlay next ptr\n"));
    856  1.123.12.1     itohy 			EHCI_SQH_SYNC(sc, epipe->sqh,
    857  1.123.12.1     itohy 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    858  1.123.12.1     itohy 
    859  1.123.12.1     itohy 		}
    860  1.123.12.1     itohy 		if (stdma == altnextphys) {
    861  1.123.12.1     itohy 			DPRINTFN(4,
    862  1.123.12.1     itohy 			    ("ehci_idone: updated overlay altnext ptr\n"));
    863  1.123.12.1     itohy 			epipe->sqh->qh.qh_qtd.qtd_altnext =
    864  1.123.12.1     itohy 			    htole32(EHCI_SQTD_DMAADDR(ex->sqtdend->nextqtd));
    865  1.123.12.1     itohy 			EHCI_SQH_SYNC(sc, epipe->sqh,
    866  1.123.12.1     itohy 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    867  1.123.12.1     itohy 		}
    868  1.123.12.1     itohy 	}
    869  1.123.12.1     itohy 
    870        1.18  augustss 	/* The transfer is done, compute actual length and status. */
    871        1.82  augustss 	lsqtd = ex->sqtdend;
    872        1.18  augustss 	actlen = 0;
    873        1.82  augustss 	for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
    874  1.123.12.1     itohy 		EHCI_SQTD_SYNC(sc, sqtd,
    875  1.123.12.1     itohy 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    876        1.18  augustss 		nstatus = le32toh(sqtd->qtd.qtd_status);
    877        1.18  augustss 		if (nstatus & EHCI_QTD_ACTIVE)
    878        1.18  augustss 			break;
    879        1.18  augustss 
    880        1.18  augustss 		status = nstatus;
    881        1.18  augustss 		if (EHCI_QTD_GET_PID(status) !=	EHCI_QTD_PID_SETUP)
    882        1.18  augustss 			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
    883        1.18  augustss 	}
    884        1.22  augustss 
    885  1.123.12.1     itohy 	cerr = EHCI_QTD_GET_CERR(status);
    886  1.123.12.1     itohy 	DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
    887  1.123.12.1     itohy 	    "status=0x%x\n", xfer->length, actlen, cerr, status));
    888        1.18  augustss 	xfer->actlen = actlen;
    889  1.123.12.1     itohy 	if ((status & EHCI_QTD_HALTED) != 0) {
    890        1.18  augustss #ifdef EHCI_DEBUG
    891        1.18  augustss 		char sbuf[128];
    892        1.18  augustss 
    893        1.18  augustss 		bitmask_snprintf((u_int32_t)status,
    894  1.123.12.1     itohy 		    "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
    895  1.123.12.1     itohy 		    "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
    896        1.18  augustss 
    897  1.123.12.1     itohy 		DPRINTFN(2,
    898  1.123.12.1     itohy 			 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
    899        1.18  augustss 			  "status 0x%s\n",
    900        1.18  augustss 			  xfer->pipe->device->address,
    901        1.18  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
    902        1.18  augustss 			  sbuf));
    903        1.23  augustss 		if (ehcidebug > 2) {
    904        1.23  augustss 			ehci_dump_sqh(epipe->sqh);
    905        1.23  augustss 			ehci_dump_sqtds(ex->sqtdstart);
    906        1.23  augustss 		}
    907        1.18  augustss #endif
    908        1.98  augustss 		/* low&full speed has an extra error flag */
    909        1.98  augustss 		if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) !=
    910        1.98  augustss 		    EHCI_QH_SPEED_HIGH)
    911        1.98  augustss 			status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE;
    912        1.98  augustss 		else
    913        1.98  augustss 			status &= EHCI_QTD_STATERRS;
    914        1.98  augustss 		if (status == 0) /* no other errors means a stall */
    915        1.18  augustss 			xfer->status = USBD_STALLED;
    916        1.18  augustss 		else
    917        1.18  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
    918        1.98  augustss 		/* XXX need to reset TT on missed microframe */
    919        1.98  augustss 		if (status & EHCI_QTD_MISSEDMICRO) {
    920        1.98  augustss 			printf("%s: missed microframe, TT reset not "
    921        1.98  augustss 			    "implemented, hub might be inoperational\n",
    922        1.98  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
    923        1.98  augustss 		}
    924        1.18  augustss 	} else {
    925        1.18  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
    926        1.18  augustss 	}
    927        1.18  augustss 
    928  1.123.12.1     itohy 	usb_transfer_complete_dma(xfer, &sc->sc_dmatag, &EXFER(xfer)->dmabuf);
    929        1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
    930         1.5  augustss }
    931         1.5  augustss 
    932        1.15  augustss /*
    933        1.15  augustss  * Wait here until controller claims to have an interrupt.
    934        1.18  augustss  * Then call ehci_intr and return.  Use timeout to avoid waiting
    935        1.15  augustss  * too long.
    936        1.15  augustss  */
    937        1.15  augustss void
    938        1.15  augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
    939        1.15  augustss {
    940        1.97  augustss 	int timo;
    941        1.15  augustss 	u_int32_t intrs;
    942        1.15  augustss 
    943        1.15  augustss 	xfer->status = USBD_IN_PROGRESS;
    944        1.97  augustss 	for (timo = xfer->timeout; timo >= 0; timo--) {
    945        1.15  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    946        1.17  augustss 		if (sc->sc_dying)
    947        1.17  augustss 			break;
    948        1.15  augustss 		intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
    949        1.15  augustss 			sc->sc_eintrs;
    950        1.15  augustss 		DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
    951        1.70      yamt #ifdef EHCI_DEBUG
    952        1.15  augustss 		if (ehcidebug > 15)
    953        1.18  augustss 			ehci_dump_regs(sc);
    954        1.15  augustss #endif
    955        1.15  augustss 		if (intrs) {
    956        1.15  augustss 			ehci_intr1(sc);
    957        1.15  augustss 			if (xfer->status != USBD_IN_PROGRESS)
    958        1.15  augustss 				return;
    959        1.15  augustss 		}
    960        1.15  augustss 	}
    961        1.15  augustss 
    962        1.15  augustss 	/* Timeout */
    963        1.15  augustss 	DPRINTF(("ehci_waitintr: timeout\n"));
    964        1.15  augustss 	xfer->status = USBD_TIMEOUT;
    965  1.123.12.1     itohy 	usb_transfer_complete_dma(xfer, &sc->sc_dmatag, &EXFER(xfer)->dmabuf);
    966        1.15  augustss 	/* XXX should free TD */
    967        1.15  augustss }
    968        1.15  augustss 
    969         1.5  augustss void
    970         1.5  augustss ehci_poll(struct usbd_bus *bus)
    971         1.5  augustss {
    972         1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)bus;
    973         1.5  augustss #ifdef EHCI_DEBUG
    974         1.5  augustss 	static int last;
    975         1.5  augustss 	int new;
    976         1.6  augustss 	new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    977         1.5  augustss 	if (new != last) {
    978         1.5  augustss 		DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
    979         1.5  augustss 		last = new;
    980         1.5  augustss 	}
    981         1.5  augustss #endif
    982         1.5  augustss 
    983         1.6  augustss 	if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
    984         1.5  augustss 		ehci_intr1(sc);
    985         1.5  augustss }
    986         1.5  augustss 
    987         1.1  augustss int
    988         1.1  augustss ehci_detach(struct ehci_softc *sc, int flags)
    989         1.1  augustss {
    990         1.1  augustss 	int rv = 0;
    991  1.123.12.1     itohy 	usbd_xfer_handle xfer;
    992         1.1  augustss 
    993  1.123.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
    994         1.1  augustss 	if (sc->sc_child != NULL)
    995         1.1  augustss 		rv = config_detach(sc->sc_child, flags);
    996        1.33  augustss 
    997         1.1  augustss 	if (rv != 0)
    998         1.1  augustss 		return (rv);
    999  1.123.12.1     itohy #else
   1000  1.123.12.1     itohy 	sc->sc_dying = 1;
   1001  1.123.12.1     itohy #endif
   1002         1.1  augustss 
   1003  1.123.12.1     itohy 	if (sc->sc_bus.methods == NULL)
   1004  1.123.12.1     itohy 		return (rv);	/* attach has been aborted */
   1005  1.123.12.1     itohy 
   1006  1.123.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
   1007  1.123.12.1     itohy 	/* Don't touch hardware if it has already been gone. */
   1008  1.123.12.1     itohy 	if ((flags & DETACH_FORCE) == 0)
   1009  1.123.12.1     itohy #endif
   1010  1.123.12.1     itohy 	{
   1011  1.123.12.1     itohy 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
   1012  1.123.12.1     itohy 		EOWRITE4(sc, EHCI_USBCMD, 0);
   1013  1.123.12.1     itohy 		EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
   1014  1.123.12.1     itohy 	}
   1015       1.108   xtraeme 	usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc);
   1016         1.6  augustss 
   1017  1.123.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
   1018         1.1  augustss 	if (sc->sc_powerhook != NULL)
   1019         1.1  augustss 		powerhook_disestablish(sc->sc_powerhook);
   1020         1.1  augustss 	if (sc->sc_shutdownhook != NULL)
   1021         1.1  augustss 		shutdownhook_disestablish(sc->sc_shutdownhook);
   1022  1.123.12.1     itohy #endif
   1023         1.1  augustss 
   1024        1.17  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
   1025        1.15  augustss 
   1026  1.123.12.1     itohy 	usb_freemem(&sc->sc_dmatag, &sc->sc_fldma);
   1027         1.1  augustss 	/* XXX free other data structures XXX */
   1028         1.1  augustss 
   1029  1.123.12.1     itohy 	while ((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) {
   1030  1.123.12.1     itohy 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
   1031  1.123.12.1     itohy 		usb_clean_buffer_dma(&sc->sc_dmatag, &EXFER(xfer)->dmabuf);
   1032  1.123.12.1     itohy 		free(xfer, M_USB);
   1033  1.123.12.1     itohy 	}
   1034  1.123.12.1     itohy 	ehci_free_desc_chunks(sc, &sc->sc_sqh_chunks);
   1035  1.123.12.1     itohy 	ehci_free_desc_chunks(sc, &sc->sc_sqtd_chunks);
   1036  1.123.12.1     itohy 	usb_dma_tag_finish(&sc->sc_dmatag);
   1037  1.123.12.1     itohy 
   1038         1.1  augustss 	return (rv);
   1039         1.1  augustss }
   1040         1.1  augustss 
   1041  1.123.12.1     itohy Static void
   1042  1.123.12.1     itohy ehci_free_desc_chunks(ehci_softc_t *sc, struct ehci_mdescs *c)
   1043  1.123.12.1     itohy {
   1044  1.123.12.1     itohy 	struct ehci_mem_desc *em;
   1045  1.123.12.1     itohy 
   1046  1.123.12.1     itohy 	while ((em = SIMPLEQ_FIRST(c)) != NULL) {
   1047  1.123.12.1     itohy 		SIMPLEQ_REMOVE_HEAD(c, em_next);
   1048  1.123.12.1     itohy 		usb_freemem(&sc->sc_dmatag, &em->em_dma);
   1049  1.123.12.1     itohy 	}
   1050  1.123.12.1     itohy }
   1051         1.1  augustss 
   1052  1.123.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
   1053         1.1  augustss int
   1054  1.123.12.1     itohy ehci_activate(device_t self, enum devact act)
   1055         1.1  augustss {
   1056         1.1  augustss 	struct ehci_softc *sc = (struct ehci_softc *)self;
   1057         1.1  augustss 	int rv = 0;
   1058         1.1  augustss 
   1059         1.1  augustss 	switch (act) {
   1060         1.1  augustss 	case DVACT_ACTIVATE:
   1061         1.1  augustss 		return (EOPNOTSUPP);
   1062         1.1  augustss 
   1063         1.1  augustss 	case DVACT_DEACTIVATE:
   1064         1.1  augustss 		if (sc->sc_child != NULL)
   1065         1.1  augustss 			rv = config_deactivate(sc->sc_child);
   1066         1.5  augustss 		sc->sc_dying = 1;
   1067         1.1  augustss 		break;
   1068         1.1  augustss 	}
   1069         1.1  augustss 	return (rv);
   1070         1.1  augustss }
   1071  1.123.12.1     itohy #endif
   1072         1.1  augustss 
   1073         1.5  augustss /*
   1074         1.5  augustss  * Handle suspend/resume.
   1075         1.5  augustss  *
   1076         1.5  augustss  * We need to switch to polling mode here, because this routine is
   1077        1.73  augustss  * called from an interrupt context.  This is all right since we
   1078         1.5  augustss  * are almost suspended anyway.
   1079         1.5  augustss  */
   1080         1.5  augustss void
   1081         1.5  augustss ehci_power(int why, void *v)
   1082         1.5  augustss {
   1083         1.5  augustss 	ehci_softc_t *sc = v;
   1084        1.74  augustss 	u_int32_t cmd, hcr;
   1085        1.74  augustss 	int s, i;
   1086         1.5  augustss 
   1087         1.5  augustss #ifdef EHCI_DEBUG
   1088         1.5  augustss 	DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
   1089        1.74  augustss 	if (ehcidebug > 0)
   1090        1.74  augustss 		ehci_dump_regs(sc);
   1091         1.5  augustss #endif
   1092         1.5  augustss 
   1093         1.5  augustss 	s = splhardusb();
   1094         1.5  augustss 	switch (why) {
   1095  1.123.12.1     itohy 	USB_PWR_CASE_SUSPEND:
   1096         1.5  augustss 		sc->sc_bus.use_polling++;
   1097        1.74  augustss 
   1098  1.123.12.1     itohy 		for (i = 1; i <= sc->sc_noport; i++) {
   1099  1.123.12.1     itohy 			cmd = EOREAD4(sc, EHCI_PORTSC(i));
   1100  1.123.12.1     itohy 			if ((cmd & EHCI_PS_PO) == 0 &&
   1101  1.123.12.1     itohy 			    (cmd & EHCI_PS_PE) == EHCI_PS_PE)
   1102  1.123.12.1     itohy 				EOWRITE4(sc, EHCI_PORTSC(i),
   1103  1.123.12.1     itohy 				    cmd | EHCI_PS_SUSP);
   1104  1.123.12.1     itohy 		}
   1105  1.123.12.1     itohy 
   1106        1.74  augustss 		sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
   1107        1.74  augustss 
   1108        1.74  augustss 		cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
   1109        1.74  augustss 		EOWRITE4(sc, EHCI_USBCMD, cmd);
   1110        1.74  augustss 
   1111        1.74  augustss 		for (i = 0; i < 100; i++) {
   1112        1.74  augustss 			hcr = EOREAD4(sc, EHCI_USBSTS) &
   1113        1.74  augustss 			    (EHCI_STS_ASS | EHCI_STS_PSS);
   1114        1.74  augustss 			if (hcr == 0)
   1115        1.74  augustss 				break;
   1116        1.74  augustss 
   1117        1.74  augustss 			usb_delay_ms(&sc->sc_bus, 1);
   1118        1.74  augustss 		}
   1119        1.74  augustss 		if (hcr != 0) {
   1120        1.74  augustss 			printf("%s: reset timeout\n",
   1121        1.74  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1122        1.74  augustss 		}
   1123        1.74  augustss 
   1124        1.74  augustss 		cmd &= ~EHCI_CMD_RS;
   1125        1.74  augustss 		EOWRITE4(sc, EHCI_USBCMD, cmd);
   1126        1.74  augustss 
   1127        1.74  augustss 		for (i = 0; i < 100; i++) {
   1128        1.74  augustss 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1129        1.74  augustss 			if (hcr == EHCI_STS_HCH)
   1130        1.74  augustss 				break;
   1131        1.74  augustss 
   1132        1.74  augustss 			usb_delay_ms(&sc->sc_bus, 1);
   1133        1.74  augustss 		}
   1134        1.74  augustss 		if (hcr != EHCI_STS_HCH) {
   1135        1.74  augustss 			printf("%s: config timeout\n",
   1136        1.74  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1137         1.5  augustss 		}
   1138        1.74  augustss 
   1139         1.5  augustss 		sc->sc_bus.use_polling--;
   1140         1.5  augustss 		break;
   1141        1.74  augustss 
   1142  1.123.12.1     itohy 	USB_PWR_CASE_RESUME:
   1143         1.5  augustss 		sc->sc_bus.use_polling++;
   1144        1.74  augustss 
   1145        1.74  augustss 		/* restore things in case the bios sucks */
   1146        1.74  augustss 		EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
   1147        1.74  augustss 		EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
   1148        1.74  augustss 		EOWRITE4(sc, EHCI_ASYNCLISTADDR,
   1149  1.123.12.1     itohy 		    EHCI_SQH_DMAADDR(sc->sc_async_head) | EHCI_LINK_QH);
   1150        1.74  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
   1151        1.74  augustss 
   1152  1.123.12.1     itohy 		hcr = 0;
   1153  1.123.12.1     itohy 		for (i = 1; i <= sc->sc_noport; i++) {
   1154  1.123.12.1     itohy 			cmd = EOREAD4(sc, EHCI_PORTSC(i));
   1155  1.123.12.1     itohy 			if ((cmd & EHCI_PS_PO) == 0 &&
   1156  1.123.12.1     itohy 			    (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
   1157  1.123.12.1     itohy 				EOWRITE4(sc, EHCI_PORTSC(i),
   1158  1.123.12.1     itohy 				    cmd | EHCI_PS_FPR);
   1159  1.123.12.1     itohy 				hcr = 1;
   1160  1.123.12.1     itohy 			}
   1161  1.123.12.1     itohy 		}
   1162  1.123.12.1     itohy 
   1163  1.123.12.1     itohy 		if (hcr) {
   1164  1.123.12.1     itohy 			usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1165  1.123.12.1     itohy 
   1166  1.123.12.1     itohy 			for (i = 1; i <= sc->sc_noport; i++) {
   1167  1.123.12.1     itohy 				cmd = EOREAD4(sc, EHCI_PORTSC(i));
   1168  1.123.12.1     itohy 				if ((cmd & EHCI_PS_PO) == 0 &&
   1169  1.123.12.1     itohy 				    (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
   1170  1.123.12.1     itohy 					EOWRITE4(sc, EHCI_PORTSC(i),
   1171  1.123.12.1     itohy 					    cmd & ~EHCI_PS_FPR);
   1172  1.123.12.1     itohy 			}
   1173  1.123.12.1     itohy 		}
   1174  1.123.12.1     itohy 
   1175        1.74  augustss 		EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
   1176        1.74  augustss 
   1177        1.74  augustss 		for (i = 0; i < 100; i++) {
   1178        1.74  augustss 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1179        1.74  augustss 			if (hcr != EHCI_STS_HCH)
   1180        1.74  augustss 				break;
   1181        1.74  augustss 
   1182        1.74  augustss 			usb_delay_ms(&sc->sc_bus, 1);
   1183        1.74  augustss 		}
   1184        1.74  augustss 		if (hcr == EHCI_STS_HCH) {
   1185        1.74  augustss 			printf("%s: config timeout\n",
   1186        1.74  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1187        1.74  augustss 		}
   1188        1.74  augustss 
   1189        1.74  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1190        1.74  augustss 
   1191         1.5  augustss 		sc->sc_bus.use_polling--;
   1192         1.5  augustss 		break;
   1193  1.123.12.1     itohy 
   1194  1.123.12.1     itohy 	default:
   1195         1.5  augustss 		break;
   1196         1.5  augustss 	}
   1197         1.5  augustss 	splx(s);
   1198        1.74  augustss 
   1199        1.74  augustss #ifdef EHCI_DEBUG
   1200        1.74  augustss 	DPRINTF(("ehci_power: sc=%p\n", sc));
   1201        1.74  augustss 	if (ehcidebug > 0)
   1202        1.74  augustss 		ehci_dump_regs(sc);
   1203        1.74  augustss #endif
   1204         1.5  augustss }
   1205         1.5  augustss 
   1206         1.5  augustss /*
   1207         1.5  augustss  * Shut down the controller when the system is going down.
   1208         1.5  augustss  */
   1209         1.5  augustss void
   1210         1.5  augustss ehci_shutdown(void *v)
   1211         1.5  augustss {
   1212         1.8  augustss 	ehci_softc_t *sc = v;
   1213         1.5  augustss 
   1214         1.5  augustss 	DPRINTF(("ehci_shutdown: stopping the HC\n"));
   1215         1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
   1216         1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
   1217         1.5  augustss }
   1218         1.5  augustss 
   1219  1.123.12.1     itohy Static usbd_status
   1220  1.123.12.1     itohy ehci_prealloc(struct ehci_softc *sc, struct ehci_xfer *exfer,
   1221  1.123.12.1     itohy 	size_t bufsize, int nseg)
   1222  1.123.12.1     itohy {
   1223  1.123.12.1     itohy 	int seglen, ntd;
   1224  1.123.12.1     itohy 	int s;
   1225  1.123.12.1     itohy 	int err;
   1226  1.123.12.1     itohy 
   1227  1.123.12.1     itohy 	/* (over) estimate needed number of TDs */
   1228  1.123.12.1     itohy 	seglen = 19520;	 /* 4096*5 - (4096*5 % maxp), when maxp = 976 */
   1229  1.123.12.1     itohy 	ntd = bufsize / seglen + nseg;
   1230  1.123.12.1     itohy 
   1231  1.123.12.1     itohy 	s = splusb();
   1232  1.123.12.1     itohy 	/* pre-allocate QDs */
   1233  1.123.12.1     itohy 	/* XXX ITDs */
   1234  1.123.12.1     itohy 	while (sc->sc_nfreeqtds < ntd) {
   1235  1.123.12.1     itohy 		DPRINTF(("%s: qhci_prealloc: need %d QTD (%d cur)\n",
   1236  1.123.12.1     itohy 		    USBDEVNAME(sc->sc_bus.bdev), ntd, sc->sc_nfreeqtds));
   1237  1.123.12.1     itohy 		if ((err = ehci_grow_sqtd(sc)) != USBD_NORMAL_COMPLETION) {
   1238  1.123.12.1     itohy 			splx(s);
   1239  1.123.12.1     itohy 			return err;
   1240  1.123.12.1     itohy 		}
   1241  1.123.12.1     itohy 	}
   1242  1.123.12.1     itohy 	sc->sc_nfreeqtds -= ntd;
   1243  1.123.12.1     itohy 	splx(s);
   1244  1.123.12.1     itohy 
   1245  1.123.12.1     itohy 	exfer->rsvd_tds = ntd;
   1246  1.123.12.1     itohy 
   1247  1.123.12.1     itohy 	return USBD_NORMAL_COMPLETION;
   1248  1.123.12.1     itohy }
   1249  1.123.12.1     itohy 
   1250         1.5  augustss usbd_status
   1251  1.123.12.1     itohy ehci_allocm(struct usbd_bus *bus, usbd_xfer_handle xfer, void *buf, size_t size)
   1252         1.5  augustss {
   1253         1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1254  1.123.12.1     itohy 	struct ehci_xfer *exfer = EXFER(xfer);
   1255        1.25  augustss 	usbd_status err;
   1256         1.5  augustss 
   1257  1.123.12.1     itohy 	if ((err = usb_alloc_buffer_dma(&sc->sc_dmatag, &exfer->dmabuf,
   1258  1.123.12.1     itohy 	    buf, size, &xfer->hcbuffer)) == USBD_NORMAL_COMPLETION) {
   1259  1.123.12.1     itohy 		if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0 &&
   1260  1.123.12.1     itohy 		    (err = ehci_prealloc(sc, exfer, size,
   1261  1.123.12.1     itohy 		    USB_BUFFER_NSEGS(&exfer->dmabuf)))
   1262  1.123.12.1     itohy 		    != USBD_NORMAL_COMPLETION) {
   1263  1.123.12.1     itohy 			usb_free_buffer_dma(&sc->sc_dmatag, &exfer->dmabuf,
   1264  1.123.12.1     itohy 			    U_WAITOK);
   1265  1.123.12.1     itohy 		}
   1266  1.123.12.1     itohy 	}
   1267        1.25  augustss #ifdef EHCI_DEBUG
   1268        1.25  augustss 	if (err)
   1269  1.123.12.1     itohy 		printf("ehci_allocm: usb_alloc_buffer_dma()=%d\n", err);
   1270        1.25  augustss #endif
   1271        1.25  augustss 	return (err);
   1272         1.5  augustss }
   1273         1.5  augustss 
   1274         1.5  augustss void
   1275  1.123.12.1     itohy ehci_freem(struct usbd_bus *bus, usbd_xfer_handle xfer,
   1276  1.123.12.1     itohy 	enum usbd_waitflg waitflg)
   1277         1.5  augustss {
   1278         1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1279  1.123.12.1     itohy 	struct ehci_xfer *exfer = EXFER(xfer);
   1280  1.123.12.1     itohy 	int s;
   1281         1.5  augustss 
   1282  1.123.12.1     itohy 	usb_free_buffer_dma(&sc->sc_dmatag, &exfer->dmabuf, waitflg);
   1283  1.123.12.1     itohy 
   1284  1.123.12.1     itohy 	/* XXX ITDs */
   1285  1.123.12.1     itohy 
   1286  1.123.12.1     itohy 	s = splusb();
   1287  1.123.12.1     itohy 	sc->sc_nfreeqtds += exfer->rsvd_tds;
   1288  1.123.12.1     itohy 	splx(s);
   1289  1.123.12.1     itohy 	exfer->rsvd_tds = 0;
   1290  1.123.12.1     itohy }
   1291  1.123.12.1     itohy 
   1292  1.123.12.1     itohy Static usbd_status
   1293  1.123.12.1     itohy ehci_map_alloc(usbd_xfer_handle xfer)
   1294  1.123.12.1     itohy {
   1295  1.123.12.1     itohy 	struct ehci_softc *sc = (struct ehci_softc *)xfer->device->bus;
   1296  1.123.12.1     itohy 	struct ehci_xfer *exfer = EXFER(xfer);
   1297  1.123.12.1     itohy 	usbd_status st;
   1298  1.123.12.1     itohy 
   1299  1.123.12.1     itohy 	st = usb_alloc_dma_resources(&sc->sc_dmatag, &exfer->dmabuf);
   1300  1.123.12.1     itohy 	if (st)
   1301  1.123.12.1     itohy 		return st;
   1302  1.123.12.1     itohy 
   1303  1.123.12.1     itohy 	if ((st = ehci_prealloc(sc, exfer, MAXPHYS, USB_DMA_NSEG))) {
   1304  1.123.12.1     itohy 		usb_free_dma_resources(&sc->sc_dmatag, &exfer->dmabuf);
   1305        1.90      fvdl 	}
   1306  1.123.12.1     itohy 
   1307  1.123.12.1     itohy 	return st;
   1308  1.123.12.1     itohy }
   1309  1.123.12.1     itohy 
   1310  1.123.12.1     itohy Static void
   1311  1.123.12.1     itohy ehci_map_free(usbd_xfer_handle xfer)
   1312  1.123.12.1     itohy {
   1313  1.123.12.1     itohy 	struct ehci_softc *sc = (struct ehci_softc *)xfer->device->bus;
   1314  1.123.12.1     itohy 	struct ehci_xfer *exfer = EXFER(xfer);
   1315  1.123.12.1     itohy 	int s;
   1316  1.123.12.1     itohy 
   1317  1.123.12.1     itohy 	USB_KASSERT(xfer->rqflags & URQ_DEV_MAP_PREPARED);
   1318  1.123.12.1     itohy 
   1319  1.123.12.1     itohy 	usb_free_dma_resources(&sc->sc_dmatag, &exfer->dmabuf);
   1320  1.123.12.1     itohy 
   1321  1.123.12.1     itohy 	/* XXX ITDs */
   1322  1.123.12.1     itohy 
   1323  1.123.12.1     itohy 	s = splusb();
   1324  1.123.12.1     itohy 	sc->sc_nfreeqtds += exfer->rsvd_tds;
   1325  1.123.12.1     itohy 	splx(s);
   1326  1.123.12.1     itohy 	exfer->rsvd_tds = 0;
   1327  1.123.12.1     itohy }
   1328  1.123.12.1     itohy 
   1329  1.123.12.1     itohy Static void
   1330  1.123.12.1     itohy ehci_mapm(usbd_xfer_handle xfer, void *buf, size_t size)
   1331  1.123.12.1     itohy {
   1332  1.123.12.1     itohy 	struct ehci_softc *sc = (struct ehci_softc *)xfer->device->bus;
   1333  1.123.12.1     itohy 	struct ehci_xfer *exfer = EXFER(xfer);
   1334  1.123.12.1     itohy 
   1335  1.123.12.1     itohy 	usb_map_dma(&sc->sc_dmatag, &exfer->dmabuf, buf, size);
   1336  1.123.12.1     itohy }
   1337  1.123.12.1     itohy 
   1338  1.123.12.1     itohy Static void
   1339  1.123.12.1     itohy ehci_mapm_mbuf(usbd_xfer_handle xfer, struct mbuf *chain)
   1340  1.123.12.1     itohy {
   1341  1.123.12.1     itohy 	struct ehci_softc *sc = (struct ehci_softc *)xfer->device->bus;
   1342  1.123.12.1     itohy 	struct ehci_xfer *exfer = EXFER(xfer);
   1343  1.123.12.1     itohy 
   1344  1.123.12.1     itohy 	usb_map_mbuf_dma(&sc->sc_dmatag, &exfer->dmabuf, chain);
   1345  1.123.12.1     itohy }
   1346  1.123.12.1     itohy 
   1347  1.123.12.1     itohy Static void
   1348  1.123.12.1     itohy ehci_unmapm(usbd_xfer_handle xfer)
   1349  1.123.12.1     itohy {
   1350  1.123.12.1     itohy 	struct ehci_softc *sc = (struct ehci_softc *)xfer->device->bus;
   1351  1.123.12.1     itohy 	struct ehci_xfer *exfer = EXFER(xfer);
   1352  1.123.12.1     itohy 
   1353  1.123.12.1     itohy 	usb_unmap_dma(&sc->sc_dmatag, &exfer->dmabuf);
   1354         1.5  augustss }
   1355         1.5  augustss 
   1356         1.5  augustss usbd_xfer_handle
   1357  1.123.12.1     itohy ehci_allocx(struct usbd_bus *bus, usbd_pipe_handle pipe,
   1358  1.123.12.1     itohy 	enum usbd_waitflg waitflg)
   1359         1.5  augustss {
   1360         1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1361         1.5  augustss 	usbd_xfer_handle xfer;
   1362         1.5  augustss 
   1363         1.5  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
   1364        1.28  augustss 	if (xfer != NULL) {
   1365        1.32     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
   1366        1.28  augustss #ifdef DIAGNOSTIC
   1367        1.28  augustss 		if (xfer->busy_free != XFER_FREE) {
   1368        1.72  augustss 			printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
   1369        1.28  augustss 			       xfer->busy_free);
   1370        1.28  augustss 		}
   1371        1.28  augustss #endif
   1372        1.28  augustss 	} else {
   1373  1.123.12.1     itohy 		xfer = malloc(sizeof(struct ehci_xfer), M_USB,
   1374  1.123.12.1     itohy 		    waitflg == U_WAITOK ? M_WAITOK : M_NOWAIT);
   1375        1.28  augustss 	}
   1376        1.18  augustss 	if (xfer != NULL) {
   1377        1.71  augustss 		memset(xfer, 0, sizeof(struct ehci_xfer));
   1378  1.123.12.1     itohy 		usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
   1379  1.123.12.1     itohy 		    xfer);
   1380  1.123.12.1     itohy 		EXFER(xfer)->ehci_xfer_flags = 0;
   1381  1.123.12.1     itohy 		EXFER(xfer)->rsvd_tds = 0;
   1382        1.18  augustss #ifdef DIAGNOSTIC
   1383        1.18  augustss 		EXFER(xfer)->isdone = 1;
   1384        1.18  augustss 		xfer->busy_free = XFER_BUSY;
   1385        1.18  augustss #endif
   1386        1.18  augustss 	}
   1387         1.5  augustss 	return (xfer);
   1388         1.5  augustss }
   1389         1.5  augustss 
   1390         1.5  augustss void
   1391         1.5  augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
   1392         1.5  augustss {
   1393         1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1394         1.5  augustss 
   1395        1.18  augustss #ifdef DIAGNOSTIC
   1396        1.18  augustss 	if (xfer->busy_free != XFER_BUSY) {
   1397        1.18  augustss 		printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
   1398        1.18  augustss 		       xfer->busy_free);
   1399        1.18  augustss 	}
   1400        1.18  augustss 	xfer->busy_free = XFER_FREE;
   1401        1.18  augustss 	if (!EXFER(xfer)->isdone) {
   1402        1.18  augustss 		printf("ehci_freex: !isdone\n");
   1403        1.18  augustss 	}
   1404        1.18  augustss #endif
   1405         1.5  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
   1406         1.5  augustss }
   1407         1.5  augustss 
   1408         1.5  augustss Static void
   1409         1.5  augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
   1410         1.5  augustss {
   1411        1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1412  1.123.12.1     itohy 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   1413  1.123.12.1     itohy 
   1414  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, epipe->sqh,
   1415  1.123.12.1     itohy 	    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1416        1.15  augustss 
   1417        1.23  augustss 	DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
   1418        1.23  augustss 		 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
   1419        1.22  augustss #ifdef USB_DEBUG
   1420        1.22  augustss 	if (ehcidebug)
   1421        1.22  augustss 		usbd_dump_pipe(pipe);
   1422         1.5  augustss #endif
   1423  1.123.12.1     itohy 	USB_KASSERT2((epipe->sqh->qh.qh_qtd.qtd_status &
   1424  1.123.12.1     itohy 	    htole32(EHCI_QTD_ACTIVE)) == 0,
   1425  1.123.12.1     itohy 	    ("ehci_device_clear_toggle: queue active"));
   1426  1.123.12.1     itohy 	epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
   1427  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, epipe->sqh,
   1428  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1429         1.5  augustss }
   1430         1.5  augustss 
   1431         1.5  augustss Static void
   1432       1.115  christos ehci_noop(usbd_pipe_handle pipe)
   1433         1.5  augustss {
   1434         1.5  augustss }
   1435         1.5  augustss 
   1436         1.5  augustss #ifdef EHCI_DEBUG
   1437         1.5  augustss void
   1438        1.18  augustss ehci_dump_regs(ehci_softc_t *sc)
   1439         1.5  augustss {
   1440         1.6  augustss 	int i;
   1441         1.6  augustss 	printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
   1442         1.6  augustss 	       EOREAD4(sc, EHCI_USBCMD),
   1443         1.6  augustss 	       EOREAD4(sc, EHCI_USBSTS),
   1444         1.6  augustss 	       EOREAD4(sc, EHCI_USBINTR));
   1445        1.29  augustss 	printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
   1446        1.15  augustss 	       EOREAD4(sc, EHCI_FRINDEX),
   1447        1.15  augustss 	       EOREAD4(sc, EHCI_CTRLDSSEGMENT),
   1448        1.15  augustss 	       EOREAD4(sc, EHCI_PERIODICLISTBASE),
   1449        1.15  augustss 	       EOREAD4(sc, EHCI_ASYNCLISTADDR));
   1450         1.6  augustss 	for (i = 1; i <= sc->sc_noport; i++)
   1451        1.33  augustss 		printf("port %d status=0x%08x\n", i,
   1452         1.6  augustss 		       EOREAD4(sc, EHCI_PORTSC(i)));
   1453        1.39    martin }
   1454        1.39    martin 
   1455        1.40    martin /*
   1456        1.40    martin  * Unused function - this is meant to be called from a kernel
   1457        1.40    martin  * debugger.
   1458        1.40    martin  */
   1459        1.39    martin void
   1460        1.39    martin ehci_dump()
   1461        1.39    martin {
   1462        1.39    martin 	ehci_dump_regs(theehci);
   1463         1.6  augustss }
   1464         1.6  augustss 
   1465         1.6  augustss void
   1466        1.15  augustss ehci_dump_link(ehci_link_t link, int type)
   1467         1.9  augustss {
   1468        1.15  augustss 	link = le32toh(link);
   1469        1.15  augustss 	printf("0x%08x", link);
   1470         1.9  augustss 	if (link & EHCI_LINK_TERMINATE)
   1471        1.15  augustss 		printf("<T>");
   1472        1.15  augustss 	else {
   1473        1.15  augustss 		printf("<");
   1474        1.15  augustss 		if (type) {
   1475        1.15  augustss 			switch (EHCI_LINK_TYPE(link)) {
   1476        1.15  augustss 			case EHCI_LINK_ITD: printf("ITD"); break;
   1477        1.15  augustss 			case EHCI_LINK_QH: printf("QH"); break;
   1478        1.15  augustss 			case EHCI_LINK_SITD: printf("SITD"); break;
   1479        1.15  augustss 			case EHCI_LINK_FSTN: printf("FSTN"); break;
   1480        1.16  augustss 			}
   1481        1.15  augustss 		}
   1482         1.9  augustss 		printf(">");
   1483        1.15  augustss 	}
   1484        1.15  augustss }
   1485        1.15  augustss 
   1486        1.15  augustss void
   1487        1.15  augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
   1488        1.15  augustss {
   1489        1.29  augustss 	int i;
   1490        1.29  augustss 	u_int32_t stop;
   1491        1.29  augustss 
   1492        1.29  augustss 	stop = 0;
   1493        1.29  augustss 	for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
   1494        1.15  augustss 		ehci_dump_sqtd(sqtd);
   1495        1.72  augustss 		stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
   1496        1.29  augustss 	}
   1497        1.29  augustss 	if (sqtd)
   1498        1.29  augustss 		printf("dump aborted, too many TDs\n");
   1499         1.9  augustss }
   1500         1.9  augustss 
   1501         1.9  augustss void
   1502         1.9  augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
   1503         1.9  augustss {
   1504  1.123.12.1     itohy 	printf("QTD(%p) at 0x%08x:\n", sqtd, EHCI_SQTD_DMAADDR(sqtd));
   1505         1.9  augustss 	ehci_dump_qtd(&sqtd->qtd);
   1506         1.9  augustss }
   1507         1.9  augustss 
   1508         1.9  augustss void
   1509         1.9  augustss ehci_dump_qtd(ehci_qtd_t *qtd)
   1510         1.9  augustss {
   1511         1.9  augustss 	u_int32_t s;
   1512        1.15  augustss 	char sbuf[128];
   1513         1.9  augustss 
   1514        1.15  augustss 	printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
   1515        1.15  augustss 	printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
   1516         1.9  augustss 	printf("\n");
   1517        1.15  augustss 	s = le32toh(qtd->qtd_status);
   1518        1.15  augustss 	bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
   1519        1.15  augustss 			 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
   1520        1.15  augustss 			 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
   1521         1.9  augustss 	printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
   1522         1.9  augustss 	       s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
   1523         1.9  augustss 	       EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
   1524        1.15  augustss 	printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
   1525        1.15  augustss 	       EHCI_QTD_GET_PID(s), sbuf);
   1526         1.9  augustss 	for (s = 0; s < 5; s++)
   1527        1.15  augustss 		printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
   1528         1.9  augustss }
   1529         1.9  augustss 
   1530         1.9  augustss void
   1531         1.9  augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
   1532         1.9  augustss {
   1533         1.9  augustss 	ehci_qh_t *qh = &sqh->qh;
   1534        1.15  augustss 	u_int32_t endp, endphub;
   1535         1.9  augustss 
   1536  1.123.12.1     itohy 	printf("QH(%p) at 0x%08x:\n", sqh, EHCI_SQH_DMAADDR(sqh));
   1537  1.123.12.1     itohy 	printf("  sqtd=%p inactivesqtd=%p\n", sqh->sqtd, sqh->inactivesqtd);
   1538        1.15  augustss 	printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
   1539        1.15  augustss 	endp = le32toh(qh->qh_endp);
   1540        1.15  augustss 	printf("  endp=0x%08x\n", endp);
   1541        1.15  augustss 	printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
   1542        1.15  augustss 	       EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
   1543        1.15  augustss 	       EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
   1544        1.15  augustss 	       EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
   1545        1.15  augustss 	printf("    mpl=0x%x ctl=%d nrl=%d\n",
   1546        1.15  augustss 	       EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
   1547        1.15  augustss 	       EHCI_QH_GET_NRL(endp));
   1548        1.15  augustss 	endphub = le32toh(qh->qh_endphub);
   1549        1.15  augustss 	printf("  endphub=0x%08x\n", endphub);
   1550        1.15  augustss 	printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
   1551        1.15  augustss 	       EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
   1552        1.15  augustss 	       EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
   1553        1.15  augustss 	       EHCI_QH_GET_MULT(endphub));
   1554        1.15  augustss 	printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
   1555        1.12  augustss 	printf("Overlay qTD:\n");
   1556         1.9  augustss 	ehci_dump_qtd(&qh->qh_qtd);
   1557         1.9  augustss }
   1558         1.9  augustss 
   1559        1.38    martin #ifdef DIAGNOSTIC
   1560        1.18  augustss Static void
   1561        1.18  augustss ehci_dump_exfer(struct ehci_xfer *ex)
   1562        1.18  augustss {
   1563        1.18  augustss 	printf("ehci_dump_exfer: ex=%p\n", ex);
   1564        1.18  augustss }
   1565        1.38    martin #endif
   1566         1.5  augustss #endif
   1567         1.5  augustss 
   1568         1.5  augustss usbd_status
   1569         1.5  augustss ehci_open(usbd_pipe_handle pipe)
   1570         1.5  augustss {
   1571         1.5  augustss 	usbd_device_handle dev = pipe->device;
   1572         1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   1573         1.5  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1574         1.5  augustss 	u_int8_t addr = dev->address;
   1575         1.5  augustss 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   1576         1.5  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1577        1.10  augustss 	ehci_soft_qh_t *sqh;
   1578        1.10  augustss 	usbd_status err;
   1579        1.10  augustss 	int s;
   1580        1.78  augustss 	int ival, speed, naks;
   1581        1.80  augustss 	int hshubaddr, hshubport;
   1582         1.5  augustss 
   1583         1.5  augustss 	DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1584         1.5  augustss 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1585         1.5  augustss 
   1586        1.80  augustss 	if (dev->myhsport) {
   1587        1.80  augustss 		hshubaddr = dev->myhsport->parent->address;
   1588        1.80  augustss 		hshubport = dev->myhsport->portno;
   1589        1.80  augustss 	} else {
   1590        1.80  augustss 		hshubaddr = 0;
   1591        1.80  augustss 		hshubport = 0;
   1592        1.80  augustss 	}
   1593        1.80  augustss 
   1594        1.17  augustss 	if (sc->sc_dying)
   1595        1.17  augustss 		return (USBD_IOERROR);
   1596        1.17  augustss 
   1597         1.5  augustss 	if (addr == sc->sc_addr) {
   1598         1.5  augustss 		switch (ed->bEndpointAddress) {
   1599         1.5  augustss 		case USB_CONTROL_ENDPOINT:
   1600         1.5  augustss 			pipe->methods = &ehci_root_ctrl_methods;
   1601         1.5  augustss 			break;
   1602         1.5  augustss 		case UE_DIR_IN | EHCI_INTR_ENDPT:
   1603         1.5  augustss 			pipe->methods = &ehci_root_intr_methods;
   1604         1.5  augustss 			break;
   1605         1.5  augustss 		default:
   1606         1.5  augustss 			return (USBD_INVAL);
   1607         1.5  augustss 		}
   1608        1.10  augustss 		return (USBD_NORMAL_COMPLETION);
   1609        1.10  augustss 	}
   1610        1.10  augustss 
   1611        1.24  augustss 	/* XXX All this stuff is only valid for async. */
   1612        1.11  augustss 	switch (dev->speed) {
   1613        1.11  augustss 	case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
   1614        1.11  augustss 	case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
   1615        1.11  augustss 	case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
   1616        1.37    provos 	default: panic("ehci_open: bad device speed %d", dev->speed);
   1617        1.11  augustss 	}
   1618        1.99  augustss 	if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
   1619        1.99  augustss 		printf("%s: *** WARNING: opening low/full speed isoc device, "
   1620        1.99  augustss 		       "this does not work yet.\n",
   1621        1.80  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1622        1.80  augustss 		DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
   1623        1.80  augustss 			    hshubaddr, hshubport));
   1624        1.99  augustss 		return USBD_INVAL;
   1625        1.80  augustss 	}
   1626        1.80  augustss 
   1627        1.10  augustss 	naks = 8;		/* XXX */
   1628        1.10  augustss 	sqh = ehci_alloc_sqh(sc);
   1629        1.10  augustss 	if (sqh == NULL)
   1630       1.116  drochner 		return (USBD_NOMEM);
   1631        1.10  augustss 	/* qh_link filled when the QH is added */
   1632        1.10  augustss 	sqh->qh.qh_endp = htole32(
   1633        1.10  augustss 		EHCI_QH_SET_ADDR(addr) |
   1634        1.56   mycroft 		EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
   1635        1.55   mycroft 		EHCI_QH_SET_EPS(speed) |
   1636  1.123.12.1     itohy 		(xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
   1637  1.123.12.1     itohy 		EHCI_QH_SET_MPL(UE_MAXPKTSZ(ed)) |
   1638        1.10  augustss 		(speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
   1639        1.10  augustss 		 EHCI_QH_CTL : 0) |
   1640        1.10  augustss 		EHCI_QH_SET_NRL(naks)
   1641        1.10  augustss 		);
   1642        1.10  augustss 	sqh->qh.qh_endphub = htole32(
   1643        1.78  augustss 		EHCI_QH_SET_MULT(1) |
   1644        1.80  augustss 		EHCI_QH_SET_HUBA(hshubaddr) |
   1645        1.80  augustss 		EHCI_QH_SET_PORT(hshubport) |
   1646  1.123.12.1     itohy 		EHCI_QH_SET_CMASK(0x1c) |
   1647  1.123.12.1     itohy 		EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
   1648        1.10  augustss 		);
   1649        1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
   1650  1.123.12.1     itohy 	/* The overlay qTD was already set up by ehci_alloc_sqh(). */
   1651  1.123.12.1     itohy 	sqh->qh.qh_qtd.qtd_status =
   1652  1.123.12.1     itohy 	    htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
   1653        1.10  augustss 
   1654        1.10  augustss 	epipe->sqh = sqh;
   1655         1.5  augustss 
   1656        1.10  augustss 	switch (xfertype) {
   1657        1.10  augustss 	case UE_CONTROL:
   1658  1.123.12.1     itohy 		err = usb_allocmem(&sc->sc_dmatag, sizeof(usb_device_request_t),
   1659        1.10  augustss 				   0, &epipe->u.ctl.reqdma);
   1660        1.25  augustss #ifdef EHCI_DEBUG
   1661        1.25  augustss 		if (err)
   1662        1.25  augustss 			printf("ehci_open: usb_allocmem()=%d\n", err);
   1663        1.25  augustss #endif
   1664        1.10  augustss 		if (err)
   1665       1.116  drochner 			goto bad;
   1666        1.11  augustss 		pipe->methods = &ehci_device_ctrl_methods;
   1667        1.10  augustss 		s = splusb();
   1668  1.123.12.1     itohy 		ehci_add_qh(sc, sqh, sc->sc_async_head);
   1669        1.10  augustss 		splx(s);
   1670        1.10  augustss 		break;
   1671        1.10  augustss 	case UE_BULK:
   1672        1.10  augustss 		pipe->methods = &ehci_device_bulk_methods;
   1673        1.10  augustss 		s = splusb();
   1674  1.123.12.1     itohy 		ehci_add_qh(sc, sqh, sc->sc_async_head);
   1675        1.10  augustss 		splx(s);
   1676        1.10  augustss 		break;
   1677        1.24  augustss 	case UE_INTERRUPT:
   1678        1.24  augustss 		pipe->methods = &ehci_device_intr_methods;
   1679        1.78  augustss 		ival = pipe->interval;
   1680       1.116  drochner 		if (ival == USBD_DEFAULT_INTERVAL) {
   1681       1.116  drochner 			if (speed == EHCI_QH_SPEED_HIGH) {
   1682       1.116  drochner 				if (ed->bInterval > 16) {
   1683       1.116  drochner 					/*
   1684       1.116  drochner 					 * illegal with high-speed, but there
   1685       1.116  drochner 					 * were documentation bugs in the spec,
   1686       1.116  drochner 					 * so be generous
   1687       1.116  drochner 					 */
   1688       1.116  drochner 					ival = 256;
   1689       1.116  drochner 				} else
   1690       1.116  drochner 					ival = (1 << (ed->bInterval - 1)) / 8;
   1691       1.116  drochner 			} else
   1692       1.116  drochner 				ival = ed->bInterval;
   1693       1.116  drochner 		}
   1694       1.116  drochner 		err = ehci_device_setintr(sc, sqh, ival);
   1695       1.116  drochner 		if (err)
   1696       1.116  drochner 			goto bad;
   1697       1.116  drochner 		break;
   1698        1.24  augustss 	case UE_ISOCHRONOUS:
   1699        1.24  augustss 		pipe->methods = &ehci_device_isoc_methods;
   1700       1.116  drochner 		/* FALLTHROUGH */
   1701        1.10  augustss 	default:
   1702       1.116  drochner 		err = USBD_INVAL;
   1703       1.116  drochner 		goto bad;
   1704         1.5  augustss 	}
   1705         1.5  augustss 	return (USBD_NORMAL_COMPLETION);
   1706         1.5  augustss 
   1707       1.116  drochner  bad:
   1708        1.11  augustss 	ehci_free_sqh(sc, sqh);
   1709       1.116  drochner 	return (err);
   1710        1.10  augustss }
   1711        1.10  augustss 
   1712        1.10  augustss /*
   1713        1.10  augustss  * Add an ED to the schedule.  Called at splusb().
   1714  1.123.12.1     itohy  * If in the async schedule, it will always have a next.
   1715  1.123.12.1     itohy  * If in the intr schedule it may not.
   1716        1.10  augustss  */
   1717        1.10  augustss void
   1718  1.123.12.1     itohy ehci_add_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1719        1.10  augustss {
   1720        1.10  augustss 	SPLUSBCHECK;
   1721        1.10  augustss 
   1722        1.10  augustss 	sqh->next = head->next;
   1723  1.123.12.1     itohy 	sqh->prev = head;
   1724        1.10  augustss 	sqh->qh.qh_link = head->qh.qh_link;
   1725  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, sqh,
   1726  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1727        1.10  augustss 	head->next = sqh;
   1728  1.123.12.1     itohy 	if (sqh->next)
   1729  1.123.12.1     itohy 		sqh->next->prev = sqh;
   1730  1.123.12.1     itohy 	head->qh.qh_link = htole32(EHCI_SQH_DMAADDR(sqh) | EHCI_LINK_QH);
   1731  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, head,
   1732  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1733        1.10  augustss 
   1734        1.10  augustss #ifdef EHCI_DEBUG
   1735        1.22  augustss 	if (ehcidebug > 5) {
   1736        1.10  augustss 		printf("ehci_add_qh:\n");
   1737        1.10  augustss 		ehci_dump_sqh(sqh);
   1738        1.10  augustss 	}
   1739         1.5  augustss #endif
   1740         1.5  augustss }
   1741         1.5  augustss 
   1742        1.10  augustss /*
   1743        1.10  augustss  * Remove an ED from the schedule.  Called at splusb().
   1744  1.123.12.1     itohy  * Will always have a 'next' if it's in the async list as it's circular.
   1745        1.10  augustss  */
   1746        1.10  augustss void
   1747        1.10  augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1748        1.10  augustss {
   1749        1.10  augustss 	SPLUSBCHECK;
   1750        1.10  augustss 	/* XXX */
   1751  1.123.12.1     itohy 	sqh->prev->qh.qh_link = sqh->qh.qh_link;
   1752  1.123.12.1     itohy 	EHCI_SQH_SYNC(sc, sqh->prev,
   1753  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1754  1.123.12.1     itohy 	sqh->prev->next = sqh->next;
   1755  1.123.12.1     itohy 	if (sqh->next)
   1756  1.123.12.1     itohy 		sqh->next->prev = sqh->prev;
   1757        1.11  augustss 	ehci_sync_hc(sc);
   1758        1.11  augustss }
   1759        1.11  augustss 
   1760  1.123.12.1     itohy /* Restart a QH following the addition of a qTD. */
   1761        1.23  augustss void
   1762  1.123.12.1     itohy ehci_activate_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
   1763        1.23  augustss {
   1764  1.123.12.1     itohy 	ehci_physaddr_t	qtddma;
   1765        1.85  augustss 
   1766  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, sqtd, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1767  1.123.12.1     itohy 
   1768  1.123.12.1     itohy 	USB_KASSERT2((sqtd->qtd.qtd_status & htole32(EHCI_QTD_ACTIVE)) == 0,
   1769  1.123.12.1     itohy 	    ("ehci_activate_qh: already active"));
   1770  1.123.12.1     itohy 
   1771  1.123.12.1     itohy 	/*
   1772  1.123.12.1     itohy 	 * When a QH is idle, the overlay qTD should be marked as not
   1773  1.123.12.1     itohy 	 * halted and not active. This causes the host controller to
   1774  1.123.12.1     itohy 	 * retrieve the real qTD on each pass (rather than just examinig
   1775  1.123.12.1     itohy 	 * the overlay), so it will notice when we activate the qTD.
   1776  1.123.12.1     itohy 	 */
   1777  1.123.12.1     itohy 	if (sqtd == sqh->sqtd) {
   1778  1.123.12.1     itohy 		/* Check that the hardware is in the state we expect. */
   1779  1.123.12.1     itohy 		qtddma = EHCI_SQTD_DMAADDR(sqtd);
   1780  1.123.12.1     itohy 		if (EHCI_LINK_ADDR(le32toh(sqh->qh.qh_qtd.qtd_next)) !=
   1781  1.123.12.1     itohy 		    qtddma) {
   1782  1.123.12.1     itohy #ifdef EHCI_DEBUG
   1783  1.123.12.1     itohy 			printf("ehci_activate_qh: unexpected next ptr\n");
   1784  1.123.12.1     itohy 			ehci_dump_sqh(sqh);
   1785  1.123.12.1     itohy 			ehci_dump_sqtds(sqh->sqtd);
   1786  1.123.12.1     itohy #endif
   1787  1.123.12.1     itohy 			sqh->qh.qh_qtd.qtd_next = htole32(qtddma);
   1788  1.123.12.1     itohy 			sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   1789  1.123.12.1     itohy 		}
   1790  1.123.12.1     itohy 		/* Ensure the flags are correct. */
   1791  1.123.12.1     itohy 		sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_PINGSTATE |
   1792  1.123.12.1     itohy 		    EHCI_QTD_TOGGLE_MASK);
   1793  1.123.12.1     itohy 		EHCI_SQH_SYNC(sc, sqh,
   1794  1.123.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1795  1.123.12.1     itohy 	}
   1796  1.123.12.1     itohy 
   1797  1.123.12.1     itohy 	/* Now activate the qTD. */
   1798  1.123.12.1     itohy 	sqtd->qtd.qtd_status |= htole32(EHCI_QTD_ACTIVE);
   1799  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, sqtd, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1800        1.23  augustss }
   1801        1.23  augustss 
   1802        1.11  augustss /*
   1803        1.11  augustss  * Ensure that the HC has released all references to the QH.  We do this
   1804        1.11  augustss  * by asking for a Async Advance Doorbell interrupt and then we wait for
   1805        1.11  augustss  * the interrupt.
   1806        1.11  augustss  * To make this easier we first obtain exclusive use of the doorbell.
   1807        1.11  augustss  */
   1808        1.11  augustss void
   1809        1.11  augustss ehci_sync_hc(ehci_softc_t *sc)
   1810        1.11  augustss {
   1811        1.15  augustss 	int s, error;
   1812        1.11  augustss 
   1813        1.12  augustss 	if (sc->sc_dying) {
   1814        1.12  augustss 		DPRINTFN(2,("ehci_sync_hc: dying\n"));
   1815        1.12  augustss 		return;
   1816        1.12  augustss 	}
   1817        1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: enter\n"));
   1818  1.123.12.1     itohy 	/* get doorbell */
   1819  1.123.12.1     itohy 	usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL);
   1820        1.10  augustss 	s = splhardusb();
   1821        1.10  augustss 	/* ask for doorbell */
   1822        1.10  augustss 	EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
   1823        1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1824        1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1825        1.15  augustss 	error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
   1826        1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1827        1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1828        1.10  augustss 	splx(s);
   1829  1.123.12.1     itohy 	/* release doorbell */
   1830  1.123.12.1     itohy 	usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL);
   1831        1.15  augustss #ifdef DIAGNOSTIC
   1832        1.15  augustss 	if (error)
   1833        1.15  augustss 		printf("ehci_sync_hc: tsleep() = %d\n", error);
   1834        1.15  augustss #endif
   1835        1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: exit\n"));
   1836        1.10  augustss }
   1837        1.10  augustss 
   1838         1.5  augustss /***********/
   1839         1.5  augustss 
   1840         1.5  augustss /*
   1841         1.5  augustss  * Data structures and routines to emulate the root hub.
   1842         1.5  augustss  */
   1843         1.5  augustss Static usb_device_descriptor_t ehci_devd = {
   1844         1.5  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1845         1.5  augustss 	UDESC_DEVICE,		/* type */
   1846         1.5  augustss 	{0x00, 0x02},		/* USB version */
   1847         1.5  augustss 	UDCLASS_HUB,		/* class */
   1848         1.5  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1849        1.11  augustss 	UDPROTO_HSHUBSTT,	/* protocol */
   1850         1.5  augustss 	64,			/* max packet */
   1851         1.5  augustss 	{0},{0},{0x00,0x01},	/* device id */
   1852         1.5  augustss 	1,2,0,			/* string indicies */
   1853         1.5  augustss 	1			/* # of configurations */
   1854         1.5  augustss };
   1855         1.5  augustss 
   1856       1.123  drochner Static const usb_device_qualifier_t ehci_odevd = {
   1857        1.11  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1858        1.11  augustss 	UDESC_DEVICE_QUALIFIER,	/* type */
   1859        1.11  augustss 	{0x00, 0x02},		/* USB version */
   1860        1.11  augustss 	UDCLASS_HUB,		/* class */
   1861        1.11  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1862        1.11  augustss 	UDPROTO_FSHUB,		/* protocol */
   1863        1.11  augustss 	64,			/* max packet */
   1864        1.11  augustss 	1,			/* # of configurations */
   1865        1.11  augustss 	0
   1866        1.11  augustss };
   1867        1.11  augustss 
   1868       1.123  drochner Static const usb_config_descriptor_t ehci_confd = {
   1869         1.5  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   1870         1.5  augustss 	UDESC_CONFIG,
   1871         1.5  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1872         1.5  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1873         1.5  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1874         1.5  augustss 	1,
   1875         1.5  augustss 	1,
   1876         1.5  augustss 	0,
   1877       1.120  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   1878         1.5  augustss 	0			/* max power */
   1879         1.5  augustss };
   1880         1.5  augustss 
   1881       1.123  drochner Static const usb_interface_descriptor_t ehci_ifcd = {
   1882         1.5  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1883         1.5  augustss 	UDESC_INTERFACE,
   1884         1.5  augustss 	0,
   1885         1.5  augustss 	0,
   1886         1.5  augustss 	1,
   1887         1.5  augustss 	UICLASS_HUB,
   1888         1.5  augustss 	UISUBCLASS_HUB,
   1889        1.11  augustss 	UIPROTO_HSHUBSTT,
   1890         1.5  augustss 	0
   1891         1.5  augustss };
   1892         1.5  augustss 
   1893       1.123  drochner Static const usb_endpoint_descriptor_t ehci_endpd = {
   1894         1.5  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1895         1.5  augustss 	UDESC_ENDPOINT,
   1896         1.5  augustss 	UE_DIR_IN | EHCI_INTR_ENDPT,
   1897         1.5  augustss 	UE_INTERRUPT,
   1898         1.5  augustss 	{8, 0},			/* max packet */
   1899       1.118  drochner 	12
   1900         1.5  augustss };
   1901         1.5  augustss 
   1902       1.123  drochner Static const usb_hub_descriptor_t ehci_hubd = {
   1903         1.5  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   1904         1.5  augustss 	UDESC_HUB,
   1905         1.5  augustss 	0,
   1906         1.5  augustss 	{0,0},
   1907         1.5  augustss 	0,
   1908         1.5  augustss 	0,
   1909       1.111  christos 	{""},
   1910       1.111  christos 	{""},
   1911         1.5  augustss };
   1912         1.5  augustss 
   1913         1.5  augustss Static int
   1914       1.104  christos ehci_str(usb_string_descriptor_t *p, int l, const char *s)
   1915         1.5  augustss {
   1916         1.5  augustss 	int i;
   1917         1.5  augustss 
   1918         1.5  augustss 	if (l == 0)
   1919         1.5  augustss 		return (0);
   1920         1.5  augustss 	p->bLength = 2 * strlen(s) + 2;
   1921         1.5  augustss 	if (l == 1)
   1922         1.5  augustss 		return (1);
   1923         1.5  augustss 	p->bDescriptorType = UDESC_STRING;
   1924         1.5  augustss 	l -= 2;
   1925         1.5  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1926         1.5  augustss 		USETW2(p->bString[i], 0, s[i]);
   1927         1.5  augustss 	return (2*i+2);
   1928         1.5  augustss }
   1929         1.5  augustss 
   1930         1.5  augustss /*
   1931         1.5  augustss  * Simulate a hardware hub by handling all the necessary requests.
   1932         1.5  augustss  */
   1933         1.5  augustss Static usbd_status
   1934         1.5  augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
   1935         1.5  augustss {
   1936         1.5  augustss 	usbd_status err;
   1937         1.5  augustss 
   1938         1.5  augustss 	/* Insert last in queue. */
   1939         1.5  augustss 	err = usb_insert_transfer(xfer);
   1940         1.5  augustss 	if (err)
   1941         1.5  augustss 		return (err);
   1942         1.5  augustss 
   1943         1.5  augustss 	/* Pipe isn't running, start first */
   1944         1.5  augustss 	return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1945         1.5  augustss }
   1946         1.5  augustss 
   1947         1.5  augustss Static usbd_status
   1948         1.5  augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
   1949         1.5  augustss {
   1950         1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   1951         1.5  augustss 	usb_device_request_t *req;
   1952         1.5  augustss 	void *buf = NULL;
   1953         1.5  augustss 	int port, i;
   1954         1.5  augustss 	int s, len, value, index, l, totlen = 0;
   1955         1.5  augustss 	usb_port_status_t ps;
   1956         1.5  augustss 	usb_hub_descriptor_t hubd;
   1957         1.5  augustss 	usbd_status err;
   1958         1.5  augustss 	u_int32_t v;
   1959         1.5  augustss 
   1960         1.5  augustss 	if (sc->sc_dying)
   1961         1.5  augustss 		return (USBD_IOERROR);
   1962         1.5  augustss 
   1963         1.5  augustss #ifdef DIAGNOSTIC
   1964         1.5  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   1965         1.5  augustss 		/* XXX panic */
   1966         1.5  augustss 		return (USBD_INVAL);
   1967         1.5  augustss #endif
   1968         1.5  augustss 	req = &xfer->request;
   1969         1.5  augustss 
   1970        1.72  augustss 	DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
   1971         1.5  augustss 		    req->bmRequestType, req->bRequest));
   1972         1.5  augustss 
   1973         1.5  augustss 	len = UGETW(req->wLength);
   1974         1.5  augustss 	value = UGETW(req->wValue);
   1975         1.5  augustss 	index = UGETW(req->wIndex);
   1976         1.5  augustss 
   1977         1.5  augustss 	if (len != 0)
   1978  1.123.12.1     itohy 		buf = xfer->hcbuffer;
   1979         1.5  augustss 
   1980         1.5  augustss #define C(x,y) ((x) | ((y) << 8))
   1981         1.5  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   1982         1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1983         1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1984         1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1985        1.33  augustss 		/*
   1986         1.5  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1987         1.5  augustss 		 * for the integrated root hub.
   1988         1.5  augustss 		 */
   1989         1.5  augustss 		break;
   1990         1.5  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1991         1.5  augustss 		if (len > 0) {
   1992         1.5  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   1993         1.5  augustss 			totlen = 1;
   1994         1.5  augustss 		}
   1995         1.5  augustss 		break;
   1996         1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1997        1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
   1998       1.109  christos 		if (len == 0)
   1999       1.109  christos 			break;
   2000         1.5  augustss 		switch(value >> 8) {
   2001         1.5  augustss 		case UDESC_DEVICE:
   2002         1.5  augustss 			if ((value & 0xff) != 0) {
   2003         1.5  augustss 				err = USBD_IOERROR;
   2004         1.5  augustss 				goto ret;
   2005         1.5  augustss 			}
   2006         1.5  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   2007         1.5  augustss 			USETW(ehci_devd.idVendor, sc->sc_id_vendor);
   2008         1.5  augustss 			memcpy(buf, &ehci_devd, l);
   2009         1.5  augustss 			break;
   2010        1.33  augustss 		/*
   2011        1.11  augustss 		 * We can't really operate at another speed, but the spec says
   2012        1.11  augustss 		 * we need this descriptor.
   2013        1.11  augustss 		 */
   2014        1.11  augustss 		case UDESC_DEVICE_QUALIFIER:
   2015        1.11  augustss 			if ((value & 0xff) != 0) {
   2016        1.11  augustss 				err = USBD_IOERROR;
   2017        1.11  augustss 				goto ret;
   2018        1.11  augustss 			}
   2019        1.11  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   2020        1.11  augustss 			memcpy(buf, &ehci_odevd, l);
   2021        1.11  augustss 			break;
   2022        1.33  augustss 		/*
   2023        1.11  augustss 		 * We can't really operate at another speed, but the spec says
   2024        1.11  augustss 		 * we need this descriptor.
   2025        1.11  augustss 		 */
   2026        1.11  augustss 		case UDESC_OTHER_SPEED_CONFIGURATION:
   2027         1.5  augustss 		case UDESC_CONFIG:
   2028         1.5  augustss 			if ((value & 0xff) != 0) {
   2029         1.5  augustss 				err = USBD_IOERROR;
   2030         1.5  augustss 				goto ret;
   2031         1.5  augustss 			}
   2032         1.5  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   2033         1.5  augustss 			memcpy(buf, &ehci_confd, l);
   2034        1.11  augustss 			((usb_config_descriptor_t *)buf)->bDescriptorType =
   2035        1.11  augustss 				value >> 8;
   2036         1.5  augustss 			buf = (char *)buf + l;
   2037         1.5  augustss 			len -= l;
   2038         1.5  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   2039         1.5  augustss 			totlen += l;
   2040         1.5  augustss 			memcpy(buf, &ehci_ifcd, l);
   2041         1.5  augustss 			buf = (char *)buf + l;
   2042         1.5  augustss 			len -= l;
   2043         1.5  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   2044         1.5  augustss 			totlen += l;
   2045         1.5  augustss 			memcpy(buf, &ehci_endpd, l);
   2046         1.5  augustss 			break;
   2047         1.5  augustss 		case UDESC_STRING:
   2048         1.5  augustss 			*(u_int8_t *)buf = 0;
   2049         1.5  augustss 			totlen = 1;
   2050         1.5  augustss 			switch (value & 0xff) {
   2051        1.88  augustss 			case 0: /* Language table */
   2052       1.123  drochner 				if (len > 0)
   2053       1.123  drochner 					*(u_int8_t *)buf = 4;
   2054       1.123  drochner 				if (len >=  4) {
   2055       1.123  drochner 		USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409);
   2056       1.123  drochner 					totlen = 4;
   2057       1.123  drochner 				}
   2058        1.88  augustss 				break;
   2059         1.5  augustss 			case 1: /* Vendor */
   2060         1.5  augustss 				totlen = ehci_str(buf, len, sc->sc_vendor);
   2061         1.5  augustss 				break;
   2062         1.5  augustss 			case 2: /* Product */
   2063         1.5  augustss 				totlen = ehci_str(buf, len, "EHCI root hub");
   2064         1.5  augustss 				break;
   2065         1.5  augustss 			}
   2066         1.5  augustss 			break;
   2067         1.5  augustss 		default:
   2068         1.5  augustss 			err = USBD_IOERROR;
   2069         1.5  augustss 			goto ret;
   2070         1.5  augustss 		}
   2071         1.5  augustss 		break;
   2072         1.5  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   2073         1.5  augustss 		if (len > 0) {
   2074         1.5  augustss 			*(u_int8_t *)buf = 0;
   2075         1.5  augustss 			totlen = 1;
   2076         1.5  augustss 		}
   2077         1.5  augustss 		break;
   2078         1.5  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   2079         1.5  augustss 		if (len > 1) {
   2080         1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   2081         1.5  augustss 			totlen = 2;
   2082         1.5  augustss 		}
   2083         1.5  augustss 		break;
   2084         1.5  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   2085         1.5  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   2086         1.5  augustss 		if (len > 1) {
   2087         1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   2088         1.5  augustss 			totlen = 2;
   2089         1.5  augustss 		}
   2090         1.5  augustss 		break;
   2091         1.5  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   2092         1.5  augustss 		if (value >= USB_MAX_DEVICES) {
   2093         1.5  augustss 			err = USBD_IOERROR;
   2094         1.5  augustss 			goto ret;
   2095         1.5  augustss 		}
   2096         1.5  augustss 		sc->sc_addr = value;
   2097         1.5  augustss 		break;
   2098         1.5  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   2099         1.5  augustss 		if (value != 0 && value != 1) {
   2100         1.5  augustss 			err = USBD_IOERROR;
   2101         1.5  augustss 			goto ret;
   2102         1.5  augustss 		}
   2103         1.5  augustss 		sc->sc_conf = value;
   2104         1.5  augustss 		break;
   2105         1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   2106         1.5  augustss 		break;
   2107         1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   2108         1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   2109         1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   2110         1.5  augustss 		err = USBD_IOERROR;
   2111         1.5  augustss 		goto ret;
   2112         1.5  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   2113         1.5  augustss 		break;
   2114         1.5  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   2115         1.5  augustss 		break;
   2116         1.5  augustss 	/* Hub requests */
   2117         1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   2118         1.5  augustss 		break;
   2119         1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   2120       1.106  augustss 		DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
   2121         1.5  augustss 			     "port=%d feature=%d\n",
   2122         1.5  augustss 			     index, value));
   2123         1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   2124         1.5  augustss 			err = USBD_IOERROR;
   2125         1.5  augustss 			goto ret;
   2126         1.5  augustss 		}
   2127         1.5  augustss 		port = EHCI_PORTSC(index);
   2128       1.106  augustss 		v = EOREAD4(sc, port);
   2129       1.106  augustss 		DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
   2130       1.106  augustss 		v &= ~EHCI_PS_CLEAR;
   2131         1.5  augustss 		switch(value) {
   2132         1.5  augustss 		case UHF_PORT_ENABLE:
   2133         1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PE);
   2134         1.5  augustss 			break;
   2135         1.5  augustss 		case UHF_PORT_SUSPEND:
   2136         1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
   2137         1.5  augustss 			break;
   2138         1.5  augustss 		case UHF_PORT_POWER:
   2139       1.106  augustss 			if (sc->sc_hasppc)
   2140       1.106  augustss 				EOWRITE4(sc, port, v &~ EHCI_PS_PP);
   2141         1.5  augustss 			break;
   2142        1.14  augustss 		case UHF_PORT_TEST:
   2143        1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
   2144        1.14  augustss 				    "%d\n", index));
   2145        1.14  augustss 			break;
   2146        1.14  augustss 		case UHF_PORT_INDICATOR:
   2147        1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
   2148        1.14  augustss 				    "%d\n", index));
   2149        1.14  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
   2150        1.14  augustss 			break;
   2151         1.5  augustss 		case UHF_C_PORT_CONNECTION:
   2152         1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_CSC);
   2153         1.5  augustss 			break;
   2154         1.5  augustss 		case UHF_C_PORT_ENABLE:
   2155         1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PEC);
   2156         1.5  augustss 			break;
   2157         1.5  augustss 		case UHF_C_PORT_SUSPEND:
   2158         1.5  augustss 			/* how? */
   2159         1.5  augustss 			break;
   2160         1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2161         1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_OCC);
   2162         1.5  augustss 			break;
   2163         1.5  augustss 		case UHF_C_PORT_RESET:
   2164       1.106  augustss 			sc->sc_isreset[index] = 0;
   2165         1.5  augustss 			break;
   2166         1.5  augustss 		default:
   2167         1.5  augustss 			err = USBD_IOERROR;
   2168         1.5  augustss 			goto ret;
   2169         1.5  augustss 		}
   2170         1.5  augustss #if 0
   2171         1.5  augustss 		switch(value) {
   2172         1.5  augustss 		case UHF_C_PORT_CONNECTION:
   2173         1.5  augustss 		case UHF_C_PORT_ENABLE:
   2174         1.5  augustss 		case UHF_C_PORT_SUSPEND:
   2175         1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2176         1.5  augustss 		case UHF_C_PORT_RESET:
   2177         1.5  augustss 		default:
   2178         1.5  augustss 			break;
   2179         1.5  augustss 		}
   2180         1.5  augustss #endif
   2181         1.5  augustss 		break;
   2182         1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2183       1.109  christos 		if (len == 0)
   2184       1.109  christos 			break;
   2185        1.51    toshii 		if ((value & 0xff) != 0) {
   2186         1.5  augustss 			err = USBD_IOERROR;
   2187         1.5  augustss 			goto ret;
   2188         1.5  augustss 		}
   2189         1.5  augustss 		hubd = ehci_hubd;
   2190         1.5  augustss 		hubd.bNbrPorts = sc->sc_noport;
   2191         1.5  augustss 		v = EOREAD4(sc, EHCI_HCSPARAMS);
   2192         1.5  augustss 		USETW(hubd.wHubCharacteristics,
   2193        1.14  augustss 		    EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
   2194        1.78  augustss 		    EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
   2195        1.14  augustss 		        ? UHD_PORT_IND : 0);
   2196         1.5  augustss 		hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
   2197        1.33  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   2198         1.5  augustss 			hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
   2199         1.5  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   2200         1.5  augustss 		l = min(len, hubd.bDescLength);
   2201         1.5  augustss 		totlen = l;
   2202         1.5  augustss 		memcpy(buf, &hubd, l);
   2203         1.5  augustss 		break;
   2204         1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2205         1.5  augustss 		if (len != 4) {
   2206         1.5  augustss 			err = USBD_IOERROR;
   2207         1.5  augustss 			goto ret;
   2208         1.5  augustss 		}
   2209         1.5  augustss 		memset(buf, 0, len); /* ? XXX */
   2210         1.5  augustss 		totlen = len;
   2211         1.5  augustss 		break;
   2212         1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2213        1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
   2214         1.5  augustss 			    index));
   2215         1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   2216         1.5  augustss 			err = USBD_IOERROR;
   2217         1.5  augustss 			goto ret;
   2218         1.5  augustss 		}
   2219         1.5  augustss 		if (len != 4) {
   2220         1.5  augustss 			err = USBD_IOERROR;
   2221         1.5  augustss 			goto ret;
   2222         1.5  augustss 		}
   2223         1.5  augustss 		v = EOREAD4(sc, EHCI_PORTSC(index));
   2224        1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
   2225         1.5  augustss 			    v));
   2226        1.11  augustss 		i = UPS_HIGH_SPEED;
   2227         1.5  augustss 		if (v & EHCI_PS_CS)	i |= UPS_CURRENT_CONNECT_STATUS;
   2228         1.5  augustss 		if (v & EHCI_PS_PE)	i |= UPS_PORT_ENABLED;
   2229         1.5  augustss 		if (v & EHCI_PS_SUSP)	i |= UPS_SUSPEND;
   2230         1.5  augustss 		if (v & EHCI_PS_OCA)	i |= UPS_OVERCURRENT_INDICATOR;
   2231         1.5  augustss 		if (v & EHCI_PS_PR)	i |= UPS_RESET;
   2232         1.5  augustss 		if (v & EHCI_PS_PP)	i |= UPS_PORT_POWER;
   2233         1.5  augustss 		USETW(ps.wPortStatus, i);
   2234         1.5  augustss 		i = 0;
   2235         1.5  augustss 		if (v & EHCI_PS_CSC)	i |= UPS_C_CONNECT_STATUS;
   2236         1.5  augustss 		if (v & EHCI_PS_PEC)	i |= UPS_C_PORT_ENABLED;
   2237         1.5  augustss 		if (v & EHCI_PS_OCC)	i |= UPS_C_OVERCURRENT_INDICATOR;
   2238       1.106  augustss 		if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET;
   2239         1.5  augustss 		USETW(ps.wPortChange, i);
   2240         1.5  augustss 		l = min(len, sizeof ps);
   2241         1.5  augustss 		memcpy(buf, &ps, l);
   2242         1.5  augustss 		totlen = l;
   2243         1.5  augustss 		break;
   2244         1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2245         1.5  augustss 		err = USBD_IOERROR;
   2246         1.5  augustss 		goto ret;
   2247         1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2248         1.5  augustss 		break;
   2249         1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2250         1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   2251         1.5  augustss 			err = USBD_IOERROR;
   2252         1.5  augustss 			goto ret;
   2253         1.5  augustss 		}
   2254         1.5  augustss 		port = EHCI_PORTSC(index);
   2255       1.106  augustss 		v = EOREAD4(sc, port);
   2256       1.106  augustss 		DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
   2257       1.106  augustss 		v &= ~EHCI_PS_CLEAR;
   2258         1.5  augustss 		switch(value) {
   2259         1.5  augustss 		case UHF_PORT_ENABLE:
   2260         1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PE);
   2261         1.5  augustss 			break;
   2262         1.5  augustss 		case UHF_PORT_SUSPEND:
   2263         1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_SUSP);
   2264         1.5  augustss 			break;
   2265         1.5  augustss 		case UHF_PORT_RESET:
   2266        1.72  augustss 			DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
   2267         1.5  augustss 				    index));
   2268         1.6  augustss 			if (EHCI_PS_IS_LOWSPEED(v)) {
   2269         1.6  augustss 				/* Low speed device, give up ownership. */
   2270         1.6  augustss 				ehci_disown(sc, index, 1);
   2271         1.6  augustss 				break;
   2272         1.6  augustss 			}
   2273         1.8  augustss 			/* Start reset sequence. */
   2274         1.8  augustss 			v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
   2275         1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PR);
   2276         1.8  augustss 			/* Wait for reset to complete. */
   2277        1.13  augustss 			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   2278        1.17  augustss 			if (sc->sc_dying) {
   2279        1.17  augustss 				err = USBD_IOERROR;
   2280        1.17  augustss 				goto ret;
   2281        1.17  augustss 			}
   2282         1.8  augustss 			/* Terminate reset sequence. */
   2283         1.8  augustss 			EOWRITE4(sc, port, v);
   2284         1.8  augustss 			/* Wait for HC to complete reset. */
   2285        1.13  augustss 			usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
   2286        1.17  augustss 			if (sc->sc_dying) {
   2287        1.17  augustss 				err = USBD_IOERROR;
   2288        1.17  augustss 				goto ret;
   2289        1.17  augustss 			}
   2290         1.8  augustss 			v = EOREAD4(sc, port);
   2291         1.8  augustss 			DPRINTF(("ehci after reset, status=0x%08x\n", v));
   2292         1.8  augustss 			if (v & EHCI_PS_PR) {
   2293         1.8  augustss 				printf("%s: port reset timeout\n",
   2294         1.8  augustss 				       USBDEVNAME(sc->sc_bus.bdev));
   2295         1.8  augustss 				return (USBD_TIMEOUT);
   2296         1.5  augustss 			}
   2297         1.8  augustss 			if (!(v & EHCI_PS_PE)) {
   2298         1.6  augustss 				/* Not a high speed device, give up ownership.*/
   2299         1.6  augustss 				ehci_disown(sc, index, 0);
   2300         1.6  augustss 				break;
   2301         1.6  augustss 			}
   2302       1.106  augustss 			sc->sc_isreset[index] = 1;
   2303         1.8  augustss 			DPRINTF(("ehci port %d reset, status = 0x%08x\n",
   2304         1.6  augustss 				 index, v));
   2305         1.5  augustss 			break;
   2306         1.5  augustss 		case UHF_PORT_POWER:
   2307        1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port power "
   2308       1.106  augustss 				    "%d (has PPC = %d)\n", index,
   2309       1.106  augustss 				    sc->sc_hasppc));
   2310       1.106  augustss 			if (sc->sc_hasppc)
   2311       1.106  augustss 				EOWRITE4(sc, port, v | EHCI_PS_PP);
   2312         1.5  augustss 			break;
   2313        1.11  augustss 		case UHF_PORT_TEST:
   2314        1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port test "
   2315        1.11  augustss 				    "%d\n", index));
   2316        1.11  augustss 			break;
   2317        1.11  augustss 		case UHF_PORT_INDICATOR:
   2318        1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
   2319        1.11  augustss 				    "%d\n", index));
   2320        1.14  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PIC);
   2321        1.11  augustss 			break;
   2322         1.5  augustss 		default:
   2323         1.5  augustss 			err = USBD_IOERROR;
   2324         1.5  augustss 			goto ret;
   2325         1.5  augustss 		}
   2326         1.5  augustss 		break;
   2327        1.11  augustss 	case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
   2328        1.11  augustss 	case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
   2329        1.11  augustss 	case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
   2330        1.11  augustss 	case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
   2331        1.11  augustss 		break;
   2332         1.5  augustss 	default:
   2333         1.5  augustss 		err = USBD_IOERROR;
   2334         1.5  augustss 		goto ret;
   2335         1.5  augustss 	}
   2336         1.5  augustss 	xfer->actlen = totlen;
   2337         1.5  augustss 	err = USBD_NORMAL_COMPLETION;
   2338         1.5  augustss  ret:
   2339         1.5  augustss 	xfer->status = err;
   2340         1.5  augustss 	s = splusb();
   2341         1.5  augustss 	usb_transfer_complete(xfer);
   2342         1.5  augustss 	splx(s);
   2343         1.5  augustss 	return (USBD_IN_PROGRESS);
   2344         1.6  augustss }
   2345         1.6  augustss 
   2346         1.6  augustss void
   2347       1.115  christos ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
   2348         1.6  augustss {
   2349        1.24  augustss 	int port;
   2350         1.6  augustss 	u_int32_t v;
   2351         1.6  augustss 
   2352         1.6  augustss 	DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
   2353         1.6  augustss #ifdef DIAGNOSTIC
   2354         1.6  augustss 	if (sc->sc_npcomp != 0) {
   2355        1.24  augustss 		int i = (index-1) / sc->sc_npcomp;
   2356         1.6  augustss 		if (i >= sc->sc_ncomp)
   2357         1.6  augustss 			printf("%s: strange port\n",
   2358         1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev));
   2359         1.6  augustss 		else
   2360         1.6  augustss 			printf("%s: handing over %s speed device on "
   2361         1.6  augustss 			       "port %d to %s\n",
   2362         1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev),
   2363         1.6  augustss 			       lowspeed ? "low" : "full",
   2364         1.6  augustss 			       index, USBDEVNAME(sc->sc_comps[i]->bdev));
   2365         1.6  augustss 	} else {
   2366         1.6  augustss 		printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
   2367         1.6  augustss 	}
   2368         1.6  augustss #endif
   2369         1.6  augustss 	port = EHCI_PORTSC(index);
   2370         1.6  augustss 	v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   2371         1.6  augustss 	EOWRITE4(sc, port, v | EHCI_PS_PO);
   2372         1.5  augustss }
   2373         1.5  augustss 
   2374         1.5  augustss /* Abort a root control request. */
   2375         1.5  augustss Static void
   2376       1.115  christos ehci_root_ctrl_abort(usbd_xfer_handle xfer)
   2377         1.5  augustss {
   2378         1.5  augustss 	/* Nothing to do, all transfers are synchronous. */
   2379         1.5  augustss }
   2380         1.5  augustss 
   2381         1.5  augustss /* Close the root pipe. */
   2382         1.5  augustss Static void
   2383       1.115  christos ehci_root_ctrl_close(usbd_pipe_handle pipe)
   2384         1.5  augustss {
   2385         1.5  augustss 	DPRINTF(("ehci_root_ctrl_close\n"));
   2386         1.5  augustss 	/* Nothing to do. */
   2387         1.5  augustss }
   2388         1.5  augustss 
   2389         1.5  augustss void
   2390         1.5  augustss ehci_root_intr_done(usbd_xfer_handle xfer)
   2391         1.5  augustss {
   2392         1.5  augustss }
   2393         1.5  augustss 
   2394         1.5  augustss Static usbd_status
   2395         1.5  augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
   2396         1.5  augustss {
   2397  1.123.12.1     itohy 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2398         1.5  augustss 	usbd_status err;
   2399         1.5  augustss 
   2400         1.5  augustss 	/* Insert last in queue. */
   2401  1.123.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   2402  1.123.12.1     itohy 	    &EXFER(xfer)->dmabuf);
   2403         1.5  augustss 	if (err)
   2404         1.5  augustss 		return (err);
   2405         1.5  augustss 
   2406         1.5  augustss 	/* Pipe isn't running, start first */
   2407         1.5  augustss 	return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2408         1.5  augustss }
   2409         1.5  augustss 
   2410         1.5  augustss Static usbd_status
   2411         1.5  augustss ehci_root_intr_start(usbd_xfer_handle xfer)
   2412         1.5  augustss {
   2413         1.5  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   2414         1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2415         1.5  augustss 
   2416         1.5  augustss 	if (sc->sc_dying)
   2417         1.5  augustss 		return (USBD_IOERROR);
   2418         1.5  augustss 
   2419         1.5  augustss 	sc->sc_intrxfer = xfer;
   2420         1.5  augustss 
   2421         1.5  augustss 	return (USBD_IN_PROGRESS);
   2422         1.5  augustss }
   2423         1.5  augustss 
   2424         1.5  augustss /* Abort a root interrupt request. */
   2425         1.5  augustss Static void
   2426         1.5  augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
   2427         1.5  augustss {
   2428  1.123.12.1     itohy 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2429         1.5  augustss 	int s;
   2430         1.5  augustss 
   2431         1.5  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2432         1.5  augustss 		DPRINTF(("ehci_root_intr_abort: remove\n"));
   2433         1.5  augustss 		xfer->pipe->intrxfer = NULL;
   2434         1.5  augustss 	}
   2435         1.5  augustss 	xfer->status = USBD_CANCELLED;
   2436         1.5  augustss 	s = splusb();
   2437  1.123.12.1     itohy 	usb_transfer_complete_dma(xfer, &sc->sc_dmatag, &EXFER(xfer)->dmabuf);
   2438         1.5  augustss 	splx(s);
   2439         1.5  augustss }
   2440         1.5  augustss 
   2441         1.5  augustss /* Close the root pipe. */
   2442         1.5  augustss Static void
   2443         1.5  augustss ehci_root_intr_close(usbd_pipe_handle pipe)
   2444         1.5  augustss {
   2445         1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2446        1.33  augustss 
   2447         1.5  augustss 	DPRINTF(("ehci_root_intr_close\n"));
   2448         1.5  augustss 
   2449         1.5  augustss 	sc->sc_intrxfer = NULL;
   2450         1.5  augustss }
   2451         1.5  augustss 
   2452         1.5  augustss void
   2453         1.5  augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
   2454         1.5  augustss {
   2455         1.9  augustss }
   2456         1.9  augustss 
   2457         1.9  augustss /************************/
   2458         1.9  augustss 
   2459         1.9  augustss ehci_soft_qh_t *
   2460         1.9  augustss ehci_alloc_sqh(ehci_softc_t *sc)
   2461         1.9  augustss {
   2462         1.9  augustss 	ehci_soft_qh_t *sqh;
   2463  1.123.12.1     itohy 	ehci_soft_qtd_t *sqtd;
   2464         1.9  augustss 	usbd_status err;
   2465         1.9  augustss 	int i, offs;
   2466         1.9  augustss 	usb_dma_t dma;
   2467  1.123.12.1     itohy 	struct ehci_mem_desc *em;
   2468         1.9  augustss 
   2469         1.9  augustss 	if (sc->sc_freeqhs == NULL) {
   2470         1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
   2471  1.123.12.1     itohy 		err = usb_allocmem(&sc->sc_dmatag,
   2472  1.123.12.1     itohy 		    EHCI_SQH_SIZE*EHCI_SQH_CHUNK + sizeof(struct ehci_mem_desc),
   2473  1.123.12.1     itohy 		    EHCI_PAGE_SIZE, &dma);
   2474        1.25  augustss #ifdef EHCI_DEBUG
   2475        1.25  augustss 		if (err)
   2476        1.25  augustss 			printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
   2477        1.25  augustss #endif
   2478         1.9  augustss 		if (err)
   2479        1.11  augustss 			return (NULL);
   2480  1.123.12.1     itohy 		em = KERNADDR(&dma, EHCI_SQH_SIZE * EHCI_SQH_CHUNK);
   2481  1.123.12.1     itohy 		em->em_top = KERNADDR(&dma, 0);
   2482  1.123.12.1     itohy 		em->em_topdma = DMAADDR(&dma, 0);
   2483  1.123.12.1     itohy 		em->em_dma = dma;
   2484  1.123.12.1     itohy 		SIMPLEQ_INSERT_HEAD(&sc->sc_sqh_chunks, em, em_next);
   2485         1.9  augustss 		for(i = 0; i < EHCI_SQH_CHUNK; i++) {
   2486         1.9  augustss 			offs = i * EHCI_SQH_SIZE;
   2487        1.30  augustss 			sqh = KERNADDR(&dma, offs);
   2488  1.123.12.1     itohy 			sqh->eh_mdesc = em;
   2489         1.9  augustss 			sqh->next = sc->sc_freeqhs;
   2490         1.9  augustss 			sc->sc_freeqhs = sqh;
   2491         1.9  augustss 		}
   2492         1.9  augustss 	}
   2493  1.123.12.1     itohy 	/* Allocate the initial inactive sqtd. */
   2494  1.123.12.1     itohy 	sqtd = ehci_alloc_sqtd_norsv(sc);
   2495  1.123.12.1     itohy 	if (sqtd == NULL)
   2496  1.123.12.1     itohy 		return (NULL);
   2497  1.123.12.1     itohy 	sqtd->qtd.qtd_status = htole32(0);
   2498  1.123.12.1     itohy 	sqtd->qtd.qtd_next = EHCI_NULL;
   2499  1.123.12.1     itohy 	sqtd->qtd.qtd_altnext = EHCI_NULL;
   2500  1.123.12.1     itohy 
   2501         1.9  augustss 	sqh = sc->sc_freeqhs;
   2502         1.9  augustss 	sc->sc_freeqhs = sqh->next;
   2503  1.123.12.1     itohy 
   2504  1.123.12.1     itohy 	/* The overlay QTD should begin zeroed. */
   2505  1.123.12.1     itohy 	sqh->qh.qh_qtd.qtd_next = htole32(EHCI_SQTD_DMAADDR(sqtd));
   2506  1.123.12.1     itohy 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   2507  1.123.12.1     itohy 	sqh->qh.qh_qtd.qtd_status = 0;
   2508  1.123.12.1     itohy 	for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
   2509  1.123.12.1     itohy 		sqh->qh.qh_qtd.qtd_buffer[i] = 0;
   2510  1.123.12.1     itohy 		sqh->qh.qh_qtd.qtd_buffer_hi[i] = 0;
   2511  1.123.12.1     itohy 	}
   2512        1.11  augustss 	sqh->next = NULL;
   2513  1.123.12.1     itohy 	sqh->prev = NULL;
   2514  1.123.12.1     itohy 	sqh->sqtd = sqtd;
   2515  1.123.12.1     itohy 	sqh->inactivesqtd = sqtd;
   2516         1.9  augustss 	return (sqh);
   2517         1.9  augustss }
   2518         1.9  augustss 
   2519         1.9  augustss void
   2520         1.9  augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
   2521         1.9  augustss {
   2522  1.123.12.1     itohy 	ehci_free_sqtd_norsv(sc, sqh->inactivesqtd);
   2523         1.9  augustss 	sqh->next = sc->sc_freeqhs;
   2524         1.9  augustss 	sc->sc_freeqhs = sqh;
   2525         1.9  augustss }
   2526         1.9  augustss 
   2527  1.123.12.1     itohy Static usbd_status
   2528  1.123.12.1     itohy ehci_grow_sqtd(ehci_softc_t *sc)
   2529         1.9  augustss {
   2530  1.123.12.1     itohy 	usb_dma_t dma;
   2531  1.123.12.1     itohy 	struct ehci_mem_desc *em;
   2532         1.9  augustss 	ehci_soft_qtd_t *sqtd;
   2533         1.9  augustss 	usbd_status err;
   2534  1.123.12.1     itohy 	int i, s, offs;
   2535         1.9  augustss 
   2536  1.123.12.1     itohy 	DPRINTFN(2, ("ehci_grow_sqtd: allocating chunk\n"));
   2537  1.123.12.1     itohy 	err = usb_allocmem(&sc->sc_dmatag,
   2538  1.123.12.1     itohy 	    EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK + sizeof(struct ehci_mem_desc),
   2539  1.123.12.1     itohy 	    EHCI_PAGE_SIZE, &dma);
   2540        1.25  augustss #ifdef EHCI_DEBUG
   2541  1.123.12.1     itohy 	if (err)
   2542  1.123.12.1     itohy 		printf("ehci_grow_sqtd: usb_allocmem()=%d\n", err);
   2543        1.25  augustss #endif
   2544  1.123.12.1     itohy 	if (err)
   2545  1.123.12.1     itohy 		return (err);
   2546  1.123.12.1     itohy 	em = KERNADDR(&dma, EHCI_SQTD_SIZE * EHCI_SQTD_CHUNK);
   2547  1.123.12.1     itohy 	em->em_top = KERNADDR(&dma, 0);
   2548  1.123.12.1     itohy 	em->em_topdma = DMAADDR(&dma, 0);
   2549  1.123.12.1     itohy 	em->em_dma = dma;
   2550  1.123.12.1     itohy 	s = splusb();
   2551  1.123.12.1     itohy 	SIMPLEQ_INSERT_HEAD(&sc->sc_sqtd_chunks, em, em_next);
   2552  1.123.12.1     itohy 	for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
   2553  1.123.12.1     itohy 		offs = i * EHCI_SQTD_SIZE;
   2554  1.123.12.1     itohy 		sqtd = KERNADDR(&dma, offs);
   2555  1.123.12.1     itohy 		sqtd->et_mdesc = em;
   2556  1.123.12.1     itohy 		sqtd->nextqtd = sc->sc_freeqtds;
   2557  1.123.12.1     itohy 		sc->sc_freeqtds = sqtd;
   2558  1.123.12.1     itohy 		sc->sc_nfreeqtds++;
   2559         1.9  augustss 	}
   2560  1.123.12.1     itohy 	splx(s);
   2561  1.123.12.1     itohy 
   2562  1.123.12.1     itohy 	return (USBD_NORMAL_COMPLETION);
   2563  1.123.12.1     itohy }
   2564  1.123.12.1     itohy 
   2565  1.123.12.1     itohy ehci_soft_qtd_t *
   2566  1.123.12.1     itohy ehci_alloc_sqtd(ehci_softc_t *sc)
   2567  1.123.12.1     itohy {
   2568  1.123.12.1     itohy 	ehci_soft_qtd_t *sqtd;
   2569  1.123.12.1     itohy 	int i;
   2570  1.123.12.1     itohy 	int s;
   2571         1.9  augustss 
   2572         1.9  augustss 	s = splusb();
   2573  1.123.12.1     itohy 
   2574  1.123.12.1     itohy #ifdef DIAGNOSTIC
   2575  1.123.12.1     itohy 	if (sc->sc_freeqtds == NULL)
   2576  1.123.12.1     itohy 		panic("ehci_alloc_sqtd: %p %d",
   2577  1.123.12.1     itohy 		    sc->sc_freeqtds, sc->sc_nfreeqtds);
   2578  1.123.12.1     itohy #endif
   2579         1.9  augustss 	sqtd = sc->sc_freeqtds;
   2580         1.9  augustss 	sc->sc_freeqtds = sqtd->nextqtd;
   2581  1.123.12.1     itohy 	splx(s);
   2582  1.123.12.1     itohy 	sqtd->qtd.qtd_next = EHCI_NULL;
   2583  1.123.12.1     itohy 	sqtd->qtd.qtd_altnext = EHCI_NULL;
   2584  1.123.12.1     itohy 	sqtd->qtd.qtd_status = 0;
   2585  1.123.12.1     itohy 	for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
   2586  1.123.12.1     itohy 		sqtd->qtd.qtd_buffer[i] = 0;
   2587  1.123.12.1     itohy 		sqtd->qtd.qtd_buffer_hi[i] = 0;
   2588  1.123.12.1     itohy 	}
   2589         1.9  augustss 	sqtd->nextqtd = NULL;
   2590         1.9  augustss 	sqtd->xfer = NULL;
   2591         1.9  augustss 
   2592         1.9  augustss 	return (sqtd);
   2593         1.9  augustss }
   2594         1.9  augustss 
   2595  1.123.12.1     itohy Static ehci_soft_qtd_t *
   2596  1.123.12.1     itohy ehci_alloc_sqtd_norsv(ehci_softc_t *sc)
   2597  1.123.12.1     itohy {
   2598  1.123.12.1     itohy 	int s;
   2599  1.123.12.1     itohy 
   2600  1.123.12.1     itohy 	s = splusb();
   2601  1.123.12.1     itohy 	if (sc->sc_nfreeqtds < 1)
   2602  1.123.12.1     itohy 		if (ehci_grow_sqtd(sc))
   2603  1.123.12.1     itohy 			return (NULL);
   2604  1.123.12.1     itohy 	sc->sc_nfreeqtds--;
   2605  1.123.12.1     itohy 	splx(s);
   2606  1.123.12.1     itohy 	return (ehci_alloc_sqtd(sc));
   2607  1.123.12.1     itohy }
   2608  1.123.12.1     itohy 
   2609         1.9  augustss void
   2610         1.9  augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
   2611         1.9  augustss {
   2612         1.9  augustss 	int s;
   2613         1.9  augustss 
   2614         1.9  augustss 	s = splusb();
   2615         1.9  augustss 	sqtd->nextqtd = sc->sc_freeqtds;
   2616         1.9  augustss 	sc->sc_freeqtds = sqtd;
   2617         1.9  augustss 	splx(s);
   2618         1.9  augustss }
   2619         1.9  augustss 
   2620  1.123.12.1     itohy Static void
   2621  1.123.12.1     itohy ehci_free_sqtd_norsv(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
   2622  1.123.12.1     itohy {
   2623  1.123.12.1     itohy 	int s;
   2624  1.123.12.1     itohy 
   2625  1.123.12.1     itohy 	ehci_free_sqtd(sc, sqtd);
   2626  1.123.12.1     itohy 	s = splusb();
   2627  1.123.12.1     itohy 	sc->sc_nfreeqtds++;
   2628  1.123.12.1     itohy 	splx(s);
   2629  1.123.12.1     itohy }
   2630  1.123.12.1     itohy 
   2631        1.15  augustss usbd_status
   2632        1.25  augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
   2633  1.123.12.1     itohy      int alen, int rd, usbd_xfer_handle xfer, ehci_soft_qtd_t *start,
   2634  1.123.12.1     itohy      ehci_soft_qtd_t *newinactive, ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
   2635        1.15  augustss {
   2636        1.15  augustss 	ehci_soft_qtd_t *next, *cur;
   2637  1.123.12.1     itohy 	ehci_physaddr_t dataphys, nextphys;
   2638        1.15  augustss 	u_int32_t qtdstatus;
   2639  1.123.12.1     itohy 	int adj, len, curlen, mps, offset, pagelen, seg, segoff;
   2640  1.123.12.1     itohy 	int i, iscontrol, forceshort;
   2641  1.123.12.1     itohy 	struct usb_buffer_dma *ub = &EXFER(xfer)->dmabuf;
   2642  1.123.12.1     itohy 	bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub);
   2643  1.123.12.1     itohy 	int nsegs = USB_BUFFER_NSEGS(ub);
   2644        1.15  augustss 
   2645        1.25  augustss 	DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
   2646        1.15  augustss 
   2647  1.123.12.1     itohy 	offset = 0;
   2648        1.15  augustss 	len = alen;
   2649  1.123.12.1     itohy 	iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
   2650  1.123.12.1     itohy 	    UE_CONTROL;
   2651        1.67   mycroft 	qtdstatus = EHCI_QTD_ACTIVE |
   2652        1.15  augustss 	    EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
   2653        1.15  augustss 	    EHCI_QTD_SET_CERR(3)
   2654        1.15  augustss 	    /* IOC set below */
   2655        1.15  augustss 	    /* BYTES set below */
   2656        1.67   mycroft 	    ;
   2657  1.123.12.1     itohy 	mps = UE_MAXPKTSZ(epipe->pipe.endpoint->edesc);
   2658  1.123.12.1     itohy 	forceshort = ((xfer->flags & USBD_FORCE_SHORT_XFER) || len == 0) &&
   2659  1.123.12.1     itohy 	    len % mps == 0;
   2660  1.123.12.1     itohy 	/*
   2661  1.123.12.1     itohy 	 * The control transfer data stage always starts with a toggle of 1.
   2662  1.123.12.1     itohy 	 * For other transfers we let the hardware track the toggle state.
   2663  1.123.12.1     itohy 	 */
   2664  1.123.12.1     itohy 	if (iscontrol)
   2665  1.123.12.1     itohy 		qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
   2666  1.123.12.1     itohy 
   2667  1.123.12.1     itohy 	if (start != NULL) {
   2668  1.123.12.1     itohy 		/*
   2669  1.123.12.1     itohy 		 * If we are given a starting qTD, assume it is linked into
   2670  1.123.12.1     itohy 		 * an active QH so be careful not to mark it active.
   2671  1.123.12.1     itohy 		 */
   2672  1.123.12.1     itohy 		cur = start;
   2673  1.123.12.1     itohy 		*sp = cur;
   2674  1.123.12.1     itohy 		qtdstatus &= ~EHCI_QTD_ACTIVE;
   2675  1.123.12.1     itohy 	} else {
   2676  1.123.12.1     itohy 		cur = ehci_alloc_sqtd(sc);
   2677  1.123.12.1     itohy 		*sp = cur;
   2678  1.123.12.1     itohy 		if (cur == NULL)
   2679  1.123.12.1     itohy 			goto nomem;
   2680  1.123.12.1     itohy 	}
   2681  1.123.12.1     itohy 	seg = 0;
   2682  1.123.12.1     itohy 	segoff = 0;
   2683        1.15  augustss 	for (;;) {
   2684  1.123.12.1     itohy 		curlen = 0;
   2685  1.123.12.1     itohy 
   2686        1.26  augustss 		/* The EHCI hardware can handle at most 5 pages. */
   2687  1.123.12.1     itohy 		for (i = 0; i < EHCI_QTD_NBUFFERS && curlen < len; i++) {
   2688  1.123.12.1     itohy 			USB_KASSERT2(seg < nsegs,
   2689  1.123.12.1     itohy 			    ("ehci_alloc_sqtd_chain: overrun"));
   2690  1.123.12.1     itohy 			dataphys = segs[seg].ds_addr + segoff;
   2691  1.123.12.1     itohy 			pagelen = segs[seg].ds_len - segoff;
   2692  1.123.12.1     itohy 			if (pagelen > len - curlen)
   2693  1.123.12.1     itohy 				pagelen = len - curlen;
   2694  1.123.12.1     itohy 			if (pagelen > EHCI_PAGE_SIZE -
   2695  1.123.12.1     itohy 			    EHCI_PAGE_OFFSET(dataphys))
   2696  1.123.12.1     itohy 				pagelen = EHCI_PAGE_SIZE -
   2697  1.123.12.1     itohy 				    EHCI_PAGE_OFFSET(dataphys);
   2698  1.123.12.1     itohy 			segoff += pagelen;
   2699  1.123.12.1     itohy 			if (segoff >= segs[seg].ds_len) {
   2700  1.123.12.1     itohy 				USB_KASSERT2(segoff == segs[seg].ds_len,
   2701  1.123.12.1     itohy 				    ("ehci_alloc_sqtd_chain: overlap"));
   2702  1.123.12.1     itohy 				seg++;
   2703  1.123.12.1     itohy 				segoff = 0;
   2704        1.25  augustss 			}
   2705  1.123.12.1     itohy 
   2706  1.123.12.1     itohy 			cur->qtd.qtd_buffer[i] = htole32(dataphys);
   2707  1.123.12.1     itohy 			cur->qtd.qtd_buffer_hi[i] = 0;
   2708  1.123.12.1     itohy 			curlen += pagelen;
   2709  1.123.12.1     itohy 
   2710  1.123.12.1     itohy 			/*
   2711  1.123.12.1     itohy 			 * Must stop if there is any gap before or after
   2712  1.123.12.1     itohy 			 * the page boundary.
   2713  1.123.12.1     itohy 			 */
   2714  1.123.12.1     itohy 			if (EHCI_PAGE_OFFSET(dataphys + pagelen) != 0)
   2715  1.123.12.1     itohy 				break;
   2716  1.123.12.1     itohy 			if (seg < nsegs && EHCI_PAGE_OFFSET(segoff +
   2717  1.123.12.1     itohy 			    segs[seg].ds_addr) != 0)
   2718  1.123.12.1     itohy 				break;
   2719        1.15  augustss 		}
   2720  1.123.12.1     itohy 		/* Adjust down to a multiple of mps if not at the end. */
   2721  1.123.12.1     itohy 		if (curlen < len && curlen % mps != 0) {
   2722  1.123.12.1     itohy 			adj = curlen % mps;
   2723  1.123.12.1     itohy 			curlen -= adj;
   2724  1.123.12.1     itohy 			USB_KASSERT2(curlen > 0,
   2725  1.123.12.1     itohy 			    ("ehci_alloc_sqtd_chain: need to copy"));
   2726  1.123.12.1     itohy 			segoff -= adj;
   2727  1.123.12.1     itohy 			if (segoff < 0) {
   2728  1.123.12.1     itohy 				seg--;
   2729  1.123.12.1     itohy 				segoff += segs[seg].ds_len;
   2730  1.123.12.1     itohy 			}
   2731  1.123.12.1     itohy 			USB_KASSERT2(seg >= 0 && segoff >= 0,
   2732  1.123.12.1     itohy 			    ("ehci_alloc_sqtd_chain: adjust to mps"));
   2733  1.123.12.1     itohy 		}
   2734  1.123.12.1     itohy 
   2735        1.15  augustss 		len -= curlen;
   2736        1.15  augustss 
   2737  1.123.12.1     itohy 		if (len != 0 || forceshort) {
   2738        1.15  augustss 			next = ehci_alloc_sqtd(sc);
   2739        1.15  augustss 			if (next == NULL)
   2740        1.15  augustss 				goto nomem;
   2741  1.123.12.1     itohy 			nextphys = htole32(EHCI_SQTD_DMAADDR(next));
   2742        1.15  augustss 		} else {
   2743        1.15  augustss 			next = NULL;
   2744        1.15  augustss 			nextphys = EHCI_NULL;
   2745        1.15  augustss 		}
   2746        1.15  augustss 
   2747        1.15  augustss 		cur->nextqtd = next;
   2748  1.123.12.1     itohy 		cur->qtd.qtd_next = nextphys;
   2749  1.123.12.1     itohy 		/* Make sure to stop after a short transfer. */
   2750  1.123.12.1     itohy 		cur->qtd.qtd_altnext = htole32(EHCI_SQTD_DMAADDR(newinactive));
   2751        1.15  augustss 		cur->qtd.qtd_status =
   2752        1.67   mycroft 		    htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
   2753        1.15  augustss 		cur->xfer = xfer;
   2754        1.18  augustss 		cur->len = curlen;
   2755  1.123.12.1     itohy 		DPRINTFN(10,("ehci_alloc_sqtd_chain: curlen=%d\n", curlen));
   2756  1.123.12.1     itohy 		if (iscontrol) {
   2757  1.123.12.1     itohy 			/*
   2758  1.123.12.1     itohy 			 * adjust the toggle based on the number of packets
   2759  1.123.12.1     itohy 			 * in this qtd
   2760  1.123.12.1     itohy 			 */
   2761  1.123.12.1     itohy 			if ((((curlen + mps - 1) / mps) & 1) || curlen == 0)
   2762  1.123.12.1     itohy 				qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
   2763  1.123.12.1     itohy 		}
   2764  1.123.12.1     itohy 		qtdstatus |= EHCI_QTD_ACTIVE;
   2765  1.123.12.1     itohy 		if (len == 0) {
   2766  1.123.12.1     itohy 			if (!forceshort)
   2767  1.123.12.1     itohy 				break;
   2768  1.123.12.1     itohy 			forceshort = 0;
   2769        1.55   mycroft 		}
   2770  1.123.12.1     itohy 		EHCI_SQTD_SYNC(sc, cur,
   2771  1.123.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2772        1.25  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
   2773  1.123.12.1     itohy 		offset += curlen;
   2774        1.15  augustss 		cur = next;
   2775        1.15  augustss 	}
   2776        1.15  augustss 	cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
   2777  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, cur,
   2778  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2779        1.15  augustss 	*ep = cur;
   2780        1.15  augustss 
   2781        1.29  augustss 	DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
   2782        1.29  augustss 		     *sp, *ep));
   2783        1.29  augustss 
   2784        1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2785        1.15  augustss 
   2786        1.15  augustss  nomem:
   2787        1.15  augustss 	/* XXX free chain */
   2788        1.25  augustss 	DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
   2789        1.15  augustss 	return (USBD_NOMEM);
   2790        1.15  augustss }
   2791        1.15  augustss 
   2792  1.123.12.1     itohy /* Free the chain starting at sqtd and end at the qTD before sqtdend */
   2793        1.18  augustss Static void
   2794  1.123.12.1     itohy ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qh_t *sqh,
   2795  1.123.12.1     itohy     ehci_soft_qtd_t *sqtd, ehci_soft_qtd_t *sqtdend)
   2796        1.18  augustss {
   2797  1.123.12.1     itohy 	ehci_soft_qtd_t *p, **prevp;
   2798        1.25  augustss 	int i;
   2799        1.18  augustss 
   2800        1.29  augustss 	DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
   2801        1.29  augustss 		     sqtd, sqtdend));
   2802        1.29  augustss 
   2803  1.123.12.1     itohy 	/* First unlink the chain from the QH's software qTD list. */
   2804  1.123.12.1     itohy 	prevp = &sqh->sqtd;
   2805  1.123.12.1     itohy 	for (p = sqh->sqtd; p != NULL; p = p->nextqtd) {
   2806  1.123.12.1     itohy 		if (p == sqtd) {
   2807  1.123.12.1     itohy 			*prevp = sqtdend;
   2808  1.123.12.1     itohy 			break;
   2809  1.123.12.1     itohy 		}
   2810  1.123.12.1     itohy 		prevp = &p->nextqtd;
   2811  1.123.12.1     itohy 	}
   2812  1.123.12.1     itohy 	USB_KASSERT2(p != NULL, ("ehci_free_sqtd_chain: chain not found"));
   2813        1.25  augustss 	for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
   2814        1.18  augustss 		p = sqtd->nextqtd;
   2815        1.18  augustss 		ehci_free_sqtd(sc, sqtd);
   2816        1.18  augustss 	}
   2817        1.18  augustss }
   2818        1.18  augustss 
   2819        1.15  augustss /****************/
   2820        1.15  augustss 
   2821         1.9  augustss /*
   2822        1.10  augustss  * Close a reqular pipe.
   2823        1.10  augustss  * Assumes that there are no pending transactions.
   2824        1.10  augustss  */
   2825        1.10  augustss void
   2826        1.10  augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
   2827        1.10  augustss {
   2828        1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   2829        1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2830        1.10  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2831        1.10  augustss 	int s;
   2832        1.10  augustss 
   2833        1.10  augustss 	s = splusb();
   2834        1.10  augustss 	ehci_rem_qh(sc, sqh, head);
   2835        1.10  augustss 	splx(s);
   2836  1.123.12.1     itohy 	pipe->endpoint->savedtoggle =
   2837  1.123.12.1     itohy 	    EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
   2838        1.10  augustss 	ehci_free_sqh(sc, epipe->sqh);
   2839        1.10  augustss }
   2840        1.10  augustss 
   2841        1.33  augustss /*
   2842        1.10  augustss  * Abort a device request.
   2843        1.10  augustss  * If this routine is called at splusb() it guarantees that the request
   2844        1.10  augustss  * will be removed from the hardware scheduling and that the callback
   2845        1.10  augustss  * for it will be called with USBD_CANCELLED status.
   2846        1.10  augustss  * It's impossible to guarantee that the requested transfer will not
   2847        1.10  augustss  * have happened since the hardware runs concurrently.
   2848        1.10  augustss  * If the transaction has already happened we rely on the ordinary
   2849        1.10  augustss  * interrupt processing to process it.
   2850        1.10  augustss  */
   2851        1.10  augustss void
   2852        1.10  augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2853        1.10  augustss {
   2854        1.26  augustss #define exfer EXFER(xfer)
   2855        1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2856        1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2857        1.26  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2858  1.123.12.1     itohy 	ehci_soft_qtd_t *sqtd, *snext;
   2859  1.123.12.1     itohy 	ehci_physaddr_t cur, us, next;
   2860        1.11  augustss 	int s;
   2861  1.123.12.1     itohy 	int hit, i;
   2862  1.123.12.1     itohy 	/* int count = 0; */
   2863  1.123.12.1     itohy 	ehci_soft_qh_t *psqh;
   2864        1.10  augustss 
   2865        1.24  augustss 	DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
   2866        1.10  augustss 
   2867        1.17  augustss 	if (sc->sc_dying) {
   2868        1.17  augustss 		/* If we're dying, just do the software part. */
   2869        1.17  augustss 		s = splusb();
   2870        1.17  augustss 		xfer->status = status;	/* make software ignore it */
   2871        1.17  augustss 		usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2872  1.123.12.1     itohy 		usb_rem_task(epipe->pipe.device, &exfer->abort_task);
   2873  1.123.12.1     itohy 		usb_transfer_complete_dma(xfer, &sc->sc_dmatag,
   2874  1.123.12.1     itohy 		    &EXFER(xfer)->dmabuf);
   2875        1.17  augustss 		splx(s);
   2876        1.17  augustss 		return;
   2877        1.17  augustss 	}
   2878        1.17  augustss 
   2879        1.10  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2880        1.37    provos 		panic("ehci_abort_xfer: not in process context");
   2881        1.10  augustss 
   2882        1.11  augustss 	/*
   2883        1.96  augustss 	 * If an abort is already in progress then just wait for it to
   2884        1.96  augustss 	 * complete and return.
   2885        1.96  augustss 	 */
   2886  1.123.12.1     itohy 	if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
   2887        1.96  augustss 		DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
   2888  1.123.12.1     itohy 		/* No need to wait if we're aborting from a timeout. */
   2889        1.96  augustss 		if (status == USBD_TIMEOUT)
   2890  1.123.12.1     itohy 			return;
   2891        1.96  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2892        1.96  augustss 		xfer->status = status;
   2893        1.96  augustss 		DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
   2894  1.123.12.1     itohy 		exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
   2895  1.123.12.1     itohy 		while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
   2896  1.123.12.1     itohy 			tsleep(&exfer->ehci_xfer_flags, PZERO, "ehciaw", 0);
   2897        1.96  augustss 		return;
   2898        1.96  augustss 	}
   2899        1.96  augustss 
   2900        1.96  augustss 	/*
   2901  1.123.12.1     itohy 	 * Step 1: Make interrupt routine and timeouts ignore xfer.
   2902        1.11  augustss 	 */
   2903        1.11  augustss 	s = splusb();
   2904  1.123.12.1     itohy 	exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
   2905        1.11  augustss 	xfer->status = status;	/* make software ignore it */
   2906        1.15  augustss 	usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2907  1.123.12.1     itohy 	usb_rem_task(epipe->pipe.device, &exfer->abort_task);
   2908        1.11  augustss 	splx(s);
   2909        1.11  augustss 
   2910        1.33  augustss 	/*
   2911        1.11  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2912  1.123.12.1     itohy 	 * use of the xfer. We do this by removing the entire
   2913  1.123.12.1     itohy 	 * queue from the async schedule and waiting for the doorbell.
   2914  1.123.12.1     itohy 	 * Nothing else should be touching the queue now.
   2915  1.123.12.1     itohy 	 */
   2916  1.123.12.1     itohy 	psqh = sqh->prev;
   2917  1.123.12.1     itohy 	ehci_rem_qh(sc, sqh, psqh);
   2918  1.123.12.1     itohy 
   2919  1.123.12.1     itohy 	/*
   2920  1.123.12.1     itohy  	 * Step 3:  make sure the soft interrupt routine
   2921  1.123.12.1     itohy 	 * has run. This should remove any completed items off the queue.
   2922  1.123.12.1     itohy 	 * The hardware has no reference to completed items (TDs).
   2923  1.123.12.1     itohy 	 * It's safe to remove them at any time.
   2924        1.11  augustss 	 */
   2925        1.29  augustss 	s = splusb();
   2926        1.77  augustss #ifdef USB_USE_SOFTINTR
   2927        1.29  augustss 	sc->sc_softwake = 1;
   2928        1.77  augustss #endif /* USB_USE_SOFTINTR */
   2929        1.29  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2930        1.77  augustss #ifdef USB_USE_SOFTINTR
   2931        1.29  augustss 	tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
   2932        1.77  augustss #endif /* USB_USE_SOFTINTR */
   2933        1.33  augustss 
   2934        1.33  augustss 	/*
   2935  1.123.12.1     itohy 	 * Step 4: Remove any vestiges of the xfer from the hardware.
   2936        1.11  augustss 	 * The complication here is that the hardware may have executed
   2937  1.123.12.1     itohy 	 * into or even beyond the xfer we're trying to abort.
   2938  1.123.12.1     itohy 	 * So as we're scanning the TDs of this xfer we check if
   2939  1.123.12.1     itohy 	 * the hardware points to any of them.
   2940  1.123.12.1     itohy 	 *
   2941  1.123.12.1     itohy 	 * first we need to see if there are any transfers
   2942  1.123.12.1     itohy 	 * on this queue before the xfer we are aborting.. we need
   2943  1.123.12.1     itohy 	 * to update any pointers that point to us to point past
   2944  1.123.12.1     itohy 	 * the aborting xfer.  (If there is something past us).
   2945  1.123.12.1     itohy 	 * Hardware and software.
   2946        1.11  augustss 	 */
   2947        1.26  augustss 	cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
   2948        1.26  augustss 	hit = 0;
   2949  1.123.12.1     itohy 
   2950  1.123.12.1     itohy 	/* If they initially point here. */
   2951  1.123.12.1     itohy 	us = EHCI_SQTD_DMAADDR(exfer->sqtdstart);
   2952  1.123.12.1     itohy 
   2953  1.123.12.1     itohy 	/* We will change them to point here */
   2954  1.123.12.1     itohy 	snext = exfer->sqtdend->nextqtd;
   2955  1.123.12.1     itohy 	next = htole32(EHCI_SQTD_DMAADDR(snext));
   2956  1.123.12.1     itohy 
   2957  1.123.12.1     itohy 	/*
   2958  1.123.12.1     itohy 	 * Now loop through any qTDs before us and keep track of the pointer
   2959  1.123.12.1     itohy 	 * that points to us for the end.
   2960  1.123.12.1     itohy 	 */
   2961  1.123.12.1     itohy 	sqtd = sqh->sqtd;
   2962  1.123.12.1     itohy 	while (sqtd && sqtd != exfer->sqtdstart) {
   2963  1.123.12.1     itohy 		hit |= (cur == EHCI_SQTD_DMAADDR(sqtd));
   2964  1.123.12.1     itohy 		if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us) {
   2965  1.123.12.1     itohy 			sqtd->qtd.qtd_next = next;
   2966  1.123.12.1     itohy 			EHCI_SQTD_SYNC(sc, sqtd,
   2967  1.123.12.1     itohy 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2968  1.123.12.1     itohy 		}
   2969  1.123.12.1     itohy 		if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us) {
   2970  1.123.12.1     itohy 			sqtd->qtd.qtd_altnext = next;
   2971  1.123.12.1     itohy 			EHCI_SQTD_SYNC(sc, sqtd,
   2972  1.123.12.1     itohy 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2973  1.123.12.1     itohy 		}
   2974  1.123.12.1     itohy 		sqtd = sqtd->nextqtd;
   2975        1.26  augustss 	}
   2976        1.11  augustss 
   2977        1.11  augustss 	/*
   2978  1.123.12.1     itohy 	 * If we already saw the active one then we are pretty much done.
   2979  1.123.12.1     itohy 	 * We've done all the relinking we need to do.
   2980  1.123.12.1     itohy 	 */
   2981  1.123.12.1     itohy 	if (!hit) {
   2982  1.123.12.1     itohy 
   2983  1.123.12.1     itohy 		/*
   2984  1.123.12.1     itohy 		 * Now reinitialise the QH to point to the next qTD
   2985  1.123.12.1     itohy 		 * (if there is one). We only need to do this if
   2986  1.123.12.1     itohy 		 * it was previously pointing to us.
   2987  1.123.12.1     itohy 		 */
   2988  1.123.12.1     itohy 		for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2989  1.123.12.1     itohy 			if (cur == EHCI_SQTD_DMAADDR(sqtd)) {
   2990  1.123.12.1     itohy 				hit++;
   2991  1.123.12.1     itohy 			}
   2992  1.123.12.1     itohy 			if (sqtd == exfer->sqtdend)
   2993  1.123.12.1     itohy 				break;
   2994  1.123.12.1     itohy 		}
   2995  1.123.12.1     itohy 		sqtd = sqtd->nextqtd;
   2996  1.123.12.1     itohy 		/*
   2997  1.123.12.1     itohy 		 * Only need to alter the QH if it was pointing at a qTD
   2998  1.123.12.1     itohy 		 * that we are removing.
   2999  1.123.12.1     itohy 		 */
   3000  1.123.12.1     itohy 		if (hit) {
   3001  1.123.12.1     itohy 			sqh->qh.qh_qtd.qtd_next =
   3002  1.123.12.1     itohy 			    htole32(EHCI_SQTD_DMAADDR(snext));
   3003  1.123.12.1     itohy 			sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   3004  1.123.12.1     itohy 			sqh->qh.qh_qtd.qtd_status &=
   3005  1.123.12.1     itohy 			    htole32(EHCI_QTD_TOGGLE_MASK);
   3006  1.123.12.1     itohy 			for (i = 0; i < EHCI_QTD_NBUFFERS; i++) {
   3007  1.123.12.1     itohy 				sqh->qh.qh_qtd.qtd_buffer[i] = 0;
   3008  1.123.12.1     itohy 				sqh->qh.qh_qtd.qtd_buffer_hi[i] = 0;
   3009  1.123.12.1     itohy 			}
   3010  1.123.12.1     itohy 		}
   3011  1.123.12.1     itohy 	}
   3012  1.123.12.1     itohy 	ehci_add_qh(sc, sqh, psqh);
   3013  1.123.12.1     itohy 	/*
   3014  1.123.12.1     itohy 	 * Step 5: Execute callback.
   3015        1.11  augustss 	 */
   3016        1.18  augustss #ifdef DIAGNOSTIC
   3017        1.26  augustss 	exfer->isdone = 1;
   3018        1.18  augustss #endif
   3019  1.123.12.1     itohy 	/* Do the wakeup first to avoid touching the xfer after the callback. */
   3020  1.123.12.1     itohy 	exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
   3021  1.123.12.1     itohy 	if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
   3022  1.123.12.1     itohy 		exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
   3023  1.123.12.1     itohy 		wakeup(&exfer->ehci_xfer_flags);
   3024  1.123.12.1     itohy 	}
   3025  1.123.12.1     itohy 	usb_transfer_complete_dma(xfer, &sc->sc_dmatag, &EXFER(xfer)->dmabuf);
   3026        1.11  augustss 
   3027  1.123.12.1     itohy 	/* printf("%s: %d TDs aborted\n", __func__, count); */
   3028        1.11  augustss 	splx(s);
   3029        1.26  augustss #undef exfer
   3030        1.10  augustss }
   3031        1.10  augustss 
   3032        1.15  augustss void
   3033        1.15  augustss ehci_timeout(void *addr)
   3034        1.15  augustss {
   3035        1.15  augustss 	struct ehci_xfer *exfer = addr;
   3036        1.17  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
   3037        1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   3038        1.15  augustss 
   3039        1.15  augustss 	DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
   3040        1.22  augustss #ifdef USB_DEBUG
   3041        1.26  augustss 	if (ehcidebug > 1)
   3042        1.22  augustss 		usbd_dump_pipe(exfer->xfer.pipe);
   3043        1.22  augustss #endif
   3044        1.15  augustss 
   3045        1.17  augustss 	if (sc->sc_dying) {
   3046        1.17  augustss 		ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
   3047        1.17  augustss 		return;
   3048        1.17  augustss 	}
   3049        1.17  augustss 
   3050        1.15  augustss 	/* Execute the abort in a process context. */
   3051       1.114     joerg 	usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
   3052       1.114     joerg 	    USB_TASKQ_HC);
   3053        1.15  augustss }
   3054        1.15  augustss 
   3055        1.15  augustss void
   3056        1.15  augustss ehci_timeout_task(void *addr)
   3057        1.15  augustss {
   3058        1.15  augustss 	usbd_xfer_handle xfer = addr;
   3059        1.15  augustss 	int s;
   3060        1.15  augustss 
   3061        1.15  augustss 	DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
   3062        1.15  augustss 
   3063        1.15  augustss 	s = splusb();
   3064        1.15  augustss 	ehci_abort_xfer(xfer, USBD_TIMEOUT);
   3065        1.15  augustss 	splx(s);
   3066        1.15  augustss }
   3067        1.15  augustss 
   3068  1.123.12.1     itohy /*
   3069  1.123.12.1     itohy  * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
   3070  1.123.12.1     itohy  * back the qTD status, or miss signalling occasionally under heavy load.
   3071  1.123.12.1     itohy  * If the host machine is too fast, we can miss transaction completion - when
   3072  1.123.12.1     itohy  * we scan the active list the transaction still seems to be active. This
   3073  1.123.12.1     itohy  * generally exhibits itself as a umass stall that never recovers.
   3074  1.123.12.1     itohy  *
   3075  1.123.12.1     itohy  * We work around this behaviour by setting up this callback after any softintr
   3076  1.123.12.1     itohy  * that completes with transactions still pending, giving us another chance to
   3077  1.123.12.1     itohy  * check for completion after the writeback has taken place.
   3078  1.123.12.1     itohy  */
   3079  1.123.12.1     itohy void
   3080  1.123.12.1     itohy ehci_intrlist_timeout(void *arg)
   3081  1.123.12.1     itohy {
   3082  1.123.12.1     itohy 	ehci_softc_t *sc = arg;
   3083  1.123.12.1     itohy 	int s = splusb();
   3084  1.123.12.1     itohy 
   3085  1.123.12.1     itohy 	DPRINTFN(3, ("ehci_intrlist_timeout\n"));
   3086  1.123.12.1     itohy 	usb_schedsoftintr(&sc->sc_bus);
   3087  1.123.12.1     itohy 
   3088  1.123.12.1     itohy 	splx(s);
   3089  1.123.12.1     itohy }
   3090  1.123.12.1     itohy 
   3091         1.5  augustss /************************/
   3092         1.5  augustss 
   3093        1.10  augustss Static usbd_status
   3094        1.10  augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
   3095        1.10  augustss {
   3096  1.123.12.1     itohy 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3097        1.10  augustss 	usbd_status err;
   3098        1.10  augustss 
   3099        1.10  augustss 	/* Insert last in queue. */
   3100  1.123.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   3101  1.123.12.1     itohy 	    &EXFER(xfer)->dmabuf);
   3102        1.10  augustss 	if (err)
   3103        1.10  augustss 		return (err);
   3104        1.10  augustss 
   3105        1.10  augustss 	/* Pipe isn't running, start first */
   3106        1.10  augustss 	return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3107        1.10  augustss }
   3108        1.10  augustss 
   3109        1.12  augustss Static usbd_status
   3110        1.12  augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
   3111        1.12  augustss {
   3112        1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3113        1.15  augustss 	usbd_status err;
   3114        1.15  augustss 
   3115        1.15  augustss 	if (sc->sc_dying)
   3116        1.15  augustss 		return (USBD_IOERROR);
   3117        1.15  augustss 
   3118        1.15  augustss #ifdef DIAGNOSTIC
   3119        1.15  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   3120        1.15  augustss 		/* XXX panic */
   3121        1.15  augustss 		printf("ehci_device_ctrl_transfer: not a request\n");
   3122        1.15  augustss 		return (USBD_INVAL);
   3123        1.15  augustss 	}
   3124        1.15  augustss #endif
   3125        1.15  augustss 
   3126        1.15  augustss 	err = ehci_device_request(xfer);
   3127        1.15  augustss 	if (err)
   3128        1.15  augustss 		return (err);
   3129        1.15  augustss 
   3130        1.15  augustss 	if (sc->sc_bus.use_polling)
   3131        1.15  augustss 		ehci_waitintr(sc, xfer);
   3132        1.15  augustss 	return (USBD_IN_PROGRESS);
   3133        1.12  augustss }
   3134        1.10  augustss 
   3135        1.10  augustss void
   3136        1.10  augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
   3137        1.10  augustss {
   3138        1.18  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   3139        1.18  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3140  1.123.12.1     itohy 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3141        1.18  augustss 
   3142        1.10  augustss 	DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
   3143        1.10  augustss 
   3144        1.10  augustss #ifdef DIAGNOSTIC
   3145        1.10  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   3146        1.37    provos 		panic("ehci_ctrl_done: not a request");
   3147        1.10  augustss 	}
   3148        1.10  augustss #endif
   3149        1.18  augustss 
   3150        1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3151        1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   3152  1.123.12.1     itohy 		ehci_free_sqtd_chain(sc, epipe->sqh, ex->sqtdstart,
   3153  1.123.12.1     itohy 		    ex->sqtdend->nextqtd);
   3154        1.25  augustss 	}
   3155        1.18  augustss 
   3156        1.25  augustss 	DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
   3157        1.10  augustss }
   3158        1.10  augustss 
   3159        1.10  augustss /* Abort a device control request. */
   3160        1.10  augustss Static void
   3161        1.10  augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
   3162        1.10  augustss {
   3163        1.10  augustss 	DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
   3164        1.10  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   3165        1.10  augustss }
   3166        1.10  augustss 
   3167        1.10  augustss /* Close a device control pipe. */
   3168        1.10  augustss Static void
   3169        1.10  augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
   3170        1.10  augustss {
   3171  1.123.12.1     itohy 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   3172        1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   3173        1.10  augustss 
   3174        1.10  augustss 	DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
   3175        1.11  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   3176  1.123.12.1     itohy 	usb_freemem(&sc->sc_dmatag, &epipe->u.ctl.reqdma);
   3177        1.15  augustss }
   3178        1.15  augustss 
   3179        1.15  augustss usbd_status
   3180        1.15  augustss ehci_device_request(usbd_xfer_handle xfer)
   3181        1.15  augustss {
   3182        1.18  augustss #define exfer EXFER(xfer)
   3183        1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3184        1.15  augustss 	usb_device_request_t *req = &xfer->request;
   3185        1.15  augustss 	usbd_device_handle dev = epipe->pipe.device;
   3186        1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   3187  1.123.12.1     itohy 	ehci_soft_qtd_t *newinactive, *setup, *stat, *next;
   3188        1.15  augustss 	ehci_soft_qh_t *sqh;
   3189        1.15  augustss 	int isread;
   3190        1.15  augustss 	int len;
   3191        1.15  augustss 	usbd_status err;
   3192        1.15  augustss 	int s;
   3193        1.15  augustss 
   3194        1.15  augustss 	isread = req->bmRequestType & UT_READ;
   3195        1.15  augustss 	len = UGETW(req->wLength);
   3196        1.15  augustss 
   3197        1.72  augustss 	DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
   3198        1.15  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   3199        1.15  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   3200  1.123.12.1     itohy 		    UGETW(req->wIndex), len, dev->address,
   3201        1.15  augustss 		    epipe->pipe.endpoint->edesc->bEndpointAddress));
   3202        1.15  augustss 
   3203  1.123.12.1     itohy 	newinactive = ehci_alloc_sqtd(sc);
   3204  1.123.12.1     itohy 	if (newinactive == NULL) {
   3205        1.15  augustss 		err = USBD_NOMEM;
   3206        1.15  augustss 		goto bad1;
   3207        1.15  augustss 	}
   3208  1.123.12.1     itohy 	newinactive->qtd.qtd_status = htole32(0);
   3209  1.123.12.1     itohy 	newinactive->qtd.qtd_next = EHCI_NULL;
   3210  1.123.12.1     itohy 	newinactive->qtd.qtd_altnext = EHCI_NULL;
   3211  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, newinactive,
   3212  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3213        1.15  augustss 	stat = ehci_alloc_sqtd(sc);
   3214        1.15  augustss 	if (stat == NULL) {
   3215        1.15  augustss 		err = USBD_NOMEM;
   3216        1.15  augustss 		goto bad2;
   3217        1.15  augustss 	}
   3218        1.15  augustss 
   3219        1.15  augustss 	sqh = epipe->sqh;
   3220  1.123.12.1     itohy 	setup = sqh->inactivesqtd;
   3221  1.123.12.1     itohy 	sqh->inactivesqtd = newinactive;
   3222        1.15  augustss 	epipe->u.ctl.length = len;
   3223        1.15  augustss 
   3224        1.15  augustss 	/* Set up data transaction */
   3225        1.15  augustss 	if (len != 0) {
   3226        1.15  augustss 		ehci_soft_qtd_t *end;
   3227        1.15  augustss 
   3228        1.25  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3229  1.123.12.1     itohy 		    NULL, newinactive, &next, &end);
   3230        1.15  augustss 		if (err)
   3231        1.15  augustss 			goto bad3;
   3232        1.83  augustss 		end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
   3233        1.15  augustss 		end->nextqtd = stat;
   3234  1.123.12.1     itohy 		end->qtd.qtd_next = htole32(EHCI_SQTD_DMAADDR(stat));
   3235  1.123.12.1     itohy 		end->qtd.qtd_altnext = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3236        1.15  augustss 	} else {
   3237        1.15  augustss 		next = stat;
   3238        1.15  augustss 	}
   3239        1.15  augustss 
   3240        1.30  augustss 	memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
   3241        1.15  augustss 
   3242  1.123.12.1     itohy 	/* Clear toggle, and do not activate until complete */
   3243        1.15  augustss 	setup->qtd.qtd_status = htole32(
   3244        1.15  augustss 	    EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
   3245        1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   3246        1.64   mycroft 	    EHCI_QTD_SET_TOGGLE(0) |
   3247        1.15  augustss 	    EHCI_QTD_SET_BYTES(sizeof *req)
   3248        1.15  augustss 	    );
   3249        1.31  augustss 	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
   3250        1.48   mycroft 	setup->qtd.qtd_buffer_hi[0] = 0;
   3251        1.15  augustss 	setup->nextqtd = next;
   3252  1.123.12.1     itohy 	setup->qtd.qtd_next = htole32(EHCI_SQTD_DMAADDR(next));
   3253  1.123.12.1     itohy 	setup->qtd.qtd_altnext = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3254        1.15  augustss 	setup->xfer = xfer;
   3255        1.18  augustss 	setup->len = sizeof *req;
   3256  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, setup, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3257        1.15  augustss 
   3258        1.15  augustss 	stat->qtd.qtd_status = htole32(
   3259        1.26  augustss 	    EHCI_QTD_ACTIVE |
   3260        1.15  augustss 	    EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
   3261        1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   3262        1.64   mycroft 	    EHCI_QTD_SET_TOGGLE(1) |
   3263        1.15  augustss 	    EHCI_QTD_IOC
   3264        1.15  augustss 	    );
   3265        1.15  augustss 	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
   3266        1.48   mycroft 	stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
   3267  1.123.12.1     itohy 	stat->nextqtd = newinactive;
   3268  1.123.12.1     itohy 	stat->qtd.qtd_next = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3269  1.123.12.1     itohy 	stat->qtd.qtd_altnext = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3270        1.15  augustss 	stat->xfer = xfer;
   3271        1.18  augustss 	stat->len = 0;
   3272  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, stat, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3273        1.15  augustss 
   3274        1.15  augustss #ifdef EHCI_DEBUG
   3275        1.23  augustss 	if (ehcidebug > 5) {
   3276        1.15  augustss 		DPRINTF(("ehci_device_request:\n"));
   3277        1.15  augustss 		ehci_dump_sqh(sqh);
   3278        1.15  augustss 		ehci_dump_sqtds(setup);
   3279        1.15  augustss 	}
   3280        1.15  augustss #endif
   3281        1.15  augustss 
   3282        1.18  augustss 	exfer->sqtdstart = setup;
   3283        1.18  augustss 	exfer->sqtdend = stat;
   3284        1.18  augustss #ifdef DIAGNOSTIC
   3285        1.18  augustss 	if (!exfer->isdone) {
   3286        1.18  augustss 		printf("ehci_device_request: not done, exfer=%p\n", exfer);
   3287        1.18  augustss 	}
   3288        1.18  augustss 	exfer->isdone = 0;
   3289        1.18  augustss #endif
   3290        1.18  augustss 
   3291  1.123.12.1     itohy 	/* Activate the new qTD in the QH list. */
   3292        1.15  augustss 	s = splusb();
   3293  1.123.12.1     itohy 	ehci_activate_qh(sc, sqh, setup);
   3294        1.15  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3295  1.123.12.1     itohy                 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   3296        1.15  augustss 			    ehci_timeout, xfer);
   3297        1.15  augustss 	}
   3298        1.18  augustss 	ehci_add_intr_list(sc, exfer);
   3299        1.18  augustss 	xfer->status = USBD_IN_PROGRESS;
   3300        1.15  augustss 	splx(s);
   3301        1.15  augustss 
   3302        1.17  augustss #ifdef EHCI_DEBUG
   3303        1.15  augustss 	if (ehcidebug > 10) {
   3304        1.15  augustss 		DPRINTF(("ehci_device_request: status=%x\n",
   3305        1.15  augustss 			 EOREAD4(sc, EHCI_USBSTS)));
   3306        1.23  augustss 		delay(10000);
   3307        1.18  augustss 		ehci_dump_regs(sc);
   3308        1.15  augustss 		ehci_dump_sqh(sc->sc_async_head);
   3309        1.15  augustss 		ehci_dump_sqh(sqh);
   3310        1.15  augustss 		ehci_dump_sqtds(setup);
   3311        1.15  augustss 	}
   3312        1.15  augustss #endif
   3313        1.15  augustss 
   3314        1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   3315        1.15  augustss 
   3316        1.15  augustss  bad3:
   3317  1.123.12.1     itohy 	sqh->inactivesqtd = setup;
   3318        1.15  augustss 	ehci_free_sqtd(sc, stat);
   3319        1.15  augustss  bad2:
   3320  1.123.12.1     itohy 	ehci_free_sqtd(sc, newinactive);
   3321        1.15  augustss  bad1:
   3322        1.25  augustss 	DPRINTFN(-1,("ehci_device_request: no memory\n"));
   3323        1.25  augustss 	xfer->status = err;
   3324  1.123.12.1     itohy 	usb_transfer_complete_dma(xfer, &sc->sc_dmatag,
   3325  1.123.12.1     itohy 	    &EXFER(xfer)->dmabuf);
   3326        1.15  augustss 	return (err);
   3327        1.18  augustss #undef exfer
   3328        1.10  augustss }
   3329        1.10  augustss 
   3330        1.10  augustss /************************/
   3331         1.5  augustss 
   3332        1.19  augustss Static usbd_status
   3333        1.19  augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
   3334        1.19  augustss {
   3335  1.123.12.1     itohy 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3336        1.19  augustss 	usbd_status err;
   3337        1.19  augustss 
   3338        1.19  augustss 	/* Insert last in queue. */
   3339  1.123.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   3340  1.123.12.1     itohy 	    &EXFER(xfer)->dmabuf);
   3341        1.19  augustss 	if (err)
   3342        1.19  augustss 		return (err);
   3343        1.19  augustss 
   3344        1.19  augustss 	/* Pipe isn't running, start first */
   3345        1.19  augustss 	return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3346        1.19  augustss }
   3347        1.19  augustss 
   3348        1.19  augustss usbd_status
   3349        1.19  augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
   3350        1.19  augustss {
   3351        1.19  augustss #define exfer EXFER(xfer)
   3352        1.19  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3353        1.19  augustss 	usbd_device_handle dev = epipe->pipe.device;
   3354        1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   3355  1.123.12.1     itohy 	ehci_soft_qtd_t *data, *dataend, *newinactive;
   3356        1.19  augustss 	ehci_soft_qh_t *sqh;
   3357        1.19  augustss 	usbd_status err;
   3358        1.19  augustss 	int len, isread, endpt;
   3359        1.19  augustss 	int s;
   3360        1.19  augustss 
   3361        1.72  augustss 	DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
   3362        1.19  augustss 		     xfer, xfer->length, xfer->flags));
   3363        1.19  augustss 
   3364        1.19  augustss 	if (sc->sc_dying)
   3365        1.19  augustss 		return (USBD_IOERROR);
   3366        1.19  augustss 
   3367        1.19  augustss #ifdef DIAGNOSTIC
   3368        1.19  augustss 	if (xfer->rqflags & URQ_REQUEST)
   3369        1.72  augustss 		panic("ehci_device_bulk_start: a request");
   3370        1.19  augustss #endif
   3371        1.19  augustss 
   3372        1.19  augustss 	len = xfer->length;
   3373        1.19  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3374        1.19  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3375        1.19  augustss 	sqh = epipe->sqh;
   3376        1.19  augustss 
   3377        1.19  augustss 	epipe->u.bulk.length = len;
   3378        1.19  augustss 
   3379  1.123.12.1     itohy 	newinactive = ehci_alloc_sqtd(sc);
   3380  1.123.12.1     itohy 	if (newinactive == NULL) {
   3381  1.123.12.1     itohy 		DPRINTFN(-1,("ehci_device_bulk_start: no sqtd memory\n"));
   3382  1.123.12.1     itohy 		err = USBD_NOMEM;
   3383  1.123.12.1     itohy 		xfer->status = err;
   3384  1.123.12.1     itohy 		usb_transfer_complete(xfer);
   3385  1.123.12.1     itohy 		return (err);
   3386  1.123.12.1     itohy 	}
   3387  1.123.12.1     itohy 	newinactive->qtd.qtd_status = htole32(0);
   3388  1.123.12.1     itohy 	newinactive->qtd.qtd_next = EHCI_NULL;
   3389  1.123.12.1     itohy 	newinactive->qtd.qtd_altnext = EHCI_NULL;
   3390  1.123.12.1     itohy 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3391  1.123.12.1     itohy 	    sqh->inactivesqtd, newinactive, &data, &dataend);
   3392        1.25  augustss 	if (err) {
   3393  1.123.12.1     itohy 		DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
   3394  1.123.12.1     itohy 		ehci_free_sqtd(sc, newinactive);
   3395        1.25  augustss 		xfer->status = err;
   3396        1.25  augustss 		usb_transfer_complete(xfer);
   3397        1.19  augustss 		return (err);
   3398        1.25  augustss 	}
   3399  1.123.12.1     itohy 	dataend->nextqtd = newinactive;
   3400  1.123.12.1     itohy 	dataend->qtd.qtd_next = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3401  1.123.12.1     itohy 	dataend->qtd.qtd_altnext = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3402  1.123.12.1     itohy 	sqh->inactivesqtd = newinactive;
   3403  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, newinactive,
   3404  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3405  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, dataend,
   3406  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3407        1.19  augustss 
   3408        1.19  augustss #ifdef EHCI_DEBUG
   3409        1.23  augustss 	if (ehcidebug > 5) {
   3410        1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(1)\n"));
   3411        1.23  augustss 		ehci_dump_sqh(sqh);
   3412        1.19  augustss 		ehci_dump_sqtds(data);
   3413        1.19  augustss 	}
   3414        1.19  augustss #endif
   3415        1.19  augustss 
   3416        1.19  augustss 	/* Set up interrupt info. */
   3417        1.19  augustss 	exfer->sqtdstart = data;
   3418        1.19  augustss 	exfer->sqtdend = dataend;
   3419        1.19  augustss #ifdef DIAGNOSTIC
   3420        1.19  augustss 	if (!exfer->isdone) {
   3421        1.72  augustss 		printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
   3422        1.19  augustss 	}
   3423        1.19  augustss 	exfer->isdone = 0;
   3424        1.19  augustss #endif
   3425        1.19  augustss 
   3426        1.19  augustss 	s = splusb();
   3427  1.123.12.1     itohy 	ehci_activate_qh(sc, sqh, data);
   3428        1.19  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3429  1.123.12.1     itohy 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   3430        1.19  augustss 			    ehci_timeout, xfer);
   3431        1.19  augustss 	}
   3432        1.19  augustss 	ehci_add_intr_list(sc, exfer);
   3433        1.19  augustss 	xfer->status = USBD_IN_PROGRESS;
   3434        1.19  augustss 	splx(s);
   3435        1.19  augustss 
   3436        1.19  augustss #ifdef EHCI_DEBUG
   3437        1.19  augustss 	if (ehcidebug > 10) {
   3438        1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(2)\n"));
   3439        1.23  augustss 		delay(10000);
   3440        1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(3)\n"));
   3441        1.23  augustss 		ehci_dump_regs(sc);
   3442        1.29  augustss #if 0
   3443        1.29  augustss 		printf("async_head:\n");
   3444        1.23  augustss 		ehci_dump_sqh(sc->sc_async_head);
   3445        1.29  augustss #endif
   3446        1.29  augustss 		printf("sqh:\n");
   3447        1.23  augustss 		ehci_dump_sqh(sqh);
   3448        1.19  augustss 		ehci_dump_sqtds(data);
   3449        1.19  augustss 	}
   3450        1.19  augustss #endif
   3451        1.19  augustss 
   3452        1.19  augustss 	if (sc->sc_bus.use_polling)
   3453        1.19  augustss 		ehci_waitintr(sc, xfer);
   3454        1.19  augustss 
   3455        1.19  augustss 	return (USBD_IN_PROGRESS);
   3456        1.19  augustss #undef exfer
   3457        1.19  augustss }
   3458        1.19  augustss 
   3459        1.19  augustss Static void
   3460        1.19  augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
   3461        1.19  augustss {
   3462        1.19  augustss 	DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
   3463        1.19  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   3464        1.19  augustss }
   3465        1.19  augustss 
   3466        1.33  augustss /*
   3467        1.19  augustss  * Close a device bulk pipe.
   3468        1.19  augustss  */
   3469        1.19  augustss Static void
   3470        1.19  augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
   3471        1.19  augustss {
   3472        1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   3473        1.19  augustss 
   3474        1.19  augustss 	DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
   3475        1.19  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   3476        1.19  augustss }
   3477        1.19  augustss 
   3478        1.19  augustss void
   3479        1.19  augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
   3480        1.19  augustss {
   3481        1.19  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   3482        1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3483  1.123.12.1     itohy 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3484        1.19  augustss 
   3485        1.33  augustss 	DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
   3486        1.19  augustss 		     xfer, xfer->actlen));
   3487        1.19  augustss 
   3488        1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3489        1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   3490  1.123.12.1     itohy 		ehci_free_sqtd_chain(sc, epipe->sqh, ex->sqtdstart,
   3491  1.123.12.1     itohy 		    ex->sqtdend->nextqtd);
   3492        1.25  augustss 	}
   3493        1.19  augustss 
   3494        1.19  augustss 	DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
   3495        1.19  augustss }
   3496         1.5  augustss 
   3497        1.10  augustss /************************/
   3498        1.10  augustss 
   3499        1.78  augustss Static usbd_status
   3500        1.78  augustss ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
   3501        1.78  augustss {
   3502        1.78  augustss 	struct ehci_soft_islot *isp;
   3503        1.78  augustss 	int islot, lev;
   3504        1.78  augustss 
   3505        1.78  augustss 	/* Find a poll rate that is large enough. */
   3506        1.78  augustss 	for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
   3507        1.78  augustss 		if (EHCI_ILEV_IVAL(lev) <= ival)
   3508        1.78  augustss 			break;
   3509        1.78  augustss 
   3510        1.78  augustss 	/* Pick an interrupt slot at the right level. */
   3511  1.123.12.1     itohy 	/* XXX could do better than picking at random. */
   3512  1.123.12.1     itohy 	islot = EHCI_IQHIDX(lev, arc4random());
   3513        1.78  augustss 
   3514        1.78  augustss 	sqh->islot = islot;
   3515        1.78  augustss 	isp = &sc->sc_islots[islot];
   3516  1.123.12.1     itohy 	ehci_add_qh(sc, sqh, isp->sqh);
   3517        1.78  augustss 
   3518        1.78  augustss 	return (USBD_NORMAL_COMPLETION);
   3519        1.78  augustss }
   3520        1.78  augustss 
   3521        1.78  augustss Static usbd_status
   3522        1.78  augustss ehci_device_intr_transfer(usbd_xfer_handle xfer)
   3523        1.78  augustss {
   3524  1.123.12.1     itohy 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3525        1.78  augustss 	usbd_status err;
   3526        1.78  augustss 
   3527        1.78  augustss 	/* Insert last in queue. */
   3528  1.123.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   3529  1.123.12.1     itohy 	    &EXFER(xfer)->dmabuf);
   3530        1.78  augustss 	if (err)
   3531        1.78  augustss 		return (err);
   3532        1.78  augustss 
   3533        1.78  augustss 	/*
   3534        1.78  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3535        1.78  augustss 	 * so start it first.
   3536        1.78  augustss 	 */
   3537        1.78  augustss 	return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3538        1.78  augustss }
   3539        1.78  augustss 
   3540        1.78  augustss Static usbd_status
   3541        1.78  augustss ehci_device_intr_start(usbd_xfer_handle xfer)
   3542        1.78  augustss {
   3543        1.78  augustss #define exfer EXFER(xfer)
   3544        1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3545        1.78  augustss 	usbd_device_handle dev = xfer->pipe->device;
   3546        1.78  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   3547  1.123.12.1     itohy 	ehci_soft_qtd_t *data, *dataend, *newinactive;
   3548        1.78  augustss 	ehci_soft_qh_t *sqh;
   3549        1.78  augustss 	usbd_status err;
   3550        1.78  augustss 	int len, isread, endpt;
   3551        1.78  augustss 	int s;
   3552        1.78  augustss 
   3553        1.78  augustss 	DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
   3554        1.78  augustss 	    xfer, xfer->length, xfer->flags));
   3555        1.78  augustss 
   3556        1.78  augustss 	if (sc->sc_dying)
   3557        1.78  augustss 		return (USBD_IOERROR);
   3558        1.78  augustss 
   3559        1.78  augustss #ifdef DIAGNOSTIC
   3560        1.78  augustss 	if (xfer->rqflags & URQ_REQUEST)
   3561        1.78  augustss 		panic("ehci_device_intr_start: a request");
   3562        1.78  augustss #endif
   3563        1.78  augustss 
   3564        1.78  augustss 	len = xfer->length;
   3565        1.78  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3566        1.78  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3567        1.78  augustss 	sqh = epipe->sqh;
   3568        1.78  augustss 
   3569        1.78  augustss 	epipe->u.intr.length = len;
   3570        1.78  augustss 
   3571  1.123.12.1     itohy 	newinactive = ehci_alloc_sqtd(sc);
   3572  1.123.12.1     itohy 	if (newinactive == NULL) {
   3573  1.123.12.1     itohy 		DPRINTFN(-1,("ehci_device_intr_start: no sqtd memory\n"));
   3574  1.123.12.1     itohy 		err = USBD_NOMEM;
   3575  1.123.12.1     itohy 		xfer->status = err;
   3576  1.123.12.1     itohy 		usb_transfer_complete(xfer);
   3577  1.123.12.1     itohy 		return (err);
   3578  1.123.12.1     itohy 	}
   3579  1.123.12.1     itohy 	newinactive->qtd.qtd_status = htole32(0);
   3580  1.123.12.1     itohy 	newinactive->qtd.qtd_next = EHCI_NULL;
   3581  1.123.12.1     itohy 	newinactive->qtd.qtd_altnext = EHCI_NULL;
   3582  1.123.12.1     itohy 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3583  1.123.12.1     itohy 	    sqh->inactivesqtd, newinactive, &data, &dataend);
   3584        1.78  augustss 	if (err) {
   3585        1.78  augustss 		DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
   3586        1.78  augustss 		xfer->status = err;
   3587        1.78  augustss 		usb_transfer_complete(xfer);
   3588        1.78  augustss 		return (err);
   3589        1.78  augustss 	}
   3590  1.123.12.1     itohy 	dataend->nextqtd = newinactive;
   3591  1.123.12.1     itohy 	dataend->qtd.qtd_next = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3592  1.123.12.1     itohy 	dataend->qtd.qtd_altnext = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3593  1.123.12.1     itohy 	sqh->inactivesqtd = newinactive;
   3594  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, newinactive,
   3595  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3596  1.123.12.1     itohy 	EHCI_SQTD_SYNC(sc, dataend,
   3597  1.123.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3598        1.78  augustss 
   3599        1.78  augustss #ifdef EHCI_DEBUG
   3600        1.78  augustss 	if (ehcidebug > 5) {
   3601        1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(1)\n"));
   3602        1.78  augustss 		ehci_dump_sqh(sqh);
   3603        1.78  augustss 		ehci_dump_sqtds(data);
   3604        1.78  augustss 	}
   3605        1.78  augustss #endif
   3606        1.78  augustss 
   3607        1.78  augustss 	/* Set up interrupt info. */
   3608        1.78  augustss 	exfer->sqtdstart = data;
   3609        1.78  augustss 	exfer->sqtdend = dataend;
   3610        1.78  augustss #ifdef DIAGNOSTIC
   3611        1.78  augustss 	if (!exfer->isdone) {
   3612        1.78  augustss 		printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
   3613        1.78  augustss 	}
   3614        1.78  augustss 	exfer->isdone = 0;
   3615        1.78  augustss #endif
   3616        1.78  augustss 
   3617        1.78  augustss 	s = splusb();
   3618  1.123.12.1     itohy 	ehci_activate_qh(sc, sqh, data);
   3619        1.78  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3620  1.123.12.1     itohy 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   3621        1.78  augustss 		    ehci_timeout, xfer);
   3622        1.78  augustss 	}
   3623        1.78  augustss 	ehci_add_intr_list(sc, exfer);
   3624        1.78  augustss 	xfer->status = USBD_IN_PROGRESS;
   3625        1.78  augustss 	splx(s);
   3626        1.78  augustss 
   3627        1.78  augustss #ifdef EHCI_DEBUG
   3628        1.78  augustss 	if (ehcidebug > 10) {
   3629        1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(2)\n"));
   3630        1.78  augustss 		delay(10000);
   3631        1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(3)\n"));
   3632        1.78  augustss 		ehci_dump_regs(sc);
   3633        1.78  augustss 		printf("sqh:\n");
   3634        1.78  augustss 		ehci_dump_sqh(sqh);
   3635        1.78  augustss 		ehci_dump_sqtds(data);
   3636        1.78  augustss 	}
   3637        1.78  augustss #endif
   3638        1.78  augustss 
   3639        1.78  augustss 	if (sc->sc_bus.use_polling)
   3640        1.78  augustss 		ehci_waitintr(sc, xfer);
   3641        1.78  augustss 
   3642        1.78  augustss 	return (USBD_IN_PROGRESS);
   3643        1.78  augustss #undef exfer
   3644        1.78  augustss }
   3645        1.78  augustss 
   3646        1.78  augustss Static void
   3647        1.78  augustss ehci_device_intr_abort(usbd_xfer_handle xfer)
   3648        1.78  augustss {
   3649        1.78  augustss 	DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
   3650        1.78  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3651  1.123.12.1     itohy 		DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
   3652        1.78  augustss 		xfer->pipe->intrxfer = NULL;
   3653        1.78  augustss 	}
   3654        1.78  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   3655        1.78  augustss }
   3656        1.78  augustss 
   3657        1.78  augustss Static void
   3658        1.78  augustss ehci_device_intr_close(usbd_pipe_handle pipe)
   3659        1.78  augustss {
   3660        1.78  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   3661        1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   3662        1.78  augustss 	struct ehci_soft_islot *isp;
   3663        1.78  augustss 
   3664        1.78  augustss 	isp = &sc->sc_islots[epipe->sqh->islot];
   3665        1.78  augustss 	ehci_close_pipe(pipe, isp->sqh);
   3666        1.78  augustss }
   3667        1.78  augustss 
   3668        1.78  augustss Static void
   3669        1.78  augustss ehci_device_intr_done(usbd_xfer_handle xfer)
   3670        1.78  augustss {
   3671        1.78  augustss #define exfer EXFER(xfer)
   3672        1.78  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   3673        1.78  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3674        1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3675  1.123.12.1     itohy 	ehci_soft_qtd_t *data, *dataend, *newinactive;
   3676        1.78  augustss 	ehci_soft_qh_t *sqh;
   3677        1.78  augustss 	usbd_status err;
   3678        1.78  augustss 	int len, isread, endpt, s;
   3679        1.78  augustss 
   3680        1.78  augustss 	DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
   3681        1.78  augustss 	    xfer, xfer->actlen));
   3682        1.78  augustss 
   3683  1.123.12.1     itohy 	sqh = epipe->sqh;
   3684        1.78  augustss 	if (xfer->pipe->repeat) {
   3685  1.123.12.1     itohy 		ehci_free_sqtd_chain(sc, sqh, ex->sqtdstart,
   3686  1.123.12.1     itohy 		    ex->sqtdend->nextqtd);
   3687        1.78  augustss 
   3688        1.78  augustss 		len = epipe->u.intr.length;
   3689        1.78  augustss 		xfer->length = len;
   3690        1.78  augustss 		endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3691        1.78  augustss 		isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3692        1.78  augustss 
   3693  1.123.12.1     itohy 		newinactive = ehci_alloc_sqtd(sc);
   3694  1.123.12.1     itohy 		if (newinactive == NULL) {
   3695  1.123.12.1     itohy 			DPRINTFN(-1,
   3696  1.123.12.1     itohy 			    ("ehci_device_intr_done: no sqtd memory\n"));
   3697  1.123.12.1     itohy 			err = USBD_NOMEM;
   3698  1.123.12.1     itohy 			xfer->status = err;
   3699  1.123.12.1     itohy 			return;
   3700  1.123.12.1     itohy 		}
   3701  1.123.12.1     itohy 		newinactive->qtd.qtd_status = htole32(0);
   3702  1.123.12.1     itohy 		newinactive->qtd.qtd_next = EHCI_NULL;
   3703  1.123.12.1     itohy 		newinactive->qtd.qtd_altnext = EHCI_NULL;
   3704        1.78  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3705  1.123.12.1     itohy 		    sqh->inactivesqtd, newinactive, &data, &dataend);
   3706        1.78  augustss 		if (err) {
   3707        1.78  augustss 			DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
   3708        1.78  augustss 			xfer->status = err;
   3709        1.78  augustss 			return;
   3710        1.78  augustss 		}
   3711  1.123.12.1     itohy 		dataend->nextqtd = newinactive;
   3712  1.123.12.1     itohy 		dataend->qtd.qtd_next = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3713  1.123.12.1     itohy 		dataend->qtd.qtd_altnext = htole32(EHCI_SQTD_DMAADDR(newinactive));
   3714  1.123.12.1     itohy 		sqh->inactivesqtd = newinactive;
   3715  1.123.12.1     itohy 		EHCI_SQTD_SYNC(sc, newinactive,
   3716  1.123.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3717  1.123.12.1     itohy 		EHCI_SQTD_SYNC(sc, dataend,
   3718  1.123.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3719        1.78  augustss 
   3720        1.78  augustss 		/* Set up interrupt info. */
   3721        1.78  augustss 		exfer->sqtdstart = data;
   3722        1.78  augustss 		exfer->sqtdend = dataend;
   3723        1.78  augustss #ifdef DIAGNOSTIC
   3724        1.78  augustss 		if (!exfer->isdone) {
   3725        1.78  augustss 			printf("ehci_device_intr_done: not done, ex=%p\n",
   3726        1.78  augustss 			    exfer);
   3727        1.78  augustss 		}
   3728        1.78  augustss 		exfer->isdone = 0;
   3729        1.78  augustss #endif
   3730        1.78  augustss 
   3731        1.78  augustss 		s = splusb();
   3732  1.123.12.1     itohy 		ehci_activate_qh(sc, sqh, data);
   3733        1.78  augustss 		if (xfer->timeout && !sc->sc_bus.use_polling) {
   3734        1.78  augustss 			usb_callout(xfer->timeout_handle,
   3735  1.123.12.1     itohy 			    MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
   3736        1.78  augustss 		}
   3737        1.78  augustss 		splx(s);
   3738        1.78  augustss 
   3739        1.78  augustss 		xfer->status = USBD_IN_PROGRESS;
   3740        1.78  augustss 	} else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3741        1.78  augustss 		ehci_del_intr_list(ex); /* remove from active list */
   3742  1.123.12.1     itohy 		ehci_free_sqtd_chain(sc, sqh, ex->sqtdstart,
   3743  1.123.12.1     itohy 		    ex->sqtdend->nextqtd);
   3744        1.78  augustss 	}
   3745        1.78  augustss #undef exfer
   3746        1.78  augustss }
   3747        1.10  augustss 
   3748        1.10  augustss /************************/
   3749         1.5  augustss 
   3750       1.113  christos Static usbd_status
   3751       1.115  christos ehci_device_isoc_transfer(usbd_xfer_handle xfer)
   3752       1.113  christos {
   3753       1.113  christos 	return USBD_IOERROR;
   3754       1.113  christos }
   3755       1.113  christos Static usbd_status
   3756       1.115  christos ehci_device_isoc_start(usbd_xfer_handle xfer)
   3757       1.113  christos {
   3758       1.113  christos 	return USBD_IOERROR;
   3759       1.113  christos }
   3760       1.113  christos Static void
   3761       1.115  christos ehci_device_isoc_abort(usbd_xfer_handle xfer)
   3762       1.113  christos {
   3763       1.113  christos }
   3764       1.113  christos Static void
   3765       1.115  christos ehci_device_isoc_close(usbd_pipe_handle pipe)
   3766       1.113  christos {
   3767       1.113  christos }
   3768       1.113  christos Static void
   3769       1.115  christos ehci_device_isoc_done(usbd_xfer_handle xfer)
   3770       1.113  christos {
   3771       1.113  christos }
   3772