ehci.c revision 1.123.18.2 1 1.123.18.2 jmcneill /* $NetBSD: ehci.c,v 1.123.18.2 2007/08/07 01:02:14 jmcneill Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.100 augustss * Copyright (c) 2004,2005 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.61 mycroft * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum.
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss * 3. All advertising materials mentioning features or use of this software
19 1.1 augustss * must display the following acknowledgement:
20 1.1 augustss * This product includes software developed by the NetBSD
21 1.1 augustss * Foundation, Inc. and its contributors.
22 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 augustss * contributors may be used to endorse or promote products derived
24 1.1 augustss * from this software without specific prior written permission.
25 1.1 augustss *
26 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
37 1.1 augustss */
38 1.1 augustss
39 1.1 augustss /*
40 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 1.1 augustss *
42 1.35 enami * The EHCI 1.0 spec can be found at
43 1.34 augustss * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
44 1.7 augustss * and the USB 2.0 spec at
45 1.43 ichiro * http://www.usb.org/developers/docs/usb_20.zip
46 1.1 augustss *
47 1.1 augustss */
48 1.4 lukem
49 1.52 jdolecek /*
50 1.52 jdolecek * TODO:
51 1.52 jdolecek * 1) hold off explorations by companion controllers until ehci has started.
52 1.52 jdolecek *
53 1.100 augustss * 2) The EHCI driver lacks support for isochronous transfers, so
54 1.52 jdolecek * devices using them don't work.
55 1.52 jdolecek *
56 1.101 wiz * 3) The hub driver needs to handle and schedule the transaction translator,
57 1.100 augustss * to assign place in frame where different devices get to go. See chapter
58 1.91 perry * on hubs in USB 2.0 for details.
59 1.52 jdolecek *
60 1.60 mycroft * 4) command failures are not recovered correctly
61 1.52 jdolecek */
62 1.52 jdolecek
63 1.4 lukem #include <sys/cdefs.h>
64 1.123.18.2 jmcneill __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.123.18.2 2007/08/07 01:02:14 jmcneill Exp $");
65 1.47 augustss
66 1.47 augustss #include "ohci.h"
67 1.47 augustss #include "uhci.h"
68 1.1 augustss
69 1.1 augustss #include <sys/param.h>
70 1.1 augustss #include <sys/systm.h>
71 1.1 augustss #include <sys/kernel.h>
72 1.1 augustss #include <sys/malloc.h>
73 1.1 augustss #include <sys/device.h>
74 1.1 augustss #include <sys/select.h>
75 1.1 augustss #include <sys/proc.h>
76 1.1 augustss #include <sys/queue.h>
77 1.1 augustss
78 1.1 augustss #include <machine/bus.h>
79 1.1 augustss #include <machine/endian.h>
80 1.1 augustss
81 1.1 augustss #include <dev/usb/usb.h>
82 1.1 augustss #include <dev/usb/usbdi.h>
83 1.1 augustss #include <dev/usb/usbdivar.h>
84 1.1 augustss #include <dev/usb/usb_mem.h>
85 1.1 augustss #include <dev/usb/usb_quirks.h>
86 1.1 augustss
87 1.1 augustss #include <dev/usb/ehcireg.h>
88 1.1 augustss #include <dev/usb/ehcivar.h>
89 1.1 augustss
90 1.1 augustss #ifdef EHCI_DEBUG
91 1.73 augustss #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0)
92 1.73 augustss #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0)
93 1.6 augustss int ehcidebug = 0;
94 1.15 augustss #ifndef __NetBSD__
95 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
96 1.15 augustss #endif
97 1.1 augustss #else
98 1.1 augustss #define DPRINTF(x)
99 1.1 augustss #define DPRINTFN(n,x)
100 1.1 augustss #endif
101 1.1 augustss
102 1.5 augustss struct ehci_pipe {
103 1.5 augustss struct usbd_pipe pipe;
104 1.55 mycroft int nexttoggle;
105 1.55 mycroft
106 1.10 augustss ehci_soft_qh_t *sqh;
107 1.10 augustss union {
108 1.10 augustss ehci_soft_qtd_t *qtd;
109 1.10 augustss /* ehci_soft_itd_t *itd; */
110 1.10 augustss } tail;
111 1.10 augustss union {
112 1.10 augustss /* Control pipe */
113 1.10 augustss struct {
114 1.10 augustss usb_dma_t reqdma;
115 1.10 augustss u_int length;
116 1.10 augustss } ctl;
117 1.10 augustss /* Interrupt pipe */
118 1.78 augustss struct {
119 1.78 augustss u_int length;
120 1.78 augustss } intr;
121 1.10 augustss /* Bulk pipe */
122 1.10 augustss struct {
123 1.10 augustss u_int length;
124 1.10 augustss } bulk;
125 1.10 augustss /* Iso pipe */
126 1.15 augustss /* XXX */
127 1.10 augustss } u;
128 1.5 augustss };
129 1.5 augustss
130 1.5 augustss Static void ehci_shutdown(void *);
131 1.5 augustss
132 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
133 1.5 augustss Static void ehci_poll(struct usbd_bus *);
134 1.5 augustss Static void ehci_softintr(void *);
135 1.11 augustss Static int ehci_intr1(ehci_softc_t *);
136 1.15 augustss Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
137 1.18 augustss Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
138 1.18 augustss Static void ehci_idone(struct ehci_xfer *);
139 1.15 augustss Static void ehci_timeout(void *);
140 1.15 augustss Static void ehci_timeout_task(void *);
141 1.108 xtraeme Static void ehci_intrlist_timeout(void *);
142 1.5 augustss
143 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
144 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
145 1.5 augustss
146 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
147 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
148 1.5 augustss
149 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
150 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
151 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
152 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
153 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
154 1.5 augustss
155 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
156 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
157 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
158 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
159 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
160 1.5 augustss
161 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
162 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
163 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
164 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
165 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
166 1.5 augustss
167 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
168 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
169 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
170 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
171 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
172 1.5 augustss
173 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
174 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
175 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
176 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
177 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
178 1.5 augustss
179 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
180 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
181 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
182 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
183 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
184 1.5 augustss
185 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
186 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
187 1.5 augustss
188 1.104 christos Static int ehci_str(usb_string_descriptor_t *, int, const char *);
189 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
190 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
191 1.5 augustss
192 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
193 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
194 1.9 augustss
195 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
196 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
197 1.25 augustss Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
198 1.15 augustss ehci_softc_t *, int, int, usbd_xfer_handle,
199 1.15 augustss ehci_soft_qtd_t **, ehci_soft_qtd_t **);
200 1.25 augustss Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
201 1.18 augustss ehci_soft_qtd_t *);
202 1.15 augustss
203 1.15 augustss Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
204 1.9 augustss
205 1.78 augustss Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
206 1.78 augustss int ival);
207 1.78 augustss
208 1.10 augustss Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
209 1.10 augustss Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
210 1.10 augustss ehci_soft_qh_t *);
211 1.23 augustss Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
212 1.11 augustss Static void ehci_sync_hc(ehci_softc_t *);
213 1.10 augustss
214 1.10 augustss Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
215 1.10 augustss Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
216 1.9 augustss
217 1.5 augustss #ifdef EHCI_DEBUG
218 1.18 augustss Static void ehci_dump_regs(ehci_softc_t *);
219 1.107 augustss void ehci_dump(void);
220 1.6 augustss Static ehci_softc_t *theehci;
221 1.15 augustss Static void ehci_dump_link(ehci_link_t, int);
222 1.15 augustss Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
223 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
224 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
225 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
226 1.38 martin #ifdef DIAGNOSTIC
227 1.18 augustss Static void ehci_dump_exfer(struct ehci_xfer *);
228 1.5 augustss #endif
229 1.38 martin #endif
230 1.5 augustss
231 1.11 augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
232 1.11 augustss
233 1.5 augustss #define EHCI_INTR_ENDPT 1
234 1.5 augustss
235 1.18 augustss #define ehci_add_intr_list(sc, ex) \
236 1.18 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
237 1.18 augustss #define ehci_del_intr_list(ex) \
238 1.44 augustss do { \
239 1.44 augustss LIST_REMOVE((ex), inext); \
240 1.44 augustss (ex)->inext.le_prev = NULL; \
241 1.44 augustss } while (0)
242 1.44 augustss #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
243 1.18 augustss
244 1.123 drochner Static const struct usbd_bus_methods ehci_bus_methods = {
245 1.5 augustss ehci_open,
246 1.5 augustss ehci_softintr,
247 1.5 augustss ehci_poll,
248 1.5 augustss ehci_allocm,
249 1.5 augustss ehci_freem,
250 1.5 augustss ehci_allocx,
251 1.5 augustss ehci_freex,
252 1.5 augustss };
253 1.5 augustss
254 1.123 drochner Static const struct usbd_pipe_methods ehci_root_ctrl_methods = {
255 1.5 augustss ehci_root_ctrl_transfer,
256 1.5 augustss ehci_root_ctrl_start,
257 1.5 augustss ehci_root_ctrl_abort,
258 1.5 augustss ehci_root_ctrl_close,
259 1.5 augustss ehci_noop,
260 1.5 augustss ehci_root_ctrl_done,
261 1.5 augustss };
262 1.5 augustss
263 1.123 drochner Static const struct usbd_pipe_methods ehci_root_intr_methods = {
264 1.5 augustss ehci_root_intr_transfer,
265 1.5 augustss ehci_root_intr_start,
266 1.5 augustss ehci_root_intr_abort,
267 1.5 augustss ehci_root_intr_close,
268 1.5 augustss ehci_noop,
269 1.5 augustss ehci_root_intr_done,
270 1.5 augustss };
271 1.5 augustss
272 1.123 drochner Static const struct usbd_pipe_methods ehci_device_ctrl_methods = {
273 1.5 augustss ehci_device_ctrl_transfer,
274 1.5 augustss ehci_device_ctrl_start,
275 1.5 augustss ehci_device_ctrl_abort,
276 1.5 augustss ehci_device_ctrl_close,
277 1.5 augustss ehci_noop,
278 1.5 augustss ehci_device_ctrl_done,
279 1.5 augustss };
280 1.5 augustss
281 1.123 drochner Static const struct usbd_pipe_methods ehci_device_intr_methods = {
282 1.5 augustss ehci_device_intr_transfer,
283 1.5 augustss ehci_device_intr_start,
284 1.5 augustss ehci_device_intr_abort,
285 1.5 augustss ehci_device_intr_close,
286 1.5 augustss ehci_device_clear_toggle,
287 1.5 augustss ehci_device_intr_done,
288 1.5 augustss };
289 1.5 augustss
290 1.123 drochner Static const struct usbd_pipe_methods ehci_device_bulk_methods = {
291 1.5 augustss ehci_device_bulk_transfer,
292 1.5 augustss ehci_device_bulk_start,
293 1.5 augustss ehci_device_bulk_abort,
294 1.5 augustss ehci_device_bulk_close,
295 1.5 augustss ehci_device_clear_toggle,
296 1.5 augustss ehci_device_bulk_done,
297 1.5 augustss };
298 1.5 augustss
299 1.123 drochner Static const struct usbd_pipe_methods ehci_device_isoc_methods = {
300 1.5 augustss ehci_device_isoc_transfer,
301 1.5 augustss ehci_device_isoc_start,
302 1.5 augustss ehci_device_isoc_abort,
303 1.5 augustss ehci_device_isoc_close,
304 1.5 augustss ehci_noop,
305 1.5 augustss ehci_device_isoc_done,
306 1.5 augustss };
307 1.5 augustss
308 1.123 drochner static const uint8_t revbits[EHCI_MAX_POLLRATE] = {
309 1.95 augustss 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78,
310 1.95 augustss 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c,
311 1.95 augustss 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a,
312 1.95 augustss 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e,
313 1.95 augustss 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79,
314 1.95 augustss 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d,
315 1.95 augustss 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b,
316 1.95 augustss 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f,
317 1.94 augustss };
318 1.94 augustss
319 1.1 augustss usbd_status
320 1.1 augustss ehci_init(ehci_softc_t *sc)
321 1.1 augustss {
322 1.104 christos u_int32_t vers, sparams, cparams, hcr;
323 1.3 augustss u_int i;
324 1.3 augustss usbd_status err;
325 1.11 augustss ehci_soft_qh_t *sqh;
326 1.89 augustss u_int ncomp;
327 1.3 augustss
328 1.3 augustss DPRINTF(("ehci_init: start\n"));
329 1.6 augustss #ifdef EHCI_DEBUG
330 1.6 augustss theehci = sc;
331 1.6 augustss #endif
332 1.3 augustss
333 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
334 1.3 augustss
335 1.104 christos vers = EREAD2(sc, EHCI_HCIVERSION);
336 1.121 ad aprint_verbose("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
337 1.104 christos vers >> 8, vers & 0xff);
338 1.3 augustss
339 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
340 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
341 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
342 1.89 augustss ncomp = EHCI_HCS_N_CC(sparams);
343 1.89 augustss if (ncomp != sc->sc_ncomp) {
344 1.121 ad aprint_verbose("%s: wrong number of companions (%d != %d)\n",
345 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
346 1.89 augustss ncomp, sc->sc_ncomp);
347 1.47 augustss #if NOHCI == 0 || NUHCI == 0
348 1.47 augustss aprint_error("%s: ohci or uhci probably not configured\n",
349 1.47 augustss USBDEVNAME(sc->sc_bus.bdev));
350 1.47 augustss #endif
351 1.89 augustss if (ncomp < sc->sc_ncomp)
352 1.89 augustss sc->sc_ncomp = ncomp;
353 1.3 augustss }
354 1.3 augustss if (sc->sc_ncomp > 0) {
355 1.41 thorpej aprint_normal("%s: companion controller%s, %d port%s each:",
356 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
357 1.3 augustss EHCI_HCS_N_PCC(sparams),
358 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
359 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
360 1.41 thorpej aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
361 1.41 thorpej aprint_normal("\n");
362 1.3 augustss }
363 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
364 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
365 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
366 1.106 augustss sc->sc_hasppc = EHCI_HCS_PPC(sparams);
367 1.36 augustss
368 1.36 augustss if (EHCI_HCC_64BIT(cparams)) {
369 1.36 augustss /* MUST clear segment register if 64 bit capable. */
370 1.36 augustss EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
371 1.36 augustss }
372 1.33 augustss
373 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
374 1.3 augustss
375 1.90 fvdl usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
376 1.90 fvdl USB_MEM_RESERVE);
377 1.90 fvdl
378 1.3 augustss /* Reset the controller */
379 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
380 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
381 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
382 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
383 1.3 augustss for (i = 0; i < 100; i++) {
384 1.34 augustss usb_delay_ms(&sc->sc_bus, 1);
385 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
386 1.3 augustss if (!hcr)
387 1.3 augustss break;
388 1.3 augustss }
389 1.3 augustss if (hcr) {
390 1.41 thorpej aprint_error("%s: reset timeout\n",
391 1.41 thorpej USBDEVNAME(sc->sc_bus.bdev));
392 1.3 augustss return (USBD_IOERROR);
393 1.3 augustss }
394 1.3 augustss
395 1.78 augustss /* XXX need proper intr scheduling */
396 1.78 augustss sc->sc_rand = 96;
397 1.78 augustss
398 1.3 augustss /* frame list size at default, read back what we got and use that */
399 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
400 1.78 augustss case 0: sc->sc_flsize = 1024; break;
401 1.78 augustss case 1: sc->sc_flsize = 512; break;
402 1.78 augustss case 2: sc->sc_flsize = 256; break;
403 1.3 augustss case 3: return (USBD_IOERROR);
404 1.3 augustss }
405 1.78 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
406 1.78 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
407 1.3 augustss if (err)
408 1.3 augustss return (err);
409 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
410 1.78 augustss sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
411 1.78 augustss EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
412 1.3 augustss
413 1.5 augustss /* Set up the bus struct. */
414 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
415 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
416 1.5 augustss
417 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
418 1.5 augustss
419 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
420 1.6 augustss
421 1.78 augustss /*
422 1.78 augustss * Allocate the interrupt dummy QHs. These are arranged to give poll
423 1.78 augustss * intervals that are powers of 2 times 1ms.
424 1.78 augustss */
425 1.78 augustss for (i = 0; i < EHCI_INTRQHS; i++) {
426 1.78 augustss sqh = ehci_alloc_sqh(sc);
427 1.78 augustss if (sqh == NULL) {
428 1.78 augustss err = USBD_NOMEM;
429 1.78 augustss goto bad1;
430 1.78 augustss }
431 1.78 augustss sc->sc_islots[i].sqh = sqh;
432 1.78 augustss }
433 1.78 augustss for (i = 0; i < EHCI_INTRQHS; i++) {
434 1.78 augustss sqh = sc->sc_islots[i].sqh;
435 1.78 augustss if (i == 0) {
436 1.78 augustss /* The last (1ms) QH terminates. */
437 1.78 augustss sqh->qh.qh_link = EHCI_NULL;
438 1.78 augustss sqh->next = NULL;
439 1.78 augustss } else {
440 1.78 augustss /* Otherwise the next QH has half the poll interval */
441 1.78 augustss sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
442 1.78 augustss sqh->qh.qh_link = htole32(sqh->next->physaddr |
443 1.78 augustss EHCI_LINK_QH);
444 1.78 augustss }
445 1.78 augustss sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
446 1.78 augustss sqh->qh.qh_curqtd = EHCI_NULL;
447 1.78 augustss sqh->next = NULL;
448 1.78 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
449 1.78 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
450 1.78 augustss sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
451 1.78 augustss sqh->sqtd = NULL;
452 1.78 augustss }
453 1.78 augustss /* Point the frame list at the last level (128ms). */
454 1.78 augustss for (i = 0; i < sc->sc_flsize; i++) {
455 1.94 augustss int j;
456 1.94 augustss
457 1.94 augustss j = (i & ~(EHCI_MAX_POLLRATE-1)) |
458 1.94 augustss revbits[i & (EHCI_MAX_POLLRATE-1)];
459 1.94 augustss sc->sc_flist[j] = htole32(EHCI_LINK_QH |
460 1.78 augustss sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
461 1.78 augustss i)].sqh->physaddr);
462 1.78 augustss }
463 1.78 augustss
464 1.11 augustss /* Allocate dummy QH that starts the async list. */
465 1.11 augustss sqh = ehci_alloc_sqh(sc);
466 1.11 augustss if (sqh == NULL) {
467 1.9 augustss err = USBD_NOMEM;
468 1.9 augustss goto bad1;
469 1.9 augustss }
470 1.11 augustss /* Fill the QH */
471 1.11 augustss sqh->qh.qh_endp =
472 1.11 augustss htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
473 1.11 augustss sqh->qh.qh_link =
474 1.11 augustss htole32(sqh->physaddr | EHCI_LINK_QH);
475 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
476 1.11 augustss sqh->next = NULL;
477 1.11 augustss /* Fill the overlay qTD */
478 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
479 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
480 1.26 augustss sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
481 1.11 augustss sqh->sqtd = NULL;
482 1.9 augustss #ifdef EHCI_DEBUG
483 1.9 augustss if (ehcidebug) {
484 1.27 enami ehci_dump_sqh(sqh);
485 1.9 augustss }
486 1.9 augustss #endif
487 1.9 augustss
488 1.9 augustss /* Point to async list */
489 1.11 augustss sc->sc_async_head = sqh;
490 1.11 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
491 1.9 augustss
492 1.108 xtraeme usb_callout_init(sc->sc_tmo_intrlist);
493 1.9 augustss
494 1.10 augustss lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
495 1.10 augustss
496 1.6 augustss /* Turn on controller */
497 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
498 1.88 augustss EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
499 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
500 1.10 augustss EHCI_CMD_ASE |
501 1.78 augustss EHCI_CMD_PSE |
502 1.6 augustss EHCI_CMD_RS);
503 1.6 augustss
504 1.6 augustss /* Take over port ownership */
505 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
506 1.6 augustss
507 1.8 augustss for (i = 0; i < 100; i++) {
508 1.34 augustss usb_delay_ms(&sc->sc_bus, 1);
509 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
510 1.8 augustss if (!hcr)
511 1.8 augustss break;
512 1.8 augustss }
513 1.8 augustss if (hcr) {
514 1.41 thorpej aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
515 1.8 augustss return (USBD_IOERROR);
516 1.8 augustss }
517 1.8 augustss
518 1.105 augustss /* Enable interrupts */
519 1.105 augustss DPRINTFN(1,("ehci_init: enabling\n"));
520 1.105 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
521 1.105 augustss
522 1.5 augustss return (USBD_NORMAL_COMPLETION);
523 1.9 augustss
524 1.9 augustss #if 0
525 1.11 augustss bad2:
526 1.15 augustss ehci_free_sqh(sc, sc->sc_async_head);
527 1.9 augustss #endif
528 1.9 augustss bad1:
529 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
530 1.9 augustss return (err);
531 1.1 augustss }
532 1.1 augustss
533 1.1 augustss int
534 1.1 augustss ehci_intr(void *v)
535 1.1 augustss {
536 1.6 augustss ehci_softc_t *sc = v;
537 1.6 augustss
538 1.17 augustss if (sc == NULL || sc->sc_dying)
539 1.15 augustss return (0);
540 1.15 augustss
541 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
542 1.6 augustss if (sc->sc_bus.use_polling) {
543 1.78 augustss u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
544 1.78 augustss
545 1.78 augustss if (intrs)
546 1.78 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
547 1.6 augustss #ifdef DIAGNOSTIC
548 1.65 mycroft DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
549 1.6 augustss #endif
550 1.6 augustss return (0);
551 1.6 augustss }
552 1.6 augustss
553 1.33 augustss return (ehci_intr1(sc));
554 1.6 augustss }
555 1.6 augustss
556 1.6 augustss Static int
557 1.6 augustss ehci_intr1(ehci_softc_t *sc)
558 1.6 augustss {
559 1.6 augustss u_int32_t intrs, eintrs;
560 1.6 augustss
561 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
562 1.6 augustss
563 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
564 1.6 augustss if (sc == NULL) {
565 1.6 augustss #ifdef DIAGNOSTIC
566 1.72 augustss printf("ehci_intr1: sc == NULL\n");
567 1.6 augustss #endif
568 1.6 augustss return (0);
569 1.6 augustss }
570 1.6 augustss
571 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
572 1.6 augustss if (!intrs)
573 1.6 augustss return (0);
574 1.6 augustss
575 1.6 augustss eintrs = intrs & sc->sc_eintrs;
576 1.72 augustss DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
577 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
578 1.6 augustss (u_int)eintrs));
579 1.6 augustss if (!eintrs)
580 1.6 augustss return (0);
581 1.6 augustss
582 1.68 mycroft EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
583 1.6 augustss sc->sc_bus.intr_context++;
584 1.6 augustss sc->sc_bus.no_intrs++;
585 1.10 augustss if (eintrs & EHCI_STS_IAA) {
586 1.10 augustss DPRINTF(("ehci_intr1: door bell\n"));
587 1.11 augustss wakeup(&sc->sc_async_head);
588 1.20 augustss eintrs &= ~EHCI_STS_IAA;
589 1.10 augustss }
590 1.18 augustss if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
591 1.46 augustss DPRINTFN(5,("ehci_intr1: %s %s\n",
592 1.46 augustss eintrs & EHCI_STS_INT ? "INT" : "",
593 1.46 augustss eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
594 1.18 augustss usb_schedsoftintr(&sc->sc_bus);
595 1.21 augustss eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
596 1.6 augustss }
597 1.6 augustss if (eintrs & EHCI_STS_HSE) {
598 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
599 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
600 1.6 augustss /* XXX what else */
601 1.6 augustss }
602 1.6 augustss if (eintrs & EHCI_STS_PCD) {
603 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
604 1.6 augustss eintrs &= ~EHCI_STS_PCD;
605 1.6 augustss }
606 1.6 augustss
607 1.6 augustss sc->sc_bus.intr_context--;
608 1.6 augustss
609 1.6 augustss if (eintrs != 0) {
610 1.6 augustss /* Block unprocessed interrupts. */
611 1.6 augustss sc->sc_eintrs &= ~eintrs;
612 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
613 1.6 augustss printf("%s: blocking intrs 0x%x\n",
614 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
615 1.6 augustss }
616 1.6 augustss
617 1.6 augustss return (1);
618 1.6 augustss }
619 1.6 augustss
620 1.6 augustss
621 1.6 augustss void
622 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
623 1.6 augustss {
624 1.6 augustss usbd_pipe_handle pipe;
625 1.6 augustss u_char *p;
626 1.6 augustss int i, m;
627 1.6 augustss
628 1.6 augustss if (xfer == NULL) {
629 1.6 augustss /* Just ignore the change. */
630 1.6 augustss return;
631 1.6 augustss }
632 1.6 augustss
633 1.6 augustss pipe = xfer->pipe;
634 1.6 augustss
635 1.30 augustss p = KERNADDR(&xfer->dmabuf, 0);
636 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
637 1.6 augustss memset(p, 0, xfer->length);
638 1.6 augustss for (i = 1; i <= m; i++) {
639 1.6 augustss /* Pick out CHANGE bits from the status reg. */
640 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
641 1.6 augustss p[i/8] |= 1 << (i%8);
642 1.6 augustss }
643 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
644 1.6 augustss xfer->actlen = xfer->length;
645 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
646 1.6 augustss
647 1.6 augustss usb_transfer_complete(xfer);
648 1.1 augustss }
649 1.1 augustss
650 1.5 augustss void
651 1.5 augustss ehci_softintr(void *v)
652 1.5 augustss {
653 1.18 augustss ehci_softc_t *sc = v;
654 1.53 chs struct ehci_xfer *ex, *nextex;
655 1.18 augustss
656 1.18 augustss DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
657 1.18 augustss sc->sc_bus.intr_context));
658 1.18 augustss
659 1.18 augustss sc->sc_bus.intr_context++;
660 1.18 augustss
661 1.18 augustss /*
662 1.18 augustss * The only explanation I can think of for why EHCI is as brain dead
663 1.18 augustss * as UHCI interrupt-wise is that Intel was involved in both.
664 1.18 augustss * An interrupt just tells us that something is done, we have no
665 1.18 augustss * clue what, so we need to scan through all active transfers. :-(
666 1.18 augustss */
667 1.53 chs for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
668 1.53 chs nextex = LIST_NEXT(ex, inext);
669 1.18 augustss ehci_check_intr(sc, ex);
670 1.53 chs }
671 1.18 augustss
672 1.108 xtraeme /* Schedule a callout to catch any dropped transactions. */
673 1.108 xtraeme if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
674 1.108 xtraeme !LIST_EMPTY(&sc->sc_intrhead))
675 1.108 xtraeme usb_callout(sc->sc_tmo_intrlist, hz,
676 1.108 xtraeme ehci_intrlist_timeout, sc);
677 1.108 xtraeme
678 1.77 augustss #ifdef USB_USE_SOFTINTR
679 1.29 augustss if (sc->sc_softwake) {
680 1.29 augustss sc->sc_softwake = 0;
681 1.29 augustss wakeup(&sc->sc_softwake);
682 1.29 augustss }
683 1.77 augustss #endif /* USB_USE_SOFTINTR */
684 1.29 augustss
685 1.18 augustss sc->sc_bus.intr_context--;
686 1.18 augustss }
687 1.18 augustss
688 1.18 augustss /* Check for an interrupt. */
689 1.18 augustss void
690 1.115 christos ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
691 1.18 augustss {
692 1.18 augustss ehci_soft_qtd_t *sqtd, *lsqtd;
693 1.18 augustss u_int32_t status;
694 1.18 augustss
695 1.22 augustss DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
696 1.18 augustss
697 1.18 augustss if (ex->sqtdstart == NULL) {
698 1.18 augustss printf("ehci_check_intr: sqtdstart=NULL\n");
699 1.18 augustss return;
700 1.18 augustss }
701 1.18 augustss lsqtd = ex->sqtdend;
702 1.18 augustss #ifdef DIAGNOSTIC
703 1.18 augustss if (lsqtd == NULL) {
704 1.84 augustss printf("ehci_check_intr: lsqtd==0\n");
705 1.18 augustss return;
706 1.18 augustss }
707 1.18 augustss #endif
708 1.33 augustss /*
709 1.18 augustss * If the last TD is still active we need to check whether there
710 1.18 augustss * is a an error somewhere in the middle, or whether there was a
711 1.18 augustss * short packet (SPD and not ACTIVE).
712 1.18 augustss */
713 1.18 augustss if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
714 1.18 augustss DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
715 1.18 augustss for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
716 1.18 augustss status = le32toh(sqtd->qtd.qtd_status);
717 1.18 augustss /* If there's an active QTD the xfer isn't done. */
718 1.18 augustss if (status & EHCI_QTD_ACTIVE)
719 1.18 augustss break;
720 1.18 augustss /* Any kind of error makes the xfer done. */
721 1.18 augustss if (status & EHCI_QTD_HALTED)
722 1.18 augustss goto done;
723 1.18 augustss /* We want short packets, and it is short: it's done */
724 1.58 mycroft if (EHCI_QTD_GET_BYTES(status) != 0)
725 1.18 augustss goto done;
726 1.18 augustss }
727 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
728 1.18 augustss ex, ex->sqtdstart));
729 1.18 augustss return;
730 1.18 augustss }
731 1.18 augustss done:
732 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
733 1.18 augustss usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
734 1.18 augustss ehci_idone(ex);
735 1.18 augustss }
736 1.18 augustss
737 1.18 augustss void
738 1.18 augustss ehci_idone(struct ehci_xfer *ex)
739 1.18 augustss {
740 1.18 augustss usbd_xfer_handle xfer = &ex->xfer;
741 1.18 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
742 1.82 augustss ehci_soft_qtd_t *sqtd, *lsqtd;
743 1.82 augustss u_int32_t status = 0, nstatus = 0;
744 1.18 augustss int actlen;
745 1.18 augustss
746 1.22 augustss DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
747 1.18 augustss #ifdef DIAGNOSTIC
748 1.18 augustss {
749 1.18 augustss int s = splhigh();
750 1.18 augustss if (ex->isdone) {
751 1.18 augustss splx(s);
752 1.18 augustss #ifdef EHCI_DEBUG
753 1.18 augustss printf("ehci_idone: ex is done!\n ");
754 1.18 augustss ehci_dump_exfer(ex);
755 1.18 augustss #else
756 1.18 augustss printf("ehci_idone: ex=%p is done!\n", ex);
757 1.18 augustss #endif
758 1.18 augustss return;
759 1.18 augustss }
760 1.18 augustss ex->isdone = 1;
761 1.18 augustss splx(s);
762 1.18 augustss }
763 1.18 augustss #endif
764 1.18 augustss
765 1.18 augustss if (xfer->status == USBD_CANCELLED ||
766 1.18 augustss xfer->status == USBD_TIMEOUT) {
767 1.18 augustss DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
768 1.18 augustss return;
769 1.18 augustss }
770 1.18 augustss
771 1.18 augustss #ifdef EHCI_DEBUG
772 1.23 augustss DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
773 1.18 augustss if (ehcidebug > 10)
774 1.18 augustss ehci_dump_sqtds(ex->sqtdstart);
775 1.18 augustss #endif
776 1.18 augustss
777 1.18 augustss /* The transfer is done, compute actual length and status. */
778 1.82 augustss lsqtd = ex->sqtdend;
779 1.18 augustss actlen = 0;
780 1.82 augustss for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
781 1.18 augustss nstatus = le32toh(sqtd->qtd.qtd_status);
782 1.18 augustss if (nstatus & EHCI_QTD_ACTIVE)
783 1.18 augustss break;
784 1.18 augustss
785 1.18 augustss status = nstatus;
786 1.18 augustss if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
787 1.18 augustss actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
788 1.18 augustss }
789 1.22 augustss
790 1.91 perry /*
791 1.86 augustss * If there are left over TDs we need to update the toggle.
792 1.86 augustss * The default pipe doesn't need it since control transfers
793 1.86 augustss * start the toggle at 0 every time.
794 1.117 drochner * For a short transfer we need to update the toggle for the missing
795 1.117 drochner * packets within the qTD.
796 1.86 augustss */
797 1.117 drochner if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) &&
798 1.82 augustss xfer->pipe->device->default_pipe != xfer->pipe) {
799 1.117 drochner DPRINTFN(2, ("ehci_idone: need toggle update "
800 1.117 drochner "status=%08x nstatus=%08x\n", status, nstatus));
801 1.58 mycroft #if 0
802 1.58 mycroft ehci_dump_sqh(epipe->sqh);
803 1.58 mycroft ehci_dump_sqtds(ex->sqtdstart);
804 1.58 mycroft #endif
805 1.58 mycroft epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
806 1.22 augustss }
807 1.18 augustss
808 1.23 augustss DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
809 1.22 augustss xfer->length, actlen, status));
810 1.18 augustss xfer->actlen = actlen;
811 1.98 augustss if (status & EHCI_QTD_HALTED) {
812 1.18 augustss #ifdef EHCI_DEBUG
813 1.18 augustss char sbuf[128];
814 1.18 augustss
815 1.18 augustss bitmask_snprintf((u_int32_t)status,
816 1.63 mycroft "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
817 1.98 augustss "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf));
818 1.18 augustss
819 1.98 augustss DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, "
820 1.18 augustss "status 0x%s\n",
821 1.18 augustss xfer->pipe->device->address,
822 1.18 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
823 1.18 augustss sbuf));
824 1.23 augustss if (ehcidebug > 2) {
825 1.23 augustss ehci_dump_sqh(epipe->sqh);
826 1.23 augustss ehci_dump_sqtds(ex->sqtdstart);
827 1.23 augustss }
828 1.18 augustss #endif
829 1.98 augustss /* low&full speed has an extra error flag */
830 1.98 augustss if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) !=
831 1.98 augustss EHCI_QH_SPEED_HIGH)
832 1.98 augustss status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE;
833 1.98 augustss else
834 1.98 augustss status &= EHCI_QTD_STATERRS;
835 1.98 augustss if (status == 0) /* no other errors means a stall */
836 1.18 augustss xfer->status = USBD_STALLED;
837 1.18 augustss else
838 1.18 augustss xfer->status = USBD_IOERROR; /* more info XXX */
839 1.98 augustss /* XXX need to reset TT on missed microframe */
840 1.98 augustss if (status & EHCI_QTD_MISSEDMICRO) {
841 1.98 augustss ehci_softc_t *sc = (ehci_softc_t *)
842 1.98 augustss xfer->pipe->device->bus;
843 1.98 augustss
844 1.98 augustss printf("%s: missed microframe, TT reset not "
845 1.98 augustss "implemented, hub might be inoperational\n",
846 1.98 augustss USBDEVNAME(sc->sc_bus.bdev));
847 1.98 augustss }
848 1.18 augustss } else {
849 1.18 augustss xfer->status = USBD_NORMAL_COMPLETION;
850 1.18 augustss }
851 1.18 augustss
852 1.18 augustss usb_transfer_complete(xfer);
853 1.22 augustss DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
854 1.5 augustss }
855 1.5 augustss
856 1.15 augustss /*
857 1.15 augustss * Wait here until controller claims to have an interrupt.
858 1.18 augustss * Then call ehci_intr and return. Use timeout to avoid waiting
859 1.15 augustss * too long.
860 1.15 augustss */
861 1.15 augustss void
862 1.15 augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
863 1.15 augustss {
864 1.97 augustss int timo;
865 1.15 augustss u_int32_t intrs;
866 1.15 augustss
867 1.15 augustss xfer->status = USBD_IN_PROGRESS;
868 1.97 augustss for (timo = xfer->timeout; timo >= 0; timo--) {
869 1.15 augustss usb_delay_ms(&sc->sc_bus, 1);
870 1.17 augustss if (sc->sc_dying)
871 1.17 augustss break;
872 1.15 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
873 1.15 augustss sc->sc_eintrs;
874 1.15 augustss DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
875 1.70 yamt #ifdef EHCI_DEBUG
876 1.15 augustss if (ehcidebug > 15)
877 1.18 augustss ehci_dump_regs(sc);
878 1.15 augustss #endif
879 1.15 augustss if (intrs) {
880 1.15 augustss ehci_intr1(sc);
881 1.15 augustss if (xfer->status != USBD_IN_PROGRESS)
882 1.15 augustss return;
883 1.15 augustss }
884 1.15 augustss }
885 1.15 augustss
886 1.15 augustss /* Timeout */
887 1.15 augustss DPRINTF(("ehci_waitintr: timeout\n"));
888 1.15 augustss xfer->status = USBD_TIMEOUT;
889 1.15 augustss usb_transfer_complete(xfer);
890 1.15 augustss /* XXX should free TD */
891 1.15 augustss }
892 1.15 augustss
893 1.5 augustss void
894 1.5 augustss ehci_poll(struct usbd_bus *bus)
895 1.5 augustss {
896 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
897 1.5 augustss #ifdef EHCI_DEBUG
898 1.5 augustss static int last;
899 1.5 augustss int new;
900 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
901 1.5 augustss if (new != last) {
902 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
903 1.5 augustss last = new;
904 1.5 augustss }
905 1.5 augustss #endif
906 1.5 augustss
907 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
908 1.5 augustss ehci_intr1(sc);
909 1.5 augustss }
910 1.5 augustss
911 1.1 augustss int
912 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
913 1.1 augustss {
914 1.1 augustss int rv = 0;
915 1.1 augustss
916 1.1 augustss if (sc->sc_child != NULL)
917 1.1 augustss rv = config_detach(sc->sc_child, flags);
918 1.33 augustss
919 1.1 augustss if (rv != 0)
920 1.1 augustss return (rv);
921 1.1 augustss
922 1.108 xtraeme usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc);
923 1.6 augustss
924 1.1 augustss if (sc->sc_shutdownhook != NULL)
925 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
926 1.1 augustss
927 1.17 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
928 1.15 augustss
929 1.1 augustss /* XXX free other data structures XXX */
930 1.1 augustss
931 1.1 augustss return (rv);
932 1.1 augustss }
933 1.1 augustss
934 1.1 augustss
935 1.1 augustss int
936 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
937 1.1 augustss {
938 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
939 1.1 augustss int rv = 0;
940 1.1 augustss
941 1.1 augustss switch (act) {
942 1.1 augustss case DVACT_ACTIVATE:
943 1.1 augustss return (EOPNOTSUPP);
944 1.1 augustss
945 1.1 augustss case DVACT_DEACTIVATE:
946 1.1 augustss if (sc->sc_child != NULL)
947 1.1 augustss rv = config_deactivate(sc->sc_child);
948 1.5 augustss sc->sc_dying = 1;
949 1.1 augustss break;
950 1.1 augustss }
951 1.1 augustss return (rv);
952 1.1 augustss }
953 1.1 augustss
954 1.5 augustss /*
955 1.5 augustss * Handle suspend/resume.
956 1.5 augustss *
957 1.5 augustss * We need to switch to polling mode here, because this routine is
958 1.73 augustss * called from an interrupt context. This is all right since we
959 1.5 augustss * are almost suspended anyway.
960 1.123.18.1 jmcneill *
961 1.123.18.1 jmcneill * Note that this power handler isn't to be registered directly; the
962 1.123.18.1 jmcneill * bus glue needs to call out to it.
963 1.5 augustss */
964 1.123.18.1 jmcneill pnp_status_t
965 1.123.18.1 jmcneill ehci_power(device_t dv, pnp_request_t req, void *opaque)
966 1.5 augustss {
967 1.123.18.1 jmcneill ehci_softc_t *sc = (ehci_softc_t *)dv;
968 1.123.18.1 jmcneill pnp_state_t *pstate;
969 1.123.18.1 jmcneill pnp_capabilities_t *pcaps;
970 1.74 augustss u_int32_t cmd, hcr;
971 1.74 augustss int s, i;
972 1.5 augustss
973 1.5 augustss #ifdef EHCI_DEBUG
974 1.123.18.1 jmcneill DPRINTF(("ehci_power: sc=%p, req=%d, opaque=%p\n", sc, req, opaque));
975 1.74 augustss if (ehcidebug > 0)
976 1.74 augustss ehci_dump_regs(sc);
977 1.5 augustss #endif
978 1.5 augustss
979 1.5 augustss s = splhardusb();
980 1.123.18.1 jmcneill switch (req) {
981 1.123.18.1 jmcneill case PNP_REQUEST_GET_CAPABILITIES:
982 1.123.18.1 jmcneill pcaps = opaque;
983 1.123.18.1 jmcneill pcaps->state |= PNP_STATE_D0 | PNP_STATE_D3;
984 1.123.18.1 jmcneill break;
985 1.123.18.1 jmcneill case PNP_REQUEST_SET_STATE:
986 1.123.18.1 jmcneill pstate = opaque;
987 1.123.18.1 jmcneill switch (*pstate) {
988 1.123.18.1 jmcneill case PNP_STATE_D3:
989 1.123.18.1 jmcneill sc->sc_bus.use_polling++;
990 1.123.18.1 jmcneill
991 1.123.18.2 jmcneill for (i = 1; i <= sc->sc_noport; i++) {
992 1.123.18.2 jmcneill cmd = EOREAD4(sc, EHCI_PORTSC(i));
993 1.123.18.2 jmcneill if ((cmd & EHCI_PS_PO) == 0 &&
994 1.123.18.2 jmcneill (cmd & EHCI_PS_PE) == EHCI_PS_PE)
995 1.123.18.2 jmcneill EOWRITE4(sc, EHCI_PORTSC(i),
996 1.123.18.2 jmcneill cmd | EHCI_PS_SUSP);
997 1.123.18.2 jmcneill }
998 1.123.18.2 jmcneill
999 1.123.18.1 jmcneill sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
1000 1.123.18.1 jmcneill
1001 1.123.18.1 jmcneill cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
1002 1.123.18.1 jmcneill EOWRITE4(sc, EHCI_USBCMD, cmd);
1003 1.123.18.1 jmcneill
1004 1.123.18.1 jmcneill for (i = 0; i < 100; i++) {
1005 1.123.18.1 jmcneill hcr = EOREAD4(sc, EHCI_USBSTS) &
1006 1.123.18.1 jmcneill (EHCI_STS_ASS | EHCI_STS_PSS);
1007 1.123.18.1 jmcneill if (hcr == 0)
1008 1.123.18.1 jmcneill break;
1009 1.123.18.1 jmcneill
1010 1.123.18.1 jmcneill usb_delay_ms(&sc->sc_bus, 1);
1011 1.123.18.1 jmcneill }
1012 1.123.18.1 jmcneill if (hcr != 0)
1013 1.123.18.1 jmcneill printf("%s: reset timeout\n",
1014 1.123.18.1 jmcneill USBDEVNAME(sc->sc_bus.bdev));
1015 1.123.18.1 jmcneill
1016 1.123.18.1 jmcneill cmd &= ~EHCI_CMD_RS;
1017 1.123.18.1 jmcneill EOWRITE4(sc, EHCI_USBCMD, cmd);
1018 1.123.18.1 jmcneill
1019 1.123.18.1 jmcneill for (i = 0; i < 100; i++) {
1020 1.123.18.1 jmcneill hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1021 1.123.18.1 jmcneill if (hcr == EHCI_STS_HCH)
1022 1.123.18.1 jmcneill break;
1023 1.74 augustss
1024 1.123.18.1 jmcneill usb_delay_ms(&sc->sc_bus, 1);
1025 1.123.18.1 jmcneill }
1026 1.123.18.1 jmcneill if (hcr != EHCI_STS_HCH)
1027 1.123.18.1 jmcneill printf("%s: config timeout\n",
1028 1.123.18.1 jmcneill USBDEVNAME(sc->sc_bus.bdev));
1029 1.74 augustss
1030 1.123.18.1 jmcneill sc->sc_bus.use_polling--;
1031 1.123.18.1 jmcneill break;
1032 1.74 augustss
1033 1.123.18.1 jmcneill case PNP_STATE_D0:
1034 1.123.18.1 jmcneill sc->sc_bus.use_polling++;
1035 1.74 augustss
1036 1.123.18.1 jmcneill /* restore things in case the bios sucks */
1037 1.123.18.1 jmcneill EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
1038 1.123.18.1 jmcneill EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
1039 1.123.18.1 jmcneill EOWRITE4(sc, EHCI_ASYNCLISTADDR,
1040 1.123.18.1 jmcneill sc->sc_async_head->physaddr | EHCI_LINK_QH);
1041 1.123.18.1 jmcneill EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1042 1.74 augustss
1043 1.123.18.1 jmcneill EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
1044 1.74 augustss
1045 1.123.18.2 jmcneill hcr = 0;
1046 1.123.18.2 jmcneill for (i = 1; i <= sc->sc_noport; i++) {
1047 1.123.18.2 jmcneill cmd = EOREAD4(sc, EHCI_PORTSC(i));
1048 1.123.18.2 jmcneill if ((cmd & EHCI_PS_PO) == 0 &&
1049 1.123.18.2 jmcneill (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
1050 1.123.18.2 jmcneill EOWRITE4(sc, EHCI_PORTSC(i),
1051 1.123.18.2 jmcneill cmd | EHCI_PS_FPR);
1052 1.123.18.2 jmcneill hcr = 1;
1053 1.123.18.2 jmcneill }
1054 1.123.18.2 jmcneill }
1055 1.123.18.2 jmcneill
1056 1.123.18.2 jmcneill if (hcr) {
1057 1.123.18.2 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1058 1.123.18.2 jmcneill
1059 1.123.18.2 jmcneill for (i = 1; i <= sc->sc_noport; i++) {
1060 1.123.18.2 jmcneill cmd = EOREAD4(sc, EHCI_PORTSC(i));
1061 1.123.18.2 jmcneill if ((cmd & EHCI_PS_PO) == 0 &&
1062 1.123.18.2 jmcneill (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
1063 1.123.18.2 jmcneill EOWRITE4(sc, EHCI_PORTSC(i),
1064 1.123.18.2 jmcneill cmd & ~EHCI_PS_FPR);
1065 1.123.18.2 jmcneill }
1066 1.123.18.2 jmcneill }
1067 1.123.18.2 jmcneill
1068 1.123.18.2 jmcneill EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
1069 1.123.18.2 jmcneill
1070 1.123.18.2 jmcneill
1071 1.123.18.1 jmcneill for (i = 0; i < 100; i++) {
1072 1.123.18.1 jmcneill hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
1073 1.123.18.1 jmcneill if (hcr != EHCI_STS_HCH)
1074 1.123.18.1 jmcneill break;
1075 1.74 augustss
1076 1.123.18.1 jmcneill usb_delay_ms(&sc->sc_bus, 1);
1077 1.123.18.1 jmcneill }
1078 1.123.18.1 jmcneill if (hcr == EHCI_STS_HCH) {
1079 1.123.18.1 jmcneill printf("%s: config timeout\n",
1080 1.123.18.1 jmcneill USBDEVNAME(sc->sc_bus.bdev));
1081 1.123.18.1 jmcneill }
1082 1.74 augustss
1083 1.123.18.1 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1084 1.74 augustss
1085 1.123.18.1 jmcneill sc->sc_bus.use_polling--;
1086 1.123.18.1 jmcneill break;
1087 1.123.18.1 jmcneill default:
1088 1.123.18.1 jmcneill break;
1089 1.74 augustss }
1090 1.74 augustss
1091 1.5 augustss break;
1092 1.123.18.1 jmcneill default:
1093 1.5 augustss break;
1094 1.5 augustss }
1095 1.123.18.1 jmcneill
1096 1.5 augustss splx(s);
1097 1.74 augustss
1098 1.74 augustss #ifdef EHCI_DEBUG
1099 1.74 augustss DPRINTF(("ehci_power: sc=%p\n", sc));
1100 1.74 augustss if (ehcidebug > 0)
1101 1.74 augustss ehci_dump_regs(sc);
1102 1.74 augustss #endif
1103 1.123.18.1 jmcneill
1104 1.123.18.1 jmcneill return PNP_STATUS_SUCCESS;
1105 1.5 augustss }
1106 1.5 augustss
1107 1.5 augustss /*
1108 1.5 augustss * Shut down the controller when the system is going down.
1109 1.5 augustss */
1110 1.5 augustss void
1111 1.5 augustss ehci_shutdown(void *v)
1112 1.5 augustss {
1113 1.8 augustss ehci_softc_t *sc = v;
1114 1.5 augustss
1115 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
1116 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
1117 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1118 1.5 augustss }
1119 1.5 augustss
1120 1.5 augustss usbd_status
1121 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1122 1.5 augustss {
1123 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1124 1.25 augustss usbd_status err;
1125 1.5 augustss
1126 1.25 augustss err = usb_allocmem(&sc->sc_bus, size, 0, dma);
1127 1.90 fvdl if (err == USBD_NOMEM)
1128 1.90 fvdl err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
1129 1.25 augustss #ifdef EHCI_DEBUG
1130 1.25 augustss if (err)
1131 1.25 augustss printf("ehci_allocm: usb_allocmem()=%d\n", err);
1132 1.25 augustss #endif
1133 1.25 augustss return (err);
1134 1.5 augustss }
1135 1.5 augustss
1136 1.5 augustss void
1137 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1138 1.5 augustss {
1139 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1140 1.5 augustss
1141 1.90 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
1142 1.90 fvdl usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve,
1143 1.90 fvdl dma);
1144 1.90 fvdl return;
1145 1.90 fvdl }
1146 1.5 augustss usb_freemem(&sc->sc_bus, dma);
1147 1.5 augustss }
1148 1.5 augustss
1149 1.5 augustss usbd_xfer_handle
1150 1.5 augustss ehci_allocx(struct usbd_bus *bus)
1151 1.5 augustss {
1152 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1153 1.5 augustss usbd_xfer_handle xfer;
1154 1.5 augustss
1155 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
1156 1.28 augustss if (xfer != NULL) {
1157 1.32 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1158 1.28 augustss #ifdef DIAGNOSTIC
1159 1.28 augustss if (xfer->busy_free != XFER_FREE) {
1160 1.72 augustss printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1161 1.28 augustss xfer->busy_free);
1162 1.28 augustss }
1163 1.28 augustss #endif
1164 1.28 augustss } else {
1165 1.15 augustss xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
1166 1.28 augustss }
1167 1.18 augustss if (xfer != NULL) {
1168 1.71 augustss memset(xfer, 0, sizeof(struct ehci_xfer));
1169 1.18 augustss #ifdef DIAGNOSTIC
1170 1.18 augustss EXFER(xfer)->isdone = 1;
1171 1.18 augustss xfer->busy_free = XFER_BUSY;
1172 1.18 augustss #endif
1173 1.18 augustss }
1174 1.5 augustss return (xfer);
1175 1.5 augustss }
1176 1.5 augustss
1177 1.5 augustss void
1178 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1179 1.5 augustss {
1180 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
1181 1.5 augustss
1182 1.18 augustss #ifdef DIAGNOSTIC
1183 1.18 augustss if (xfer->busy_free != XFER_BUSY) {
1184 1.18 augustss printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1185 1.18 augustss xfer->busy_free);
1186 1.18 augustss }
1187 1.18 augustss xfer->busy_free = XFER_FREE;
1188 1.18 augustss if (!EXFER(xfer)->isdone) {
1189 1.18 augustss printf("ehci_freex: !isdone\n");
1190 1.18 augustss }
1191 1.18 augustss #endif
1192 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1193 1.5 augustss }
1194 1.5 augustss
1195 1.5 augustss Static void
1196 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
1197 1.5 augustss {
1198 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1199 1.15 augustss
1200 1.23 augustss DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1201 1.23 augustss epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1202 1.22 augustss #ifdef USB_DEBUG
1203 1.22 augustss if (ehcidebug)
1204 1.22 augustss usbd_dump_pipe(pipe);
1205 1.5 augustss #endif
1206 1.55 mycroft epipe->nexttoggle = 0;
1207 1.5 augustss }
1208 1.5 augustss
1209 1.5 augustss Static void
1210 1.115 christos ehci_noop(usbd_pipe_handle pipe)
1211 1.5 augustss {
1212 1.5 augustss }
1213 1.5 augustss
1214 1.5 augustss #ifdef EHCI_DEBUG
1215 1.5 augustss void
1216 1.18 augustss ehci_dump_regs(ehci_softc_t *sc)
1217 1.5 augustss {
1218 1.6 augustss int i;
1219 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1220 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
1221 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
1222 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
1223 1.29 augustss printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1224 1.15 augustss EOREAD4(sc, EHCI_FRINDEX),
1225 1.15 augustss EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1226 1.15 augustss EOREAD4(sc, EHCI_PERIODICLISTBASE),
1227 1.15 augustss EOREAD4(sc, EHCI_ASYNCLISTADDR));
1228 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
1229 1.33 augustss printf("port %d status=0x%08x\n", i,
1230 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
1231 1.39 martin }
1232 1.39 martin
1233 1.40 martin /*
1234 1.40 martin * Unused function - this is meant to be called from a kernel
1235 1.40 martin * debugger.
1236 1.40 martin */
1237 1.39 martin void
1238 1.39 martin ehci_dump()
1239 1.39 martin {
1240 1.39 martin ehci_dump_regs(theehci);
1241 1.6 augustss }
1242 1.6 augustss
1243 1.6 augustss void
1244 1.15 augustss ehci_dump_link(ehci_link_t link, int type)
1245 1.9 augustss {
1246 1.15 augustss link = le32toh(link);
1247 1.15 augustss printf("0x%08x", link);
1248 1.9 augustss if (link & EHCI_LINK_TERMINATE)
1249 1.15 augustss printf("<T>");
1250 1.15 augustss else {
1251 1.15 augustss printf("<");
1252 1.15 augustss if (type) {
1253 1.15 augustss switch (EHCI_LINK_TYPE(link)) {
1254 1.15 augustss case EHCI_LINK_ITD: printf("ITD"); break;
1255 1.15 augustss case EHCI_LINK_QH: printf("QH"); break;
1256 1.15 augustss case EHCI_LINK_SITD: printf("SITD"); break;
1257 1.15 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
1258 1.16 augustss }
1259 1.15 augustss }
1260 1.9 augustss printf(">");
1261 1.15 augustss }
1262 1.15 augustss }
1263 1.15 augustss
1264 1.15 augustss void
1265 1.15 augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1266 1.15 augustss {
1267 1.29 augustss int i;
1268 1.29 augustss u_int32_t stop;
1269 1.29 augustss
1270 1.29 augustss stop = 0;
1271 1.29 augustss for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1272 1.15 augustss ehci_dump_sqtd(sqtd);
1273 1.72 augustss stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1274 1.29 augustss }
1275 1.29 augustss if (sqtd)
1276 1.29 augustss printf("dump aborted, too many TDs\n");
1277 1.9 augustss }
1278 1.9 augustss
1279 1.9 augustss void
1280 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1281 1.9 augustss {
1282 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1283 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
1284 1.9 augustss }
1285 1.9 augustss
1286 1.9 augustss void
1287 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
1288 1.9 augustss {
1289 1.9 augustss u_int32_t s;
1290 1.15 augustss char sbuf[128];
1291 1.9 augustss
1292 1.15 augustss printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1293 1.15 augustss printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1294 1.9 augustss printf("\n");
1295 1.15 augustss s = le32toh(qtd->qtd_status);
1296 1.15 augustss bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1297 1.15 augustss "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1298 1.15 augustss "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1299 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1300 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1301 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1302 1.15 augustss printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1303 1.15 augustss EHCI_QTD_GET_PID(s), sbuf);
1304 1.9 augustss for (s = 0; s < 5; s++)
1305 1.15 augustss printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1306 1.9 augustss }
1307 1.9 augustss
1308 1.9 augustss void
1309 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
1310 1.9 augustss {
1311 1.9 augustss ehci_qh_t *qh = &sqh->qh;
1312 1.15 augustss u_int32_t endp, endphub;
1313 1.9 augustss
1314 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1315 1.15 augustss printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1316 1.15 augustss endp = le32toh(qh->qh_endp);
1317 1.15 augustss printf(" endp=0x%08x\n", endp);
1318 1.15 augustss printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1319 1.15 augustss EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1320 1.15 augustss EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1321 1.15 augustss EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1322 1.15 augustss printf(" mpl=0x%x ctl=%d nrl=%d\n",
1323 1.15 augustss EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1324 1.15 augustss EHCI_QH_GET_NRL(endp));
1325 1.15 augustss endphub = le32toh(qh->qh_endphub);
1326 1.15 augustss printf(" endphub=0x%08x\n", endphub);
1327 1.15 augustss printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1328 1.15 augustss EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1329 1.15 augustss EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1330 1.15 augustss EHCI_QH_GET_MULT(endphub));
1331 1.15 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1332 1.12 augustss printf("Overlay qTD:\n");
1333 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
1334 1.9 augustss }
1335 1.9 augustss
1336 1.38 martin #ifdef DIAGNOSTIC
1337 1.18 augustss Static void
1338 1.18 augustss ehci_dump_exfer(struct ehci_xfer *ex)
1339 1.18 augustss {
1340 1.18 augustss printf("ehci_dump_exfer: ex=%p\n", ex);
1341 1.18 augustss }
1342 1.38 martin #endif
1343 1.5 augustss #endif
1344 1.5 augustss
1345 1.5 augustss usbd_status
1346 1.5 augustss ehci_open(usbd_pipe_handle pipe)
1347 1.5 augustss {
1348 1.5 augustss usbd_device_handle dev = pipe->device;
1349 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1350 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1351 1.5 augustss u_int8_t addr = dev->address;
1352 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1353 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1354 1.10 augustss ehci_soft_qh_t *sqh;
1355 1.10 augustss usbd_status err;
1356 1.10 augustss int s;
1357 1.78 augustss int ival, speed, naks;
1358 1.80 augustss int hshubaddr, hshubport;
1359 1.5 augustss
1360 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1361 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1362 1.5 augustss
1363 1.80 augustss if (dev->myhsport) {
1364 1.80 augustss hshubaddr = dev->myhsport->parent->address;
1365 1.80 augustss hshubport = dev->myhsport->portno;
1366 1.80 augustss } else {
1367 1.80 augustss hshubaddr = 0;
1368 1.80 augustss hshubport = 0;
1369 1.80 augustss }
1370 1.80 augustss
1371 1.17 augustss if (sc->sc_dying)
1372 1.17 augustss return (USBD_IOERROR);
1373 1.17 augustss
1374 1.55 mycroft epipe->nexttoggle = 0;
1375 1.55 mycroft
1376 1.5 augustss if (addr == sc->sc_addr) {
1377 1.5 augustss switch (ed->bEndpointAddress) {
1378 1.5 augustss case USB_CONTROL_ENDPOINT:
1379 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
1380 1.5 augustss break;
1381 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
1382 1.5 augustss pipe->methods = &ehci_root_intr_methods;
1383 1.5 augustss break;
1384 1.5 augustss default:
1385 1.5 augustss return (USBD_INVAL);
1386 1.5 augustss }
1387 1.10 augustss return (USBD_NORMAL_COMPLETION);
1388 1.10 augustss }
1389 1.10 augustss
1390 1.24 augustss /* XXX All this stuff is only valid for async. */
1391 1.11 augustss switch (dev->speed) {
1392 1.11 augustss case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1393 1.11 augustss case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1394 1.11 augustss case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1395 1.37 provos default: panic("ehci_open: bad device speed %d", dev->speed);
1396 1.11 augustss }
1397 1.99 augustss if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1398 1.99 augustss printf("%s: *** WARNING: opening low/full speed isoc device, "
1399 1.99 augustss "this does not work yet.\n",
1400 1.80 augustss USBDEVNAME(sc->sc_bus.bdev));
1401 1.80 augustss DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1402 1.80 augustss hshubaddr, hshubport));
1403 1.99 augustss return USBD_INVAL;
1404 1.80 augustss }
1405 1.80 augustss
1406 1.10 augustss naks = 8; /* XXX */
1407 1.10 augustss sqh = ehci_alloc_sqh(sc);
1408 1.10 augustss if (sqh == NULL)
1409 1.116 drochner return (USBD_NOMEM);
1410 1.10 augustss /* qh_link filled when the QH is added */
1411 1.10 augustss sqh->qh.qh_endp = htole32(
1412 1.10 augustss EHCI_QH_SET_ADDR(addr) |
1413 1.56 mycroft EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1414 1.55 mycroft EHCI_QH_SET_EPS(speed) |
1415 1.55 mycroft EHCI_QH_DTC |
1416 1.10 augustss EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1417 1.10 augustss (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1418 1.10 augustss EHCI_QH_CTL : 0) |
1419 1.10 augustss EHCI_QH_SET_NRL(naks)
1420 1.10 augustss );
1421 1.10 augustss sqh->qh.qh_endphub = htole32(
1422 1.78 augustss EHCI_QH_SET_MULT(1) |
1423 1.80 augustss EHCI_QH_SET_HUBA(hshubaddr) |
1424 1.80 augustss EHCI_QH_SET_PORT(hshubport) |
1425 1.93 augustss EHCI_QH_SET_CMASK(0x08) | /* XXX */
1426 1.93 augustss EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0)
1427 1.10 augustss );
1428 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
1429 1.11 augustss /* Fill the overlay qTD */
1430 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1431 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1432 1.15 augustss sqh->qh.qh_qtd.qtd_status = htole32(0);
1433 1.10 augustss
1434 1.10 augustss epipe->sqh = sqh;
1435 1.5 augustss
1436 1.10 augustss switch (xfertype) {
1437 1.10 augustss case UE_CONTROL:
1438 1.33 augustss err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1439 1.10 augustss 0, &epipe->u.ctl.reqdma);
1440 1.25 augustss #ifdef EHCI_DEBUG
1441 1.25 augustss if (err)
1442 1.25 augustss printf("ehci_open: usb_allocmem()=%d\n", err);
1443 1.25 augustss #endif
1444 1.10 augustss if (err)
1445 1.116 drochner goto bad;
1446 1.11 augustss pipe->methods = &ehci_device_ctrl_methods;
1447 1.10 augustss s = splusb();
1448 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1449 1.10 augustss splx(s);
1450 1.10 augustss break;
1451 1.10 augustss case UE_BULK:
1452 1.10 augustss pipe->methods = &ehci_device_bulk_methods;
1453 1.10 augustss s = splusb();
1454 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1455 1.10 augustss splx(s);
1456 1.10 augustss break;
1457 1.24 augustss case UE_INTERRUPT:
1458 1.24 augustss pipe->methods = &ehci_device_intr_methods;
1459 1.78 augustss ival = pipe->interval;
1460 1.116 drochner if (ival == USBD_DEFAULT_INTERVAL) {
1461 1.116 drochner if (speed == EHCI_QH_SPEED_HIGH) {
1462 1.116 drochner if (ed->bInterval > 16) {
1463 1.116 drochner /*
1464 1.116 drochner * illegal with high-speed, but there
1465 1.116 drochner * were documentation bugs in the spec,
1466 1.116 drochner * so be generous
1467 1.116 drochner */
1468 1.116 drochner ival = 256;
1469 1.116 drochner } else
1470 1.116 drochner ival = (1 << (ed->bInterval - 1)) / 8;
1471 1.116 drochner } else
1472 1.116 drochner ival = ed->bInterval;
1473 1.116 drochner }
1474 1.116 drochner err = ehci_device_setintr(sc, sqh, ival);
1475 1.116 drochner if (err)
1476 1.116 drochner goto bad;
1477 1.116 drochner break;
1478 1.24 augustss case UE_ISOCHRONOUS:
1479 1.24 augustss pipe->methods = &ehci_device_isoc_methods;
1480 1.116 drochner /* FALLTHROUGH */
1481 1.10 augustss default:
1482 1.116 drochner err = USBD_INVAL;
1483 1.116 drochner goto bad;
1484 1.5 augustss }
1485 1.5 augustss return (USBD_NORMAL_COMPLETION);
1486 1.5 augustss
1487 1.116 drochner bad:
1488 1.11 augustss ehci_free_sqh(sc, sqh);
1489 1.116 drochner return (err);
1490 1.10 augustss }
1491 1.10 augustss
1492 1.10 augustss /*
1493 1.10 augustss * Add an ED to the schedule. Called at splusb().
1494 1.10 augustss */
1495 1.10 augustss void
1496 1.10 augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1497 1.10 augustss {
1498 1.10 augustss SPLUSBCHECK;
1499 1.10 augustss
1500 1.10 augustss sqh->next = head->next;
1501 1.10 augustss sqh->qh.qh_link = head->qh.qh_link;
1502 1.10 augustss head->next = sqh;
1503 1.15 augustss head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1504 1.10 augustss
1505 1.10 augustss #ifdef EHCI_DEBUG
1506 1.22 augustss if (ehcidebug > 5) {
1507 1.10 augustss printf("ehci_add_qh:\n");
1508 1.10 augustss ehci_dump_sqh(sqh);
1509 1.10 augustss }
1510 1.5 augustss #endif
1511 1.5 augustss }
1512 1.5 augustss
1513 1.10 augustss /*
1514 1.10 augustss * Remove an ED from the schedule. Called at splusb().
1515 1.10 augustss */
1516 1.10 augustss void
1517 1.10 augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1518 1.10 augustss {
1519 1.33 augustss ehci_soft_qh_t *p;
1520 1.10 augustss
1521 1.10 augustss SPLUSBCHECK;
1522 1.10 augustss /* XXX */
1523 1.42 augustss for (p = head; p != NULL && p->next != sqh; p = p->next)
1524 1.10 augustss ;
1525 1.10 augustss if (p == NULL)
1526 1.37 provos panic("ehci_rem_qh: ED not found");
1527 1.10 augustss p->next = sqh->next;
1528 1.10 augustss p->qh.qh_link = sqh->qh.qh_link;
1529 1.10 augustss
1530 1.11 augustss ehci_sync_hc(sc);
1531 1.11 augustss }
1532 1.11 augustss
1533 1.23 augustss void
1534 1.23 augustss ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1535 1.23 augustss {
1536 1.85 augustss int i;
1537 1.87 augustss u_int32_t status;
1538 1.85 augustss
1539 1.87 augustss /* Save toggle bit and ping status. */
1540 1.87 augustss status = sqh->qh.qh_qtd.qtd_status &
1541 1.87 augustss htole32(EHCI_QTD_TOGGLE_MASK |
1542 1.87 augustss EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
1543 1.85 augustss /* Set HALTED to make hw leave it alone. */
1544 1.85 augustss sqh->qh.qh_qtd.qtd_status =
1545 1.85 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
1546 1.23 augustss sqh->qh.qh_curqtd = 0;
1547 1.23 augustss sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1548 1.85 augustss sqh->qh.qh_qtd.qtd_altnext = 0;
1549 1.85 augustss for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
1550 1.85 augustss sqh->qh.qh_qtd.qtd_buffer[i] = 0;
1551 1.23 augustss sqh->sqtd = sqtd;
1552 1.87 augustss /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
1553 1.87 augustss sqh->qh.qh_qtd.qtd_status = status;
1554 1.23 augustss }
1555 1.23 augustss
1556 1.11 augustss /*
1557 1.11 augustss * Ensure that the HC has released all references to the QH. We do this
1558 1.11 augustss * by asking for a Async Advance Doorbell interrupt and then we wait for
1559 1.11 augustss * the interrupt.
1560 1.11 augustss * To make this easier we first obtain exclusive use of the doorbell.
1561 1.11 augustss */
1562 1.11 augustss void
1563 1.11 augustss ehci_sync_hc(ehci_softc_t *sc)
1564 1.11 augustss {
1565 1.15 augustss int s, error;
1566 1.11 augustss
1567 1.12 augustss if (sc->sc_dying) {
1568 1.12 augustss DPRINTFN(2,("ehci_sync_hc: dying\n"));
1569 1.12 augustss return;
1570 1.12 augustss }
1571 1.12 augustss DPRINTFN(2,("ehci_sync_hc: enter\n"));
1572 1.76 augustss usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1573 1.10 augustss s = splhardusb();
1574 1.10 augustss /* ask for doorbell */
1575 1.10 augustss EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1576 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1577 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1578 1.15 augustss error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1579 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1580 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1581 1.10 augustss splx(s);
1582 1.76 augustss usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1583 1.15 augustss #ifdef DIAGNOSTIC
1584 1.15 augustss if (error)
1585 1.15 augustss printf("ehci_sync_hc: tsleep() = %d\n", error);
1586 1.15 augustss #endif
1587 1.12 augustss DPRINTFN(2,("ehci_sync_hc: exit\n"));
1588 1.10 augustss }
1589 1.10 augustss
1590 1.5 augustss /***********/
1591 1.5 augustss
1592 1.5 augustss /*
1593 1.5 augustss * Data structures and routines to emulate the root hub.
1594 1.5 augustss */
1595 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
1596 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1597 1.5 augustss UDESC_DEVICE, /* type */
1598 1.5 augustss {0x00, 0x02}, /* USB version */
1599 1.5 augustss UDCLASS_HUB, /* class */
1600 1.5 augustss UDSUBCLASS_HUB, /* subclass */
1601 1.11 augustss UDPROTO_HSHUBSTT, /* protocol */
1602 1.5 augustss 64, /* max packet */
1603 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
1604 1.5 augustss 1,2,0, /* string indicies */
1605 1.5 augustss 1 /* # of configurations */
1606 1.5 augustss };
1607 1.5 augustss
1608 1.123 drochner Static const usb_device_qualifier_t ehci_odevd = {
1609 1.11 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1610 1.11 augustss UDESC_DEVICE_QUALIFIER, /* type */
1611 1.11 augustss {0x00, 0x02}, /* USB version */
1612 1.11 augustss UDCLASS_HUB, /* class */
1613 1.11 augustss UDSUBCLASS_HUB, /* subclass */
1614 1.11 augustss UDPROTO_FSHUB, /* protocol */
1615 1.11 augustss 64, /* max packet */
1616 1.11 augustss 1, /* # of configurations */
1617 1.11 augustss 0
1618 1.11 augustss };
1619 1.11 augustss
1620 1.123 drochner Static const usb_config_descriptor_t ehci_confd = {
1621 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1622 1.5 augustss UDESC_CONFIG,
1623 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1624 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1625 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1626 1.5 augustss 1,
1627 1.5 augustss 1,
1628 1.5 augustss 0,
1629 1.120 drochner UC_ATTR_MBO | UC_SELF_POWERED,
1630 1.5 augustss 0 /* max power */
1631 1.5 augustss };
1632 1.5 augustss
1633 1.123 drochner Static const usb_interface_descriptor_t ehci_ifcd = {
1634 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1635 1.5 augustss UDESC_INTERFACE,
1636 1.5 augustss 0,
1637 1.5 augustss 0,
1638 1.5 augustss 1,
1639 1.5 augustss UICLASS_HUB,
1640 1.5 augustss UISUBCLASS_HUB,
1641 1.11 augustss UIPROTO_HSHUBSTT,
1642 1.5 augustss 0
1643 1.5 augustss };
1644 1.5 augustss
1645 1.123 drochner Static const usb_endpoint_descriptor_t ehci_endpd = {
1646 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1647 1.5 augustss UDESC_ENDPOINT,
1648 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
1649 1.5 augustss UE_INTERRUPT,
1650 1.5 augustss {8, 0}, /* max packet */
1651 1.118 drochner 12
1652 1.5 augustss };
1653 1.5 augustss
1654 1.123 drochner Static const usb_hub_descriptor_t ehci_hubd = {
1655 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
1656 1.5 augustss UDESC_HUB,
1657 1.5 augustss 0,
1658 1.5 augustss {0,0},
1659 1.5 augustss 0,
1660 1.5 augustss 0,
1661 1.111 christos {""},
1662 1.111 christos {""},
1663 1.5 augustss };
1664 1.5 augustss
1665 1.5 augustss Static int
1666 1.104 christos ehci_str(usb_string_descriptor_t *p, int l, const char *s)
1667 1.5 augustss {
1668 1.5 augustss int i;
1669 1.5 augustss
1670 1.5 augustss if (l == 0)
1671 1.5 augustss return (0);
1672 1.5 augustss p->bLength = 2 * strlen(s) + 2;
1673 1.5 augustss if (l == 1)
1674 1.5 augustss return (1);
1675 1.5 augustss p->bDescriptorType = UDESC_STRING;
1676 1.5 augustss l -= 2;
1677 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1678 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1679 1.5 augustss return (2*i+2);
1680 1.5 augustss }
1681 1.5 augustss
1682 1.5 augustss /*
1683 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1684 1.5 augustss */
1685 1.5 augustss Static usbd_status
1686 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1687 1.5 augustss {
1688 1.5 augustss usbd_status err;
1689 1.5 augustss
1690 1.5 augustss /* Insert last in queue. */
1691 1.5 augustss err = usb_insert_transfer(xfer);
1692 1.5 augustss if (err)
1693 1.5 augustss return (err);
1694 1.5 augustss
1695 1.5 augustss /* Pipe isn't running, start first */
1696 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1697 1.5 augustss }
1698 1.5 augustss
1699 1.5 augustss Static usbd_status
1700 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1701 1.5 augustss {
1702 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1703 1.5 augustss usb_device_request_t *req;
1704 1.5 augustss void *buf = NULL;
1705 1.5 augustss int port, i;
1706 1.5 augustss int s, len, value, index, l, totlen = 0;
1707 1.5 augustss usb_port_status_t ps;
1708 1.5 augustss usb_hub_descriptor_t hubd;
1709 1.5 augustss usbd_status err;
1710 1.5 augustss u_int32_t v;
1711 1.5 augustss
1712 1.5 augustss if (sc->sc_dying)
1713 1.5 augustss return (USBD_IOERROR);
1714 1.5 augustss
1715 1.5 augustss #ifdef DIAGNOSTIC
1716 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1717 1.5 augustss /* XXX panic */
1718 1.5 augustss return (USBD_INVAL);
1719 1.5 augustss #endif
1720 1.5 augustss req = &xfer->request;
1721 1.5 augustss
1722 1.72 augustss DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1723 1.5 augustss req->bmRequestType, req->bRequest));
1724 1.5 augustss
1725 1.5 augustss len = UGETW(req->wLength);
1726 1.5 augustss value = UGETW(req->wValue);
1727 1.5 augustss index = UGETW(req->wIndex);
1728 1.5 augustss
1729 1.5 augustss if (len != 0)
1730 1.30 augustss buf = KERNADDR(&xfer->dmabuf, 0);
1731 1.5 augustss
1732 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1733 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1734 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1735 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1736 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1737 1.33 augustss /*
1738 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1739 1.5 augustss * for the integrated root hub.
1740 1.5 augustss */
1741 1.5 augustss break;
1742 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1743 1.5 augustss if (len > 0) {
1744 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1745 1.5 augustss totlen = 1;
1746 1.5 augustss }
1747 1.5 augustss break;
1748 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1749 1.72 augustss DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1750 1.109 christos if (len == 0)
1751 1.109 christos break;
1752 1.5 augustss switch(value >> 8) {
1753 1.5 augustss case UDESC_DEVICE:
1754 1.5 augustss if ((value & 0xff) != 0) {
1755 1.5 augustss err = USBD_IOERROR;
1756 1.5 augustss goto ret;
1757 1.5 augustss }
1758 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1759 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1760 1.5 augustss memcpy(buf, &ehci_devd, l);
1761 1.5 augustss break;
1762 1.33 augustss /*
1763 1.11 augustss * We can't really operate at another speed, but the spec says
1764 1.11 augustss * we need this descriptor.
1765 1.11 augustss */
1766 1.11 augustss case UDESC_DEVICE_QUALIFIER:
1767 1.11 augustss if ((value & 0xff) != 0) {
1768 1.11 augustss err = USBD_IOERROR;
1769 1.11 augustss goto ret;
1770 1.11 augustss }
1771 1.11 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1772 1.11 augustss memcpy(buf, &ehci_odevd, l);
1773 1.11 augustss break;
1774 1.33 augustss /*
1775 1.11 augustss * We can't really operate at another speed, but the spec says
1776 1.11 augustss * we need this descriptor.
1777 1.11 augustss */
1778 1.11 augustss case UDESC_OTHER_SPEED_CONFIGURATION:
1779 1.5 augustss case UDESC_CONFIG:
1780 1.5 augustss if ((value & 0xff) != 0) {
1781 1.5 augustss err = USBD_IOERROR;
1782 1.5 augustss goto ret;
1783 1.5 augustss }
1784 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1785 1.5 augustss memcpy(buf, &ehci_confd, l);
1786 1.11 augustss ((usb_config_descriptor_t *)buf)->bDescriptorType =
1787 1.11 augustss value >> 8;
1788 1.5 augustss buf = (char *)buf + l;
1789 1.5 augustss len -= l;
1790 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1791 1.5 augustss totlen += l;
1792 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1793 1.5 augustss buf = (char *)buf + l;
1794 1.5 augustss len -= l;
1795 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1796 1.5 augustss totlen += l;
1797 1.5 augustss memcpy(buf, &ehci_endpd, l);
1798 1.5 augustss break;
1799 1.5 augustss case UDESC_STRING:
1800 1.5 augustss *(u_int8_t *)buf = 0;
1801 1.5 augustss totlen = 1;
1802 1.5 augustss switch (value & 0xff) {
1803 1.88 augustss case 0: /* Language table */
1804 1.123 drochner if (len > 0)
1805 1.123 drochner *(u_int8_t *)buf = 4;
1806 1.123 drochner if (len >= 4) {
1807 1.123 drochner USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409);
1808 1.123 drochner totlen = 4;
1809 1.123 drochner }
1810 1.88 augustss break;
1811 1.5 augustss case 1: /* Vendor */
1812 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1813 1.5 augustss break;
1814 1.5 augustss case 2: /* Product */
1815 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1816 1.5 augustss break;
1817 1.5 augustss }
1818 1.5 augustss break;
1819 1.5 augustss default:
1820 1.5 augustss err = USBD_IOERROR;
1821 1.5 augustss goto ret;
1822 1.5 augustss }
1823 1.5 augustss break;
1824 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1825 1.5 augustss if (len > 0) {
1826 1.5 augustss *(u_int8_t *)buf = 0;
1827 1.5 augustss totlen = 1;
1828 1.5 augustss }
1829 1.5 augustss break;
1830 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1831 1.5 augustss if (len > 1) {
1832 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1833 1.5 augustss totlen = 2;
1834 1.5 augustss }
1835 1.5 augustss break;
1836 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1837 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1838 1.5 augustss if (len > 1) {
1839 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1840 1.5 augustss totlen = 2;
1841 1.5 augustss }
1842 1.5 augustss break;
1843 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1844 1.5 augustss if (value >= USB_MAX_DEVICES) {
1845 1.5 augustss err = USBD_IOERROR;
1846 1.5 augustss goto ret;
1847 1.5 augustss }
1848 1.5 augustss sc->sc_addr = value;
1849 1.5 augustss break;
1850 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1851 1.5 augustss if (value != 0 && value != 1) {
1852 1.5 augustss err = USBD_IOERROR;
1853 1.5 augustss goto ret;
1854 1.5 augustss }
1855 1.5 augustss sc->sc_conf = value;
1856 1.5 augustss break;
1857 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1858 1.5 augustss break;
1859 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1860 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1861 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1862 1.5 augustss err = USBD_IOERROR;
1863 1.5 augustss goto ret;
1864 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1865 1.5 augustss break;
1866 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1867 1.5 augustss break;
1868 1.5 augustss /* Hub requests */
1869 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1870 1.5 augustss break;
1871 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1872 1.106 augustss DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1873 1.5 augustss "port=%d feature=%d\n",
1874 1.5 augustss index, value));
1875 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1876 1.5 augustss err = USBD_IOERROR;
1877 1.5 augustss goto ret;
1878 1.5 augustss }
1879 1.5 augustss port = EHCI_PORTSC(index);
1880 1.106 augustss v = EOREAD4(sc, port);
1881 1.106 augustss DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
1882 1.106 augustss v &= ~EHCI_PS_CLEAR;
1883 1.5 augustss switch(value) {
1884 1.5 augustss case UHF_PORT_ENABLE:
1885 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1886 1.5 augustss break;
1887 1.5 augustss case UHF_PORT_SUSPEND:
1888 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1889 1.5 augustss break;
1890 1.5 augustss case UHF_PORT_POWER:
1891 1.106 augustss if (sc->sc_hasppc)
1892 1.106 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1893 1.5 augustss break;
1894 1.14 augustss case UHF_PORT_TEST:
1895 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1896 1.14 augustss "%d\n", index));
1897 1.14 augustss break;
1898 1.14 augustss case UHF_PORT_INDICATOR:
1899 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1900 1.14 augustss "%d\n", index));
1901 1.14 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1902 1.14 augustss break;
1903 1.5 augustss case UHF_C_PORT_CONNECTION:
1904 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1905 1.5 augustss break;
1906 1.5 augustss case UHF_C_PORT_ENABLE:
1907 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1908 1.5 augustss break;
1909 1.5 augustss case UHF_C_PORT_SUSPEND:
1910 1.5 augustss /* how? */
1911 1.5 augustss break;
1912 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1913 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1914 1.5 augustss break;
1915 1.5 augustss case UHF_C_PORT_RESET:
1916 1.106 augustss sc->sc_isreset[index] = 0;
1917 1.5 augustss break;
1918 1.5 augustss default:
1919 1.5 augustss err = USBD_IOERROR;
1920 1.5 augustss goto ret;
1921 1.5 augustss }
1922 1.5 augustss #if 0
1923 1.5 augustss switch(value) {
1924 1.5 augustss case UHF_C_PORT_CONNECTION:
1925 1.5 augustss case UHF_C_PORT_ENABLE:
1926 1.5 augustss case UHF_C_PORT_SUSPEND:
1927 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1928 1.5 augustss case UHF_C_PORT_RESET:
1929 1.5 augustss default:
1930 1.5 augustss break;
1931 1.5 augustss }
1932 1.5 augustss #endif
1933 1.5 augustss break;
1934 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1935 1.109 christos if (len == 0)
1936 1.109 christos break;
1937 1.51 toshii if ((value & 0xff) != 0) {
1938 1.5 augustss err = USBD_IOERROR;
1939 1.5 augustss goto ret;
1940 1.5 augustss }
1941 1.5 augustss hubd = ehci_hubd;
1942 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1943 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1944 1.5 augustss USETW(hubd.wHubCharacteristics,
1945 1.14 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1946 1.78 augustss EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1947 1.14 augustss ? UHD_PORT_IND : 0);
1948 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1949 1.33 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1950 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1951 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1952 1.5 augustss l = min(len, hubd.bDescLength);
1953 1.5 augustss totlen = l;
1954 1.5 augustss memcpy(buf, &hubd, l);
1955 1.5 augustss break;
1956 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1957 1.5 augustss if (len != 4) {
1958 1.5 augustss err = USBD_IOERROR;
1959 1.5 augustss goto ret;
1960 1.5 augustss }
1961 1.5 augustss memset(buf, 0, len); /* ? XXX */
1962 1.5 augustss totlen = len;
1963 1.5 augustss break;
1964 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1965 1.72 augustss DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1966 1.5 augustss index));
1967 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1968 1.5 augustss err = USBD_IOERROR;
1969 1.5 augustss goto ret;
1970 1.5 augustss }
1971 1.5 augustss if (len != 4) {
1972 1.5 augustss err = USBD_IOERROR;
1973 1.5 augustss goto ret;
1974 1.5 augustss }
1975 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1976 1.72 augustss DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
1977 1.5 augustss v));
1978 1.11 augustss i = UPS_HIGH_SPEED;
1979 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1980 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1981 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1982 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1983 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1984 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1985 1.5 augustss USETW(ps.wPortStatus, i);
1986 1.5 augustss i = 0;
1987 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1988 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1989 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1990 1.106 augustss if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET;
1991 1.5 augustss USETW(ps.wPortChange, i);
1992 1.5 augustss l = min(len, sizeof ps);
1993 1.5 augustss memcpy(buf, &ps, l);
1994 1.5 augustss totlen = l;
1995 1.5 augustss break;
1996 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1997 1.5 augustss err = USBD_IOERROR;
1998 1.5 augustss goto ret;
1999 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2000 1.5 augustss break;
2001 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2002 1.5 augustss if (index < 1 || index > sc->sc_noport) {
2003 1.5 augustss err = USBD_IOERROR;
2004 1.5 augustss goto ret;
2005 1.5 augustss }
2006 1.5 augustss port = EHCI_PORTSC(index);
2007 1.106 augustss v = EOREAD4(sc, port);
2008 1.106 augustss DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
2009 1.106 augustss v &= ~EHCI_PS_CLEAR;
2010 1.5 augustss switch(value) {
2011 1.5 augustss case UHF_PORT_ENABLE:
2012 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
2013 1.5 augustss break;
2014 1.5 augustss case UHF_PORT_SUSPEND:
2015 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
2016 1.5 augustss break;
2017 1.5 augustss case UHF_PORT_RESET:
2018 1.72 augustss DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
2019 1.5 augustss index));
2020 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
2021 1.6 augustss /* Low speed device, give up ownership. */
2022 1.6 augustss ehci_disown(sc, index, 1);
2023 1.6 augustss break;
2024 1.6 augustss }
2025 1.8 augustss /* Start reset sequence. */
2026 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
2027 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
2028 1.8 augustss /* Wait for reset to complete. */
2029 1.13 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
2030 1.17 augustss if (sc->sc_dying) {
2031 1.17 augustss err = USBD_IOERROR;
2032 1.17 augustss goto ret;
2033 1.17 augustss }
2034 1.8 augustss /* Terminate reset sequence. */
2035 1.8 augustss EOWRITE4(sc, port, v);
2036 1.8 augustss /* Wait for HC to complete reset. */
2037 1.13 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
2038 1.17 augustss if (sc->sc_dying) {
2039 1.17 augustss err = USBD_IOERROR;
2040 1.17 augustss goto ret;
2041 1.17 augustss }
2042 1.8 augustss v = EOREAD4(sc, port);
2043 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
2044 1.8 augustss if (v & EHCI_PS_PR) {
2045 1.8 augustss printf("%s: port reset timeout\n",
2046 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
2047 1.8 augustss return (USBD_TIMEOUT);
2048 1.5 augustss }
2049 1.8 augustss if (!(v & EHCI_PS_PE)) {
2050 1.6 augustss /* Not a high speed device, give up ownership.*/
2051 1.6 augustss ehci_disown(sc, index, 0);
2052 1.6 augustss break;
2053 1.6 augustss }
2054 1.106 augustss sc->sc_isreset[index] = 1;
2055 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
2056 1.6 augustss index, v));
2057 1.5 augustss break;
2058 1.5 augustss case UHF_PORT_POWER:
2059 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: set port power "
2060 1.106 augustss "%d (has PPC = %d)\n", index,
2061 1.106 augustss sc->sc_hasppc));
2062 1.106 augustss if (sc->sc_hasppc)
2063 1.106 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
2064 1.5 augustss break;
2065 1.11 augustss case UHF_PORT_TEST:
2066 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: set port test "
2067 1.11 augustss "%d\n", index));
2068 1.11 augustss break;
2069 1.11 augustss case UHF_PORT_INDICATOR:
2070 1.72 augustss DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
2071 1.11 augustss "%d\n", index));
2072 1.14 augustss EOWRITE4(sc, port, v | EHCI_PS_PIC);
2073 1.11 augustss break;
2074 1.5 augustss default:
2075 1.5 augustss err = USBD_IOERROR;
2076 1.5 augustss goto ret;
2077 1.5 augustss }
2078 1.5 augustss break;
2079 1.11 augustss case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
2080 1.11 augustss case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
2081 1.11 augustss case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
2082 1.11 augustss case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
2083 1.11 augustss break;
2084 1.5 augustss default:
2085 1.5 augustss err = USBD_IOERROR;
2086 1.5 augustss goto ret;
2087 1.5 augustss }
2088 1.5 augustss xfer->actlen = totlen;
2089 1.5 augustss err = USBD_NORMAL_COMPLETION;
2090 1.5 augustss ret:
2091 1.5 augustss xfer->status = err;
2092 1.5 augustss s = splusb();
2093 1.5 augustss usb_transfer_complete(xfer);
2094 1.5 augustss splx(s);
2095 1.5 augustss return (USBD_IN_PROGRESS);
2096 1.6 augustss }
2097 1.6 augustss
2098 1.6 augustss void
2099 1.115 christos ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
2100 1.6 augustss {
2101 1.24 augustss int port;
2102 1.6 augustss u_int32_t v;
2103 1.6 augustss
2104 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
2105 1.6 augustss #ifdef DIAGNOSTIC
2106 1.6 augustss if (sc->sc_npcomp != 0) {
2107 1.24 augustss int i = (index-1) / sc->sc_npcomp;
2108 1.6 augustss if (i >= sc->sc_ncomp)
2109 1.6 augustss printf("%s: strange port\n",
2110 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
2111 1.6 augustss else
2112 1.6 augustss printf("%s: handing over %s speed device on "
2113 1.6 augustss "port %d to %s\n",
2114 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
2115 1.6 augustss lowspeed ? "low" : "full",
2116 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
2117 1.6 augustss } else {
2118 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
2119 1.6 augustss }
2120 1.6 augustss #endif
2121 1.6 augustss port = EHCI_PORTSC(index);
2122 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
2123 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
2124 1.5 augustss }
2125 1.5 augustss
2126 1.5 augustss /* Abort a root control request. */
2127 1.5 augustss Static void
2128 1.115 christos ehci_root_ctrl_abort(usbd_xfer_handle xfer)
2129 1.5 augustss {
2130 1.5 augustss /* Nothing to do, all transfers are synchronous. */
2131 1.5 augustss }
2132 1.5 augustss
2133 1.5 augustss /* Close the root pipe. */
2134 1.5 augustss Static void
2135 1.115 christos ehci_root_ctrl_close(usbd_pipe_handle pipe)
2136 1.5 augustss {
2137 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
2138 1.5 augustss /* Nothing to do. */
2139 1.5 augustss }
2140 1.5 augustss
2141 1.5 augustss void
2142 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
2143 1.5 augustss {
2144 1.78 augustss xfer->hcpriv = NULL;
2145 1.5 augustss }
2146 1.5 augustss
2147 1.5 augustss Static usbd_status
2148 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
2149 1.5 augustss {
2150 1.5 augustss usbd_status err;
2151 1.5 augustss
2152 1.5 augustss /* Insert last in queue. */
2153 1.5 augustss err = usb_insert_transfer(xfer);
2154 1.5 augustss if (err)
2155 1.5 augustss return (err);
2156 1.5 augustss
2157 1.5 augustss /* Pipe isn't running, start first */
2158 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2159 1.5 augustss }
2160 1.5 augustss
2161 1.5 augustss Static usbd_status
2162 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
2163 1.5 augustss {
2164 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
2165 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2166 1.5 augustss
2167 1.5 augustss if (sc->sc_dying)
2168 1.5 augustss return (USBD_IOERROR);
2169 1.5 augustss
2170 1.5 augustss sc->sc_intrxfer = xfer;
2171 1.5 augustss
2172 1.5 augustss return (USBD_IN_PROGRESS);
2173 1.5 augustss }
2174 1.5 augustss
2175 1.5 augustss /* Abort a root interrupt request. */
2176 1.5 augustss Static void
2177 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
2178 1.5 augustss {
2179 1.5 augustss int s;
2180 1.5 augustss
2181 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
2182 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
2183 1.5 augustss xfer->pipe->intrxfer = NULL;
2184 1.5 augustss }
2185 1.5 augustss xfer->status = USBD_CANCELLED;
2186 1.5 augustss s = splusb();
2187 1.5 augustss usb_transfer_complete(xfer);
2188 1.5 augustss splx(s);
2189 1.5 augustss }
2190 1.5 augustss
2191 1.5 augustss /* Close the root pipe. */
2192 1.5 augustss Static void
2193 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
2194 1.5 augustss {
2195 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2196 1.33 augustss
2197 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
2198 1.5 augustss
2199 1.5 augustss sc->sc_intrxfer = NULL;
2200 1.5 augustss }
2201 1.5 augustss
2202 1.5 augustss void
2203 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
2204 1.5 augustss {
2205 1.78 augustss xfer->hcpriv = NULL;
2206 1.9 augustss }
2207 1.9 augustss
2208 1.9 augustss /************************/
2209 1.9 augustss
2210 1.9 augustss ehci_soft_qh_t *
2211 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
2212 1.9 augustss {
2213 1.9 augustss ehci_soft_qh_t *sqh;
2214 1.9 augustss usbd_status err;
2215 1.9 augustss int i, offs;
2216 1.9 augustss usb_dma_t dma;
2217 1.9 augustss
2218 1.9 augustss if (sc->sc_freeqhs == NULL) {
2219 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2220 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2221 1.9 augustss EHCI_PAGE_SIZE, &dma);
2222 1.25 augustss #ifdef EHCI_DEBUG
2223 1.25 augustss if (err)
2224 1.25 augustss printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2225 1.25 augustss #endif
2226 1.9 augustss if (err)
2227 1.11 augustss return (NULL);
2228 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2229 1.9 augustss offs = i * EHCI_SQH_SIZE;
2230 1.30 augustss sqh = KERNADDR(&dma, offs);
2231 1.31 augustss sqh->physaddr = DMAADDR(&dma, offs);
2232 1.9 augustss sqh->next = sc->sc_freeqhs;
2233 1.9 augustss sc->sc_freeqhs = sqh;
2234 1.9 augustss }
2235 1.9 augustss }
2236 1.9 augustss sqh = sc->sc_freeqhs;
2237 1.9 augustss sc->sc_freeqhs = sqh->next;
2238 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2239 1.11 augustss sqh->next = NULL;
2240 1.9 augustss return (sqh);
2241 1.9 augustss }
2242 1.9 augustss
2243 1.9 augustss void
2244 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2245 1.9 augustss {
2246 1.9 augustss sqh->next = sc->sc_freeqhs;
2247 1.9 augustss sc->sc_freeqhs = sqh;
2248 1.9 augustss }
2249 1.9 augustss
2250 1.9 augustss ehci_soft_qtd_t *
2251 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
2252 1.9 augustss {
2253 1.9 augustss ehci_soft_qtd_t *sqtd;
2254 1.9 augustss usbd_status err;
2255 1.9 augustss int i, offs;
2256 1.9 augustss usb_dma_t dma;
2257 1.9 augustss int s;
2258 1.9 augustss
2259 1.9 augustss if (sc->sc_freeqtds == NULL) {
2260 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2261 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2262 1.9 augustss EHCI_PAGE_SIZE, &dma);
2263 1.25 augustss #ifdef EHCI_DEBUG
2264 1.25 augustss if (err)
2265 1.25 augustss printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2266 1.25 augustss #endif
2267 1.9 augustss if (err)
2268 1.9 augustss return (NULL);
2269 1.9 augustss s = splusb();
2270 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2271 1.9 augustss offs = i * EHCI_SQTD_SIZE;
2272 1.30 augustss sqtd = KERNADDR(&dma, offs);
2273 1.31 augustss sqtd->physaddr = DMAADDR(&dma, offs);
2274 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
2275 1.9 augustss sc->sc_freeqtds = sqtd;
2276 1.9 augustss }
2277 1.9 augustss splx(s);
2278 1.9 augustss }
2279 1.9 augustss
2280 1.9 augustss s = splusb();
2281 1.9 augustss sqtd = sc->sc_freeqtds;
2282 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
2283 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2284 1.9 augustss sqtd->nextqtd = NULL;
2285 1.9 augustss sqtd->xfer = NULL;
2286 1.9 augustss splx(s);
2287 1.9 augustss
2288 1.9 augustss return (sqtd);
2289 1.9 augustss }
2290 1.9 augustss
2291 1.9 augustss void
2292 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2293 1.9 augustss {
2294 1.9 augustss int s;
2295 1.9 augustss
2296 1.9 augustss s = splusb();
2297 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
2298 1.9 augustss sc->sc_freeqtds = sqtd;
2299 1.9 augustss splx(s);
2300 1.9 augustss }
2301 1.9 augustss
2302 1.15 augustss usbd_status
2303 1.25 augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2304 1.15 augustss int alen, int rd, usbd_xfer_handle xfer,
2305 1.15 augustss ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2306 1.15 augustss {
2307 1.15 augustss ehci_soft_qtd_t *next, *cur;
2308 1.22 augustss ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2309 1.15 augustss u_int32_t qtdstatus;
2310 1.55 mycroft int len, curlen, mps;
2311 1.55 mycroft int i, tog;
2312 1.15 augustss usb_dma_t *dma = &xfer->dmabuf;
2313 1.102 augustss u_int16_t flags = xfer->flags;
2314 1.15 augustss
2315 1.25 augustss DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2316 1.15 augustss
2317 1.15 augustss len = alen;
2318 1.31 augustss dataphys = DMAADDR(dma, 0);
2319 1.22 augustss dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
2320 1.67 mycroft qtdstatus = EHCI_QTD_ACTIVE |
2321 1.15 augustss EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2322 1.15 augustss EHCI_QTD_SET_CERR(3)
2323 1.15 augustss /* IOC set below */
2324 1.15 augustss /* BYTES set below */
2325 1.67 mycroft ;
2326 1.55 mycroft mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2327 1.55 mycroft tog = epipe->nexttoggle;
2328 1.64 mycroft qtdstatus |= EHCI_QTD_SET_TOGGLE(tog);
2329 1.15 augustss
2330 1.15 augustss cur = ehci_alloc_sqtd(sc);
2331 1.25 augustss *sp = cur;
2332 1.15 augustss if (cur == NULL)
2333 1.15 augustss goto nomem;
2334 1.15 augustss for (;;) {
2335 1.22 augustss dataphyspage = EHCI_PAGE(dataphys);
2336 1.26 augustss /* The EHCI hardware can handle at most 5 pages. */
2337 1.33 augustss if (dataphyslastpage - dataphyspage <
2338 1.26 augustss EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
2339 1.15 augustss /* we can handle it in this QTD */
2340 1.15 augustss curlen = len;
2341 1.15 augustss } else {
2342 1.15 augustss /* must use multiple TDs, fill as much as possible. */
2343 1.33 augustss curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
2344 1.22 augustss EHCI_PAGE_OFFSET(dataphys);
2345 1.25 augustss #ifdef DIAGNOSTIC
2346 1.25 augustss if (curlen > len) {
2347 1.26 augustss printf("ehci_alloc_sqtd_chain: curlen=0x%x "
2348 1.26 augustss "len=0x%x offs=0x%x\n", curlen, len,
2349 1.26 augustss EHCI_PAGE_OFFSET(dataphys));
2350 1.26 augustss printf("lastpage=0x%x page=0x%x phys=0x%x\n",
2351 1.26 augustss dataphyslastpage, dataphyspage,
2352 1.26 augustss dataphys);
2353 1.25 augustss curlen = len;
2354 1.25 augustss }
2355 1.25 augustss #endif
2356 1.15 augustss /* the length must be a multiple of the max size */
2357 1.55 mycroft curlen -= curlen % mps;
2358 1.25 augustss DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2359 1.25 augustss "curlen=%d\n", curlen));
2360 1.15 augustss #ifdef DIAGNOSTIC
2361 1.15 augustss if (curlen == 0)
2362 1.103 augustss panic("ehci_alloc_sqtd_chain: curlen == 0");
2363 1.15 augustss #endif
2364 1.15 augustss }
2365 1.25 augustss DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2366 1.22 augustss "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2367 1.22 augustss dataphys, dataphyslastpage,
2368 1.15 augustss len, curlen));
2369 1.15 augustss len -= curlen;
2370 1.15 augustss
2371 1.102 augustss /*
2372 1.110 blymn * Allocate another transfer if there's more data left,
2373 1.110 blymn * or if force last short transfer flag is set and we're
2374 1.102 augustss * allocating a multiple of the max packet size.
2375 1.102 augustss */
2376 1.102 augustss if (len != 0 ||
2377 1.102 augustss ((curlen % mps) == 0 && !rd && curlen != 0 &&
2378 1.102 augustss (flags & USBD_FORCE_SHORT_XFER))) {
2379 1.15 augustss next = ehci_alloc_sqtd(sc);
2380 1.15 augustss if (next == NULL)
2381 1.15 augustss goto nomem;
2382 1.66 mycroft nextphys = htole32(next->physaddr);
2383 1.15 augustss } else {
2384 1.15 augustss next = NULL;
2385 1.15 augustss nextphys = EHCI_NULL;
2386 1.15 augustss }
2387 1.15 augustss
2388 1.110 blymn for (i = 0; i * EHCI_PAGE_SIZE <
2389 1.103 augustss curlen + EHCI_PAGE_OFFSET(dataphys); i++) {
2390 1.15 augustss ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2391 1.15 augustss if (i != 0) /* use offset only in first buffer */
2392 1.15 augustss a = EHCI_PAGE(a);
2393 1.15 augustss cur->qtd.qtd_buffer[i] = htole32(a);
2394 1.48 mycroft cur->qtd.qtd_buffer_hi[i] = 0;
2395 1.25 augustss #ifdef DIAGNOSTIC
2396 1.25 augustss if (i >= EHCI_QTD_NBUFFERS) {
2397 1.25 augustss printf("ehci_alloc_sqtd_chain: i=%d\n", i);
2398 1.25 augustss goto nomem;
2399 1.25 augustss }
2400 1.25 augustss #endif
2401 1.15 augustss }
2402 1.15 augustss cur->nextqtd = next;
2403 1.66 mycroft cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
2404 1.15 augustss cur->qtd.qtd_status =
2405 1.67 mycroft htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2406 1.15 augustss cur->xfer = xfer;
2407 1.18 augustss cur->len = curlen;
2408 1.29 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2409 1.29 augustss dataphys, dataphys + curlen));
2410 1.55 mycroft /* adjust the toggle based on the number of packets in this
2411 1.55 mycroft qtd */
2412 1.55 mycroft if (((curlen + mps - 1) / mps) & 1) {
2413 1.55 mycroft tog ^= 1;
2414 1.64 mycroft qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2415 1.55 mycroft }
2416 1.102 augustss if (next == NULL)
2417 1.15 augustss break;
2418 1.25 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2419 1.15 augustss dataphys += curlen;
2420 1.15 augustss cur = next;
2421 1.15 augustss }
2422 1.15 augustss cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2423 1.15 augustss *ep = cur;
2424 1.55 mycroft epipe->nexttoggle = tog;
2425 1.15 augustss
2426 1.29 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2427 1.29 augustss *sp, *ep));
2428 1.29 augustss
2429 1.15 augustss return (USBD_NORMAL_COMPLETION);
2430 1.15 augustss
2431 1.15 augustss nomem:
2432 1.15 augustss /* XXX free chain */
2433 1.25 augustss DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2434 1.15 augustss return (USBD_NOMEM);
2435 1.15 augustss }
2436 1.15 augustss
2437 1.18 augustss Static void
2438 1.25 augustss ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2439 1.18 augustss ehci_soft_qtd_t *sqtdend)
2440 1.18 augustss {
2441 1.18 augustss ehci_soft_qtd_t *p;
2442 1.25 augustss int i;
2443 1.18 augustss
2444 1.29 augustss DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2445 1.29 augustss sqtd, sqtdend));
2446 1.29 augustss
2447 1.25 augustss for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2448 1.18 augustss p = sqtd->nextqtd;
2449 1.18 augustss ehci_free_sqtd(sc, sqtd);
2450 1.18 augustss }
2451 1.18 augustss }
2452 1.18 augustss
2453 1.15 augustss /****************/
2454 1.15 augustss
2455 1.9 augustss /*
2456 1.10 augustss * Close a reqular pipe.
2457 1.10 augustss * Assumes that there are no pending transactions.
2458 1.10 augustss */
2459 1.10 augustss void
2460 1.10 augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2461 1.10 augustss {
2462 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2463 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2464 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2465 1.10 augustss int s;
2466 1.10 augustss
2467 1.10 augustss s = splusb();
2468 1.10 augustss ehci_rem_qh(sc, sqh, head);
2469 1.10 augustss splx(s);
2470 1.10 augustss ehci_free_sqh(sc, epipe->sqh);
2471 1.10 augustss }
2472 1.10 augustss
2473 1.33 augustss /*
2474 1.10 augustss * Abort a device request.
2475 1.10 augustss * If this routine is called at splusb() it guarantees that the request
2476 1.10 augustss * will be removed from the hardware scheduling and that the callback
2477 1.10 augustss * for it will be called with USBD_CANCELLED status.
2478 1.10 augustss * It's impossible to guarantee that the requested transfer will not
2479 1.10 augustss * have happened since the hardware runs concurrently.
2480 1.10 augustss * If the transaction has already happened we rely on the ordinary
2481 1.10 augustss * interrupt processing to process it.
2482 1.26 augustss * XXX This is most probably wrong.
2483 1.10 augustss */
2484 1.10 augustss void
2485 1.10 augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2486 1.10 augustss {
2487 1.26 augustss #define exfer EXFER(xfer)
2488 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2489 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2490 1.26 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2491 1.26 augustss ehci_soft_qtd_t *sqtd;
2492 1.26 augustss ehci_physaddr_t cur;
2493 1.26 augustss u_int32_t qhstatus;
2494 1.11 augustss int s;
2495 1.26 augustss int hit;
2496 1.96 augustss int wake;
2497 1.10 augustss
2498 1.24 augustss DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2499 1.10 augustss
2500 1.17 augustss if (sc->sc_dying) {
2501 1.17 augustss /* If we're dying, just do the software part. */
2502 1.17 augustss s = splusb();
2503 1.17 augustss xfer->status = status; /* make software ignore it */
2504 1.17 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2505 1.17 augustss usb_transfer_complete(xfer);
2506 1.17 augustss splx(s);
2507 1.17 augustss return;
2508 1.17 augustss }
2509 1.17 augustss
2510 1.10 augustss if (xfer->device->bus->intr_context || !curproc)
2511 1.37 provos panic("ehci_abort_xfer: not in process context");
2512 1.10 augustss
2513 1.11 augustss /*
2514 1.96 augustss * If an abort is already in progress then just wait for it to
2515 1.96 augustss * complete and return.
2516 1.96 augustss */
2517 1.96 augustss if (xfer->hcflags & UXFER_ABORTING) {
2518 1.96 augustss DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2519 1.96 augustss #ifdef DIAGNOSTIC
2520 1.96 augustss if (status == USBD_TIMEOUT)
2521 1.96 augustss printf("ehci_abort_xfer: TIMEOUT while aborting\n");
2522 1.96 augustss #endif
2523 1.96 augustss /* Override the status which might be USBD_TIMEOUT. */
2524 1.96 augustss xfer->status = status;
2525 1.96 augustss DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2526 1.96 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2527 1.96 augustss while (xfer->hcflags & UXFER_ABORTING)
2528 1.96 augustss tsleep(&xfer->hcflags, PZERO, "ehciaw", 0);
2529 1.96 augustss return;
2530 1.96 augustss }
2531 1.96 augustss xfer->hcflags |= UXFER_ABORTING;
2532 1.96 augustss
2533 1.96 augustss /*
2534 1.11 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2535 1.11 augustss */
2536 1.11 augustss s = splusb();
2537 1.11 augustss xfer->status = status; /* make software ignore it */
2538 1.15 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2539 1.26 augustss qhstatus = sqh->qh.qh_qtd.qtd_status;
2540 1.26 augustss sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
2541 1.26 augustss for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2542 1.26 augustss sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
2543 1.26 augustss if (sqtd == exfer->sqtdend)
2544 1.26 augustss break;
2545 1.26 augustss }
2546 1.11 augustss splx(s);
2547 1.11 augustss
2548 1.33 augustss /*
2549 1.11 augustss * Step 2: Wait until we know hardware has finished any possible
2550 1.11 augustss * use of the xfer. Also make sure the soft interrupt routine
2551 1.11 augustss * has run.
2552 1.11 augustss */
2553 1.26 augustss ehci_sync_hc(sc);
2554 1.29 augustss s = splusb();
2555 1.77 augustss #ifdef USB_USE_SOFTINTR
2556 1.29 augustss sc->sc_softwake = 1;
2557 1.77 augustss #endif /* USB_USE_SOFTINTR */
2558 1.29 augustss usb_schedsoftintr(&sc->sc_bus);
2559 1.77 augustss #ifdef USB_USE_SOFTINTR
2560 1.29 augustss tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
2561 1.77 augustss #endif /* USB_USE_SOFTINTR */
2562 1.29 augustss splx(s);
2563 1.33 augustss
2564 1.33 augustss /*
2565 1.11 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2566 1.11 augustss * The complication here is that the hardware may have executed
2567 1.11 augustss * beyond the xfer we're trying to abort. So as we're scanning
2568 1.11 augustss * the TDs of this xfer we check if the hardware points to
2569 1.11 augustss * any of them.
2570 1.11 augustss */
2571 1.11 augustss s = splusb(); /* XXX why? */
2572 1.26 augustss cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2573 1.26 augustss hit = 0;
2574 1.26 augustss for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2575 1.26 augustss hit |= cur == sqtd->physaddr;
2576 1.26 augustss if (sqtd == exfer->sqtdend)
2577 1.26 augustss break;
2578 1.26 augustss }
2579 1.26 augustss sqtd = sqtd->nextqtd;
2580 1.26 augustss /* Zap curqtd register if hardware pointed inside the xfer. */
2581 1.26 augustss if (hit && sqtd != NULL) {
2582 1.26 augustss DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
2583 1.26 augustss sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
2584 1.26 augustss sqh->qh.qh_qtd.qtd_status = qhstatus;
2585 1.26 augustss } else {
2586 1.26 augustss DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2587 1.26 augustss }
2588 1.11 augustss
2589 1.11 augustss /*
2590 1.26 augustss * Step 4: Execute callback.
2591 1.11 augustss */
2592 1.18 augustss #ifdef DIAGNOSTIC
2593 1.26 augustss exfer->isdone = 1;
2594 1.18 augustss #endif
2595 1.96 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2596 1.96 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2597 1.11 augustss usb_transfer_complete(xfer);
2598 1.96 augustss if (wake)
2599 1.96 augustss wakeup(&xfer->hcflags);
2600 1.11 augustss
2601 1.11 augustss splx(s);
2602 1.26 augustss #undef exfer
2603 1.10 augustss }
2604 1.10 augustss
2605 1.15 augustss void
2606 1.15 augustss ehci_timeout(void *addr)
2607 1.15 augustss {
2608 1.15 augustss struct ehci_xfer *exfer = addr;
2609 1.17 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2610 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2611 1.15 augustss
2612 1.15 augustss DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2613 1.22 augustss #ifdef USB_DEBUG
2614 1.26 augustss if (ehcidebug > 1)
2615 1.22 augustss usbd_dump_pipe(exfer->xfer.pipe);
2616 1.22 augustss #endif
2617 1.15 augustss
2618 1.17 augustss if (sc->sc_dying) {
2619 1.17 augustss ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2620 1.17 augustss return;
2621 1.17 augustss }
2622 1.17 augustss
2623 1.15 augustss /* Execute the abort in a process context. */
2624 1.15 augustss usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2625 1.114 joerg usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2626 1.114 joerg USB_TASKQ_HC);
2627 1.15 augustss }
2628 1.15 augustss
2629 1.15 augustss void
2630 1.15 augustss ehci_timeout_task(void *addr)
2631 1.15 augustss {
2632 1.15 augustss usbd_xfer_handle xfer = addr;
2633 1.15 augustss int s;
2634 1.15 augustss
2635 1.15 augustss DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2636 1.15 augustss
2637 1.15 augustss s = splusb();
2638 1.15 augustss ehci_abort_xfer(xfer, USBD_TIMEOUT);
2639 1.15 augustss splx(s);
2640 1.15 augustss }
2641 1.15 augustss
2642 1.5 augustss /************************/
2643 1.5 augustss
2644 1.10 augustss Static usbd_status
2645 1.10 augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2646 1.10 augustss {
2647 1.10 augustss usbd_status err;
2648 1.10 augustss
2649 1.10 augustss /* Insert last in queue. */
2650 1.10 augustss err = usb_insert_transfer(xfer);
2651 1.10 augustss if (err)
2652 1.10 augustss return (err);
2653 1.10 augustss
2654 1.10 augustss /* Pipe isn't running, start first */
2655 1.10 augustss return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2656 1.10 augustss }
2657 1.10 augustss
2658 1.12 augustss Static usbd_status
2659 1.12 augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
2660 1.12 augustss {
2661 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2662 1.15 augustss usbd_status err;
2663 1.15 augustss
2664 1.15 augustss if (sc->sc_dying)
2665 1.15 augustss return (USBD_IOERROR);
2666 1.15 augustss
2667 1.15 augustss #ifdef DIAGNOSTIC
2668 1.15 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2669 1.15 augustss /* XXX panic */
2670 1.15 augustss printf("ehci_device_ctrl_transfer: not a request\n");
2671 1.15 augustss return (USBD_INVAL);
2672 1.15 augustss }
2673 1.15 augustss #endif
2674 1.15 augustss
2675 1.15 augustss err = ehci_device_request(xfer);
2676 1.15 augustss if (err)
2677 1.15 augustss return (err);
2678 1.15 augustss
2679 1.15 augustss if (sc->sc_bus.use_polling)
2680 1.15 augustss ehci_waitintr(sc, xfer);
2681 1.15 augustss return (USBD_IN_PROGRESS);
2682 1.12 augustss }
2683 1.10 augustss
2684 1.10 augustss void
2685 1.10 augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
2686 1.10 augustss {
2687 1.18 augustss struct ehci_xfer *ex = EXFER(xfer);
2688 1.18 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2689 1.25 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2690 1.18 augustss
2691 1.10 augustss DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2692 1.10 augustss
2693 1.10 augustss #ifdef DIAGNOSTIC
2694 1.10 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2695 1.37 provos panic("ehci_ctrl_done: not a request");
2696 1.10 augustss }
2697 1.10 augustss #endif
2698 1.18 augustss
2699 1.44 augustss if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2700 1.25 augustss ehci_del_intr_list(ex); /* remove from active list */
2701 1.25 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2702 1.25 augustss }
2703 1.18 augustss
2704 1.25 augustss DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2705 1.10 augustss }
2706 1.10 augustss
2707 1.10 augustss /* Abort a device control request. */
2708 1.10 augustss Static void
2709 1.10 augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2710 1.10 augustss {
2711 1.10 augustss DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2712 1.10 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
2713 1.10 augustss }
2714 1.10 augustss
2715 1.10 augustss /* Close a device control pipe. */
2716 1.10 augustss Static void
2717 1.10 augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
2718 1.10 augustss {
2719 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2720 1.10 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2721 1.10 augustss
2722 1.10 augustss DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2723 1.11 augustss ehci_close_pipe(pipe, sc->sc_async_head);
2724 1.15 augustss }
2725 1.15 augustss
2726 1.15 augustss usbd_status
2727 1.15 augustss ehci_device_request(usbd_xfer_handle xfer)
2728 1.15 augustss {
2729 1.18 augustss #define exfer EXFER(xfer)
2730 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2731 1.15 augustss usb_device_request_t *req = &xfer->request;
2732 1.15 augustss usbd_device_handle dev = epipe->pipe.device;
2733 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2734 1.15 augustss int addr = dev->address;
2735 1.15 augustss ehci_soft_qtd_t *setup, *stat, *next;
2736 1.15 augustss ehci_soft_qh_t *sqh;
2737 1.15 augustss int isread;
2738 1.15 augustss int len;
2739 1.15 augustss usbd_status err;
2740 1.15 augustss int s;
2741 1.15 augustss
2742 1.15 augustss isread = req->bmRequestType & UT_READ;
2743 1.15 augustss len = UGETW(req->wLength);
2744 1.15 augustss
2745 1.72 augustss DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2746 1.15 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2747 1.15 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2748 1.33 augustss UGETW(req->wIndex), len, addr,
2749 1.15 augustss epipe->pipe.endpoint->edesc->bEndpointAddress));
2750 1.15 augustss
2751 1.15 augustss setup = ehci_alloc_sqtd(sc);
2752 1.15 augustss if (setup == NULL) {
2753 1.15 augustss err = USBD_NOMEM;
2754 1.15 augustss goto bad1;
2755 1.15 augustss }
2756 1.15 augustss stat = ehci_alloc_sqtd(sc);
2757 1.15 augustss if (stat == NULL) {
2758 1.15 augustss err = USBD_NOMEM;
2759 1.15 augustss goto bad2;
2760 1.15 augustss }
2761 1.15 augustss
2762 1.15 augustss sqh = epipe->sqh;
2763 1.15 augustss epipe->u.ctl.length = len;
2764 1.15 augustss
2765 1.62 mycroft /* Update device address and length since they may have changed
2766 1.62 mycroft during the setup of the control pipe in usbd_new_device(). */
2767 1.15 augustss /* XXX This only needs to be done once, but it's too early in open. */
2768 1.15 augustss /* XXXX Should not touch ED here! */
2769 1.33 augustss sqh->qh.qh_endp =
2770 1.55 mycroft (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
2771 1.15 augustss htole32(
2772 1.15 augustss EHCI_QH_SET_ADDR(addr) |
2773 1.15 augustss EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2774 1.15 augustss );
2775 1.15 augustss
2776 1.15 augustss /* Set up data transaction */
2777 1.15 augustss if (len != 0) {
2778 1.15 augustss ehci_soft_qtd_t *end;
2779 1.15 augustss
2780 1.55 mycroft /* Start toggle at 1. */
2781 1.55 mycroft epipe->nexttoggle = 1;
2782 1.25 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2783 1.15 augustss &next, &end);
2784 1.15 augustss if (err)
2785 1.15 augustss goto bad3;
2786 1.83 augustss end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
2787 1.15 augustss end->nextqtd = stat;
2788 1.33 augustss end->qtd.qtd_next =
2789 1.15 augustss end->qtd.qtd_altnext = htole32(stat->physaddr);
2790 1.15 augustss } else {
2791 1.15 augustss next = stat;
2792 1.15 augustss }
2793 1.15 augustss
2794 1.30 augustss memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2795 1.15 augustss
2796 1.55 mycroft /* Clear toggle */
2797 1.15 augustss setup->qtd.qtd_status = htole32(
2798 1.26 augustss EHCI_QTD_ACTIVE |
2799 1.15 augustss EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2800 1.15 augustss EHCI_QTD_SET_CERR(3) |
2801 1.64 mycroft EHCI_QTD_SET_TOGGLE(0) |
2802 1.15 augustss EHCI_QTD_SET_BYTES(sizeof *req)
2803 1.15 augustss );
2804 1.31 augustss setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2805 1.48 mycroft setup->qtd.qtd_buffer_hi[0] = 0;
2806 1.15 augustss setup->nextqtd = next;
2807 1.15 augustss setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2808 1.15 augustss setup->xfer = xfer;
2809 1.18 augustss setup->len = sizeof *req;
2810 1.15 augustss
2811 1.15 augustss stat->qtd.qtd_status = htole32(
2812 1.26 augustss EHCI_QTD_ACTIVE |
2813 1.15 augustss EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2814 1.15 augustss EHCI_QTD_SET_CERR(3) |
2815 1.64 mycroft EHCI_QTD_SET_TOGGLE(1) |
2816 1.15 augustss EHCI_QTD_IOC
2817 1.15 augustss );
2818 1.15 augustss stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2819 1.48 mycroft stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2820 1.15 augustss stat->nextqtd = NULL;
2821 1.15 augustss stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2822 1.15 augustss stat->xfer = xfer;
2823 1.18 augustss stat->len = 0;
2824 1.15 augustss
2825 1.15 augustss #ifdef EHCI_DEBUG
2826 1.23 augustss if (ehcidebug > 5) {
2827 1.15 augustss DPRINTF(("ehci_device_request:\n"));
2828 1.15 augustss ehci_dump_sqh(sqh);
2829 1.15 augustss ehci_dump_sqtds(setup);
2830 1.15 augustss }
2831 1.15 augustss #endif
2832 1.15 augustss
2833 1.18 augustss exfer->sqtdstart = setup;
2834 1.18 augustss exfer->sqtdend = stat;
2835 1.18 augustss #ifdef DIAGNOSTIC
2836 1.18 augustss if (!exfer->isdone) {
2837 1.18 augustss printf("ehci_device_request: not done, exfer=%p\n", exfer);
2838 1.18 augustss }
2839 1.18 augustss exfer->isdone = 0;
2840 1.18 augustss #endif
2841 1.18 augustss
2842 1.15 augustss /* Insert qTD in QH list. */
2843 1.15 augustss s = splusb();
2844 1.23 augustss ehci_set_qh_qtd(sqh, setup);
2845 1.15 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2846 1.45 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2847 1.15 augustss ehci_timeout, xfer);
2848 1.15 augustss }
2849 1.18 augustss ehci_add_intr_list(sc, exfer);
2850 1.18 augustss xfer->status = USBD_IN_PROGRESS;
2851 1.15 augustss splx(s);
2852 1.15 augustss
2853 1.17 augustss #ifdef EHCI_DEBUG
2854 1.15 augustss if (ehcidebug > 10) {
2855 1.15 augustss DPRINTF(("ehci_device_request: status=%x\n",
2856 1.15 augustss EOREAD4(sc, EHCI_USBSTS)));
2857 1.23 augustss delay(10000);
2858 1.18 augustss ehci_dump_regs(sc);
2859 1.15 augustss ehci_dump_sqh(sc->sc_async_head);
2860 1.15 augustss ehci_dump_sqh(sqh);
2861 1.15 augustss ehci_dump_sqtds(setup);
2862 1.15 augustss }
2863 1.15 augustss #endif
2864 1.15 augustss
2865 1.15 augustss return (USBD_NORMAL_COMPLETION);
2866 1.15 augustss
2867 1.15 augustss bad3:
2868 1.15 augustss ehci_free_sqtd(sc, stat);
2869 1.15 augustss bad2:
2870 1.15 augustss ehci_free_sqtd(sc, setup);
2871 1.15 augustss bad1:
2872 1.25 augustss DPRINTFN(-1,("ehci_device_request: no memory\n"));
2873 1.25 augustss xfer->status = err;
2874 1.25 augustss usb_transfer_complete(xfer);
2875 1.15 augustss return (err);
2876 1.18 augustss #undef exfer
2877 1.10 augustss }
2878 1.10 augustss
2879 1.108 xtraeme /*
2880 1.108 xtraeme * Some EHCI chips from VIA seem to trigger interrupts before writing back the
2881 1.108 xtraeme * qTD status, or miss signalling occasionally under heavy load. If the host
2882 1.108 xtraeme * machine is too fast, we we can miss transaction completion - when we scan
2883 1.108 xtraeme * the active list the transaction still seems to be active. This generally
2884 1.108 xtraeme * exhibits itself as a umass stall that never recovers.
2885 1.108 xtraeme *
2886 1.108 xtraeme * We work around this behaviour by setting up this callback after any softintr
2887 1.108 xtraeme * that completes with transactions still pending, giving us another chance to
2888 1.108 xtraeme * check for completion after the writeback has taken place.
2889 1.108 xtraeme */
2890 1.108 xtraeme void
2891 1.108 xtraeme ehci_intrlist_timeout(void *arg)
2892 1.108 xtraeme {
2893 1.108 xtraeme ehci_softc_t *sc = arg;
2894 1.108 xtraeme int s = splusb();
2895 1.108 xtraeme
2896 1.108 xtraeme DPRINTF(("ehci_intrlist_timeout\n"));
2897 1.108 xtraeme usb_schedsoftintr(&sc->sc_bus);
2898 1.108 xtraeme
2899 1.108 xtraeme splx(s);
2900 1.108 xtraeme }
2901 1.108 xtraeme
2902 1.10 augustss /************************/
2903 1.5 augustss
2904 1.19 augustss Static usbd_status
2905 1.19 augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2906 1.19 augustss {
2907 1.19 augustss usbd_status err;
2908 1.19 augustss
2909 1.19 augustss /* Insert last in queue. */
2910 1.19 augustss err = usb_insert_transfer(xfer);
2911 1.19 augustss if (err)
2912 1.19 augustss return (err);
2913 1.19 augustss
2914 1.19 augustss /* Pipe isn't running, start first */
2915 1.19 augustss return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2916 1.19 augustss }
2917 1.19 augustss
2918 1.19 augustss usbd_status
2919 1.19 augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
2920 1.19 augustss {
2921 1.19 augustss #define exfer EXFER(xfer)
2922 1.19 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2923 1.19 augustss usbd_device_handle dev = epipe->pipe.device;
2924 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2925 1.19 augustss ehci_soft_qtd_t *data, *dataend;
2926 1.19 augustss ehci_soft_qh_t *sqh;
2927 1.19 augustss usbd_status err;
2928 1.19 augustss int len, isread, endpt;
2929 1.19 augustss int s;
2930 1.19 augustss
2931 1.72 augustss DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
2932 1.19 augustss xfer, xfer->length, xfer->flags));
2933 1.19 augustss
2934 1.19 augustss if (sc->sc_dying)
2935 1.19 augustss return (USBD_IOERROR);
2936 1.19 augustss
2937 1.19 augustss #ifdef DIAGNOSTIC
2938 1.19 augustss if (xfer->rqflags & URQ_REQUEST)
2939 1.72 augustss panic("ehci_device_bulk_start: a request");
2940 1.19 augustss #endif
2941 1.19 augustss
2942 1.19 augustss len = xfer->length;
2943 1.19 augustss endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2944 1.19 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2945 1.19 augustss sqh = epipe->sqh;
2946 1.19 augustss
2947 1.19 augustss epipe->u.bulk.length = len;
2948 1.19 augustss
2949 1.25 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2950 1.19 augustss &dataend);
2951 1.25 augustss if (err) {
2952 1.25 augustss DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
2953 1.25 augustss xfer->status = err;
2954 1.25 augustss usb_transfer_complete(xfer);
2955 1.19 augustss return (err);
2956 1.25 augustss }
2957 1.19 augustss
2958 1.19 augustss #ifdef EHCI_DEBUG
2959 1.23 augustss if (ehcidebug > 5) {
2960 1.72 augustss DPRINTF(("ehci_device_bulk_start: data(1)\n"));
2961 1.23 augustss ehci_dump_sqh(sqh);
2962 1.19 augustss ehci_dump_sqtds(data);
2963 1.19 augustss }
2964 1.19 augustss #endif
2965 1.19 augustss
2966 1.19 augustss /* Set up interrupt info. */
2967 1.19 augustss exfer->sqtdstart = data;
2968 1.19 augustss exfer->sqtdend = dataend;
2969 1.19 augustss #ifdef DIAGNOSTIC
2970 1.19 augustss if (!exfer->isdone) {
2971 1.72 augustss printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
2972 1.19 augustss }
2973 1.19 augustss exfer->isdone = 0;
2974 1.19 augustss #endif
2975 1.19 augustss
2976 1.19 augustss s = splusb();
2977 1.23 augustss ehci_set_qh_qtd(sqh, data);
2978 1.19 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2979 1.45 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2980 1.19 augustss ehci_timeout, xfer);
2981 1.19 augustss }
2982 1.19 augustss ehci_add_intr_list(sc, exfer);
2983 1.19 augustss xfer->status = USBD_IN_PROGRESS;
2984 1.19 augustss splx(s);
2985 1.19 augustss
2986 1.19 augustss #ifdef EHCI_DEBUG
2987 1.19 augustss if (ehcidebug > 10) {
2988 1.72 augustss DPRINTF(("ehci_device_bulk_start: data(2)\n"));
2989 1.23 augustss delay(10000);
2990 1.72 augustss DPRINTF(("ehci_device_bulk_start: data(3)\n"));
2991 1.23 augustss ehci_dump_regs(sc);
2992 1.29 augustss #if 0
2993 1.29 augustss printf("async_head:\n");
2994 1.23 augustss ehci_dump_sqh(sc->sc_async_head);
2995 1.29 augustss #endif
2996 1.29 augustss printf("sqh:\n");
2997 1.23 augustss ehci_dump_sqh(sqh);
2998 1.19 augustss ehci_dump_sqtds(data);
2999 1.19 augustss }
3000 1.19 augustss #endif
3001 1.19 augustss
3002 1.19 augustss if (sc->sc_bus.use_polling)
3003 1.19 augustss ehci_waitintr(sc, xfer);
3004 1.19 augustss
3005 1.19 augustss return (USBD_IN_PROGRESS);
3006 1.19 augustss #undef exfer
3007 1.19 augustss }
3008 1.19 augustss
3009 1.19 augustss Static void
3010 1.19 augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
3011 1.19 augustss {
3012 1.19 augustss DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
3013 1.19 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
3014 1.19 augustss }
3015 1.19 augustss
3016 1.33 augustss /*
3017 1.19 augustss * Close a device bulk pipe.
3018 1.19 augustss */
3019 1.19 augustss Static void
3020 1.19 augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
3021 1.19 augustss {
3022 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3023 1.19 augustss
3024 1.19 augustss DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
3025 1.19 augustss ehci_close_pipe(pipe, sc->sc_async_head);
3026 1.19 augustss }
3027 1.19 augustss
3028 1.19 augustss void
3029 1.19 augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
3030 1.19 augustss {
3031 1.19 augustss struct ehci_xfer *ex = EXFER(xfer);
3032 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3033 1.19 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
3034 1.19 augustss
3035 1.33 augustss DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
3036 1.19 augustss xfer, xfer->actlen));
3037 1.19 augustss
3038 1.44 augustss if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3039 1.25 augustss ehci_del_intr_list(ex); /* remove from active list */
3040 1.44 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3041 1.25 augustss }
3042 1.19 augustss
3043 1.19 augustss DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
3044 1.19 augustss }
3045 1.5 augustss
3046 1.10 augustss /************************/
3047 1.10 augustss
3048 1.78 augustss Static usbd_status
3049 1.78 augustss ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
3050 1.78 augustss {
3051 1.78 augustss struct ehci_soft_islot *isp;
3052 1.78 augustss int islot, lev;
3053 1.78 augustss
3054 1.78 augustss /* Find a poll rate that is large enough. */
3055 1.78 augustss for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
3056 1.78 augustss if (EHCI_ILEV_IVAL(lev) <= ival)
3057 1.78 augustss break;
3058 1.78 augustss
3059 1.78 augustss /* Pick an interrupt slot at the right level. */
3060 1.78 augustss /* XXX could do better than picking at random */
3061 1.78 augustss sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
3062 1.78 augustss islot = EHCI_IQHIDX(lev, sc->sc_rand);
3063 1.78 augustss
3064 1.78 augustss sqh->islot = islot;
3065 1.78 augustss isp = &sc->sc_islots[islot];
3066 1.78 augustss ehci_add_qh(sqh, isp->sqh);
3067 1.78 augustss
3068 1.78 augustss return (USBD_NORMAL_COMPLETION);
3069 1.78 augustss }
3070 1.78 augustss
3071 1.78 augustss Static usbd_status
3072 1.78 augustss ehci_device_intr_transfer(usbd_xfer_handle xfer)
3073 1.78 augustss {
3074 1.78 augustss usbd_status err;
3075 1.78 augustss
3076 1.78 augustss /* Insert last in queue. */
3077 1.78 augustss err = usb_insert_transfer(xfer);
3078 1.78 augustss if (err)
3079 1.78 augustss return (err);
3080 1.78 augustss
3081 1.78 augustss /*
3082 1.78 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
3083 1.78 augustss * so start it first.
3084 1.78 augustss */
3085 1.78 augustss return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3086 1.78 augustss }
3087 1.78 augustss
3088 1.78 augustss Static usbd_status
3089 1.78 augustss ehci_device_intr_start(usbd_xfer_handle xfer)
3090 1.78 augustss {
3091 1.78 augustss #define exfer EXFER(xfer)
3092 1.78 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3093 1.78 augustss usbd_device_handle dev = xfer->pipe->device;
3094 1.78 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
3095 1.78 augustss ehci_soft_qtd_t *data, *dataend;
3096 1.78 augustss ehci_soft_qh_t *sqh;
3097 1.78 augustss usbd_status err;
3098 1.78 augustss int len, isread, endpt;
3099 1.78 augustss int s;
3100 1.78 augustss
3101 1.78 augustss DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
3102 1.78 augustss xfer, xfer->length, xfer->flags));
3103 1.78 augustss
3104 1.78 augustss if (sc->sc_dying)
3105 1.78 augustss return (USBD_IOERROR);
3106 1.78 augustss
3107 1.78 augustss #ifdef DIAGNOSTIC
3108 1.78 augustss if (xfer->rqflags & URQ_REQUEST)
3109 1.78 augustss panic("ehci_device_intr_start: a request");
3110 1.78 augustss #endif
3111 1.78 augustss
3112 1.78 augustss len = xfer->length;
3113 1.78 augustss endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3114 1.78 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3115 1.78 augustss sqh = epipe->sqh;
3116 1.78 augustss
3117 1.78 augustss epipe->u.intr.length = len;
3118 1.78 augustss
3119 1.78 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
3120 1.78 augustss &dataend);
3121 1.78 augustss if (err) {
3122 1.78 augustss DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3123 1.78 augustss xfer->status = err;
3124 1.78 augustss usb_transfer_complete(xfer);
3125 1.78 augustss return (err);
3126 1.78 augustss }
3127 1.78 augustss
3128 1.78 augustss #ifdef EHCI_DEBUG
3129 1.78 augustss if (ehcidebug > 5) {
3130 1.78 augustss DPRINTF(("ehci_device_intr_start: data(1)\n"));
3131 1.78 augustss ehci_dump_sqh(sqh);
3132 1.78 augustss ehci_dump_sqtds(data);
3133 1.78 augustss }
3134 1.78 augustss #endif
3135 1.78 augustss
3136 1.78 augustss /* Set up interrupt info. */
3137 1.78 augustss exfer->sqtdstart = data;
3138 1.78 augustss exfer->sqtdend = dataend;
3139 1.78 augustss #ifdef DIAGNOSTIC
3140 1.78 augustss if (!exfer->isdone) {
3141 1.78 augustss printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3142 1.78 augustss }
3143 1.78 augustss exfer->isdone = 0;
3144 1.78 augustss #endif
3145 1.78 augustss
3146 1.78 augustss s = splusb();
3147 1.78 augustss ehci_set_qh_qtd(sqh, data);
3148 1.78 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3149 1.78 augustss usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
3150 1.78 augustss ehci_timeout, xfer);
3151 1.78 augustss }
3152 1.78 augustss ehci_add_intr_list(sc, exfer);
3153 1.78 augustss xfer->status = USBD_IN_PROGRESS;
3154 1.78 augustss splx(s);
3155 1.78 augustss
3156 1.78 augustss #ifdef EHCI_DEBUG
3157 1.78 augustss if (ehcidebug > 10) {
3158 1.78 augustss DPRINTF(("ehci_device_intr_start: data(2)\n"));
3159 1.78 augustss delay(10000);
3160 1.78 augustss DPRINTF(("ehci_device_intr_start: data(3)\n"));
3161 1.78 augustss ehci_dump_regs(sc);
3162 1.78 augustss printf("sqh:\n");
3163 1.78 augustss ehci_dump_sqh(sqh);
3164 1.78 augustss ehci_dump_sqtds(data);
3165 1.78 augustss }
3166 1.78 augustss #endif
3167 1.78 augustss
3168 1.78 augustss if (sc->sc_bus.use_polling)
3169 1.78 augustss ehci_waitintr(sc, xfer);
3170 1.78 augustss
3171 1.78 augustss return (USBD_IN_PROGRESS);
3172 1.78 augustss #undef exfer
3173 1.78 augustss }
3174 1.78 augustss
3175 1.78 augustss Static void
3176 1.78 augustss ehci_device_intr_abort(usbd_xfer_handle xfer)
3177 1.78 augustss {
3178 1.78 augustss DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3179 1.78 augustss if (xfer->pipe->intrxfer == xfer) {
3180 1.78 augustss DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
3181 1.78 augustss xfer->pipe->intrxfer = NULL;
3182 1.78 augustss }
3183 1.78 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
3184 1.78 augustss }
3185 1.78 augustss
3186 1.78 augustss Static void
3187 1.78 augustss ehci_device_intr_close(usbd_pipe_handle pipe)
3188 1.78 augustss {
3189 1.78 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3190 1.78 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3191 1.78 augustss struct ehci_soft_islot *isp;
3192 1.78 augustss
3193 1.78 augustss isp = &sc->sc_islots[epipe->sqh->islot];
3194 1.78 augustss ehci_close_pipe(pipe, isp->sqh);
3195 1.78 augustss }
3196 1.78 augustss
3197 1.78 augustss Static void
3198 1.78 augustss ehci_device_intr_done(usbd_xfer_handle xfer)
3199 1.78 augustss {
3200 1.78 augustss #define exfer EXFER(xfer)
3201 1.78 augustss struct ehci_xfer *ex = EXFER(xfer);
3202 1.78 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3203 1.78 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3204 1.78 augustss ehci_soft_qtd_t *data, *dataend;
3205 1.78 augustss ehci_soft_qh_t *sqh;
3206 1.78 augustss usbd_status err;
3207 1.78 augustss int len, isread, endpt, s;
3208 1.78 augustss
3209 1.78 augustss DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3210 1.78 augustss xfer, xfer->actlen));
3211 1.78 augustss
3212 1.78 augustss if (xfer->pipe->repeat) {
3213 1.78 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3214 1.78 augustss
3215 1.78 augustss len = epipe->u.intr.length;
3216 1.78 augustss xfer->length = len;
3217 1.78 augustss endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3218 1.78 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3219 1.78 augustss sqh = epipe->sqh;
3220 1.78 augustss
3221 1.78 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3222 1.78 augustss &data, &dataend);
3223 1.78 augustss if (err) {
3224 1.78 augustss DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3225 1.78 augustss xfer->status = err;
3226 1.78 augustss return;
3227 1.78 augustss }
3228 1.78 augustss
3229 1.78 augustss /* Set up interrupt info. */
3230 1.78 augustss exfer->sqtdstart = data;
3231 1.78 augustss exfer->sqtdend = dataend;
3232 1.78 augustss #ifdef DIAGNOSTIC
3233 1.78 augustss if (!exfer->isdone) {
3234 1.78 augustss printf("ehci_device_intr_done: not done, ex=%p\n",
3235 1.78 augustss exfer);
3236 1.78 augustss }
3237 1.78 augustss exfer->isdone = 0;
3238 1.78 augustss #endif
3239 1.78 augustss
3240 1.78 augustss s = splusb();
3241 1.78 augustss ehci_set_qh_qtd(sqh, data);
3242 1.78 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3243 1.78 augustss usb_callout(xfer->timeout_handle,
3244 1.78 augustss mstohz(xfer->timeout), ehci_timeout, xfer);
3245 1.78 augustss }
3246 1.78 augustss splx(s);
3247 1.78 augustss
3248 1.78 augustss xfer->status = USBD_IN_PROGRESS;
3249 1.78 augustss } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3250 1.78 augustss ehci_del_intr_list(ex); /* remove from active list */
3251 1.78 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3252 1.78 augustss }
3253 1.78 augustss #undef exfer
3254 1.78 augustss }
3255 1.10 augustss
3256 1.10 augustss /************************/
3257 1.5 augustss
3258 1.113 christos Static usbd_status
3259 1.115 christos ehci_device_isoc_transfer(usbd_xfer_handle xfer)
3260 1.113 christos {
3261 1.113 christos return USBD_IOERROR;
3262 1.113 christos }
3263 1.113 christos Static usbd_status
3264 1.115 christos ehci_device_isoc_start(usbd_xfer_handle xfer)
3265 1.113 christos {
3266 1.113 christos return USBD_IOERROR;
3267 1.113 christos }
3268 1.113 christos Static void
3269 1.115 christos ehci_device_isoc_abort(usbd_xfer_handle xfer)
3270 1.113 christos {
3271 1.113 christos }
3272 1.113 christos Static void
3273 1.115 christos ehci_device_isoc_close(usbd_pipe_handle pipe)
3274 1.113 christos {
3275 1.113 christos }
3276 1.113 christos Static void
3277 1.115 christos ehci_device_isoc_done(usbd_xfer_handle xfer)
3278 1.113 christos {
3279 1.113 christos }
3280