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ehci.c revision 1.136
      1  1.136  drochner /*	$NetBSD: ehci.c,v 1.136 2008/05/21 17:19:44 drochner Exp $ */
      2    1.1  augustss 
      3    1.1  augustss /*
      4  1.100  augustss  * Copyright (c) 2004,2005 The NetBSD Foundation, Inc.
      5    1.1  augustss  * All rights reserved.
      6    1.1  augustss  *
      7    1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8   1.61   mycroft  * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum.
      9    1.1  augustss  *
     10    1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11    1.1  augustss  * modification, are permitted provided that the following conditions
     12    1.1  augustss  * are met:
     13    1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14    1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15    1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16    1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17    1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18    1.1  augustss  *
     19    1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20    1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21    1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22    1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23    1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24    1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25    1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26    1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27    1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28    1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29    1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     30    1.1  augustss  */
     31    1.1  augustss 
     32    1.1  augustss /*
     33    1.3  augustss  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
     34    1.1  augustss  *
     35   1.35     enami  * The EHCI 1.0 spec can be found at
     36   1.34  augustss  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
     37    1.7  augustss  * and the USB 2.0 spec at
     38   1.43    ichiro  * http://www.usb.org/developers/docs/usb_20.zip
     39    1.1  augustss  *
     40    1.1  augustss  */
     41    1.4     lukem 
     42   1.52  jdolecek /*
     43   1.52  jdolecek  * TODO:
     44   1.52  jdolecek  * 1) hold off explorations by companion controllers until ehci has started.
     45   1.52  jdolecek  *
     46  1.100  augustss  * 2) The EHCI driver lacks support for isochronous transfers, so
     47   1.52  jdolecek  *    devices using them don't work.
     48   1.52  jdolecek  *
     49  1.101       wiz  * 3) The hub driver needs to handle and schedule the transaction translator,
     50  1.100  augustss  *    to assign place in frame where different devices get to go. See chapter
     51   1.91     perry  *    on hubs in USB 2.0 for details.
     52   1.52  jdolecek  *
     53   1.60   mycroft  * 4) command failures are not recovered correctly
     54   1.52  jdolecek */
     55   1.52  jdolecek 
     56    1.4     lukem #include <sys/cdefs.h>
     57  1.136  drochner __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.136 2008/05/21 17:19:44 drochner Exp $");
     58   1.47  augustss 
     59   1.47  augustss #include "ohci.h"
     60   1.47  augustss #include "uhci.h"
     61    1.1  augustss 
     62    1.1  augustss #include <sys/param.h>
     63    1.1  augustss #include <sys/systm.h>
     64    1.1  augustss #include <sys/kernel.h>
     65    1.1  augustss #include <sys/malloc.h>
     66    1.1  augustss #include <sys/device.h>
     67    1.1  augustss #include <sys/select.h>
     68    1.1  augustss #include <sys/proc.h>
     69    1.1  augustss #include <sys/queue.h>
     70  1.126        ad #include <sys/mutex.h>
     71  1.126        ad #include <sys/bus.h>
     72    1.1  augustss 
     73    1.1  augustss #include <machine/endian.h>
     74    1.1  augustss 
     75    1.1  augustss #include <dev/usb/usb.h>
     76    1.1  augustss #include <dev/usb/usbdi.h>
     77    1.1  augustss #include <dev/usb/usbdivar.h>
     78    1.1  augustss #include <dev/usb/usb_mem.h>
     79    1.1  augustss #include <dev/usb/usb_quirks.h>
     80    1.1  augustss 
     81    1.1  augustss #include <dev/usb/ehcireg.h>
     82    1.1  augustss #include <dev/usb/ehcivar.h>
     83  1.131  drochner #include <dev/usb/usbroothub_subr.h>
     84    1.1  augustss 
     85    1.1  augustss #ifdef EHCI_DEBUG
     86   1.73  augustss #define DPRINTF(x)	do { if (ehcidebug) printf x; } while(0)
     87   1.73  augustss #define DPRINTFN(n,x)	do { if (ehcidebug>(n)) printf x; } while (0)
     88    1.6  augustss int ehcidebug = 0;
     89   1.15  augustss #ifndef __NetBSD__
     90    1.1  augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
     91   1.15  augustss #endif
     92    1.1  augustss #else
     93    1.1  augustss #define DPRINTF(x)
     94    1.1  augustss #define DPRINTFN(n,x)
     95    1.1  augustss #endif
     96    1.1  augustss 
     97    1.5  augustss struct ehci_pipe {
     98    1.5  augustss 	struct usbd_pipe pipe;
     99   1.55   mycroft 	int nexttoggle;
    100   1.55   mycroft 
    101   1.10  augustss 	ehci_soft_qh_t *sqh;
    102   1.10  augustss 	union {
    103   1.10  augustss 		ehci_soft_qtd_t *qtd;
    104   1.10  augustss 		/* ehci_soft_itd_t *itd; */
    105   1.10  augustss 	} tail;
    106   1.10  augustss 	union {
    107   1.10  augustss 		/* Control pipe */
    108   1.10  augustss 		struct {
    109   1.10  augustss 			usb_dma_t reqdma;
    110   1.10  augustss 			u_int length;
    111   1.10  augustss 		} ctl;
    112   1.10  augustss 		/* Interrupt pipe */
    113   1.78  augustss 		struct {
    114   1.78  augustss 			u_int length;
    115   1.78  augustss 		} intr;
    116   1.10  augustss 		/* Bulk pipe */
    117   1.10  augustss 		struct {
    118   1.10  augustss 			u_int length;
    119   1.10  augustss 		} bulk;
    120   1.10  augustss 		/* Iso pipe */
    121   1.15  augustss 		/* XXX */
    122   1.10  augustss 	} u;
    123    1.5  augustss };
    124    1.5  augustss 
    125    1.5  augustss Static usbd_status	ehci_open(usbd_pipe_handle);
    126    1.5  augustss Static void		ehci_poll(struct usbd_bus *);
    127    1.5  augustss Static void		ehci_softintr(void *);
    128   1.11  augustss Static int		ehci_intr1(ehci_softc_t *);
    129   1.15  augustss Static void		ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
    130   1.18  augustss Static void		ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
    131   1.18  augustss Static void		ehci_idone(struct ehci_xfer *);
    132   1.15  augustss Static void		ehci_timeout(void *);
    133   1.15  augustss Static void		ehci_timeout_task(void *);
    134  1.108   xtraeme Static void		ehci_intrlist_timeout(void *);
    135    1.5  augustss 
    136    1.5  augustss Static usbd_status	ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    137    1.5  augustss Static void		ehci_freem(struct usbd_bus *, usb_dma_t *);
    138    1.5  augustss 
    139    1.5  augustss Static usbd_xfer_handle	ehci_allocx(struct usbd_bus *);
    140    1.5  augustss Static void		ehci_freex(struct usbd_bus *, usbd_xfer_handle);
    141    1.5  augustss 
    142    1.5  augustss Static usbd_status	ehci_root_ctrl_transfer(usbd_xfer_handle);
    143    1.5  augustss Static usbd_status	ehci_root_ctrl_start(usbd_xfer_handle);
    144    1.5  augustss Static void		ehci_root_ctrl_abort(usbd_xfer_handle);
    145    1.5  augustss Static void		ehci_root_ctrl_close(usbd_pipe_handle);
    146    1.5  augustss Static void		ehci_root_ctrl_done(usbd_xfer_handle);
    147    1.5  augustss 
    148    1.5  augustss Static usbd_status	ehci_root_intr_transfer(usbd_xfer_handle);
    149    1.5  augustss Static usbd_status	ehci_root_intr_start(usbd_xfer_handle);
    150    1.5  augustss Static void		ehci_root_intr_abort(usbd_xfer_handle);
    151    1.5  augustss Static void		ehci_root_intr_close(usbd_pipe_handle);
    152    1.5  augustss Static void		ehci_root_intr_done(usbd_xfer_handle);
    153    1.5  augustss 
    154    1.5  augustss Static usbd_status	ehci_device_ctrl_transfer(usbd_xfer_handle);
    155    1.5  augustss Static usbd_status	ehci_device_ctrl_start(usbd_xfer_handle);
    156    1.5  augustss Static void		ehci_device_ctrl_abort(usbd_xfer_handle);
    157    1.5  augustss Static void		ehci_device_ctrl_close(usbd_pipe_handle);
    158    1.5  augustss Static void		ehci_device_ctrl_done(usbd_xfer_handle);
    159    1.5  augustss 
    160    1.5  augustss Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle);
    161    1.5  augustss Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle);
    162    1.5  augustss Static void		ehci_device_bulk_abort(usbd_xfer_handle);
    163    1.5  augustss Static void		ehci_device_bulk_close(usbd_pipe_handle);
    164    1.5  augustss Static void		ehci_device_bulk_done(usbd_xfer_handle);
    165    1.5  augustss 
    166    1.5  augustss Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle);
    167    1.5  augustss Static usbd_status	ehci_device_intr_start(usbd_xfer_handle);
    168    1.5  augustss Static void		ehci_device_intr_abort(usbd_xfer_handle);
    169    1.5  augustss Static void		ehci_device_intr_close(usbd_pipe_handle);
    170    1.5  augustss Static void		ehci_device_intr_done(usbd_xfer_handle);
    171    1.5  augustss 
    172    1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle);
    173    1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle);
    174    1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle);
    175    1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle);
    176    1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle);
    177    1.5  augustss 
    178    1.5  augustss Static void		ehci_device_clear_toggle(usbd_pipe_handle pipe);
    179    1.5  augustss Static void		ehci_noop(usbd_pipe_handle pipe);
    180    1.5  augustss 
    181    1.6  augustss Static void		ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
    182    1.6  augustss Static void		ehci_disown(ehci_softc_t *, int, int);
    183    1.5  augustss 
    184    1.9  augustss Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
    185    1.9  augustss Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
    186    1.9  augustss 
    187    1.9  augustss Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
    188    1.9  augustss Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
    189   1.25  augustss Static usbd_status	ehci_alloc_sqtd_chain(struct ehci_pipe *,
    190   1.15  augustss 			    ehci_softc_t *, int, int, usbd_xfer_handle,
    191   1.15  augustss 			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
    192   1.25  augustss Static void		ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
    193   1.18  augustss 					    ehci_soft_qtd_t *);
    194   1.15  augustss 
    195   1.15  augustss Static usbd_status	ehci_device_request(usbd_xfer_handle xfer);
    196    1.9  augustss 
    197   1.78  augustss Static usbd_status	ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
    198   1.78  augustss 			    int ival);
    199   1.78  augustss 
    200   1.10  augustss Static void		ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
    201   1.10  augustss Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
    202   1.10  augustss 				    ehci_soft_qh_t *);
    203   1.23  augustss Static void		ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
    204   1.11  augustss Static void		ehci_sync_hc(ehci_softc_t *);
    205   1.10  augustss 
    206   1.10  augustss Static void		ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
    207   1.10  augustss Static void		ehci_abort_xfer(usbd_xfer_handle, usbd_status);
    208    1.9  augustss 
    209    1.5  augustss #ifdef EHCI_DEBUG
    210   1.18  augustss Static void		ehci_dump_regs(ehci_softc_t *);
    211  1.107  augustss void			ehci_dump(void);
    212    1.6  augustss Static ehci_softc_t 	*theehci;
    213   1.15  augustss Static void		ehci_dump_link(ehci_link_t, int);
    214   1.15  augustss Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
    215    1.9  augustss Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
    216    1.9  augustss Static void		ehci_dump_qtd(ehci_qtd_t *);
    217    1.9  augustss Static void		ehci_dump_sqh(ehci_soft_qh_t *);
    218   1.38    martin #ifdef DIAGNOSTIC
    219   1.18  augustss Static void		ehci_dump_exfer(struct ehci_xfer *);
    220    1.5  augustss #endif
    221   1.38    martin #endif
    222    1.5  augustss 
    223   1.11  augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
    224   1.11  augustss 
    225    1.5  augustss #define EHCI_INTR_ENDPT 1
    226    1.5  augustss 
    227   1.18  augustss #define ehci_add_intr_list(sc, ex) \
    228   1.18  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
    229   1.18  augustss #define ehci_del_intr_list(ex) \
    230   1.44  augustss 	do { \
    231   1.44  augustss 		LIST_REMOVE((ex), inext); \
    232   1.44  augustss 		(ex)->inext.le_prev = NULL; \
    233   1.44  augustss 	} while (0)
    234   1.44  augustss #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
    235   1.18  augustss 
    236  1.123  drochner Static const struct usbd_bus_methods ehci_bus_methods = {
    237    1.5  augustss 	ehci_open,
    238    1.5  augustss 	ehci_softintr,
    239    1.5  augustss 	ehci_poll,
    240    1.5  augustss 	ehci_allocm,
    241    1.5  augustss 	ehci_freem,
    242    1.5  augustss 	ehci_allocx,
    243    1.5  augustss 	ehci_freex,
    244    1.5  augustss };
    245    1.5  augustss 
    246  1.123  drochner Static const struct usbd_pipe_methods ehci_root_ctrl_methods = {
    247    1.5  augustss 	ehci_root_ctrl_transfer,
    248    1.5  augustss 	ehci_root_ctrl_start,
    249    1.5  augustss 	ehci_root_ctrl_abort,
    250    1.5  augustss 	ehci_root_ctrl_close,
    251    1.5  augustss 	ehci_noop,
    252    1.5  augustss 	ehci_root_ctrl_done,
    253    1.5  augustss };
    254    1.5  augustss 
    255  1.123  drochner Static const struct usbd_pipe_methods ehci_root_intr_methods = {
    256    1.5  augustss 	ehci_root_intr_transfer,
    257    1.5  augustss 	ehci_root_intr_start,
    258    1.5  augustss 	ehci_root_intr_abort,
    259    1.5  augustss 	ehci_root_intr_close,
    260    1.5  augustss 	ehci_noop,
    261    1.5  augustss 	ehci_root_intr_done,
    262    1.5  augustss };
    263    1.5  augustss 
    264  1.123  drochner Static const struct usbd_pipe_methods ehci_device_ctrl_methods = {
    265    1.5  augustss 	ehci_device_ctrl_transfer,
    266    1.5  augustss 	ehci_device_ctrl_start,
    267    1.5  augustss 	ehci_device_ctrl_abort,
    268    1.5  augustss 	ehci_device_ctrl_close,
    269    1.5  augustss 	ehci_noop,
    270    1.5  augustss 	ehci_device_ctrl_done,
    271    1.5  augustss };
    272    1.5  augustss 
    273  1.123  drochner Static const struct usbd_pipe_methods ehci_device_intr_methods = {
    274    1.5  augustss 	ehci_device_intr_transfer,
    275    1.5  augustss 	ehci_device_intr_start,
    276    1.5  augustss 	ehci_device_intr_abort,
    277    1.5  augustss 	ehci_device_intr_close,
    278    1.5  augustss 	ehci_device_clear_toggle,
    279    1.5  augustss 	ehci_device_intr_done,
    280    1.5  augustss };
    281    1.5  augustss 
    282  1.123  drochner Static const struct usbd_pipe_methods ehci_device_bulk_methods = {
    283    1.5  augustss 	ehci_device_bulk_transfer,
    284    1.5  augustss 	ehci_device_bulk_start,
    285    1.5  augustss 	ehci_device_bulk_abort,
    286    1.5  augustss 	ehci_device_bulk_close,
    287    1.5  augustss 	ehci_device_clear_toggle,
    288    1.5  augustss 	ehci_device_bulk_done,
    289    1.5  augustss };
    290    1.5  augustss 
    291  1.123  drochner Static const struct usbd_pipe_methods ehci_device_isoc_methods = {
    292    1.5  augustss 	ehci_device_isoc_transfer,
    293    1.5  augustss 	ehci_device_isoc_start,
    294    1.5  augustss 	ehci_device_isoc_abort,
    295    1.5  augustss 	ehci_device_isoc_close,
    296    1.5  augustss 	ehci_noop,
    297    1.5  augustss 	ehci_device_isoc_done,
    298    1.5  augustss };
    299    1.5  augustss 
    300  1.123  drochner static const uint8_t revbits[EHCI_MAX_POLLRATE] = {
    301   1.95  augustss 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78,
    302   1.95  augustss 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c,
    303   1.95  augustss 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a,
    304   1.95  augustss 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e,
    305   1.95  augustss 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79,
    306   1.95  augustss 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d,
    307   1.95  augustss 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b,
    308   1.95  augustss 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f,
    309   1.94  augustss };
    310   1.94  augustss 
    311    1.1  augustss usbd_status
    312    1.1  augustss ehci_init(ehci_softc_t *sc)
    313    1.1  augustss {
    314  1.104  christos 	u_int32_t vers, sparams, cparams, hcr;
    315    1.3  augustss 	u_int i;
    316    1.3  augustss 	usbd_status err;
    317   1.11  augustss 	ehci_soft_qh_t *sqh;
    318   1.89  augustss 	u_int ncomp;
    319    1.3  augustss 
    320    1.3  augustss 	DPRINTF(("ehci_init: start\n"));
    321    1.6  augustss #ifdef EHCI_DEBUG
    322    1.6  augustss 	theehci = sc;
    323    1.6  augustss #endif
    324    1.3  augustss 
    325    1.3  augustss 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
    326    1.3  augustss 
    327  1.104  christos 	vers = EREAD2(sc, EHCI_HCIVERSION);
    328  1.134  drochner 	aprint_verbose("%s: EHCI version %x.%x\n", device_xname(sc->sc_dev),
    329  1.104  christos 	       vers >> 8, vers & 0xff);
    330    1.3  augustss 
    331    1.3  augustss 	sparams = EREAD4(sc, EHCI_HCSPARAMS);
    332    1.3  augustss 	DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
    333    1.6  augustss 	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
    334   1.89  augustss 	ncomp = EHCI_HCS_N_CC(sparams);
    335   1.89  augustss 	if (ncomp != sc->sc_ncomp) {
    336  1.121        ad 		aprint_verbose("%s: wrong number of companions (%d != %d)\n",
    337  1.134  drochner 			       device_xname(sc->sc_dev), ncomp, sc->sc_ncomp);
    338   1.47  augustss #if NOHCI == 0 || NUHCI == 0
    339   1.47  augustss 		aprint_error("%s: ohci or uhci probably not configured\n",
    340  1.134  drochner 			     device_xname(sc->sc_dev));
    341   1.47  augustss #endif
    342   1.89  augustss 		if (ncomp < sc->sc_ncomp)
    343   1.89  augustss 			sc->sc_ncomp = ncomp;
    344    1.3  augustss 	}
    345    1.3  augustss 	if (sc->sc_ncomp > 0) {
    346   1.41   thorpej 		aprint_normal("%s: companion controller%s, %d port%s each:",
    347  1.134  drochner 		    device_xname(sc->sc_dev), sc->sc_ncomp!=1 ? "s" : "",
    348    1.3  augustss 		    EHCI_HCS_N_PCC(sparams),
    349    1.3  augustss 		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
    350    1.3  augustss 		for (i = 0; i < sc->sc_ncomp; i++)
    351  1.134  drochner 			aprint_normal(" %s", device_xname(sc->sc_comps[i]));
    352   1.41   thorpej 		aprint_normal("\n");
    353    1.3  augustss 	}
    354    1.5  augustss 	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
    355    1.3  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    356    1.3  augustss 	DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
    357  1.106  augustss 	sc->sc_hasppc = EHCI_HCS_PPC(sparams);
    358   1.36  augustss 
    359   1.36  augustss 	if (EHCI_HCC_64BIT(cparams)) {
    360   1.36  augustss 		/* MUST clear segment register if 64 bit capable. */
    361   1.36  augustss 		EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
    362   1.36  augustss 	}
    363   1.33  augustss 
    364    1.3  augustss 	sc->sc_bus.usbrev = USBREV_2_0;
    365    1.3  augustss 
    366  1.136  drochner 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    367   1.90      fvdl 	    USB_MEM_RESERVE);
    368   1.90      fvdl 
    369    1.3  augustss 	/* Reset the controller */
    370  1.134  drochner 	DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
    371    1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
    372    1.3  augustss 	usb_delay_ms(&sc->sc_bus, 1);
    373    1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
    374    1.3  augustss 	for (i = 0; i < 100; i++) {
    375   1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    376    1.3  augustss 		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
    377    1.3  augustss 		if (!hcr)
    378    1.3  augustss 			break;
    379    1.3  augustss 	}
    380    1.3  augustss 	if (hcr) {
    381  1.134  drochner 		aprint_error("%s: reset timeout\n", device_xname(sc->sc_dev));
    382    1.3  augustss 		return (USBD_IOERROR);
    383    1.3  augustss 	}
    384    1.3  augustss 
    385   1.78  augustss 	/* XXX need proper intr scheduling */
    386   1.78  augustss 	sc->sc_rand = 96;
    387   1.78  augustss 
    388    1.3  augustss 	/* frame list size at default, read back what we got and use that */
    389    1.3  augustss 	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
    390   1.78  augustss 	case 0: sc->sc_flsize = 1024; break;
    391   1.78  augustss 	case 1: sc->sc_flsize = 512; break;
    392   1.78  augustss 	case 2: sc->sc_flsize = 256; break;
    393    1.3  augustss 	case 3: return (USBD_IOERROR);
    394    1.3  augustss 	}
    395   1.78  augustss 	err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
    396   1.78  augustss 	    EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
    397    1.3  augustss 	if (err)
    398    1.3  augustss 		return (err);
    399  1.134  drochner 	DPRINTF(("%s: flsize=%d\n", device_xname(sc->sc_dev),sc->sc_flsize));
    400   1.78  augustss 	sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
    401   1.78  augustss 	EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
    402    1.3  augustss 
    403    1.5  augustss 	/* Set up the bus struct. */
    404    1.5  augustss 	sc->sc_bus.methods = &ehci_bus_methods;
    405    1.5  augustss 	sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
    406    1.5  augustss 
    407    1.6  augustss 	sc->sc_eintrs = EHCI_NORMAL_INTRS;
    408    1.6  augustss 
    409   1.78  augustss 	/*
    410   1.78  augustss 	 * Allocate the interrupt dummy QHs. These are arranged to give poll
    411   1.78  augustss 	 * intervals that are powers of 2 times 1ms.
    412   1.78  augustss 	 */
    413   1.78  augustss 	for (i = 0; i < EHCI_INTRQHS; i++) {
    414   1.78  augustss 		sqh = ehci_alloc_sqh(sc);
    415   1.78  augustss 		if (sqh == NULL) {
    416   1.78  augustss 			err = USBD_NOMEM;
    417   1.78  augustss 			goto bad1;
    418   1.78  augustss 		}
    419   1.78  augustss 		sc->sc_islots[i].sqh = sqh;
    420   1.78  augustss 	}
    421   1.78  augustss 	for (i = 0; i < EHCI_INTRQHS; i++) {
    422   1.78  augustss 		sqh = sc->sc_islots[i].sqh;
    423   1.78  augustss 		if (i == 0) {
    424   1.78  augustss 			/* The last (1ms) QH terminates. */
    425   1.78  augustss 			sqh->qh.qh_link = EHCI_NULL;
    426   1.78  augustss 			sqh->next = NULL;
    427   1.78  augustss 		} else {
    428   1.78  augustss 			/* Otherwise the next QH has half the poll interval */
    429   1.78  augustss 			sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
    430   1.78  augustss 			sqh->qh.qh_link = htole32(sqh->next->physaddr |
    431   1.78  augustss 			    EHCI_LINK_QH);
    432   1.78  augustss 		}
    433   1.78  augustss 		sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
    434   1.78  augustss 		sqh->qh.qh_curqtd = EHCI_NULL;
    435   1.78  augustss 		sqh->next = NULL;
    436   1.78  augustss 		sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    437   1.78  augustss 		sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    438   1.78  augustss 		sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    439   1.78  augustss 		sqh->sqtd = NULL;
    440   1.78  augustss 	}
    441   1.78  augustss 	/* Point the frame list at the last level (128ms). */
    442   1.78  augustss 	for (i = 0; i < sc->sc_flsize; i++) {
    443   1.94  augustss 		int j;
    444   1.94  augustss 
    445   1.94  augustss 		j = (i & ~(EHCI_MAX_POLLRATE-1)) |
    446   1.94  augustss 		    revbits[i & (EHCI_MAX_POLLRATE-1)];
    447   1.94  augustss 		sc->sc_flist[j] = htole32(EHCI_LINK_QH |
    448   1.78  augustss 		    sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
    449   1.78  augustss 		    i)].sqh->physaddr);
    450   1.78  augustss 	}
    451   1.78  augustss 
    452   1.11  augustss 	/* Allocate dummy QH that starts the async list. */
    453   1.11  augustss 	sqh = ehci_alloc_sqh(sc);
    454   1.11  augustss 	if (sqh == NULL) {
    455    1.9  augustss 		err = USBD_NOMEM;
    456    1.9  augustss 		goto bad1;
    457    1.9  augustss 	}
    458   1.11  augustss 	/* Fill the QH */
    459   1.11  augustss 	sqh->qh.qh_endp =
    460   1.11  augustss 	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
    461   1.11  augustss 	sqh->qh.qh_link =
    462   1.11  augustss 	    htole32(sqh->physaddr | EHCI_LINK_QH);
    463   1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
    464   1.11  augustss 	sqh->next = NULL;
    465   1.11  augustss 	/* Fill the overlay qTD */
    466   1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    467   1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    468   1.26  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    469   1.11  augustss 	sqh->sqtd = NULL;
    470    1.9  augustss #ifdef EHCI_DEBUG
    471    1.9  augustss 	if (ehcidebug) {
    472   1.27     enami 		ehci_dump_sqh(sqh);
    473    1.9  augustss 	}
    474    1.9  augustss #endif
    475    1.9  augustss 
    476    1.9  augustss 	/* Point to async list */
    477   1.11  augustss 	sc->sc_async_head = sqh;
    478   1.11  augustss 	EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
    479    1.9  augustss 
    480  1.108   xtraeme 	usb_callout_init(sc->sc_tmo_intrlist);
    481    1.9  augustss 
    482  1.126        ad 	mutex_init(&sc->sc_doorbell_lock, MUTEX_DEFAULT, IPL_NONE);
    483   1.10  augustss 
    484    1.6  augustss 	/* Turn on controller */
    485    1.6  augustss 	EOWRITE4(sc, EHCI_USBCMD,
    486   1.88  augustss 		 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
    487    1.6  augustss 		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
    488   1.10  augustss 		 EHCI_CMD_ASE |
    489   1.78  augustss 		 EHCI_CMD_PSE |
    490    1.6  augustss 		 EHCI_CMD_RS);
    491    1.6  augustss 
    492    1.6  augustss 	/* Take over port ownership */
    493    1.6  augustss 	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
    494    1.6  augustss 
    495    1.8  augustss 	for (i = 0; i < 100; i++) {
    496   1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    497    1.8  augustss 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
    498    1.8  augustss 		if (!hcr)
    499    1.8  augustss 			break;
    500    1.8  augustss 	}
    501    1.8  augustss 	if (hcr) {
    502  1.134  drochner 		aprint_error("%s: run timeout\n", device_xname(sc->sc_dev));
    503    1.8  augustss 		return (USBD_IOERROR);
    504    1.8  augustss 	}
    505    1.8  augustss 
    506  1.105  augustss 	/* Enable interrupts */
    507  1.105  augustss 	DPRINTFN(1,("ehci_init: enabling\n"));
    508  1.105  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    509  1.105  augustss 
    510    1.5  augustss 	return (USBD_NORMAL_COMPLETION);
    511    1.9  augustss 
    512    1.9  augustss #if 0
    513   1.11  augustss  bad2:
    514   1.15  augustss 	ehci_free_sqh(sc, sc->sc_async_head);
    515    1.9  augustss #endif
    516    1.9  augustss  bad1:
    517    1.9  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_fldma);
    518    1.9  augustss 	return (err);
    519    1.1  augustss }
    520    1.1  augustss 
    521    1.1  augustss int
    522    1.1  augustss ehci_intr(void *v)
    523    1.1  augustss {
    524    1.6  augustss 	ehci_softc_t *sc = v;
    525    1.6  augustss 
    526  1.134  drochner 	if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev))
    527   1.15  augustss 		return (0);
    528   1.15  augustss 
    529    1.6  augustss 	/* If we get an interrupt while polling, then just ignore it. */
    530    1.6  augustss 	if (sc->sc_bus.use_polling) {
    531   1.78  augustss 		u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    532   1.78  augustss 
    533   1.78  augustss 		if (intrs)
    534   1.78  augustss 			EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    535    1.6  augustss #ifdef DIAGNOSTIC
    536   1.65   mycroft 		DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
    537    1.6  augustss #endif
    538    1.6  augustss 		return (0);
    539    1.6  augustss 	}
    540    1.6  augustss 
    541   1.33  augustss 	return (ehci_intr1(sc));
    542    1.6  augustss }
    543    1.6  augustss 
    544    1.6  augustss Static int
    545    1.6  augustss ehci_intr1(ehci_softc_t *sc)
    546    1.6  augustss {
    547    1.6  augustss 	u_int32_t intrs, eintrs;
    548    1.6  augustss 
    549    1.6  augustss 	DPRINTFN(20,("ehci_intr1: enter\n"));
    550    1.6  augustss 
    551    1.6  augustss 	/* In case the interrupt occurs before initialization has completed. */
    552    1.6  augustss 	if (sc == NULL) {
    553    1.6  augustss #ifdef DIAGNOSTIC
    554   1.72  augustss 		printf("ehci_intr1: sc == NULL\n");
    555    1.6  augustss #endif
    556    1.6  augustss 		return (0);
    557    1.6  augustss 	}
    558    1.6  augustss 
    559    1.6  augustss 	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    560    1.6  augustss 	if (!intrs)
    561    1.6  augustss 		return (0);
    562    1.6  augustss 
    563    1.6  augustss 	eintrs = intrs & sc->sc_eintrs;
    564   1.72  augustss 	DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
    565    1.6  augustss 		     sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
    566    1.6  augustss 		     (u_int)eintrs));
    567    1.6  augustss 	if (!eintrs)
    568    1.6  augustss 		return (0);
    569    1.6  augustss 
    570   1.68   mycroft 	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    571    1.6  augustss 	sc->sc_bus.intr_context++;
    572    1.6  augustss 	sc->sc_bus.no_intrs++;
    573   1.10  augustss 	if (eintrs & EHCI_STS_IAA) {
    574   1.10  augustss 		DPRINTF(("ehci_intr1: door bell\n"));
    575   1.11  augustss 		wakeup(&sc->sc_async_head);
    576   1.20  augustss 		eintrs &= ~EHCI_STS_IAA;
    577   1.10  augustss 	}
    578   1.18  augustss 	if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
    579   1.46  augustss 		DPRINTFN(5,("ehci_intr1: %s %s\n",
    580   1.46  augustss 			    eintrs & EHCI_STS_INT ? "INT" : "",
    581   1.46  augustss 			    eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
    582   1.18  augustss 		usb_schedsoftintr(&sc->sc_bus);
    583   1.21  augustss 		eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
    584    1.6  augustss 	}
    585    1.6  augustss 	if (eintrs & EHCI_STS_HSE) {
    586    1.6  augustss 		printf("%s: unrecoverable error, controller halted\n",
    587  1.134  drochner 		       device_xname(sc->sc_dev));
    588    1.6  augustss 		/* XXX what else */
    589    1.6  augustss 	}
    590    1.6  augustss 	if (eintrs & EHCI_STS_PCD) {
    591    1.6  augustss 		ehci_pcd(sc, sc->sc_intrxfer);
    592    1.6  augustss 		eintrs &= ~EHCI_STS_PCD;
    593    1.6  augustss 	}
    594    1.6  augustss 
    595    1.6  augustss 	sc->sc_bus.intr_context--;
    596    1.6  augustss 
    597    1.6  augustss 	if (eintrs != 0) {
    598    1.6  augustss 		/* Block unprocessed interrupts. */
    599    1.6  augustss 		sc->sc_eintrs &= ~eintrs;
    600    1.6  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    601    1.6  augustss 		printf("%s: blocking intrs 0x%x\n",
    602  1.134  drochner 		       device_xname(sc->sc_dev), eintrs);
    603    1.6  augustss 	}
    604    1.6  augustss 
    605    1.6  augustss 	return (1);
    606    1.6  augustss }
    607    1.6  augustss 
    608    1.6  augustss 
    609    1.6  augustss void
    610    1.6  augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
    611    1.6  augustss {
    612    1.6  augustss 	usbd_pipe_handle pipe;
    613    1.6  augustss 	u_char *p;
    614    1.6  augustss 	int i, m;
    615    1.6  augustss 
    616    1.6  augustss 	if (xfer == NULL) {
    617    1.6  augustss 		/* Just ignore the change. */
    618    1.6  augustss 		return;
    619    1.6  augustss 	}
    620    1.6  augustss 
    621    1.6  augustss 	pipe = xfer->pipe;
    622    1.6  augustss 
    623   1.30  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
    624    1.6  augustss 	m = min(sc->sc_noport, xfer->length * 8 - 1);
    625    1.6  augustss 	memset(p, 0, xfer->length);
    626    1.6  augustss 	for (i = 1; i <= m; i++) {
    627    1.6  augustss 		/* Pick out CHANGE bits from the status reg. */
    628    1.6  augustss 		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
    629    1.6  augustss 			p[i/8] |= 1 << (i%8);
    630    1.6  augustss 	}
    631    1.6  augustss 	DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
    632    1.6  augustss 	xfer->actlen = xfer->length;
    633    1.6  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    634    1.6  augustss 
    635    1.6  augustss 	usb_transfer_complete(xfer);
    636    1.1  augustss }
    637    1.1  augustss 
    638    1.5  augustss void
    639    1.5  augustss ehci_softintr(void *v)
    640    1.5  augustss {
    641  1.134  drochner 	struct usbd_bus *bus = v;
    642  1.134  drochner 	ehci_softc_t *sc = bus->hci_private;
    643   1.53       chs 	struct ehci_xfer *ex, *nextex;
    644   1.18  augustss 
    645  1.134  drochner 	DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_xname(sc->sc_dev),
    646   1.18  augustss 		     sc->sc_bus.intr_context));
    647   1.18  augustss 
    648   1.18  augustss 	sc->sc_bus.intr_context++;
    649   1.18  augustss 
    650   1.18  augustss 	/*
    651   1.18  augustss 	 * The only explanation I can think of for why EHCI is as brain dead
    652   1.18  augustss 	 * as UHCI interrupt-wise is that Intel was involved in both.
    653   1.18  augustss 	 * An interrupt just tells us that something is done, we have no
    654   1.18  augustss 	 * clue what, so we need to scan through all active transfers. :-(
    655   1.18  augustss 	 */
    656   1.53       chs 	for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
    657   1.53       chs 		nextex = LIST_NEXT(ex, inext);
    658   1.18  augustss 		ehci_check_intr(sc, ex);
    659   1.53       chs 	}
    660   1.18  augustss 
    661  1.108   xtraeme 	/* Schedule a callout to catch any dropped transactions. */
    662  1.108   xtraeme 	if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
    663  1.108   xtraeme 	    !LIST_EMPTY(&sc->sc_intrhead))
    664  1.108   xtraeme 		usb_callout(sc->sc_tmo_intrlist, hz,
    665  1.108   xtraeme 		    ehci_intrlist_timeout, sc);
    666  1.108   xtraeme 
    667   1.77  augustss #ifdef USB_USE_SOFTINTR
    668   1.29  augustss 	if (sc->sc_softwake) {
    669   1.29  augustss 		sc->sc_softwake = 0;
    670   1.29  augustss 		wakeup(&sc->sc_softwake);
    671   1.29  augustss 	}
    672   1.77  augustss #endif /* USB_USE_SOFTINTR */
    673   1.29  augustss 
    674   1.18  augustss 	sc->sc_bus.intr_context--;
    675   1.18  augustss }
    676   1.18  augustss 
    677   1.18  augustss /* Check for an interrupt. */
    678   1.18  augustss void
    679  1.115  christos ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
    680   1.18  augustss {
    681   1.18  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    682   1.18  augustss 	u_int32_t status;
    683   1.18  augustss 
    684   1.22  augustss 	DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
    685   1.18  augustss 
    686   1.18  augustss 	if (ex->sqtdstart == NULL) {
    687   1.18  augustss 		printf("ehci_check_intr: sqtdstart=NULL\n");
    688   1.18  augustss 		return;
    689   1.18  augustss 	}
    690   1.18  augustss 	lsqtd = ex->sqtdend;
    691   1.18  augustss #ifdef DIAGNOSTIC
    692   1.18  augustss 	if (lsqtd == NULL) {
    693   1.84  augustss 		printf("ehci_check_intr: lsqtd==0\n");
    694   1.18  augustss 		return;
    695   1.18  augustss 	}
    696   1.18  augustss #endif
    697   1.33  augustss 	/*
    698   1.18  augustss 	 * If the last TD is still active we need to check whether there
    699   1.18  augustss 	 * is a an error somewhere in the middle, or whether there was a
    700   1.18  augustss 	 * short packet (SPD and not ACTIVE).
    701   1.18  augustss 	 */
    702   1.18  augustss 	if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
    703   1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
    704   1.18  augustss 		for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
    705   1.18  augustss 			status = le32toh(sqtd->qtd.qtd_status);
    706   1.18  augustss 			/* If there's an active QTD the xfer isn't done. */
    707   1.18  augustss 			if (status & EHCI_QTD_ACTIVE)
    708   1.18  augustss 				break;
    709   1.18  augustss 			/* Any kind of error makes the xfer done. */
    710   1.18  augustss 			if (status & EHCI_QTD_HALTED)
    711   1.18  augustss 				goto done;
    712   1.18  augustss 			/* We want short packets, and it is short: it's done */
    713   1.58   mycroft 			if (EHCI_QTD_GET_BYTES(status) != 0)
    714   1.18  augustss 				goto done;
    715   1.18  augustss 		}
    716   1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
    717   1.18  augustss 			      ex, ex->sqtdstart));
    718   1.18  augustss 		return;
    719   1.18  augustss 	}
    720   1.18  augustss  done:
    721   1.18  augustss 	DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
    722   1.18  augustss 	usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
    723   1.18  augustss 	ehci_idone(ex);
    724   1.18  augustss }
    725   1.18  augustss 
    726   1.18  augustss void
    727   1.18  augustss ehci_idone(struct ehci_xfer *ex)
    728   1.18  augustss {
    729   1.18  augustss 	usbd_xfer_handle xfer = &ex->xfer;
    730   1.18  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
    731   1.82  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    732   1.82  augustss 	u_int32_t status = 0, nstatus = 0;
    733   1.18  augustss 	int actlen;
    734   1.18  augustss 
    735   1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
    736   1.18  augustss #ifdef DIAGNOSTIC
    737   1.18  augustss 	{
    738   1.18  augustss 		int s = splhigh();
    739   1.18  augustss 		if (ex->isdone) {
    740   1.18  augustss 			splx(s);
    741   1.18  augustss #ifdef EHCI_DEBUG
    742   1.18  augustss 			printf("ehci_idone: ex is done!\n   ");
    743   1.18  augustss 			ehci_dump_exfer(ex);
    744   1.18  augustss #else
    745   1.18  augustss 			printf("ehci_idone: ex=%p is done!\n", ex);
    746   1.18  augustss #endif
    747   1.18  augustss 			return;
    748   1.18  augustss 		}
    749   1.18  augustss 		ex->isdone = 1;
    750   1.18  augustss 		splx(s);
    751   1.18  augustss 	}
    752   1.18  augustss #endif
    753   1.18  augustss 
    754   1.18  augustss 	if (xfer->status == USBD_CANCELLED ||
    755   1.18  augustss 	    xfer->status == USBD_TIMEOUT) {
    756   1.18  augustss 		DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
    757   1.18  augustss 		return;
    758   1.18  augustss 	}
    759   1.18  augustss 
    760   1.18  augustss #ifdef EHCI_DEBUG
    761   1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
    762   1.18  augustss 	if (ehcidebug > 10)
    763   1.18  augustss 		ehci_dump_sqtds(ex->sqtdstart);
    764   1.18  augustss #endif
    765   1.18  augustss 
    766   1.18  augustss 	/* The transfer is done, compute actual length and status. */
    767   1.82  augustss 	lsqtd = ex->sqtdend;
    768   1.18  augustss 	actlen = 0;
    769   1.82  augustss 	for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
    770   1.18  augustss 		nstatus = le32toh(sqtd->qtd.qtd_status);
    771   1.18  augustss 		if (nstatus & EHCI_QTD_ACTIVE)
    772   1.18  augustss 			break;
    773   1.18  augustss 
    774   1.18  augustss 		status = nstatus;
    775   1.18  augustss 		if (EHCI_QTD_GET_PID(status) !=	EHCI_QTD_PID_SETUP)
    776   1.18  augustss 			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
    777   1.18  augustss 	}
    778   1.22  augustss 
    779   1.91     perry 	/*
    780   1.86  augustss 	 * If there are left over TDs we need to update the toggle.
    781   1.86  augustss 	 * The default pipe doesn't need it since control transfers
    782   1.86  augustss 	 * start the toggle at 0 every time.
    783  1.117  drochner 	 * For a short transfer we need to update the toggle for the missing
    784  1.117  drochner 	 * packets within the qTD.
    785   1.86  augustss 	 */
    786  1.117  drochner 	if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) &&
    787   1.82  augustss 	    xfer->pipe->device->default_pipe != xfer->pipe) {
    788  1.117  drochner 		DPRINTFN(2, ("ehci_idone: need toggle update "
    789  1.117  drochner 			     "status=%08x nstatus=%08x\n", status, nstatus));
    790   1.58   mycroft #if 0
    791   1.58   mycroft 		ehci_dump_sqh(epipe->sqh);
    792   1.58   mycroft 		ehci_dump_sqtds(ex->sqtdstart);
    793   1.58   mycroft #endif
    794   1.58   mycroft 		epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
    795   1.22  augustss 	}
    796   1.18  augustss 
    797   1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
    798   1.22  augustss 			   xfer->length, actlen, status));
    799   1.18  augustss 	xfer->actlen = actlen;
    800   1.98  augustss 	if (status & EHCI_QTD_HALTED) {
    801   1.18  augustss #ifdef EHCI_DEBUG
    802   1.18  augustss 		char sbuf[128];
    803   1.18  augustss 
    804   1.18  augustss 		bitmask_snprintf((u_int32_t)status,
    805   1.63   mycroft 				 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
    806   1.98  augustss 				 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf));
    807   1.18  augustss 
    808   1.98  augustss 		DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, "
    809   1.18  augustss 			  "status 0x%s\n",
    810   1.18  augustss 			  xfer->pipe->device->address,
    811   1.18  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
    812   1.18  augustss 			  sbuf));
    813   1.23  augustss 		if (ehcidebug > 2) {
    814   1.23  augustss 			ehci_dump_sqh(epipe->sqh);
    815   1.23  augustss 			ehci_dump_sqtds(ex->sqtdstart);
    816   1.23  augustss 		}
    817   1.18  augustss #endif
    818   1.98  augustss 		/* low&full speed has an extra error flag */
    819   1.98  augustss 		if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) !=
    820   1.98  augustss 		    EHCI_QH_SPEED_HIGH)
    821   1.98  augustss 			status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE;
    822   1.98  augustss 		else
    823   1.98  augustss 			status &= EHCI_QTD_STATERRS;
    824   1.98  augustss 		if (status == 0) /* no other errors means a stall */
    825   1.18  augustss 			xfer->status = USBD_STALLED;
    826   1.18  augustss 		else
    827   1.18  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
    828   1.98  augustss 		/* XXX need to reset TT on missed microframe */
    829   1.98  augustss 		if (status & EHCI_QTD_MISSEDMICRO) {
    830  1.134  drochner 			ehci_softc_t *sc =
    831  1.134  drochner 			    xfer->pipe->device->bus->hci_private;
    832   1.98  augustss 
    833   1.98  augustss 			printf("%s: missed microframe, TT reset not "
    834   1.98  augustss 			    "implemented, hub might be inoperational\n",
    835  1.134  drochner 			    device_xname(sc->sc_dev));
    836   1.98  augustss 		}
    837   1.18  augustss 	} else {
    838   1.18  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
    839   1.18  augustss 	}
    840   1.18  augustss 
    841   1.18  augustss 	usb_transfer_complete(xfer);
    842   1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
    843    1.5  augustss }
    844    1.5  augustss 
    845   1.15  augustss /*
    846   1.15  augustss  * Wait here until controller claims to have an interrupt.
    847   1.18  augustss  * Then call ehci_intr and return.  Use timeout to avoid waiting
    848   1.15  augustss  * too long.
    849   1.15  augustss  */
    850   1.15  augustss void
    851   1.15  augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
    852   1.15  augustss {
    853   1.97  augustss 	int timo;
    854   1.15  augustss 	u_int32_t intrs;
    855   1.15  augustss 
    856   1.15  augustss 	xfer->status = USBD_IN_PROGRESS;
    857   1.97  augustss 	for (timo = xfer->timeout; timo >= 0; timo--) {
    858   1.15  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    859   1.17  augustss 		if (sc->sc_dying)
    860   1.17  augustss 			break;
    861   1.15  augustss 		intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
    862   1.15  augustss 			sc->sc_eintrs;
    863   1.15  augustss 		DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
    864   1.70      yamt #ifdef EHCI_DEBUG
    865   1.15  augustss 		if (ehcidebug > 15)
    866   1.18  augustss 			ehci_dump_regs(sc);
    867   1.15  augustss #endif
    868   1.15  augustss 		if (intrs) {
    869   1.15  augustss 			ehci_intr1(sc);
    870   1.15  augustss 			if (xfer->status != USBD_IN_PROGRESS)
    871   1.15  augustss 				return;
    872   1.15  augustss 		}
    873   1.15  augustss 	}
    874   1.15  augustss 
    875   1.15  augustss 	/* Timeout */
    876   1.15  augustss 	DPRINTF(("ehci_waitintr: timeout\n"));
    877   1.15  augustss 	xfer->status = USBD_TIMEOUT;
    878   1.15  augustss 	usb_transfer_complete(xfer);
    879   1.15  augustss 	/* XXX should free TD */
    880   1.15  augustss }
    881   1.15  augustss 
    882    1.5  augustss void
    883    1.5  augustss ehci_poll(struct usbd_bus *bus)
    884    1.5  augustss {
    885  1.134  drochner 	ehci_softc_t *sc = bus->hci_private;
    886    1.5  augustss #ifdef EHCI_DEBUG
    887    1.5  augustss 	static int last;
    888    1.5  augustss 	int new;
    889    1.6  augustss 	new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    890    1.5  augustss 	if (new != last) {
    891    1.5  augustss 		DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
    892    1.5  augustss 		last = new;
    893    1.5  augustss 	}
    894    1.5  augustss #endif
    895    1.5  augustss 
    896    1.6  augustss 	if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
    897    1.5  augustss 		ehci_intr1(sc);
    898    1.5  augustss }
    899    1.5  augustss 
    900  1.132    dyoung void
    901  1.132    dyoung ehci_childdet(device_t self, device_t child)
    902  1.132    dyoung {
    903  1.132    dyoung 	struct ehci_softc *sc = device_private(self);
    904  1.132    dyoung 
    905  1.132    dyoung 	KASSERT(sc->sc_child == child);
    906  1.132    dyoung 	sc->sc_child = NULL;
    907  1.132    dyoung }
    908  1.132    dyoung 
    909    1.1  augustss int
    910    1.1  augustss ehci_detach(struct ehci_softc *sc, int flags)
    911    1.1  augustss {
    912    1.1  augustss 	int rv = 0;
    913    1.1  augustss 
    914    1.1  augustss 	if (sc->sc_child != NULL)
    915    1.1  augustss 		rv = config_detach(sc->sc_child, flags);
    916   1.33  augustss 
    917    1.1  augustss 	if (rv != 0)
    918    1.1  augustss 		return (rv);
    919    1.1  augustss 
    920  1.108   xtraeme 	usb_uncallout(sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc);
    921    1.6  augustss 
    922   1.17  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    923   1.15  augustss 
    924    1.1  augustss 	/* XXX free other data structures XXX */
    925  1.126        ad 	mutex_destroy(&sc->sc_doorbell_lock);
    926    1.1  augustss 
    927  1.128  jmcneill 	EOWRITE4(sc, EHCI_CONFIGFLAG, 0);
    928  1.128  jmcneill 
    929    1.1  augustss 	return (rv);
    930    1.1  augustss }
    931    1.1  augustss 
    932    1.1  augustss 
    933    1.1  augustss int
    934  1.132    dyoung ehci_activate(device_t self, enum devact act)
    935    1.1  augustss {
    936  1.132    dyoung 	struct ehci_softc *sc = device_private(self);
    937    1.1  augustss 	int rv = 0;
    938    1.1  augustss 
    939    1.1  augustss 	switch (act) {
    940    1.1  augustss 	case DVACT_ACTIVATE:
    941    1.1  augustss 		return (EOPNOTSUPP);
    942    1.1  augustss 
    943    1.1  augustss 	case DVACT_DEACTIVATE:
    944  1.124  kiyohara 		sc->sc_dying = 1;
    945    1.1  augustss 		if (sc->sc_child != NULL)
    946    1.1  augustss 			rv = config_deactivate(sc->sc_child);
    947    1.1  augustss 		break;
    948    1.1  augustss 	}
    949    1.1  augustss 	return (rv);
    950    1.1  augustss }
    951    1.1  augustss 
    952    1.5  augustss /*
    953    1.5  augustss  * Handle suspend/resume.
    954    1.5  augustss  *
    955    1.5  augustss  * We need to switch to polling mode here, because this routine is
    956   1.73  augustss  * called from an interrupt context.  This is all right since we
    957    1.5  augustss  * are almost suspended anyway.
    958  1.127  jmcneill  *
    959  1.127  jmcneill  * Note that this power handler isn't to be registered directly; the
    960  1.127  jmcneill  * bus glue needs to call out to it.
    961    1.5  augustss  */
    962  1.127  jmcneill bool
    963  1.132    dyoung ehci_suspend(device_t dv PMF_FN_ARGS)
    964    1.5  augustss {
    965  1.132    dyoung 	ehci_softc_t *sc = device_private(dv);
    966  1.127  jmcneill 	int i, s;
    967  1.127  jmcneill 	uint32_t cmd, hcr;
    968  1.127  jmcneill 
    969  1.127  jmcneill 	s = splhardusb();
    970  1.127  jmcneill 
    971  1.127  jmcneill 	sc->sc_bus.use_polling++;
    972  1.127  jmcneill 
    973  1.127  jmcneill 	for (i = 1; i <= sc->sc_noport; i++) {
    974  1.129  jmcneill 		cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR;
    975  1.127  jmcneill 		if ((cmd & EHCI_PS_PO) == 0 && (cmd & EHCI_PS_PE) == EHCI_PS_PE)
    976  1.127  jmcneill 			EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_SUSP);
    977  1.127  jmcneill 	}
    978  1.127  jmcneill 
    979  1.127  jmcneill 	sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
    980  1.127  jmcneill 
    981  1.127  jmcneill 	cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
    982  1.127  jmcneill 	EOWRITE4(sc, EHCI_USBCMD, cmd);
    983  1.127  jmcneill 
    984  1.127  jmcneill 	for (i = 0; i < 100; i++) {
    985  1.127  jmcneill 		hcr = EOREAD4(sc, EHCI_USBSTS) & (EHCI_STS_ASS | EHCI_STS_PSS);
    986  1.127  jmcneill 		if (hcr == 0)
    987  1.127  jmcneill 			break;
    988    1.5  augustss 
    989  1.127  jmcneill 		usb_delay_ms(&sc->sc_bus, 1);
    990  1.127  jmcneill 	}
    991  1.127  jmcneill 	if (hcr != 0)
    992  1.134  drochner 		printf("%s: reset timeout\n", device_xname(dv));
    993    1.5  augustss 
    994  1.127  jmcneill 	cmd &= ~EHCI_CMD_RS;
    995  1.127  jmcneill 	EOWRITE4(sc, EHCI_USBCMD, cmd);
    996   1.74  augustss 
    997  1.127  jmcneill 	for (i = 0; i < 100; i++) {
    998  1.127  jmcneill 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
    999  1.127  jmcneill 		if (hcr == EHCI_STS_HCH)
   1000  1.127  jmcneill 			break;
   1001   1.74  augustss 
   1002  1.127  jmcneill 		usb_delay_ms(&sc->sc_bus, 1);
   1003  1.127  jmcneill 	}
   1004  1.127  jmcneill 	if (hcr != EHCI_STS_HCH)
   1005  1.134  drochner 		printf("%s: config timeout\n", device_xname(dv));
   1006   1.74  augustss 
   1007  1.127  jmcneill 	sc->sc_bus.use_polling--;
   1008  1.127  jmcneill 	splx(s);
   1009   1.74  augustss 
   1010  1.127  jmcneill 	return true;
   1011  1.127  jmcneill }
   1012   1.74  augustss 
   1013  1.127  jmcneill bool
   1014  1.132    dyoung ehci_resume(device_t dv PMF_FN_ARGS)
   1015  1.127  jmcneill {
   1016  1.132    dyoung 	ehci_softc_t *sc = device_private(dv);
   1017  1.132    dyoung 	int i;
   1018  1.127  jmcneill 	uint32_t cmd, hcr;
   1019   1.74  augustss 
   1020  1.127  jmcneill 	/* restore things in case the bios sucks */
   1021  1.127  jmcneill 	EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
   1022  1.127  jmcneill 	EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
   1023  1.127  jmcneill 	EOWRITE4(sc, EHCI_ASYNCLISTADDR,
   1024  1.127  jmcneill 	    sc->sc_async_head->physaddr | EHCI_LINK_QH);
   1025  1.130  jmcneill 
   1026  1.130  jmcneill 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs & ~EHCI_INTR_PCIE);
   1027   1.74  augustss 
   1028  1.127  jmcneill 	EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
   1029   1.74  augustss 
   1030  1.127  jmcneill 	hcr = 0;
   1031  1.127  jmcneill 	for (i = 1; i <= sc->sc_noport; i++) {
   1032  1.129  jmcneill 		cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR;
   1033  1.127  jmcneill 		if ((cmd & EHCI_PS_PO) == 0 &&
   1034  1.127  jmcneill 		    (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
   1035  1.127  jmcneill 			EOWRITE4(sc, EHCI_PORTSC(i), cmd | EHCI_PS_FPR);
   1036  1.127  jmcneill 			hcr = 1;
   1037   1.74  augustss 		}
   1038  1.127  jmcneill 	}
   1039  1.127  jmcneill 
   1040  1.127  jmcneill 	if (hcr) {
   1041  1.127  jmcneill 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1042  1.127  jmcneill 
   1043  1.127  jmcneill 		for (i = 1; i <= sc->sc_noport; i++) {
   1044  1.129  jmcneill 			cmd = EOREAD4(sc, EHCI_PORTSC(i)) & ~EHCI_PS_CLEAR;
   1045  1.127  jmcneill 			if ((cmd & EHCI_PS_PO) == 0 &&
   1046  1.127  jmcneill 			    (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
   1047  1.127  jmcneill 				EOWRITE4(sc, EHCI_PORTSC(i),
   1048  1.127  jmcneill 				    cmd & ~EHCI_PS_FPR);
   1049   1.74  augustss 		}
   1050  1.127  jmcneill 	}
   1051  1.127  jmcneill 
   1052  1.127  jmcneill 	EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
   1053  1.130  jmcneill 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
   1054   1.74  augustss 
   1055  1.127  jmcneill 	for (i = 0; i < 100; i++) {
   1056  1.127  jmcneill 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1057  1.127  jmcneill 		if (hcr != EHCI_STS_HCH)
   1058  1.127  jmcneill 			break;
   1059   1.74  augustss 
   1060  1.127  jmcneill 		usb_delay_ms(&sc->sc_bus, 1);
   1061    1.5  augustss 	}
   1062  1.127  jmcneill 	if (hcr == EHCI_STS_HCH)
   1063  1.134  drochner 		printf("%s: config timeout\n", device_xname(dv));
   1064  1.127  jmcneill 
   1065  1.127  jmcneill 	return true;
   1066    1.5  augustss }
   1067    1.5  augustss 
   1068    1.5  augustss /*
   1069    1.5  augustss  * Shut down the controller when the system is going down.
   1070    1.5  augustss  */
   1071  1.133    dyoung bool
   1072  1.133    dyoung ehci_shutdown(device_t self, int flags)
   1073    1.5  augustss {
   1074  1.133    dyoung 	ehci_softc_t *sc = device_private(self);
   1075    1.5  augustss 
   1076    1.5  augustss 	DPRINTF(("ehci_shutdown: stopping the HC\n"));
   1077    1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
   1078    1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
   1079  1.133    dyoung 	return true;
   1080    1.5  augustss }
   1081    1.5  augustss 
   1082    1.5  augustss usbd_status
   1083    1.5  augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
   1084    1.5  augustss {
   1085  1.134  drochner 	struct ehci_softc *sc = bus->hci_private;
   1086   1.25  augustss 	usbd_status err;
   1087    1.5  augustss 
   1088   1.25  augustss 	err = usb_allocmem(&sc->sc_bus, size, 0, dma);
   1089   1.90      fvdl 	if (err == USBD_NOMEM)
   1090   1.90      fvdl 		err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
   1091   1.25  augustss #ifdef EHCI_DEBUG
   1092   1.25  augustss 	if (err)
   1093   1.25  augustss 		printf("ehci_allocm: usb_allocmem()=%d\n", err);
   1094   1.25  augustss #endif
   1095   1.25  augustss 	return (err);
   1096    1.5  augustss }
   1097    1.5  augustss 
   1098    1.5  augustss void
   1099    1.5  augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
   1100    1.5  augustss {
   1101  1.134  drochner 	struct ehci_softc *sc = bus->hci_private;
   1102    1.5  augustss 
   1103   1.90      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
   1104  1.134  drochner 		usb_reserve_freem(&sc->sc_dma_reserve,
   1105   1.90      fvdl 		    dma);
   1106   1.90      fvdl 		return;
   1107   1.90      fvdl 	}
   1108    1.5  augustss 	usb_freemem(&sc->sc_bus, dma);
   1109    1.5  augustss }
   1110    1.5  augustss 
   1111    1.5  augustss usbd_xfer_handle
   1112    1.5  augustss ehci_allocx(struct usbd_bus *bus)
   1113    1.5  augustss {
   1114  1.134  drochner 	struct ehci_softc *sc = bus->hci_private;
   1115    1.5  augustss 	usbd_xfer_handle xfer;
   1116    1.5  augustss 
   1117    1.5  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
   1118   1.28  augustss 	if (xfer != NULL) {
   1119   1.32     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
   1120   1.28  augustss #ifdef DIAGNOSTIC
   1121   1.28  augustss 		if (xfer->busy_free != XFER_FREE) {
   1122   1.72  augustss 			printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
   1123   1.28  augustss 			       xfer->busy_free);
   1124   1.28  augustss 		}
   1125   1.28  augustss #endif
   1126   1.28  augustss 	} else {
   1127   1.15  augustss 		xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
   1128   1.28  augustss 	}
   1129   1.18  augustss 	if (xfer != NULL) {
   1130   1.71  augustss 		memset(xfer, 0, sizeof(struct ehci_xfer));
   1131   1.18  augustss #ifdef DIAGNOSTIC
   1132   1.18  augustss 		EXFER(xfer)->isdone = 1;
   1133   1.18  augustss 		xfer->busy_free = XFER_BUSY;
   1134   1.18  augustss #endif
   1135   1.18  augustss 	}
   1136    1.5  augustss 	return (xfer);
   1137    1.5  augustss }
   1138    1.5  augustss 
   1139    1.5  augustss void
   1140    1.5  augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
   1141    1.5  augustss {
   1142  1.134  drochner 	struct ehci_softc *sc = bus->hci_private;
   1143    1.5  augustss 
   1144   1.18  augustss #ifdef DIAGNOSTIC
   1145   1.18  augustss 	if (xfer->busy_free != XFER_BUSY) {
   1146   1.18  augustss 		printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
   1147   1.18  augustss 		       xfer->busy_free);
   1148   1.18  augustss 	}
   1149   1.18  augustss 	xfer->busy_free = XFER_FREE;
   1150   1.18  augustss 	if (!EXFER(xfer)->isdone) {
   1151   1.18  augustss 		printf("ehci_freex: !isdone\n");
   1152   1.18  augustss 	}
   1153   1.18  augustss #endif
   1154    1.5  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
   1155    1.5  augustss }
   1156    1.5  augustss 
   1157    1.5  augustss Static void
   1158    1.5  augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
   1159    1.5  augustss {
   1160   1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1161   1.15  augustss 
   1162   1.23  augustss 	DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
   1163   1.23  augustss 		 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
   1164   1.22  augustss #ifdef USB_DEBUG
   1165   1.22  augustss 	if (ehcidebug)
   1166   1.22  augustss 		usbd_dump_pipe(pipe);
   1167    1.5  augustss #endif
   1168   1.55   mycroft 	epipe->nexttoggle = 0;
   1169    1.5  augustss }
   1170    1.5  augustss 
   1171    1.5  augustss Static void
   1172  1.115  christos ehci_noop(usbd_pipe_handle pipe)
   1173    1.5  augustss {
   1174    1.5  augustss }
   1175    1.5  augustss 
   1176    1.5  augustss #ifdef EHCI_DEBUG
   1177    1.5  augustss void
   1178   1.18  augustss ehci_dump_regs(ehci_softc_t *sc)
   1179    1.5  augustss {
   1180    1.6  augustss 	int i;
   1181    1.6  augustss 	printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
   1182    1.6  augustss 	       EOREAD4(sc, EHCI_USBCMD),
   1183    1.6  augustss 	       EOREAD4(sc, EHCI_USBSTS),
   1184    1.6  augustss 	       EOREAD4(sc, EHCI_USBINTR));
   1185   1.29  augustss 	printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
   1186   1.15  augustss 	       EOREAD4(sc, EHCI_FRINDEX),
   1187   1.15  augustss 	       EOREAD4(sc, EHCI_CTRLDSSEGMENT),
   1188   1.15  augustss 	       EOREAD4(sc, EHCI_PERIODICLISTBASE),
   1189   1.15  augustss 	       EOREAD4(sc, EHCI_ASYNCLISTADDR));
   1190    1.6  augustss 	for (i = 1; i <= sc->sc_noport; i++)
   1191   1.33  augustss 		printf("port %d status=0x%08x\n", i,
   1192    1.6  augustss 		       EOREAD4(sc, EHCI_PORTSC(i)));
   1193   1.39    martin }
   1194   1.39    martin 
   1195   1.40    martin /*
   1196   1.40    martin  * Unused function - this is meant to be called from a kernel
   1197   1.40    martin  * debugger.
   1198   1.40    martin  */
   1199   1.39    martin void
   1200   1.39    martin ehci_dump()
   1201   1.39    martin {
   1202   1.39    martin 	ehci_dump_regs(theehci);
   1203    1.6  augustss }
   1204    1.6  augustss 
   1205    1.6  augustss void
   1206   1.15  augustss ehci_dump_link(ehci_link_t link, int type)
   1207    1.9  augustss {
   1208   1.15  augustss 	link = le32toh(link);
   1209   1.15  augustss 	printf("0x%08x", link);
   1210    1.9  augustss 	if (link & EHCI_LINK_TERMINATE)
   1211   1.15  augustss 		printf("<T>");
   1212   1.15  augustss 	else {
   1213   1.15  augustss 		printf("<");
   1214   1.15  augustss 		if (type) {
   1215   1.15  augustss 			switch (EHCI_LINK_TYPE(link)) {
   1216   1.15  augustss 			case EHCI_LINK_ITD: printf("ITD"); break;
   1217   1.15  augustss 			case EHCI_LINK_QH: printf("QH"); break;
   1218   1.15  augustss 			case EHCI_LINK_SITD: printf("SITD"); break;
   1219   1.15  augustss 			case EHCI_LINK_FSTN: printf("FSTN"); break;
   1220   1.16  augustss 			}
   1221   1.15  augustss 		}
   1222    1.9  augustss 		printf(">");
   1223   1.15  augustss 	}
   1224   1.15  augustss }
   1225   1.15  augustss 
   1226   1.15  augustss void
   1227   1.15  augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
   1228   1.15  augustss {
   1229   1.29  augustss 	int i;
   1230   1.29  augustss 	u_int32_t stop;
   1231   1.29  augustss 
   1232   1.29  augustss 	stop = 0;
   1233   1.29  augustss 	for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
   1234   1.15  augustss 		ehci_dump_sqtd(sqtd);
   1235   1.72  augustss 		stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
   1236   1.29  augustss 	}
   1237   1.29  augustss 	if (sqtd)
   1238   1.29  augustss 		printf("dump aborted, too many TDs\n");
   1239    1.9  augustss }
   1240    1.9  augustss 
   1241    1.9  augustss void
   1242    1.9  augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
   1243    1.9  augustss {
   1244    1.9  augustss 	printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
   1245    1.9  augustss 	ehci_dump_qtd(&sqtd->qtd);
   1246    1.9  augustss }
   1247    1.9  augustss 
   1248    1.9  augustss void
   1249    1.9  augustss ehci_dump_qtd(ehci_qtd_t *qtd)
   1250    1.9  augustss {
   1251    1.9  augustss 	u_int32_t s;
   1252   1.15  augustss 	char sbuf[128];
   1253    1.9  augustss 
   1254   1.15  augustss 	printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
   1255   1.15  augustss 	printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
   1256    1.9  augustss 	printf("\n");
   1257   1.15  augustss 	s = le32toh(qtd->qtd_status);
   1258   1.15  augustss 	bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
   1259   1.15  augustss 			 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
   1260   1.15  augustss 			 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
   1261    1.9  augustss 	printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
   1262    1.9  augustss 	       s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
   1263    1.9  augustss 	       EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
   1264   1.15  augustss 	printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
   1265   1.15  augustss 	       EHCI_QTD_GET_PID(s), sbuf);
   1266    1.9  augustss 	for (s = 0; s < 5; s++)
   1267   1.15  augustss 		printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
   1268    1.9  augustss }
   1269    1.9  augustss 
   1270    1.9  augustss void
   1271    1.9  augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
   1272    1.9  augustss {
   1273    1.9  augustss 	ehci_qh_t *qh = &sqh->qh;
   1274   1.15  augustss 	u_int32_t endp, endphub;
   1275    1.9  augustss 
   1276    1.9  augustss 	printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
   1277   1.15  augustss 	printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
   1278   1.15  augustss 	endp = le32toh(qh->qh_endp);
   1279   1.15  augustss 	printf("  endp=0x%08x\n", endp);
   1280   1.15  augustss 	printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
   1281   1.15  augustss 	       EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
   1282   1.15  augustss 	       EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
   1283   1.15  augustss 	       EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
   1284   1.15  augustss 	printf("    mpl=0x%x ctl=%d nrl=%d\n",
   1285   1.15  augustss 	       EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
   1286   1.15  augustss 	       EHCI_QH_GET_NRL(endp));
   1287   1.15  augustss 	endphub = le32toh(qh->qh_endphub);
   1288   1.15  augustss 	printf("  endphub=0x%08x\n", endphub);
   1289   1.15  augustss 	printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
   1290   1.15  augustss 	       EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
   1291   1.15  augustss 	       EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
   1292   1.15  augustss 	       EHCI_QH_GET_MULT(endphub));
   1293   1.15  augustss 	printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
   1294   1.12  augustss 	printf("Overlay qTD:\n");
   1295    1.9  augustss 	ehci_dump_qtd(&qh->qh_qtd);
   1296    1.9  augustss }
   1297    1.9  augustss 
   1298   1.38    martin #ifdef DIAGNOSTIC
   1299   1.18  augustss Static void
   1300   1.18  augustss ehci_dump_exfer(struct ehci_xfer *ex)
   1301   1.18  augustss {
   1302   1.18  augustss 	printf("ehci_dump_exfer: ex=%p\n", ex);
   1303   1.18  augustss }
   1304   1.38    martin #endif
   1305    1.5  augustss #endif
   1306    1.5  augustss 
   1307    1.5  augustss usbd_status
   1308    1.5  augustss ehci_open(usbd_pipe_handle pipe)
   1309    1.5  augustss {
   1310    1.5  augustss 	usbd_device_handle dev = pipe->device;
   1311  1.134  drochner 	ehci_softc_t *sc = dev->bus->hci_private;
   1312    1.5  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1313    1.5  augustss 	u_int8_t addr = dev->address;
   1314    1.5  augustss 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   1315    1.5  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1316   1.10  augustss 	ehci_soft_qh_t *sqh;
   1317   1.10  augustss 	usbd_status err;
   1318   1.10  augustss 	int s;
   1319   1.78  augustss 	int ival, speed, naks;
   1320   1.80  augustss 	int hshubaddr, hshubport;
   1321    1.5  augustss 
   1322    1.5  augustss 	DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1323    1.5  augustss 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1324    1.5  augustss 
   1325   1.80  augustss 	if (dev->myhsport) {
   1326   1.80  augustss 		hshubaddr = dev->myhsport->parent->address;
   1327   1.80  augustss 		hshubport = dev->myhsport->portno;
   1328   1.80  augustss 	} else {
   1329   1.80  augustss 		hshubaddr = 0;
   1330   1.80  augustss 		hshubport = 0;
   1331   1.80  augustss 	}
   1332   1.80  augustss 
   1333   1.17  augustss 	if (sc->sc_dying)
   1334   1.17  augustss 		return (USBD_IOERROR);
   1335   1.17  augustss 
   1336   1.55   mycroft 	epipe->nexttoggle = 0;
   1337   1.55   mycroft 
   1338    1.5  augustss 	if (addr == sc->sc_addr) {
   1339    1.5  augustss 		switch (ed->bEndpointAddress) {
   1340    1.5  augustss 		case USB_CONTROL_ENDPOINT:
   1341    1.5  augustss 			pipe->methods = &ehci_root_ctrl_methods;
   1342    1.5  augustss 			break;
   1343    1.5  augustss 		case UE_DIR_IN | EHCI_INTR_ENDPT:
   1344    1.5  augustss 			pipe->methods = &ehci_root_intr_methods;
   1345    1.5  augustss 			break;
   1346    1.5  augustss 		default:
   1347    1.5  augustss 			return (USBD_INVAL);
   1348    1.5  augustss 		}
   1349   1.10  augustss 		return (USBD_NORMAL_COMPLETION);
   1350   1.10  augustss 	}
   1351   1.10  augustss 
   1352   1.24  augustss 	/* XXX All this stuff is only valid for async. */
   1353   1.11  augustss 	switch (dev->speed) {
   1354   1.11  augustss 	case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
   1355   1.11  augustss 	case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
   1356   1.11  augustss 	case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
   1357   1.37    provos 	default: panic("ehci_open: bad device speed %d", dev->speed);
   1358   1.11  augustss 	}
   1359   1.99  augustss 	if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
   1360   1.99  augustss 		printf("%s: *** WARNING: opening low/full speed isoc device, "
   1361   1.99  augustss 		       "this does not work yet.\n",
   1362  1.134  drochner 		       device_xname(sc->sc_dev));
   1363   1.80  augustss 		DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
   1364   1.80  augustss 			    hshubaddr, hshubport));
   1365   1.99  augustss 		return USBD_INVAL;
   1366   1.80  augustss 	}
   1367   1.80  augustss 
   1368   1.10  augustss 	naks = 8;		/* XXX */
   1369   1.10  augustss 	sqh = ehci_alloc_sqh(sc);
   1370   1.10  augustss 	if (sqh == NULL)
   1371  1.116  drochner 		return (USBD_NOMEM);
   1372   1.10  augustss 	/* qh_link filled when the QH is added */
   1373   1.10  augustss 	sqh->qh.qh_endp = htole32(
   1374   1.10  augustss 		EHCI_QH_SET_ADDR(addr) |
   1375   1.56   mycroft 		EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
   1376   1.55   mycroft 		EHCI_QH_SET_EPS(speed) |
   1377   1.55   mycroft 		EHCI_QH_DTC |
   1378   1.10  augustss 		EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
   1379   1.10  augustss 		(speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
   1380   1.10  augustss 		 EHCI_QH_CTL : 0) |
   1381   1.10  augustss 		EHCI_QH_SET_NRL(naks)
   1382   1.10  augustss 		);
   1383   1.10  augustss 	sqh->qh.qh_endphub = htole32(
   1384   1.78  augustss 		EHCI_QH_SET_MULT(1) |
   1385   1.80  augustss 		EHCI_QH_SET_HUBA(hshubaddr) |
   1386   1.80  augustss 		EHCI_QH_SET_PORT(hshubport) |
   1387   1.93  augustss 		EHCI_QH_SET_CMASK(0x08) | /* XXX */
   1388   1.93  augustss 		EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0)
   1389   1.10  augustss 		);
   1390   1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
   1391   1.11  augustss 	/* Fill the overlay qTD */
   1392   1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
   1393   1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   1394   1.15  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(0);
   1395   1.10  augustss 
   1396   1.10  augustss 	epipe->sqh = sqh;
   1397    1.5  augustss 
   1398   1.10  augustss 	switch (xfertype) {
   1399   1.10  augustss 	case UE_CONTROL:
   1400   1.33  augustss 		err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
   1401   1.10  augustss 				   0, &epipe->u.ctl.reqdma);
   1402   1.25  augustss #ifdef EHCI_DEBUG
   1403   1.25  augustss 		if (err)
   1404   1.25  augustss 			printf("ehci_open: usb_allocmem()=%d\n", err);
   1405   1.25  augustss #endif
   1406   1.10  augustss 		if (err)
   1407  1.116  drochner 			goto bad;
   1408   1.11  augustss 		pipe->methods = &ehci_device_ctrl_methods;
   1409   1.10  augustss 		s = splusb();
   1410   1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1411   1.10  augustss 		splx(s);
   1412   1.10  augustss 		break;
   1413   1.10  augustss 	case UE_BULK:
   1414   1.10  augustss 		pipe->methods = &ehci_device_bulk_methods;
   1415   1.10  augustss 		s = splusb();
   1416   1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1417   1.10  augustss 		splx(s);
   1418   1.10  augustss 		break;
   1419   1.24  augustss 	case UE_INTERRUPT:
   1420   1.24  augustss 		pipe->methods = &ehci_device_intr_methods;
   1421   1.78  augustss 		ival = pipe->interval;
   1422  1.116  drochner 		if (ival == USBD_DEFAULT_INTERVAL) {
   1423  1.116  drochner 			if (speed == EHCI_QH_SPEED_HIGH) {
   1424  1.116  drochner 				if (ed->bInterval > 16) {
   1425  1.116  drochner 					/*
   1426  1.116  drochner 					 * illegal with high-speed, but there
   1427  1.116  drochner 					 * were documentation bugs in the spec,
   1428  1.116  drochner 					 * so be generous
   1429  1.116  drochner 					 */
   1430  1.116  drochner 					ival = 256;
   1431  1.116  drochner 				} else
   1432  1.116  drochner 					ival = (1 << (ed->bInterval - 1)) / 8;
   1433  1.116  drochner 			} else
   1434  1.116  drochner 				ival = ed->bInterval;
   1435  1.116  drochner 		}
   1436  1.116  drochner 		err = ehci_device_setintr(sc, sqh, ival);
   1437  1.116  drochner 		if (err)
   1438  1.116  drochner 			goto bad;
   1439  1.116  drochner 		break;
   1440   1.24  augustss 	case UE_ISOCHRONOUS:
   1441   1.24  augustss 		pipe->methods = &ehci_device_isoc_methods;
   1442  1.116  drochner 		/* FALLTHROUGH */
   1443   1.10  augustss 	default:
   1444  1.116  drochner 		err = USBD_INVAL;
   1445  1.116  drochner 		goto bad;
   1446    1.5  augustss 	}
   1447    1.5  augustss 	return (USBD_NORMAL_COMPLETION);
   1448    1.5  augustss 
   1449  1.116  drochner  bad:
   1450   1.11  augustss 	ehci_free_sqh(sc, sqh);
   1451  1.116  drochner 	return (err);
   1452   1.10  augustss }
   1453   1.10  augustss 
   1454   1.10  augustss /*
   1455   1.10  augustss  * Add an ED to the schedule.  Called at splusb().
   1456   1.10  augustss  */
   1457   1.10  augustss void
   1458   1.10  augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1459   1.10  augustss {
   1460   1.10  augustss 	SPLUSBCHECK;
   1461   1.10  augustss 
   1462   1.10  augustss 	sqh->next = head->next;
   1463   1.10  augustss 	sqh->qh.qh_link = head->qh.qh_link;
   1464   1.10  augustss 	head->next = sqh;
   1465   1.15  augustss 	head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
   1466   1.10  augustss 
   1467   1.10  augustss #ifdef EHCI_DEBUG
   1468   1.22  augustss 	if (ehcidebug > 5) {
   1469   1.10  augustss 		printf("ehci_add_qh:\n");
   1470   1.10  augustss 		ehci_dump_sqh(sqh);
   1471   1.10  augustss 	}
   1472    1.5  augustss #endif
   1473    1.5  augustss }
   1474    1.5  augustss 
   1475   1.10  augustss /*
   1476   1.10  augustss  * Remove an ED from the schedule.  Called at splusb().
   1477   1.10  augustss  */
   1478   1.10  augustss void
   1479   1.10  augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1480   1.10  augustss {
   1481   1.33  augustss 	ehci_soft_qh_t *p;
   1482   1.10  augustss 
   1483   1.10  augustss 	SPLUSBCHECK;
   1484   1.10  augustss 	/* XXX */
   1485   1.42  augustss 	for (p = head; p != NULL && p->next != sqh; p = p->next)
   1486   1.10  augustss 		;
   1487   1.10  augustss 	if (p == NULL)
   1488   1.37    provos 		panic("ehci_rem_qh: ED not found");
   1489   1.10  augustss 	p->next = sqh->next;
   1490   1.10  augustss 	p->qh.qh_link = sqh->qh.qh_link;
   1491   1.10  augustss 
   1492   1.11  augustss 	ehci_sync_hc(sc);
   1493   1.11  augustss }
   1494   1.11  augustss 
   1495   1.23  augustss void
   1496   1.23  augustss ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
   1497   1.23  augustss {
   1498   1.85  augustss 	int i;
   1499   1.87  augustss 	u_int32_t status;
   1500   1.85  augustss 
   1501   1.87  augustss 	/* Save toggle bit and ping status. */
   1502   1.87  augustss 	status = sqh->qh.qh_qtd.qtd_status &
   1503   1.87  augustss 	    htole32(EHCI_QTD_TOGGLE_MASK |
   1504   1.87  augustss 		    EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
   1505   1.85  augustss 	/* Set HALTED to make hw leave it alone. */
   1506   1.85  augustss 	sqh->qh.qh_qtd.qtd_status =
   1507   1.85  augustss 	    htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
   1508   1.23  augustss 	sqh->qh.qh_curqtd = 0;
   1509   1.23  augustss 	sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
   1510   1.85  augustss 	sqh->qh.qh_qtd.qtd_altnext = 0;
   1511   1.85  augustss 	for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
   1512   1.85  augustss 		sqh->qh.qh_qtd.qtd_buffer[i] = 0;
   1513   1.23  augustss 	sqh->sqtd = sqtd;
   1514   1.87  augustss 	/* Set !HALTED && !ACTIVE to start execution, preserve some fields */
   1515   1.87  augustss 	sqh->qh.qh_qtd.qtd_status = status;
   1516   1.23  augustss }
   1517   1.23  augustss 
   1518   1.11  augustss /*
   1519   1.11  augustss  * Ensure that the HC has released all references to the QH.  We do this
   1520   1.11  augustss  * by asking for a Async Advance Doorbell interrupt and then we wait for
   1521   1.11  augustss  * the interrupt.
   1522   1.11  augustss  * To make this easier we first obtain exclusive use of the doorbell.
   1523   1.11  augustss  */
   1524   1.11  augustss void
   1525   1.11  augustss ehci_sync_hc(ehci_softc_t *sc)
   1526   1.11  augustss {
   1527   1.15  augustss 	int s, error;
   1528   1.11  augustss 
   1529   1.12  augustss 	if (sc->sc_dying) {
   1530   1.12  augustss 		DPRINTFN(2,("ehci_sync_hc: dying\n"));
   1531   1.12  augustss 		return;
   1532   1.12  augustss 	}
   1533   1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: enter\n"));
   1534  1.126        ad 	mutex_enter(&sc->sc_doorbell_lock);	/* get doorbell */
   1535   1.10  augustss 	s = splhardusb();
   1536   1.10  augustss 	/* ask for doorbell */
   1537   1.10  augustss 	EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
   1538   1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1539   1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1540   1.15  augustss 	error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
   1541   1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1542   1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1543   1.10  augustss 	splx(s);
   1544  1.126        ad 	mutex_exit(&sc->sc_doorbell_lock);	/* release doorbell */
   1545   1.15  augustss #ifdef DIAGNOSTIC
   1546   1.15  augustss 	if (error)
   1547   1.15  augustss 		printf("ehci_sync_hc: tsleep() = %d\n", error);
   1548   1.15  augustss #endif
   1549   1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: exit\n"));
   1550   1.10  augustss }
   1551   1.10  augustss 
   1552    1.5  augustss /***********/
   1553    1.5  augustss 
   1554    1.5  augustss /*
   1555    1.5  augustss  * Data structures and routines to emulate the root hub.
   1556    1.5  augustss  */
   1557    1.5  augustss Static usb_device_descriptor_t ehci_devd = {
   1558    1.5  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1559    1.5  augustss 	UDESC_DEVICE,		/* type */
   1560    1.5  augustss 	{0x00, 0x02},		/* USB version */
   1561    1.5  augustss 	UDCLASS_HUB,		/* class */
   1562    1.5  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1563   1.11  augustss 	UDPROTO_HSHUBSTT,	/* protocol */
   1564    1.5  augustss 	64,			/* max packet */
   1565    1.5  augustss 	{0},{0},{0x00,0x01},	/* device id */
   1566    1.5  augustss 	1,2,0,			/* string indicies */
   1567    1.5  augustss 	1			/* # of configurations */
   1568    1.5  augustss };
   1569    1.5  augustss 
   1570  1.123  drochner Static const usb_device_qualifier_t ehci_odevd = {
   1571   1.11  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1572   1.11  augustss 	UDESC_DEVICE_QUALIFIER,	/* type */
   1573   1.11  augustss 	{0x00, 0x02},		/* USB version */
   1574   1.11  augustss 	UDCLASS_HUB,		/* class */
   1575   1.11  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1576   1.11  augustss 	UDPROTO_FSHUB,		/* protocol */
   1577   1.11  augustss 	64,			/* max packet */
   1578   1.11  augustss 	1,			/* # of configurations */
   1579   1.11  augustss 	0
   1580   1.11  augustss };
   1581   1.11  augustss 
   1582  1.123  drochner Static const usb_config_descriptor_t ehci_confd = {
   1583    1.5  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   1584    1.5  augustss 	UDESC_CONFIG,
   1585    1.5  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1586    1.5  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1587    1.5  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1588    1.5  augustss 	1,
   1589    1.5  augustss 	1,
   1590    1.5  augustss 	0,
   1591  1.120  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   1592    1.5  augustss 	0			/* max power */
   1593    1.5  augustss };
   1594    1.5  augustss 
   1595  1.123  drochner Static const usb_interface_descriptor_t ehci_ifcd = {
   1596    1.5  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1597    1.5  augustss 	UDESC_INTERFACE,
   1598    1.5  augustss 	0,
   1599    1.5  augustss 	0,
   1600    1.5  augustss 	1,
   1601    1.5  augustss 	UICLASS_HUB,
   1602    1.5  augustss 	UISUBCLASS_HUB,
   1603   1.11  augustss 	UIPROTO_HSHUBSTT,
   1604    1.5  augustss 	0
   1605    1.5  augustss };
   1606    1.5  augustss 
   1607  1.123  drochner Static const usb_endpoint_descriptor_t ehci_endpd = {
   1608    1.5  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1609    1.5  augustss 	UDESC_ENDPOINT,
   1610    1.5  augustss 	UE_DIR_IN | EHCI_INTR_ENDPT,
   1611    1.5  augustss 	UE_INTERRUPT,
   1612    1.5  augustss 	{8, 0},			/* max packet */
   1613  1.118  drochner 	12
   1614    1.5  augustss };
   1615    1.5  augustss 
   1616  1.123  drochner Static const usb_hub_descriptor_t ehci_hubd = {
   1617    1.5  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   1618    1.5  augustss 	UDESC_HUB,
   1619    1.5  augustss 	0,
   1620    1.5  augustss 	{0,0},
   1621    1.5  augustss 	0,
   1622    1.5  augustss 	0,
   1623  1.111  christos 	{""},
   1624  1.111  christos 	{""},
   1625    1.5  augustss };
   1626    1.5  augustss 
   1627    1.5  augustss /*
   1628    1.5  augustss  * Simulate a hardware hub by handling all the necessary requests.
   1629    1.5  augustss  */
   1630    1.5  augustss Static usbd_status
   1631    1.5  augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
   1632    1.5  augustss {
   1633    1.5  augustss 	usbd_status err;
   1634    1.5  augustss 
   1635    1.5  augustss 	/* Insert last in queue. */
   1636    1.5  augustss 	err = usb_insert_transfer(xfer);
   1637    1.5  augustss 	if (err)
   1638    1.5  augustss 		return (err);
   1639    1.5  augustss 
   1640    1.5  augustss 	/* Pipe isn't running, start first */
   1641    1.5  augustss 	return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1642    1.5  augustss }
   1643    1.5  augustss 
   1644    1.5  augustss Static usbd_status
   1645    1.5  augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
   1646    1.5  augustss {
   1647  1.134  drochner 	ehci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   1648    1.5  augustss 	usb_device_request_t *req;
   1649    1.5  augustss 	void *buf = NULL;
   1650    1.5  augustss 	int port, i;
   1651    1.5  augustss 	int s, len, value, index, l, totlen = 0;
   1652    1.5  augustss 	usb_port_status_t ps;
   1653    1.5  augustss 	usb_hub_descriptor_t hubd;
   1654    1.5  augustss 	usbd_status err;
   1655    1.5  augustss 	u_int32_t v;
   1656    1.5  augustss 
   1657    1.5  augustss 	if (sc->sc_dying)
   1658    1.5  augustss 		return (USBD_IOERROR);
   1659    1.5  augustss 
   1660    1.5  augustss #ifdef DIAGNOSTIC
   1661    1.5  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   1662    1.5  augustss 		/* XXX panic */
   1663    1.5  augustss 		return (USBD_INVAL);
   1664    1.5  augustss #endif
   1665    1.5  augustss 	req = &xfer->request;
   1666    1.5  augustss 
   1667   1.72  augustss 	DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
   1668    1.5  augustss 		    req->bmRequestType, req->bRequest));
   1669    1.5  augustss 
   1670    1.5  augustss 	len = UGETW(req->wLength);
   1671    1.5  augustss 	value = UGETW(req->wValue);
   1672    1.5  augustss 	index = UGETW(req->wIndex);
   1673    1.5  augustss 
   1674    1.5  augustss 	if (len != 0)
   1675   1.30  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   1676    1.5  augustss 
   1677    1.5  augustss #define C(x,y) ((x) | ((y) << 8))
   1678    1.5  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   1679    1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1680    1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1681    1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1682   1.33  augustss 		/*
   1683    1.5  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1684    1.5  augustss 		 * for the integrated root hub.
   1685    1.5  augustss 		 */
   1686    1.5  augustss 		break;
   1687    1.5  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1688    1.5  augustss 		if (len > 0) {
   1689    1.5  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   1690    1.5  augustss 			totlen = 1;
   1691    1.5  augustss 		}
   1692    1.5  augustss 		break;
   1693    1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1694   1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
   1695  1.109  christos 		if (len == 0)
   1696  1.109  christos 			break;
   1697    1.5  augustss 		switch(value >> 8) {
   1698    1.5  augustss 		case UDESC_DEVICE:
   1699    1.5  augustss 			if ((value & 0xff) != 0) {
   1700    1.5  augustss 				err = USBD_IOERROR;
   1701    1.5  augustss 				goto ret;
   1702    1.5  augustss 			}
   1703    1.5  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1704    1.5  augustss 			USETW(ehci_devd.idVendor, sc->sc_id_vendor);
   1705    1.5  augustss 			memcpy(buf, &ehci_devd, l);
   1706    1.5  augustss 			break;
   1707   1.33  augustss 		/*
   1708   1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1709   1.11  augustss 		 * we need this descriptor.
   1710   1.11  augustss 		 */
   1711   1.11  augustss 		case UDESC_DEVICE_QUALIFIER:
   1712   1.11  augustss 			if ((value & 0xff) != 0) {
   1713   1.11  augustss 				err = USBD_IOERROR;
   1714   1.11  augustss 				goto ret;
   1715   1.11  augustss 			}
   1716   1.11  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1717   1.11  augustss 			memcpy(buf, &ehci_odevd, l);
   1718   1.11  augustss 			break;
   1719   1.33  augustss 		/*
   1720   1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1721   1.11  augustss 		 * we need this descriptor.
   1722   1.11  augustss 		 */
   1723   1.11  augustss 		case UDESC_OTHER_SPEED_CONFIGURATION:
   1724    1.5  augustss 		case UDESC_CONFIG:
   1725    1.5  augustss 			if ((value & 0xff) != 0) {
   1726    1.5  augustss 				err = USBD_IOERROR;
   1727    1.5  augustss 				goto ret;
   1728    1.5  augustss 			}
   1729    1.5  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1730    1.5  augustss 			memcpy(buf, &ehci_confd, l);
   1731   1.11  augustss 			((usb_config_descriptor_t *)buf)->bDescriptorType =
   1732   1.11  augustss 				value >> 8;
   1733    1.5  augustss 			buf = (char *)buf + l;
   1734    1.5  augustss 			len -= l;
   1735    1.5  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1736    1.5  augustss 			totlen += l;
   1737    1.5  augustss 			memcpy(buf, &ehci_ifcd, l);
   1738    1.5  augustss 			buf = (char *)buf + l;
   1739    1.5  augustss 			len -= l;
   1740    1.5  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1741    1.5  augustss 			totlen += l;
   1742    1.5  augustss 			memcpy(buf, &ehci_endpd, l);
   1743    1.5  augustss 			break;
   1744    1.5  augustss 		case UDESC_STRING:
   1745  1.131  drochner #define sd ((usb_string_descriptor_t *)buf)
   1746    1.5  augustss 			switch (value & 0xff) {
   1747   1.88  augustss 			case 0: /* Language table */
   1748  1.131  drochner 				totlen = usb_makelangtbl(sd, len);
   1749   1.88  augustss 				break;
   1750    1.5  augustss 			case 1: /* Vendor */
   1751  1.131  drochner 				totlen = usb_makestrdesc(sd, len,
   1752  1.131  drochner 							 sc->sc_vendor);
   1753    1.5  augustss 				break;
   1754    1.5  augustss 			case 2: /* Product */
   1755  1.131  drochner 				totlen = usb_makestrdesc(sd, len,
   1756  1.131  drochner 							 "EHCI root hub");
   1757    1.5  augustss 				break;
   1758    1.5  augustss 			}
   1759  1.131  drochner #undef sd
   1760    1.5  augustss 			break;
   1761    1.5  augustss 		default:
   1762    1.5  augustss 			err = USBD_IOERROR;
   1763    1.5  augustss 			goto ret;
   1764    1.5  augustss 		}
   1765    1.5  augustss 		break;
   1766    1.5  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1767    1.5  augustss 		if (len > 0) {
   1768    1.5  augustss 			*(u_int8_t *)buf = 0;
   1769    1.5  augustss 			totlen = 1;
   1770    1.5  augustss 		}
   1771    1.5  augustss 		break;
   1772    1.5  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1773    1.5  augustss 		if (len > 1) {
   1774    1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1775    1.5  augustss 			totlen = 2;
   1776    1.5  augustss 		}
   1777    1.5  augustss 		break;
   1778    1.5  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1779    1.5  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1780    1.5  augustss 		if (len > 1) {
   1781    1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1782    1.5  augustss 			totlen = 2;
   1783    1.5  augustss 		}
   1784    1.5  augustss 		break;
   1785    1.5  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1786    1.5  augustss 		if (value >= USB_MAX_DEVICES) {
   1787    1.5  augustss 			err = USBD_IOERROR;
   1788    1.5  augustss 			goto ret;
   1789    1.5  augustss 		}
   1790    1.5  augustss 		sc->sc_addr = value;
   1791    1.5  augustss 		break;
   1792    1.5  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1793    1.5  augustss 		if (value != 0 && value != 1) {
   1794    1.5  augustss 			err = USBD_IOERROR;
   1795    1.5  augustss 			goto ret;
   1796    1.5  augustss 		}
   1797    1.5  augustss 		sc->sc_conf = value;
   1798    1.5  augustss 		break;
   1799    1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1800    1.5  augustss 		break;
   1801    1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1802    1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1803    1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1804    1.5  augustss 		err = USBD_IOERROR;
   1805    1.5  augustss 		goto ret;
   1806    1.5  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1807    1.5  augustss 		break;
   1808    1.5  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1809    1.5  augustss 		break;
   1810    1.5  augustss 	/* Hub requests */
   1811    1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1812    1.5  augustss 		break;
   1813    1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1814  1.106  augustss 		DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
   1815    1.5  augustss 			     "port=%d feature=%d\n",
   1816    1.5  augustss 			     index, value));
   1817    1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1818    1.5  augustss 			err = USBD_IOERROR;
   1819    1.5  augustss 			goto ret;
   1820    1.5  augustss 		}
   1821    1.5  augustss 		port = EHCI_PORTSC(index);
   1822  1.106  augustss 		v = EOREAD4(sc, port);
   1823  1.106  augustss 		DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
   1824  1.106  augustss 		v &= ~EHCI_PS_CLEAR;
   1825    1.5  augustss 		switch(value) {
   1826    1.5  augustss 		case UHF_PORT_ENABLE:
   1827    1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PE);
   1828    1.5  augustss 			break;
   1829    1.5  augustss 		case UHF_PORT_SUSPEND:
   1830    1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
   1831    1.5  augustss 			break;
   1832    1.5  augustss 		case UHF_PORT_POWER:
   1833  1.106  augustss 			if (sc->sc_hasppc)
   1834  1.106  augustss 				EOWRITE4(sc, port, v &~ EHCI_PS_PP);
   1835    1.5  augustss 			break;
   1836   1.14  augustss 		case UHF_PORT_TEST:
   1837   1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
   1838   1.14  augustss 				    "%d\n", index));
   1839   1.14  augustss 			break;
   1840   1.14  augustss 		case UHF_PORT_INDICATOR:
   1841   1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
   1842   1.14  augustss 				    "%d\n", index));
   1843   1.14  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
   1844   1.14  augustss 			break;
   1845    1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1846    1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_CSC);
   1847    1.5  augustss 			break;
   1848    1.5  augustss 		case UHF_C_PORT_ENABLE:
   1849    1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PEC);
   1850    1.5  augustss 			break;
   1851    1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1852    1.5  augustss 			/* how? */
   1853    1.5  augustss 			break;
   1854    1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1855    1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_OCC);
   1856    1.5  augustss 			break;
   1857    1.5  augustss 		case UHF_C_PORT_RESET:
   1858  1.106  augustss 			sc->sc_isreset[index] = 0;
   1859    1.5  augustss 			break;
   1860    1.5  augustss 		default:
   1861    1.5  augustss 			err = USBD_IOERROR;
   1862    1.5  augustss 			goto ret;
   1863    1.5  augustss 		}
   1864    1.5  augustss #if 0
   1865    1.5  augustss 		switch(value) {
   1866    1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1867    1.5  augustss 		case UHF_C_PORT_ENABLE:
   1868    1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1869    1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1870    1.5  augustss 		case UHF_C_PORT_RESET:
   1871    1.5  augustss 		default:
   1872    1.5  augustss 			break;
   1873    1.5  augustss 		}
   1874    1.5  augustss #endif
   1875    1.5  augustss 		break;
   1876    1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1877  1.109  christos 		if (len == 0)
   1878  1.109  christos 			break;
   1879   1.51    toshii 		if ((value & 0xff) != 0) {
   1880    1.5  augustss 			err = USBD_IOERROR;
   1881    1.5  augustss 			goto ret;
   1882    1.5  augustss 		}
   1883    1.5  augustss 		hubd = ehci_hubd;
   1884    1.5  augustss 		hubd.bNbrPorts = sc->sc_noport;
   1885    1.5  augustss 		v = EOREAD4(sc, EHCI_HCSPARAMS);
   1886    1.5  augustss 		USETW(hubd.wHubCharacteristics,
   1887   1.14  augustss 		    EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
   1888   1.78  augustss 		    EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
   1889   1.14  augustss 		        ? UHD_PORT_IND : 0);
   1890    1.5  augustss 		hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
   1891   1.33  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1892    1.5  augustss 			hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
   1893    1.5  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1894    1.5  augustss 		l = min(len, hubd.bDescLength);
   1895    1.5  augustss 		totlen = l;
   1896    1.5  augustss 		memcpy(buf, &hubd, l);
   1897    1.5  augustss 		break;
   1898    1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1899    1.5  augustss 		if (len != 4) {
   1900    1.5  augustss 			err = USBD_IOERROR;
   1901    1.5  augustss 			goto ret;
   1902    1.5  augustss 		}
   1903    1.5  augustss 		memset(buf, 0, len); /* ? XXX */
   1904    1.5  augustss 		totlen = len;
   1905    1.5  augustss 		break;
   1906    1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1907   1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
   1908    1.5  augustss 			    index));
   1909    1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1910    1.5  augustss 			err = USBD_IOERROR;
   1911    1.5  augustss 			goto ret;
   1912    1.5  augustss 		}
   1913    1.5  augustss 		if (len != 4) {
   1914    1.5  augustss 			err = USBD_IOERROR;
   1915    1.5  augustss 			goto ret;
   1916    1.5  augustss 		}
   1917    1.5  augustss 		v = EOREAD4(sc, EHCI_PORTSC(index));
   1918   1.72  augustss 		DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
   1919    1.5  augustss 			    v));
   1920   1.11  augustss 		i = UPS_HIGH_SPEED;
   1921    1.5  augustss 		if (v & EHCI_PS_CS)	i |= UPS_CURRENT_CONNECT_STATUS;
   1922    1.5  augustss 		if (v & EHCI_PS_PE)	i |= UPS_PORT_ENABLED;
   1923    1.5  augustss 		if (v & EHCI_PS_SUSP)	i |= UPS_SUSPEND;
   1924    1.5  augustss 		if (v & EHCI_PS_OCA)	i |= UPS_OVERCURRENT_INDICATOR;
   1925    1.5  augustss 		if (v & EHCI_PS_PR)	i |= UPS_RESET;
   1926    1.5  augustss 		if (v & EHCI_PS_PP)	i |= UPS_PORT_POWER;
   1927    1.5  augustss 		USETW(ps.wPortStatus, i);
   1928    1.5  augustss 		i = 0;
   1929    1.5  augustss 		if (v & EHCI_PS_CSC)	i |= UPS_C_CONNECT_STATUS;
   1930    1.5  augustss 		if (v & EHCI_PS_PEC)	i |= UPS_C_PORT_ENABLED;
   1931    1.5  augustss 		if (v & EHCI_PS_OCC)	i |= UPS_C_OVERCURRENT_INDICATOR;
   1932  1.106  augustss 		if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET;
   1933    1.5  augustss 		USETW(ps.wPortChange, i);
   1934    1.5  augustss 		l = min(len, sizeof ps);
   1935    1.5  augustss 		memcpy(buf, &ps, l);
   1936    1.5  augustss 		totlen = l;
   1937    1.5  augustss 		break;
   1938    1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1939    1.5  augustss 		err = USBD_IOERROR;
   1940    1.5  augustss 		goto ret;
   1941    1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1942    1.5  augustss 		break;
   1943    1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1944    1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1945    1.5  augustss 			err = USBD_IOERROR;
   1946    1.5  augustss 			goto ret;
   1947    1.5  augustss 		}
   1948    1.5  augustss 		port = EHCI_PORTSC(index);
   1949  1.106  augustss 		v = EOREAD4(sc, port);
   1950  1.106  augustss 		DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
   1951  1.106  augustss 		v &= ~EHCI_PS_CLEAR;
   1952    1.5  augustss 		switch(value) {
   1953    1.5  augustss 		case UHF_PORT_ENABLE:
   1954    1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PE);
   1955    1.5  augustss 			break;
   1956    1.5  augustss 		case UHF_PORT_SUSPEND:
   1957    1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_SUSP);
   1958    1.5  augustss 			break;
   1959    1.5  augustss 		case UHF_PORT_RESET:
   1960   1.72  augustss 			DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
   1961    1.5  augustss 				    index));
   1962    1.6  augustss 			if (EHCI_PS_IS_LOWSPEED(v)) {
   1963    1.6  augustss 				/* Low speed device, give up ownership. */
   1964    1.6  augustss 				ehci_disown(sc, index, 1);
   1965    1.6  augustss 				break;
   1966    1.6  augustss 			}
   1967    1.8  augustss 			/* Start reset sequence. */
   1968    1.8  augustss 			v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
   1969    1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PR);
   1970    1.8  augustss 			/* Wait for reset to complete. */
   1971   1.13  augustss 			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   1972   1.17  augustss 			if (sc->sc_dying) {
   1973   1.17  augustss 				err = USBD_IOERROR;
   1974   1.17  augustss 				goto ret;
   1975   1.17  augustss 			}
   1976    1.8  augustss 			/* Terminate reset sequence. */
   1977    1.8  augustss 			EOWRITE4(sc, port, v);
   1978    1.8  augustss 			/* Wait for HC to complete reset. */
   1979   1.13  augustss 			usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
   1980   1.17  augustss 			if (sc->sc_dying) {
   1981   1.17  augustss 				err = USBD_IOERROR;
   1982   1.17  augustss 				goto ret;
   1983   1.17  augustss 			}
   1984    1.8  augustss 			v = EOREAD4(sc, port);
   1985    1.8  augustss 			DPRINTF(("ehci after reset, status=0x%08x\n", v));
   1986    1.8  augustss 			if (v & EHCI_PS_PR) {
   1987    1.8  augustss 				printf("%s: port reset timeout\n",
   1988  1.134  drochner 				       device_xname(sc->sc_dev));
   1989    1.8  augustss 				return (USBD_TIMEOUT);
   1990    1.5  augustss 			}
   1991    1.8  augustss 			if (!(v & EHCI_PS_PE)) {
   1992    1.6  augustss 				/* Not a high speed device, give up ownership.*/
   1993    1.6  augustss 				ehci_disown(sc, index, 0);
   1994    1.6  augustss 				break;
   1995    1.6  augustss 			}
   1996  1.106  augustss 			sc->sc_isreset[index] = 1;
   1997    1.8  augustss 			DPRINTF(("ehci port %d reset, status = 0x%08x\n",
   1998    1.6  augustss 				 index, v));
   1999    1.5  augustss 			break;
   2000    1.5  augustss 		case UHF_PORT_POWER:
   2001   1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port power "
   2002  1.106  augustss 				    "%d (has PPC = %d)\n", index,
   2003  1.106  augustss 				    sc->sc_hasppc));
   2004  1.106  augustss 			if (sc->sc_hasppc)
   2005  1.106  augustss 				EOWRITE4(sc, port, v | EHCI_PS_PP);
   2006    1.5  augustss 			break;
   2007   1.11  augustss 		case UHF_PORT_TEST:
   2008   1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port test "
   2009   1.11  augustss 				    "%d\n", index));
   2010   1.11  augustss 			break;
   2011   1.11  augustss 		case UHF_PORT_INDICATOR:
   2012   1.72  augustss 			DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
   2013   1.11  augustss 				    "%d\n", index));
   2014   1.14  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PIC);
   2015   1.11  augustss 			break;
   2016    1.5  augustss 		default:
   2017    1.5  augustss 			err = USBD_IOERROR;
   2018    1.5  augustss 			goto ret;
   2019    1.5  augustss 		}
   2020    1.5  augustss 		break;
   2021   1.11  augustss 	case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
   2022   1.11  augustss 	case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
   2023   1.11  augustss 	case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
   2024   1.11  augustss 	case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
   2025   1.11  augustss 		break;
   2026    1.5  augustss 	default:
   2027    1.5  augustss 		err = USBD_IOERROR;
   2028    1.5  augustss 		goto ret;
   2029    1.5  augustss 	}
   2030    1.5  augustss 	xfer->actlen = totlen;
   2031    1.5  augustss 	err = USBD_NORMAL_COMPLETION;
   2032    1.5  augustss  ret:
   2033    1.5  augustss 	xfer->status = err;
   2034    1.5  augustss 	s = splusb();
   2035    1.5  augustss 	usb_transfer_complete(xfer);
   2036    1.5  augustss 	splx(s);
   2037    1.5  augustss 	return (USBD_IN_PROGRESS);
   2038    1.6  augustss }
   2039    1.6  augustss 
   2040    1.6  augustss void
   2041  1.115  christos ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
   2042    1.6  augustss {
   2043   1.24  augustss 	int port;
   2044    1.6  augustss 	u_int32_t v;
   2045    1.6  augustss 
   2046    1.6  augustss 	DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
   2047    1.6  augustss #ifdef DIAGNOSTIC
   2048    1.6  augustss 	if (sc->sc_npcomp != 0) {
   2049   1.24  augustss 		int i = (index-1) / sc->sc_npcomp;
   2050    1.6  augustss 		if (i >= sc->sc_ncomp)
   2051    1.6  augustss 			printf("%s: strange port\n",
   2052  1.134  drochner 			       device_xname(sc->sc_dev));
   2053    1.6  augustss 		else
   2054    1.6  augustss 			printf("%s: handing over %s speed device on "
   2055    1.6  augustss 			       "port %d to %s\n",
   2056  1.134  drochner 			       device_xname(sc->sc_dev),
   2057    1.6  augustss 			       lowspeed ? "low" : "full",
   2058  1.134  drochner 			       index, device_xname(sc->sc_comps[i]));
   2059    1.6  augustss 	} else {
   2060  1.134  drochner 		printf("%s: npcomp == 0\n", device_xname(sc->sc_dev));
   2061    1.6  augustss 	}
   2062    1.6  augustss #endif
   2063    1.6  augustss 	port = EHCI_PORTSC(index);
   2064    1.6  augustss 	v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   2065    1.6  augustss 	EOWRITE4(sc, port, v | EHCI_PS_PO);
   2066    1.5  augustss }
   2067    1.5  augustss 
   2068    1.5  augustss /* Abort a root control request. */
   2069    1.5  augustss Static void
   2070  1.115  christos ehci_root_ctrl_abort(usbd_xfer_handle xfer)
   2071    1.5  augustss {
   2072    1.5  augustss 	/* Nothing to do, all transfers are synchronous. */
   2073    1.5  augustss }
   2074    1.5  augustss 
   2075    1.5  augustss /* Close the root pipe. */
   2076    1.5  augustss Static void
   2077  1.115  christos ehci_root_ctrl_close(usbd_pipe_handle pipe)
   2078    1.5  augustss {
   2079    1.5  augustss 	DPRINTF(("ehci_root_ctrl_close\n"));
   2080    1.5  augustss 	/* Nothing to do. */
   2081    1.5  augustss }
   2082    1.5  augustss 
   2083    1.5  augustss void
   2084    1.5  augustss ehci_root_intr_done(usbd_xfer_handle xfer)
   2085    1.5  augustss {
   2086   1.78  augustss 	xfer->hcpriv = NULL;
   2087    1.5  augustss }
   2088    1.5  augustss 
   2089    1.5  augustss Static usbd_status
   2090    1.5  augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
   2091    1.5  augustss {
   2092    1.5  augustss 	usbd_status err;
   2093    1.5  augustss 
   2094    1.5  augustss 	/* Insert last in queue. */
   2095    1.5  augustss 	err = usb_insert_transfer(xfer);
   2096    1.5  augustss 	if (err)
   2097    1.5  augustss 		return (err);
   2098    1.5  augustss 
   2099    1.5  augustss 	/* Pipe isn't running, start first */
   2100    1.5  augustss 	return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2101    1.5  augustss }
   2102    1.5  augustss 
   2103    1.5  augustss Static usbd_status
   2104    1.5  augustss ehci_root_intr_start(usbd_xfer_handle xfer)
   2105    1.5  augustss {
   2106    1.5  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   2107  1.134  drochner 	ehci_softc_t *sc = pipe->device->bus->hci_private;
   2108    1.5  augustss 
   2109    1.5  augustss 	if (sc->sc_dying)
   2110    1.5  augustss 		return (USBD_IOERROR);
   2111    1.5  augustss 
   2112    1.5  augustss 	sc->sc_intrxfer = xfer;
   2113    1.5  augustss 
   2114    1.5  augustss 	return (USBD_IN_PROGRESS);
   2115    1.5  augustss }
   2116    1.5  augustss 
   2117    1.5  augustss /* Abort a root interrupt request. */
   2118    1.5  augustss Static void
   2119    1.5  augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
   2120    1.5  augustss {
   2121    1.5  augustss 	int s;
   2122    1.5  augustss 
   2123    1.5  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2124    1.5  augustss 		DPRINTF(("ehci_root_intr_abort: remove\n"));
   2125    1.5  augustss 		xfer->pipe->intrxfer = NULL;
   2126    1.5  augustss 	}
   2127    1.5  augustss 	xfer->status = USBD_CANCELLED;
   2128    1.5  augustss 	s = splusb();
   2129    1.5  augustss 	usb_transfer_complete(xfer);
   2130    1.5  augustss 	splx(s);
   2131    1.5  augustss }
   2132    1.5  augustss 
   2133    1.5  augustss /* Close the root pipe. */
   2134    1.5  augustss Static void
   2135    1.5  augustss ehci_root_intr_close(usbd_pipe_handle pipe)
   2136    1.5  augustss {
   2137  1.134  drochner 	ehci_softc_t *sc = pipe->device->bus->hci_private;
   2138   1.33  augustss 
   2139    1.5  augustss 	DPRINTF(("ehci_root_intr_close\n"));
   2140    1.5  augustss 
   2141    1.5  augustss 	sc->sc_intrxfer = NULL;
   2142    1.5  augustss }
   2143    1.5  augustss 
   2144    1.5  augustss void
   2145    1.5  augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
   2146    1.5  augustss {
   2147   1.78  augustss 	xfer->hcpriv = NULL;
   2148    1.9  augustss }
   2149    1.9  augustss 
   2150    1.9  augustss /************************/
   2151    1.9  augustss 
   2152    1.9  augustss ehci_soft_qh_t *
   2153    1.9  augustss ehci_alloc_sqh(ehci_softc_t *sc)
   2154    1.9  augustss {
   2155    1.9  augustss 	ehci_soft_qh_t *sqh;
   2156    1.9  augustss 	usbd_status err;
   2157    1.9  augustss 	int i, offs;
   2158    1.9  augustss 	usb_dma_t dma;
   2159    1.9  augustss 
   2160    1.9  augustss 	if (sc->sc_freeqhs == NULL) {
   2161    1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
   2162    1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
   2163    1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2164   1.25  augustss #ifdef EHCI_DEBUG
   2165   1.25  augustss 		if (err)
   2166   1.25  augustss 			printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
   2167   1.25  augustss #endif
   2168    1.9  augustss 		if (err)
   2169   1.11  augustss 			return (NULL);
   2170    1.9  augustss 		for(i = 0; i < EHCI_SQH_CHUNK; i++) {
   2171    1.9  augustss 			offs = i * EHCI_SQH_SIZE;
   2172   1.30  augustss 			sqh = KERNADDR(&dma, offs);
   2173   1.31  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   2174    1.9  augustss 			sqh->next = sc->sc_freeqhs;
   2175    1.9  augustss 			sc->sc_freeqhs = sqh;
   2176    1.9  augustss 		}
   2177    1.9  augustss 	}
   2178    1.9  augustss 	sqh = sc->sc_freeqhs;
   2179    1.9  augustss 	sc->sc_freeqhs = sqh->next;
   2180    1.9  augustss 	memset(&sqh->qh, 0, sizeof(ehci_qh_t));
   2181   1.11  augustss 	sqh->next = NULL;
   2182    1.9  augustss 	return (sqh);
   2183    1.9  augustss }
   2184    1.9  augustss 
   2185    1.9  augustss void
   2186    1.9  augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
   2187    1.9  augustss {
   2188    1.9  augustss 	sqh->next = sc->sc_freeqhs;
   2189    1.9  augustss 	sc->sc_freeqhs = sqh;
   2190    1.9  augustss }
   2191    1.9  augustss 
   2192    1.9  augustss ehci_soft_qtd_t *
   2193    1.9  augustss ehci_alloc_sqtd(ehci_softc_t *sc)
   2194    1.9  augustss {
   2195    1.9  augustss 	ehci_soft_qtd_t *sqtd;
   2196    1.9  augustss 	usbd_status err;
   2197    1.9  augustss 	int i, offs;
   2198    1.9  augustss 	usb_dma_t dma;
   2199    1.9  augustss 	int s;
   2200    1.9  augustss 
   2201    1.9  augustss 	if (sc->sc_freeqtds == NULL) {
   2202    1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
   2203    1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
   2204    1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2205   1.25  augustss #ifdef EHCI_DEBUG
   2206   1.25  augustss 		if (err)
   2207   1.25  augustss 			printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
   2208   1.25  augustss #endif
   2209    1.9  augustss 		if (err)
   2210    1.9  augustss 			return (NULL);
   2211    1.9  augustss 		s = splusb();
   2212    1.9  augustss 		for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
   2213    1.9  augustss 			offs = i * EHCI_SQTD_SIZE;
   2214   1.30  augustss 			sqtd = KERNADDR(&dma, offs);
   2215   1.31  augustss 			sqtd->physaddr = DMAADDR(&dma, offs);
   2216    1.9  augustss 			sqtd->nextqtd = sc->sc_freeqtds;
   2217    1.9  augustss 			sc->sc_freeqtds = sqtd;
   2218    1.9  augustss 		}
   2219    1.9  augustss 		splx(s);
   2220    1.9  augustss 	}
   2221    1.9  augustss 
   2222    1.9  augustss 	s = splusb();
   2223    1.9  augustss 	sqtd = sc->sc_freeqtds;
   2224    1.9  augustss 	sc->sc_freeqtds = sqtd->nextqtd;
   2225    1.9  augustss 	memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
   2226    1.9  augustss 	sqtd->nextqtd = NULL;
   2227    1.9  augustss 	sqtd->xfer = NULL;
   2228    1.9  augustss 	splx(s);
   2229    1.9  augustss 
   2230    1.9  augustss 	return (sqtd);
   2231    1.9  augustss }
   2232    1.9  augustss 
   2233    1.9  augustss void
   2234    1.9  augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
   2235    1.9  augustss {
   2236    1.9  augustss 	int s;
   2237    1.9  augustss 
   2238    1.9  augustss 	s = splusb();
   2239    1.9  augustss 	sqtd->nextqtd = sc->sc_freeqtds;
   2240    1.9  augustss 	sc->sc_freeqtds = sqtd;
   2241    1.9  augustss 	splx(s);
   2242    1.9  augustss }
   2243    1.9  augustss 
   2244   1.15  augustss usbd_status
   2245   1.25  augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
   2246   1.15  augustss 		     int alen, int rd, usbd_xfer_handle xfer,
   2247   1.15  augustss 		     ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
   2248   1.15  augustss {
   2249   1.15  augustss 	ehci_soft_qtd_t *next, *cur;
   2250   1.22  augustss 	ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
   2251   1.15  augustss 	u_int32_t qtdstatus;
   2252   1.55   mycroft 	int len, curlen, mps;
   2253   1.55   mycroft 	int i, tog;
   2254   1.15  augustss 	usb_dma_t *dma = &xfer->dmabuf;
   2255  1.102  augustss 	u_int16_t flags = xfer->flags;
   2256   1.15  augustss 
   2257   1.25  augustss 	DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
   2258   1.15  augustss 
   2259   1.15  augustss 	len = alen;
   2260   1.31  augustss 	dataphys = DMAADDR(dma, 0);
   2261   1.22  augustss 	dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
   2262   1.67   mycroft 	qtdstatus = EHCI_QTD_ACTIVE |
   2263   1.15  augustss 	    EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
   2264   1.15  augustss 	    EHCI_QTD_SET_CERR(3)
   2265   1.15  augustss 	    /* IOC set below */
   2266   1.15  augustss 	    /* BYTES set below */
   2267   1.67   mycroft 	    ;
   2268   1.55   mycroft 	mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
   2269   1.55   mycroft 	tog = epipe->nexttoggle;
   2270   1.64   mycroft 	qtdstatus |= EHCI_QTD_SET_TOGGLE(tog);
   2271   1.15  augustss 
   2272   1.15  augustss 	cur = ehci_alloc_sqtd(sc);
   2273   1.25  augustss 	*sp = cur;
   2274   1.15  augustss 	if (cur == NULL)
   2275   1.15  augustss 		goto nomem;
   2276   1.15  augustss 	for (;;) {
   2277   1.22  augustss 		dataphyspage = EHCI_PAGE(dataphys);
   2278   1.26  augustss 		/* The EHCI hardware can handle at most 5 pages. */
   2279   1.33  augustss 		if (dataphyslastpage - dataphyspage <
   2280   1.26  augustss 		    EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
   2281   1.15  augustss 			/* we can handle it in this QTD */
   2282   1.15  augustss 			curlen = len;
   2283   1.15  augustss 		} else {
   2284   1.15  augustss 			/* must use multiple TDs, fill as much as possible. */
   2285   1.33  augustss 			curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
   2286   1.22  augustss 				 EHCI_PAGE_OFFSET(dataphys);
   2287   1.25  augustss #ifdef DIAGNOSTIC
   2288   1.25  augustss 			if (curlen > len) {
   2289   1.26  augustss 				printf("ehci_alloc_sqtd_chain: curlen=0x%x "
   2290   1.26  augustss 				       "len=0x%x offs=0x%x\n", curlen, len,
   2291   1.26  augustss 				       EHCI_PAGE_OFFSET(dataphys));
   2292   1.26  augustss 				printf("lastpage=0x%x page=0x%x phys=0x%x\n",
   2293   1.26  augustss 				       dataphyslastpage, dataphyspage,
   2294   1.26  augustss 				       dataphys);
   2295   1.25  augustss 				curlen = len;
   2296   1.25  augustss 			}
   2297   1.25  augustss #endif
   2298   1.15  augustss 			/* the length must be a multiple of the max size */
   2299   1.55   mycroft 			curlen -= curlen % mps;
   2300   1.25  augustss 			DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
   2301   1.25  augustss 				    "curlen=%d\n", curlen));
   2302   1.15  augustss #ifdef DIAGNOSTIC
   2303   1.15  augustss 			if (curlen == 0)
   2304  1.103  augustss 				panic("ehci_alloc_sqtd_chain: curlen == 0");
   2305   1.15  augustss #endif
   2306   1.15  augustss 		}
   2307   1.25  augustss 		DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
   2308   1.22  augustss 			    "dataphyslastpage=0x%08x len=%d curlen=%d\n",
   2309   1.22  augustss 			    dataphys, dataphyslastpage,
   2310   1.15  augustss 			    len, curlen));
   2311   1.15  augustss 		len -= curlen;
   2312   1.15  augustss 
   2313  1.102  augustss 		/*
   2314  1.110     blymn 		 * Allocate another transfer if there's more data left,
   2315  1.110     blymn 		 * or if force last short transfer flag is set and we're
   2316  1.102  augustss 		 * allocating a multiple of the max packet size.
   2317  1.102  augustss 		 */
   2318  1.102  augustss 		if (len != 0 ||
   2319  1.102  augustss 		    ((curlen % mps) == 0 && !rd && curlen != 0 &&
   2320  1.102  augustss 		     (flags & USBD_FORCE_SHORT_XFER))) {
   2321   1.15  augustss 			next = ehci_alloc_sqtd(sc);
   2322   1.15  augustss 			if (next == NULL)
   2323   1.15  augustss 				goto nomem;
   2324   1.66   mycroft 			nextphys = htole32(next->physaddr);
   2325   1.15  augustss 		} else {
   2326   1.15  augustss 			next = NULL;
   2327   1.15  augustss 			nextphys = EHCI_NULL;
   2328   1.15  augustss 		}
   2329   1.15  augustss 
   2330  1.110     blymn 		for (i = 0; i * EHCI_PAGE_SIZE <
   2331  1.103  augustss 		            curlen + EHCI_PAGE_OFFSET(dataphys); i++) {
   2332   1.15  augustss 			ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
   2333   1.15  augustss 			if (i != 0) /* use offset only in first buffer */
   2334   1.15  augustss 				a = EHCI_PAGE(a);
   2335   1.15  augustss 			cur->qtd.qtd_buffer[i] = htole32(a);
   2336   1.48   mycroft 			cur->qtd.qtd_buffer_hi[i] = 0;
   2337   1.25  augustss #ifdef DIAGNOSTIC
   2338   1.25  augustss 			if (i >= EHCI_QTD_NBUFFERS) {
   2339   1.25  augustss 				printf("ehci_alloc_sqtd_chain: i=%d\n", i);
   2340   1.25  augustss 				goto nomem;
   2341   1.25  augustss 			}
   2342   1.25  augustss #endif
   2343   1.15  augustss 		}
   2344   1.15  augustss 		cur->nextqtd = next;
   2345   1.66   mycroft 		cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
   2346   1.15  augustss 		cur->qtd.qtd_status =
   2347   1.67   mycroft 		    htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
   2348   1.15  augustss 		cur->xfer = xfer;
   2349   1.18  augustss 		cur->len = curlen;
   2350   1.29  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
   2351   1.29  augustss 			    dataphys, dataphys + curlen));
   2352   1.55   mycroft 		/* adjust the toggle based on the number of packets in this
   2353   1.55   mycroft 		   qtd */
   2354   1.55   mycroft 		if (((curlen + mps - 1) / mps) & 1) {
   2355   1.55   mycroft 			tog ^= 1;
   2356   1.64   mycroft 			qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
   2357   1.55   mycroft 		}
   2358  1.102  augustss 		if (next == NULL)
   2359   1.15  augustss 			break;
   2360   1.25  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
   2361   1.15  augustss 		dataphys += curlen;
   2362   1.15  augustss 		cur = next;
   2363   1.15  augustss 	}
   2364   1.15  augustss 	cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
   2365   1.15  augustss 	*ep = cur;
   2366   1.55   mycroft 	epipe->nexttoggle = tog;
   2367   1.15  augustss 
   2368   1.29  augustss 	DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
   2369   1.29  augustss 		     *sp, *ep));
   2370   1.29  augustss 
   2371   1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2372   1.15  augustss 
   2373   1.15  augustss  nomem:
   2374   1.15  augustss 	/* XXX free chain */
   2375   1.25  augustss 	DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
   2376   1.15  augustss 	return (USBD_NOMEM);
   2377   1.15  augustss }
   2378   1.15  augustss 
   2379   1.18  augustss Static void
   2380   1.25  augustss ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
   2381   1.18  augustss 		    ehci_soft_qtd_t *sqtdend)
   2382   1.18  augustss {
   2383   1.18  augustss 	ehci_soft_qtd_t *p;
   2384   1.25  augustss 	int i;
   2385   1.18  augustss 
   2386   1.29  augustss 	DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
   2387   1.29  augustss 		     sqtd, sqtdend));
   2388   1.29  augustss 
   2389   1.25  augustss 	for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
   2390   1.18  augustss 		p = sqtd->nextqtd;
   2391   1.18  augustss 		ehci_free_sqtd(sc, sqtd);
   2392   1.18  augustss 	}
   2393   1.18  augustss }
   2394   1.18  augustss 
   2395   1.15  augustss /****************/
   2396   1.15  augustss 
   2397    1.9  augustss /*
   2398   1.10  augustss  * Close a reqular pipe.
   2399   1.10  augustss  * Assumes that there are no pending transactions.
   2400   1.10  augustss  */
   2401   1.10  augustss void
   2402   1.10  augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
   2403   1.10  augustss {
   2404   1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   2405  1.134  drochner 	ehci_softc_t *sc = pipe->device->bus->hci_private;
   2406   1.10  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2407   1.10  augustss 	int s;
   2408   1.10  augustss 
   2409   1.10  augustss 	s = splusb();
   2410   1.10  augustss 	ehci_rem_qh(sc, sqh, head);
   2411   1.10  augustss 	splx(s);
   2412   1.10  augustss 	ehci_free_sqh(sc, epipe->sqh);
   2413   1.10  augustss }
   2414   1.10  augustss 
   2415   1.33  augustss /*
   2416   1.10  augustss  * Abort a device request.
   2417   1.10  augustss  * If this routine is called at splusb() it guarantees that the request
   2418   1.10  augustss  * will be removed from the hardware scheduling and that the callback
   2419   1.10  augustss  * for it will be called with USBD_CANCELLED status.
   2420   1.10  augustss  * It's impossible to guarantee that the requested transfer will not
   2421   1.10  augustss  * have happened since the hardware runs concurrently.
   2422   1.10  augustss  * If the transaction has already happened we rely on the ordinary
   2423   1.10  augustss  * interrupt processing to process it.
   2424   1.26  augustss  * XXX This is most probably wrong.
   2425   1.10  augustss  */
   2426   1.10  augustss void
   2427   1.10  augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2428   1.10  augustss {
   2429   1.26  augustss #define exfer EXFER(xfer)
   2430   1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2431  1.134  drochner 	ehci_softc_t *sc = epipe->pipe.device->bus->hci_private;
   2432   1.26  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2433   1.26  augustss 	ehci_soft_qtd_t *sqtd;
   2434   1.26  augustss 	ehci_physaddr_t cur;
   2435   1.26  augustss 	u_int32_t qhstatus;
   2436   1.11  augustss 	int s;
   2437   1.26  augustss 	int hit;
   2438   1.96  augustss 	int wake;
   2439   1.10  augustss 
   2440   1.24  augustss 	DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
   2441   1.10  augustss 
   2442   1.17  augustss 	if (sc->sc_dying) {
   2443   1.17  augustss 		/* If we're dying, just do the software part. */
   2444   1.17  augustss 		s = splusb();
   2445   1.17  augustss 		xfer->status = status;	/* make software ignore it */
   2446   1.17  augustss 		usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2447   1.17  augustss 		usb_transfer_complete(xfer);
   2448   1.17  augustss 		splx(s);
   2449   1.17  augustss 		return;
   2450   1.17  augustss 	}
   2451   1.17  augustss 
   2452   1.10  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2453   1.37    provos 		panic("ehci_abort_xfer: not in process context");
   2454   1.10  augustss 
   2455   1.11  augustss 	/*
   2456   1.96  augustss 	 * If an abort is already in progress then just wait for it to
   2457   1.96  augustss 	 * complete and return.
   2458   1.96  augustss 	 */
   2459   1.96  augustss 	if (xfer->hcflags & UXFER_ABORTING) {
   2460   1.96  augustss 		DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
   2461   1.96  augustss #ifdef DIAGNOSTIC
   2462   1.96  augustss 		if (status == USBD_TIMEOUT)
   2463   1.96  augustss 			printf("ehci_abort_xfer: TIMEOUT while aborting\n");
   2464   1.96  augustss #endif
   2465   1.96  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2466   1.96  augustss 		xfer->status = status;
   2467   1.96  augustss 		DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
   2468   1.96  augustss 		xfer->hcflags |= UXFER_ABORTWAIT;
   2469   1.96  augustss 		while (xfer->hcflags & UXFER_ABORTING)
   2470   1.96  augustss 			tsleep(&xfer->hcflags, PZERO, "ehciaw", 0);
   2471   1.96  augustss 		return;
   2472   1.96  augustss 	}
   2473   1.96  augustss 	xfer->hcflags |= UXFER_ABORTING;
   2474   1.96  augustss 
   2475   1.96  augustss 	/*
   2476   1.11  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2477   1.11  augustss 	 */
   2478   1.11  augustss 	s = splusb();
   2479   1.11  augustss 	xfer->status = status;	/* make software ignore it */
   2480   1.15  augustss 	usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2481   1.26  augustss 	qhstatus = sqh->qh.qh_qtd.qtd_status;
   2482   1.26  augustss 	sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
   2483   1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2484   1.26  augustss 		sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
   2485   1.26  augustss 		if (sqtd == exfer->sqtdend)
   2486   1.26  augustss 			break;
   2487   1.26  augustss 	}
   2488   1.11  augustss 	splx(s);
   2489   1.11  augustss 
   2490   1.33  augustss 	/*
   2491   1.11  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2492   1.11  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2493   1.11  augustss 	 * has run.
   2494   1.11  augustss 	 */
   2495   1.26  augustss 	ehci_sync_hc(sc);
   2496   1.29  augustss 	s = splusb();
   2497   1.77  augustss #ifdef USB_USE_SOFTINTR
   2498   1.29  augustss 	sc->sc_softwake = 1;
   2499   1.77  augustss #endif /* USB_USE_SOFTINTR */
   2500   1.29  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2501   1.77  augustss #ifdef USB_USE_SOFTINTR
   2502   1.29  augustss 	tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
   2503   1.77  augustss #endif /* USB_USE_SOFTINTR */
   2504   1.29  augustss 	splx(s);
   2505   1.33  augustss 
   2506   1.33  augustss 	/*
   2507   1.11  augustss 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2508   1.11  augustss 	 * The complication here is that the hardware may have executed
   2509   1.11  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2510   1.11  augustss 	 * the TDs of this xfer we check if the hardware points to
   2511   1.11  augustss 	 * any of them.
   2512   1.11  augustss 	 */
   2513   1.11  augustss 	s = splusb();		/* XXX why? */
   2514   1.26  augustss 	cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
   2515   1.26  augustss 	hit = 0;
   2516   1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2517   1.26  augustss 		hit |= cur == sqtd->physaddr;
   2518   1.26  augustss 		if (sqtd == exfer->sqtdend)
   2519   1.26  augustss 			break;
   2520   1.26  augustss 	}
   2521   1.26  augustss 	sqtd = sqtd->nextqtd;
   2522   1.26  augustss 	/* Zap curqtd register if hardware pointed inside the xfer. */
   2523   1.26  augustss 	if (hit && sqtd != NULL) {
   2524   1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
   2525   1.26  augustss 		sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
   2526   1.26  augustss 		sqh->qh.qh_qtd.qtd_status = qhstatus;
   2527   1.26  augustss 	} else {
   2528   1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
   2529   1.26  augustss 	}
   2530   1.11  augustss 
   2531   1.11  augustss 	/*
   2532   1.26  augustss 	 * Step 4: Execute callback.
   2533   1.11  augustss 	 */
   2534   1.18  augustss #ifdef DIAGNOSTIC
   2535   1.26  augustss 	exfer->isdone = 1;
   2536   1.18  augustss #endif
   2537   1.96  augustss 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2538   1.96  augustss 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2539   1.11  augustss 	usb_transfer_complete(xfer);
   2540   1.96  augustss 	if (wake)
   2541   1.96  augustss 		wakeup(&xfer->hcflags);
   2542   1.11  augustss 
   2543   1.11  augustss 	splx(s);
   2544   1.26  augustss #undef exfer
   2545   1.10  augustss }
   2546   1.10  augustss 
   2547   1.15  augustss void
   2548   1.15  augustss ehci_timeout(void *addr)
   2549   1.15  augustss {
   2550   1.15  augustss 	struct ehci_xfer *exfer = addr;
   2551   1.17  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
   2552  1.134  drochner 	ehci_softc_t *sc = epipe->pipe.device->bus->hci_private;
   2553   1.15  augustss 
   2554   1.15  augustss 	DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
   2555   1.22  augustss #ifdef USB_DEBUG
   2556   1.26  augustss 	if (ehcidebug > 1)
   2557   1.22  augustss 		usbd_dump_pipe(exfer->xfer.pipe);
   2558   1.22  augustss #endif
   2559   1.15  augustss 
   2560   1.17  augustss 	if (sc->sc_dying) {
   2561   1.17  augustss 		ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
   2562   1.17  augustss 		return;
   2563   1.17  augustss 	}
   2564   1.17  augustss 
   2565   1.15  augustss 	/* Execute the abort in a process context. */
   2566   1.15  augustss 	usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
   2567  1.114     joerg 	usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
   2568  1.114     joerg 	    USB_TASKQ_HC);
   2569   1.15  augustss }
   2570   1.15  augustss 
   2571   1.15  augustss void
   2572   1.15  augustss ehci_timeout_task(void *addr)
   2573   1.15  augustss {
   2574   1.15  augustss 	usbd_xfer_handle xfer = addr;
   2575   1.15  augustss 	int s;
   2576   1.15  augustss 
   2577   1.15  augustss 	DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
   2578   1.15  augustss 
   2579   1.15  augustss 	s = splusb();
   2580   1.15  augustss 	ehci_abort_xfer(xfer, USBD_TIMEOUT);
   2581   1.15  augustss 	splx(s);
   2582   1.15  augustss }
   2583   1.15  augustss 
   2584    1.5  augustss /************************/
   2585    1.5  augustss 
   2586   1.10  augustss Static usbd_status
   2587   1.10  augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2588   1.10  augustss {
   2589   1.10  augustss 	usbd_status err;
   2590   1.10  augustss 
   2591   1.10  augustss 	/* Insert last in queue. */
   2592   1.10  augustss 	err = usb_insert_transfer(xfer);
   2593   1.10  augustss 	if (err)
   2594   1.10  augustss 		return (err);
   2595   1.10  augustss 
   2596   1.10  augustss 	/* Pipe isn't running, start first */
   2597   1.10  augustss 	return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2598   1.10  augustss }
   2599   1.10  augustss 
   2600   1.12  augustss Static usbd_status
   2601   1.12  augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
   2602   1.12  augustss {
   2603  1.134  drochner 	ehci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2604   1.15  augustss 	usbd_status err;
   2605   1.15  augustss 
   2606   1.15  augustss 	if (sc->sc_dying)
   2607   1.15  augustss 		return (USBD_IOERROR);
   2608   1.15  augustss 
   2609   1.15  augustss #ifdef DIAGNOSTIC
   2610   1.15  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2611   1.15  augustss 		/* XXX panic */
   2612   1.15  augustss 		printf("ehci_device_ctrl_transfer: not a request\n");
   2613   1.15  augustss 		return (USBD_INVAL);
   2614   1.15  augustss 	}
   2615   1.15  augustss #endif
   2616   1.15  augustss 
   2617   1.15  augustss 	err = ehci_device_request(xfer);
   2618   1.15  augustss 	if (err)
   2619   1.15  augustss 		return (err);
   2620   1.15  augustss 
   2621   1.15  augustss 	if (sc->sc_bus.use_polling)
   2622   1.15  augustss 		ehci_waitintr(sc, xfer);
   2623   1.15  augustss 	return (USBD_IN_PROGRESS);
   2624   1.12  augustss }
   2625   1.10  augustss 
   2626   1.10  augustss void
   2627   1.10  augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
   2628   1.10  augustss {
   2629   1.18  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   2630  1.134  drochner 	ehci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2631   1.25  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   2632   1.18  augustss 
   2633   1.10  augustss 	DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
   2634   1.10  augustss 
   2635   1.10  augustss #ifdef DIAGNOSTIC
   2636   1.10  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2637   1.37    provos 		panic("ehci_ctrl_done: not a request");
   2638   1.10  augustss 	}
   2639   1.10  augustss #endif
   2640   1.18  augustss 
   2641   1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   2642   1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   2643   1.25  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   2644   1.25  augustss 	}
   2645   1.18  augustss 
   2646   1.25  augustss 	DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
   2647   1.10  augustss }
   2648   1.10  augustss 
   2649   1.10  augustss /* Abort a device control request. */
   2650   1.10  augustss Static void
   2651   1.10  augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
   2652   1.10  augustss {
   2653   1.10  augustss 	DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
   2654   1.10  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2655   1.10  augustss }
   2656   1.10  augustss 
   2657   1.10  augustss /* Close a device control pipe. */
   2658   1.10  augustss Static void
   2659   1.10  augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
   2660   1.10  augustss {
   2661  1.134  drochner 	ehci_softc_t *sc = pipe->device->bus->hci_private;
   2662   1.10  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
   2663   1.10  augustss 
   2664   1.10  augustss 	DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
   2665   1.11  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2666   1.15  augustss }
   2667   1.15  augustss 
   2668   1.15  augustss usbd_status
   2669   1.15  augustss ehci_device_request(usbd_xfer_handle xfer)
   2670   1.15  augustss {
   2671   1.18  augustss #define exfer EXFER(xfer)
   2672   1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2673   1.15  augustss 	usb_device_request_t *req = &xfer->request;
   2674   1.15  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2675  1.134  drochner 	ehci_softc_t *sc = dev->bus->hci_private;
   2676   1.15  augustss 	int addr = dev->address;
   2677   1.15  augustss 	ehci_soft_qtd_t *setup, *stat, *next;
   2678   1.15  augustss 	ehci_soft_qh_t *sqh;
   2679   1.15  augustss 	int isread;
   2680   1.15  augustss 	int len;
   2681   1.15  augustss 	usbd_status err;
   2682   1.15  augustss 	int s;
   2683   1.15  augustss 
   2684   1.15  augustss 	isread = req->bmRequestType & UT_READ;
   2685   1.15  augustss 	len = UGETW(req->wLength);
   2686   1.15  augustss 
   2687   1.72  augustss 	DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
   2688   1.15  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2689   1.15  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2690   1.33  augustss 		    UGETW(req->wIndex), len, addr,
   2691   1.15  augustss 		    epipe->pipe.endpoint->edesc->bEndpointAddress));
   2692   1.15  augustss 
   2693   1.15  augustss 	setup = ehci_alloc_sqtd(sc);
   2694   1.15  augustss 	if (setup == NULL) {
   2695   1.15  augustss 		err = USBD_NOMEM;
   2696   1.15  augustss 		goto bad1;
   2697   1.15  augustss 	}
   2698   1.15  augustss 	stat = ehci_alloc_sqtd(sc);
   2699   1.15  augustss 	if (stat == NULL) {
   2700   1.15  augustss 		err = USBD_NOMEM;
   2701   1.15  augustss 		goto bad2;
   2702   1.15  augustss 	}
   2703   1.15  augustss 
   2704   1.15  augustss 	sqh = epipe->sqh;
   2705   1.15  augustss 	epipe->u.ctl.length = len;
   2706   1.15  augustss 
   2707   1.62   mycroft 	/* Update device address and length since they may have changed
   2708   1.62   mycroft 	   during the setup of the control pipe in usbd_new_device(). */
   2709   1.15  augustss 	/* XXX This only needs to be done once, but it's too early in open. */
   2710   1.15  augustss 	/* XXXX Should not touch ED here! */
   2711   1.33  augustss 	sqh->qh.qh_endp =
   2712   1.55   mycroft 	    (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
   2713   1.15  augustss 	    htole32(
   2714   1.15  augustss 	     EHCI_QH_SET_ADDR(addr) |
   2715   1.15  augustss 	     EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
   2716   1.15  augustss 	    );
   2717   1.15  augustss 
   2718   1.15  augustss 	/* Set up data transaction */
   2719   1.15  augustss 	if (len != 0) {
   2720   1.15  augustss 		ehci_soft_qtd_t *end;
   2721   1.15  augustss 
   2722   1.55   mycroft 		/* Start toggle at 1. */
   2723   1.55   mycroft 		epipe->nexttoggle = 1;
   2724   1.25  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   2725   1.15  augustss 			  &next, &end);
   2726   1.15  augustss 		if (err)
   2727   1.15  augustss 			goto bad3;
   2728   1.83  augustss 		end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
   2729   1.15  augustss 		end->nextqtd = stat;
   2730   1.33  augustss 		end->qtd.qtd_next =
   2731   1.15  augustss 		end->qtd.qtd_altnext = htole32(stat->physaddr);
   2732   1.15  augustss 	} else {
   2733   1.15  augustss 		next = stat;
   2734   1.15  augustss 	}
   2735   1.15  augustss 
   2736   1.30  augustss 	memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
   2737   1.15  augustss 
   2738   1.55   mycroft 	/* Clear toggle */
   2739   1.15  augustss 	setup->qtd.qtd_status = htole32(
   2740   1.26  augustss 	    EHCI_QTD_ACTIVE |
   2741   1.15  augustss 	    EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
   2742   1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2743   1.64   mycroft 	    EHCI_QTD_SET_TOGGLE(0) |
   2744   1.15  augustss 	    EHCI_QTD_SET_BYTES(sizeof *req)
   2745   1.15  augustss 	    );
   2746   1.31  augustss 	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
   2747   1.48   mycroft 	setup->qtd.qtd_buffer_hi[0] = 0;
   2748   1.15  augustss 	setup->nextqtd = next;
   2749   1.15  augustss 	setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
   2750   1.15  augustss 	setup->xfer = xfer;
   2751   1.18  augustss 	setup->len = sizeof *req;
   2752   1.15  augustss 
   2753   1.15  augustss 	stat->qtd.qtd_status = htole32(
   2754   1.26  augustss 	    EHCI_QTD_ACTIVE |
   2755   1.15  augustss 	    EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
   2756   1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2757   1.64   mycroft 	    EHCI_QTD_SET_TOGGLE(1) |
   2758   1.15  augustss 	    EHCI_QTD_IOC
   2759   1.15  augustss 	    );
   2760   1.15  augustss 	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
   2761   1.48   mycroft 	stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
   2762   1.15  augustss 	stat->nextqtd = NULL;
   2763   1.15  augustss 	stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
   2764   1.15  augustss 	stat->xfer = xfer;
   2765   1.18  augustss 	stat->len = 0;
   2766   1.15  augustss 
   2767   1.15  augustss #ifdef EHCI_DEBUG
   2768   1.23  augustss 	if (ehcidebug > 5) {
   2769   1.15  augustss 		DPRINTF(("ehci_device_request:\n"));
   2770   1.15  augustss 		ehci_dump_sqh(sqh);
   2771   1.15  augustss 		ehci_dump_sqtds(setup);
   2772   1.15  augustss 	}
   2773   1.15  augustss #endif
   2774   1.15  augustss 
   2775   1.18  augustss 	exfer->sqtdstart = setup;
   2776   1.18  augustss 	exfer->sqtdend = stat;
   2777   1.18  augustss #ifdef DIAGNOSTIC
   2778   1.18  augustss 	if (!exfer->isdone) {
   2779   1.18  augustss 		printf("ehci_device_request: not done, exfer=%p\n", exfer);
   2780   1.18  augustss 	}
   2781   1.18  augustss 	exfer->isdone = 0;
   2782   1.18  augustss #endif
   2783   1.18  augustss 
   2784   1.15  augustss 	/* Insert qTD in QH list. */
   2785   1.15  augustss 	s = splusb();
   2786   1.23  augustss 	ehci_set_qh_qtd(sqh, setup);
   2787   1.15  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2788   1.45   tsutsui                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2789   1.15  augustss 			    ehci_timeout, xfer);
   2790   1.15  augustss 	}
   2791   1.18  augustss 	ehci_add_intr_list(sc, exfer);
   2792   1.18  augustss 	xfer->status = USBD_IN_PROGRESS;
   2793   1.15  augustss 	splx(s);
   2794   1.15  augustss 
   2795   1.17  augustss #ifdef EHCI_DEBUG
   2796   1.15  augustss 	if (ehcidebug > 10) {
   2797   1.15  augustss 		DPRINTF(("ehci_device_request: status=%x\n",
   2798   1.15  augustss 			 EOREAD4(sc, EHCI_USBSTS)));
   2799   1.23  augustss 		delay(10000);
   2800   1.18  augustss 		ehci_dump_regs(sc);
   2801   1.15  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2802   1.15  augustss 		ehci_dump_sqh(sqh);
   2803   1.15  augustss 		ehci_dump_sqtds(setup);
   2804   1.15  augustss 	}
   2805   1.15  augustss #endif
   2806   1.15  augustss 
   2807   1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2808   1.15  augustss 
   2809   1.15  augustss  bad3:
   2810   1.15  augustss 	ehci_free_sqtd(sc, stat);
   2811   1.15  augustss  bad2:
   2812   1.15  augustss 	ehci_free_sqtd(sc, setup);
   2813   1.15  augustss  bad1:
   2814   1.25  augustss 	DPRINTFN(-1,("ehci_device_request: no memory\n"));
   2815   1.25  augustss 	xfer->status = err;
   2816   1.25  augustss 	usb_transfer_complete(xfer);
   2817   1.15  augustss 	return (err);
   2818   1.18  augustss #undef exfer
   2819   1.10  augustss }
   2820   1.10  augustss 
   2821  1.108   xtraeme /*
   2822  1.108   xtraeme  * Some EHCI chips from VIA seem to trigger interrupts before writing back the
   2823  1.108   xtraeme  * qTD status, or miss signalling occasionally under heavy load.  If the host
   2824  1.108   xtraeme  * machine is too fast, we we can miss transaction completion - when we scan
   2825  1.108   xtraeme  * the active list the transaction still seems to be active.  This generally
   2826  1.108   xtraeme  * exhibits itself as a umass stall that never recovers.
   2827  1.108   xtraeme  *
   2828  1.108   xtraeme  * We work around this behaviour by setting up this callback after any softintr
   2829  1.108   xtraeme  * that completes with transactions still pending, giving us another chance to
   2830  1.108   xtraeme  * check for completion after the writeback has taken place.
   2831  1.108   xtraeme  */
   2832  1.108   xtraeme void
   2833  1.108   xtraeme ehci_intrlist_timeout(void *arg)
   2834  1.108   xtraeme {
   2835  1.108   xtraeme 	ehci_softc_t *sc = arg;
   2836  1.108   xtraeme 	int s = splusb();
   2837  1.108   xtraeme 
   2838  1.108   xtraeme 	DPRINTF(("ehci_intrlist_timeout\n"));
   2839  1.108   xtraeme 	usb_schedsoftintr(&sc->sc_bus);
   2840  1.108   xtraeme 
   2841  1.108   xtraeme 	splx(s);
   2842  1.108   xtraeme }
   2843  1.108   xtraeme 
   2844   1.10  augustss /************************/
   2845    1.5  augustss 
   2846   1.19  augustss Static usbd_status
   2847   1.19  augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
   2848   1.19  augustss {
   2849   1.19  augustss 	usbd_status err;
   2850   1.19  augustss 
   2851   1.19  augustss 	/* Insert last in queue. */
   2852   1.19  augustss 	err = usb_insert_transfer(xfer);
   2853   1.19  augustss 	if (err)
   2854   1.19  augustss 		return (err);
   2855   1.19  augustss 
   2856   1.19  augustss 	/* Pipe isn't running, start first */
   2857   1.19  augustss 	return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2858   1.19  augustss }
   2859   1.19  augustss 
   2860   1.19  augustss usbd_status
   2861   1.19  augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
   2862   1.19  augustss {
   2863   1.19  augustss #define exfer EXFER(xfer)
   2864   1.19  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2865   1.19  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2866  1.134  drochner 	ehci_softc_t *sc = dev->bus->hci_private;
   2867   1.19  augustss 	ehci_soft_qtd_t *data, *dataend;
   2868   1.19  augustss 	ehci_soft_qh_t *sqh;
   2869   1.19  augustss 	usbd_status err;
   2870   1.19  augustss 	int len, isread, endpt;
   2871   1.19  augustss 	int s;
   2872   1.19  augustss 
   2873   1.72  augustss 	DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
   2874   1.19  augustss 		     xfer, xfer->length, xfer->flags));
   2875   1.19  augustss 
   2876   1.19  augustss 	if (sc->sc_dying)
   2877   1.19  augustss 		return (USBD_IOERROR);
   2878   1.19  augustss 
   2879   1.19  augustss #ifdef DIAGNOSTIC
   2880   1.19  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2881   1.72  augustss 		panic("ehci_device_bulk_start: a request");
   2882   1.19  augustss #endif
   2883   1.19  augustss 
   2884   1.19  augustss 	len = xfer->length;
   2885   1.19  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   2886   1.19  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2887   1.19  augustss 	sqh = epipe->sqh;
   2888   1.19  augustss 
   2889   1.19  augustss 	epipe->u.bulk.length = len;
   2890   1.19  augustss 
   2891   1.25  augustss 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   2892   1.19  augustss 				   &dataend);
   2893   1.25  augustss 	if (err) {
   2894   1.25  augustss 		DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
   2895   1.25  augustss 		xfer->status = err;
   2896   1.25  augustss 		usb_transfer_complete(xfer);
   2897   1.19  augustss 		return (err);
   2898   1.25  augustss 	}
   2899   1.19  augustss 
   2900   1.19  augustss #ifdef EHCI_DEBUG
   2901   1.23  augustss 	if (ehcidebug > 5) {
   2902   1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(1)\n"));
   2903   1.23  augustss 		ehci_dump_sqh(sqh);
   2904   1.19  augustss 		ehci_dump_sqtds(data);
   2905   1.19  augustss 	}
   2906   1.19  augustss #endif
   2907   1.19  augustss 
   2908   1.19  augustss 	/* Set up interrupt info. */
   2909   1.19  augustss 	exfer->sqtdstart = data;
   2910   1.19  augustss 	exfer->sqtdend = dataend;
   2911   1.19  augustss #ifdef DIAGNOSTIC
   2912   1.19  augustss 	if (!exfer->isdone) {
   2913   1.72  augustss 		printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
   2914   1.19  augustss 	}
   2915   1.19  augustss 	exfer->isdone = 0;
   2916   1.19  augustss #endif
   2917   1.19  augustss 
   2918   1.19  augustss 	s = splusb();
   2919   1.23  augustss 	ehci_set_qh_qtd(sqh, data);
   2920   1.19  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2921   1.45   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2922   1.19  augustss 			    ehci_timeout, xfer);
   2923   1.19  augustss 	}
   2924   1.19  augustss 	ehci_add_intr_list(sc, exfer);
   2925   1.19  augustss 	xfer->status = USBD_IN_PROGRESS;
   2926   1.19  augustss 	splx(s);
   2927   1.19  augustss 
   2928   1.19  augustss #ifdef EHCI_DEBUG
   2929   1.19  augustss 	if (ehcidebug > 10) {
   2930   1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(2)\n"));
   2931   1.23  augustss 		delay(10000);
   2932   1.72  augustss 		DPRINTF(("ehci_device_bulk_start: data(3)\n"));
   2933   1.23  augustss 		ehci_dump_regs(sc);
   2934   1.29  augustss #if 0
   2935   1.29  augustss 		printf("async_head:\n");
   2936   1.23  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2937   1.29  augustss #endif
   2938   1.29  augustss 		printf("sqh:\n");
   2939   1.23  augustss 		ehci_dump_sqh(sqh);
   2940   1.19  augustss 		ehci_dump_sqtds(data);
   2941   1.19  augustss 	}
   2942   1.19  augustss #endif
   2943   1.19  augustss 
   2944   1.19  augustss 	if (sc->sc_bus.use_polling)
   2945   1.19  augustss 		ehci_waitintr(sc, xfer);
   2946   1.19  augustss 
   2947   1.19  augustss 	return (USBD_IN_PROGRESS);
   2948   1.19  augustss #undef exfer
   2949   1.19  augustss }
   2950   1.19  augustss 
   2951   1.19  augustss Static void
   2952   1.19  augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
   2953   1.19  augustss {
   2954   1.19  augustss 	DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
   2955   1.19  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2956   1.19  augustss }
   2957   1.19  augustss 
   2958   1.33  augustss /*
   2959   1.19  augustss  * Close a device bulk pipe.
   2960   1.19  augustss  */
   2961   1.19  augustss Static void
   2962   1.19  augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
   2963   1.19  augustss {
   2964  1.134  drochner 	ehci_softc_t *sc = pipe->device->bus->hci_private;
   2965   1.19  augustss 
   2966   1.19  augustss 	DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
   2967   1.19  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2968   1.19  augustss }
   2969   1.19  augustss 
   2970   1.19  augustss void
   2971   1.19  augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
   2972   1.19  augustss {
   2973   1.19  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   2974  1.134  drochner 	ehci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2975   1.19  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   2976   1.19  augustss 
   2977   1.33  augustss 	DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
   2978   1.19  augustss 		     xfer, xfer->actlen));
   2979   1.19  augustss 
   2980   1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   2981   1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   2982   1.44  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   2983   1.25  augustss 	}
   2984   1.19  augustss 
   2985   1.19  augustss 	DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
   2986   1.19  augustss }
   2987    1.5  augustss 
   2988   1.10  augustss /************************/
   2989   1.10  augustss 
   2990   1.78  augustss Static usbd_status
   2991   1.78  augustss ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
   2992   1.78  augustss {
   2993   1.78  augustss 	struct ehci_soft_islot *isp;
   2994   1.78  augustss 	int islot, lev;
   2995   1.78  augustss 
   2996   1.78  augustss 	/* Find a poll rate that is large enough. */
   2997   1.78  augustss 	for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
   2998   1.78  augustss 		if (EHCI_ILEV_IVAL(lev) <= ival)
   2999   1.78  augustss 			break;
   3000   1.78  augustss 
   3001   1.78  augustss 	/* Pick an interrupt slot at the right level. */
   3002   1.78  augustss 	/* XXX could do better than picking at random */
   3003   1.78  augustss 	sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
   3004   1.78  augustss 	islot = EHCI_IQHIDX(lev, sc->sc_rand);
   3005   1.78  augustss 
   3006   1.78  augustss 	sqh->islot = islot;
   3007   1.78  augustss 	isp = &sc->sc_islots[islot];
   3008   1.78  augustss 	ehci_add_qh(sqh, isp->sqh);
   3009   1.78  augustss 
   3010   1.78  augustss 	return (USBD_NORMAL_COMPLETION);
   3011   1.78  augustss }
   3012   1.78  augustss 
   3013   1.78  augustss Static usbd_status
   3014   1.78  augustss ehci_device_intr_transfer(usbd_xfer_handle xfer)
   3015   1.78  augustss {
   3016   1.78  augustss 	usbd_status err;
   3017   1.78  augustss 
   3018   1.78  augustss 	/* Insert last in queue. */
   3019   1.78  augustss 	err = usb_insert_transfer(xfer);
   3020   1.78  augustss 	if (err)
   3021   1.78  augustss 		return (err);
   3022   1.78  augustss 
   3023   1.78  augustss 	/*
   3024   1.78  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3025   1.78  augustss 	 * so start it first.
   3026   1.78  augustss 	 */
   3027   1.78  augustss 	return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3028   1.78  augustss }
   3029   1.78  augustss 
   3030   1.78  augustss Static usbd_status
   3031   1.78  augustss ehci_device_intr_start(usbd_xfer_handle xfer)
   3032   1.78  augustss {
   3033   1.78  augustss #define exfer EXFER(xfer)
   3034   1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3035   1.78  augustss 	usbd_device_handle dev = xfer->pipe->device;
   3036  1.134  drochner 	ehci_softc_t *sc = dev->bus->hci_private;
   3037   1.78  augustss 	ehci_soft_qtd_t *data, *dataend;
   3038   1.78  augustss 	ehci_soft_qh_t *sqh;
   3039   1.78  augustss 	usbd_status err;
   3040   1.78  augustss 	int len, isread, endpt;
   3041   1.78  augustss 	int s;
   3042   1.78  augustss 
   3043   1.78  augustss 	DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
   3044   1.78  augustss 	    xfer, xfer->length, xfer->flags));
   3045   1.78  augustss 
   3046   1.78  augustss 	if (sc->sc_dying)
   3047   1.78  augustss 		return (USBD_IOERROR);
   3048   1.78  augustss 
   3049   1.78  augustss #ifdef DIAGNOSTIC
   3050   1.78  augustss 	if (xfer->rqflags & URQ_REQUEST)
   3051   1.78  augustss 		panic("ehci_device_intr_start: a request");
   3052   1.78  augustss #endif
   3053   1.78  augustss 
   3054   1.78  augustss 	len = xfer->length;
   3055   1.78  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3056   1.78  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3057   1.78  augustss 	sqh = epipe->sqh;
   3058   1.78  augustss 
   3059   1.78  augustss 	epipe->u.intr.length = len;
   3060   1.78  augustss 
   3061   1.78  augustss 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   3062   1.78  augustss 	    &dataend);
   3063   1.78  augustss 	if (err) {
   3064   1.78  augustss 		DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
   3065   1.78  augustss 		xfer->status = err;
   3066   1.78  augustss 		usb_transfer_complete(xfer);
   3067   1.78  augustss 		return (err);
   3068   1.78  augustss 	}
   3069   1.78  augustss 
   3070   1.78  augustss #ifdef EHCI_DEBUG
   3071   1.78  augustss 	if (ehcidebug > 5) {
   3072   1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(1)\n"));
   3073   1.78  augustss 		ehci_dump_sqh(sqh);
   3074   1.78  augustss 		ehci_dump_sqtds(data);
   3075   1.78  augustss 	}
   3076   1.78  augustss #endif
   3077   1.78  augustss 
   3078   1.78  augustss 	/* Set up interrupt info. */
   3079   1.78  augustss 	exfer->sqtdstart = data;
   3080   1.78  augustss 	exfer->sqtdend = dataend;
   3081   1.78  augustss #ifdef DIAGNOSTIC
   3082   1.78  augustss 	if (!exfer->isdone) {
   3083   1.78  augustss 		printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
   3084   1.78  augustss 	}
   3085   1.78  augustss 	exfer->isdone = 0;
   3086   1.78  augustss #endif
   3087   1.78  augustss 
   3088   1.78  augustss 	s = splusb();
   3089   1.78  augustss 	ehci_set_qh_qtd(sqh, data);
   3090   1.78  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3091   1.78  augustss 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   3092   1.78  augustss 		    ehci_timeout, xfer);
   3093   1.78  augustss 	}
   3094   1.78  augustss 	ehci_add_intr_list(sc, exfer);
   3095   1.78  augustss 	xfer->status = USBD_IN_PROGRESS;
   3096   1.78  augustss 	splx(s);
   3097   1.78  augustss 
   3098   1.78  augustss #ifdef EHCI_DEBUG
   3099   1.78  augustss 	if (ehcidebug > 10) {
   3100   1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(2)\n"));
   3101   1.78  augustss 		delay(10000);
   3102   1.78  augustss 		DPRINTF(("ehci_device_intr_start: data(3)\n"));
   3103   1.78  augustss 		ehci_dump_regs(sc);
   3104   1.78  augustss 		printf("sqh:\n");
   3105   1.78  augustss 		ehci_dump_sqh(sqh);
   3106   1.78  augustss 		ehci_dump_sqtds(data);
   3107   1.78  augustss 	}
   3108   1.78  augustss #endif
   3109   1.78  augustss 
   3110   1.78  augustss 	if (sc->sc_bus.use_polling)
   3111   1.78  augustss 		ehci_waitintr(sc, xfer);
   3112   1.78  augustss 
   3113   1.78  augustss 	return (USBD_IN_PROGRESS);
   3114   1.78  augustss #undef exfer
   3115   1.78  augustss }
   3116   1.78  augustss 
   3117   1.78  augustss Static void
   3118   1.78  augustss ehci_device_intr_abort(usbd_xfer_handle xfer)
   3119   1.78  augustss {
   3120   1.78  augustss 	DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
   3121   1.78  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3122   1.78  augustss 		DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
   3123   1.78  augustss 		xfer->pipe->intrxfer = NULL;
   3124   1.78  augustss 	}
   3125   1.78  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   3126   1.78  augustss }
   3127   1.78  augustss 
   3128   1.78  augustss Static void
   3129   1.78  augustss ehci_device_intr_close(usbd_pipe_handle pipe)
   3130   1.78  augustss {
   3131  1.134  drochner 	ehci_softc_t *sc = pipe->device->bus->hci_private;
   3132   1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   3133   1.78  augustss 	struct ehci_soft_islot *isp;
   3134   1.78  augustss 
   3135   1.78  augustss 	isp = &sc->sc_islots[epipe->sqh->islot];
   3136   1.78  augustss 	ehci_close_pipe(pipe, isp->sqh);
   3137   1.78  augustss }
   3138   1.78  augustss 
   3139   1.78  augustss Static void
   3140   1.78  augustss ehci_device_intr_done(usbd_xfer_handle xfer)
   3141   1.78  augustss {
   3142   1.78  augustss #define exfer EXFER(xfer)
   3143   1.78  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   3144  1.134  drochner 	ehci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3145   1.78  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3146   1.78  augustss 	ehci_soft_qtd_t *data, *dataend;
   3147   1.78  augustss 	ehci_soft_qh_t *sqh;
   3148   1.78  augustss 	usbd_status err;
   3149   1.78  augustss 	int len, isread, endpt, s;
   3150   1.78  augustss 
   3151   1.78  augustss 	DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
   3152   1.78  augustss 	    xfer, xfer->actlen));
   3153   1.78  augustss 
   3154   1.78  augustss 	if (xfer->pipe->repeat) {
   3155   1.78  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3156   1.78  augustss 
   3157   1.78  augustss 		len = epipe->u.intr.length;
   3158   1.78  augustss 		xfer->length = len;
   3159   1.78  augustss 		endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3160   1.78  augustss 		isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3161   1.78  augustss 		sqh = epipe->sqh;
   3162   1.78  augustss 
   3163   1.78  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3164   1.78  augustss 		    &data, &dataend);
   3165   1.78  augustss 		if (err) {
   3166   1.78  augustss 			DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
   3167   1.78  augustss 			xfer->status = err;
   3168   1.78  augustss 			return;
   3169   1.78  augustss 		}
   3170   1.78  augustss 
   3171   1.78  augustss 		/* Set up interrupt info. */
   3172   1.78  augustss 		exfer->sqtdstart = data;
   3173   1.78  augustss 		exfer->sqtdend = dataend;
   3174   1.78  augustss #ifdef DIAGNOSTIC
   3175   1.78  augustss 		if (!exfer->isdone) {
   3176   1.78  augustss 			printf("ehci_device_intr_done: not done, ex=%p\n",
   3177   1.78  augustss 			    exfer);
   3178   1.78  augustss 		}
   3179   1.78  augustss 		exfer->isdone = 0;
   3180   1.78  augustss #endif
   3181   1.78  augustss 
   3182   1.78  augustss 		s = splusb();
   3183   1.78  augustss 		ehci_set_qh_qtd(sqh, data);
   3184   1.78  augustss 		if (xfer->timeout && !sc->sc_bus.use_polling) {
   3185   1.78  augustss 			usb_callout(xfer->timeout_handle,
   3186   1.78  augustss 			    mstohz(xfer->timeout), ehci_timeout, xfer);
   3187   1.78  augustss 		}
   3188   1.78  augustss 		splx(s);
   3189   1.78  augustss 
   3190   1.78  augustss 		xfer->status = USBD_IN_PROGRESS;
   3191   1.78  augustss 	} else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3192   1.78  augustss 		ehci_del_intr_list(ex); /* remove from active list */
   3193   1.78  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3194   1.78  augustss 	}
   3195   1.78  augustss #undef exfer
   3196   1.78  augustss }
   3197   1.10  augustss 
   3198   1.10  augustss /************************/
   3199    1.5  augustss 
   3200  1.113  christos Static usbd_status
   3201  1.115  christos ehci_device_isoc_transfer(usbd_xfer_handle xfer)
   3202  1.113  christos {
   3203  1.113  christos 	return USBD_IOERROR;
   3204  1.113  christos }
   3205  1.113  christos Static usbd_status
   3206  1.115  christos ehci_device_isoc_start(usbd_xfer_handle xfer)
   3207  1.113  christos {
   3208  1.113  christos 	return USBD_IOERROR;
   3209  1.113  christos }
   3210  1.113  christos Static void
   3211  1.115  christos ehci_device_isoc_abort(usbd_xfer_handle xfer)
   3212  1.113  christos {
   3213  1.113  christos }
   3214  1.113  christos Static void
   3215  1.115  christos ehci_device_isoc_close(usbd_pipe_handle pipe)
   3216  1.113  christos {
   3217  1.113  christos }
   3218  1.113  christos Static void
   3219  1.115  christos ehci_device_isoc_done(usbd_xfer_handle xfer)
   3220  1.113  christos {
   3221  1.113  christos }
   3222