ehci.c revision 1.14 1 1.11 augustss /* TODO
2 1.11 augustss Add intrinfo.
3 1.11 augustss Indicator light bit.
4 1.11 augustss */
5 1.14 augustss /* $NetBSD: ehci.c,v 1.14 2001/11/20 16:25:35 augustss Exp $ */
6 1.1 augustss
7 1.1 augustss /*
8 1.5 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
9 1.1 augustss * All rights reserved.
10 1.1 augustss *
11 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
12 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss * 3. All advertising materials mentioning features or use of this software
23 1.1 augustss * must display the following acknowledgement:
24 1.1 augustss * This product includes software developed by the NetBSD
25 1.1 augustss * Foundation, Inc. and its contributors.
26 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
27 1.1 augustss * contributors may be used to endorse or promote products derived
28 1.1 augustss * from this software without specific prior written permission.
29 1.1 augustss *
30 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
41 1.1 augustss */
42 1.1 augustss
43 1.1 augustss /*
44 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
45 1.1 augustss *
46 1.5 augustss * The EHCI 0.96 spec can be found at
47 1.3 augustss * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
48 1.7 augustss * and the USB 2.0 spec at
49 1.7 augustss * http://www.usb.org/developers/data/usb_20.zip
50 1.1 augustss *
51 1.1 augustss */
52 1.4 lukem
53 1.4 lukem #include <sys/cdefs.h>
54 1.14 augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.14 2001/11/20 16:25:35 augustss Exp $");
55 1.1 augustss
56 1.1 augustss #include <sys/param.h>
57 1.1 augustss #include <sys/systm.h>
58 1.1 augustss #include <sys/kernel.h>
59 1.1 augustss #include <sys/malloc.h>
60 1.1 augustss #include <sys/device.h>
61 1.1 augustss #include <sys/select.h>
62 1.1 augustss #include <sys/proc.h>
63 1.1 augustss #include <sys/queue.h>
64 1.1 augustss
65 1.1 augustss #include <machine/bus.h>
66 1.1 augustss #include <machine/endian.h>
67 1.1 augustss
68 1.1 augustss #include <dev/usb/usb.h>
69 1.1 augustss #include <dev/usb/usbdi.h>
70 1.1 augustss #include <dev/usb/usbdivar.h>
71 1.1 augustss #include <dev/usb/usb_mem.h>
72 1.1 augustss #include <dev/usb/usb_quirks.h>
73 1.1 augustss
74 1.1 augustss #include <dev/usb/ehcireg.h>
75 1.1 augustss #include <dev/usb/ehcivar.h>
76 1.1 augustss
77 1.1 augustss #ifdef EHCI_DEBUG
78 1.1 augustss #define DPRINTF(x) if (ehcidebug) printf x
79 1.1 augustss #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
80 1.6 augustss int ehcidebug = 0;
81 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
82 1.1 augustss #else
83 1.1 augustss #define DPRINTF(x)
84 1.1 augustss #define DPRINTFN(n,x)
85 1.1 augustss #endif
86 1.1 augustss
87 1.5 augustss struct ehci_pipe {
88 1.5 augustss struct usbd_pipe pipe;
89 1.10 augustss ehci_soft_qh_t *sqh;
90 1.10 augustss union {
91 1.10 augustss ehci_soft_qtd_t *qtd;
92 1.10 augustss /* ehci_soft_itd_t *itd; */
93 1.10 augustss } tail;
94 1.10 augustss union {
95 1.10 augustss /* Control pipe */
96 1.10 augustss struct {
97 1.10 augustss usb_dma_t reqdma;
98 1.10 augustss u_int length;
99 1.10 augustss ehci_soft_qtd_t *setup, *data, *stat;
100 1.10 augustss } ctl;
101 1.10 augustss /* Interrupt pipe */
102 1.10 augustss /* Bulk pipe */
103 1.10 augustss struct {
104 1.10 augustss u_int length;
105 1.10 augustss int isread;
106 1.10 augustss } bulk;
107 1.10 augustss /* Iso pipe */
108 1.10 augustss } u;
109 1.5 augustss };
110 1.5 augustss
111 1.5 augustss Static void ehci_shutdown(void *);
112 1.5 augustss Static void ehci_power(int, void *);
113 1.5 augustss
114 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
115 1.5 augustss Static void ehci_poll(struct usbd_bus *);
116 1.5 augustss Static void ehci_softintr(void *);
117 1.11 augustss Static int ehci_intr1(ehci_softc_t *);
118 1.11 augustss
119 1.5 augustss
120 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
121 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
122 1.5 augustss
123 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
124 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
125 1.5 augustss
126 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
127 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
128 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
129 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
130 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
131 1.5 augustss
132 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
133 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
134 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
135 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
136 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
137 1.5 augustss
138 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
139 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
140 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
141 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
142 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
143 1.5 augustss
144 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
145 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
146 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
147 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
148 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
149 1.5 augustss
150 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
151 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
152 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
153 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
154 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
155 1.5 augustss
156 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
157 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
158 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
159 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
160 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
161 1.5 augustss
162 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
163 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
164 1.5 augustss
165 1.5 augustss Static int ehci_str(usb_string_descriptor_t *, int, char *);
166 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
167 1.6 augustss Static void ehci_pcd_able(ehci_softc_t *, int);
168 1.6 augustss Static void ehci_pcd_enable(void *);
169 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
170 1.5 augustss
171 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
172 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
173 1.9 augustss
174 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
175 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
176 1.9 augustss
177 1.10 augustss Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
178 1.10 augustss Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
179 1.10 augustss ehci_soft_qh_t *);
180 1.11 augustss Static void ehci_sync_hc(ehci_softc_t *);
181 1.10 augustss
182 1.10 augustss Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
183 1.10 augustss Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
184 1.9 augustss
185 1.5 augustss #ifdef EHCI_DEBUG
186 1.5 augustss Static void ehci_dumpregs(ehci_softc_t *);
187 1.6 augustss Static void ehci_dump(void);
188 1.6 augustss Static ehci_softc_t *theehci;
189 1.9 augustss Static void ehci_dump_link(ehci_link_t);
190 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
191 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
192 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
193 1.5 augustss #endif
194 1.5 augustss
195 1.11 augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
196 1.11 augustss
197 1.5 augustss #define EHCI_INTR_ENDPT 1
198 1.5 augustss
199 1.5 augustss Static struct usbd_bus_methods ehci_bus_methods = {
200 1.5 augustss ehci_open,
201 1.5 augustss ehci_softintr,
202 1.5 augustss ehci_poll,
203 1.5 augustss ehci_allocm,
204 1.5 augustss ehci_freem,
205 1.5 augustss ehci_allocx,
206 1.5 augustss ehci_freex,
207 1.5 augustss };
208 1.5 augustss
209 1.5 augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
210 1.5 augustss ehci_root_ctrl_transfer,
211 1.5 augustss ehci_root_ctrl_start,
212 1.5 augustss ehci_root_ctrl_abort,
213 1.5 augustss ehci_root_ctrl_close,
214 1.5 augustss ehci_noop,
215 1.5 augustss ehci_root_ctrl_done,
216 1.5 augustss };
217 1.5 augustss
218 1.5 augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
219 1.5 augustss ehci_root_intr_transfer,
220 1.5 augustss ehci_root_intr_start,
221 1.5 augustss ehci_root_intr_abort,
222 1.5 augustss ehci_root_intr_close,
223 1.5 augustss ehci_noop,
224 1.5 augustss ehci_root_intr_done,
225 1.5 augustss };
226 1.5 augustss
227 1.5 augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
228 1.5 augustss ehci_device_ctrl_transfer,
229 1.5 augustss ehci_device_ctrl_start,
230 1.5 augustss ehci_device_ctrl_abort,
231 1.5 augustss ehci_device_ctrl_close,
232 1.5 augustss ehci_noop,
233 1.5 augustss ehci_device_ctrl_done,
234 1.5 augustss };
235 1.5 augustss
236 1.5 augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
237 1.5 augustss ehci_device_intr_transfer,
238 1.5 augustss ehci_device_intr_start,
239 1.5 augustss ehci_device_intr_abort,
240 1.5 augustss ehci_device_intr_close,
241 1.5 augustss ehci_device_clear_toggle,
242 1.5 augustss ehci_device_intr_done,
243 1.5 augustss };
244 1.5 augustss
245 1.5 augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
246 1.5 augustss ehci_device_bulk_transfer,
247 1.5 augustss ehci_device_bulk_start,
248 1.5 augustss ehci_device_bulk_abort,
249 1.5 augustss ehci_device_bulk_close,
250 1.5 augustss ehci_device_clear_toggle,
251 1.5 augustss ehci_device_bulk_done,
252 1.5 augustss };
253 1.5 augustss
254 1.5 augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
255 1.5 augustss ehci_device_isoc_transfer,
256 1.5 augustss ehci_device_isoc_start,
257 1.5 augustss ehci_device_isoc_abort,
258 1.5 augustss ehci_device_isoc_close,
259 1.5 augustss ehci_noop,
260 1.5 augustss ehci_device_isoc_done,
261 1.5 augustss };
262 1.5 augustss
263 1.1 augustss usbd_status
264 1.1 augustss ehci_init(ehci_softc_t *sc)
265 1.1 augustss {
266 1.3 augustss u_int32_t version, sparams, cparams, hcr;
267 1.3 augustss u_int i;
268 1.3 augustss usbd_status err;
269 1.11 augustss ehci_soft_qh_t *sqh;
270 1.3 augustss
271 1.3 augustss DPRINTF(("ehci_init: start\n"));
272 1.6 augustss #ifdef EHCI_DEBUG
273 1.6 augustss theehci = sc;
274 1.6 augustss #endif
275 1.3 augustss
276 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
277 1.3 augustss
278 1.3 augustss version = EREAD2(sc, EHCI_HCIVERSION);
279 1.3 augustss printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
280 1.3 augustss version >> 8, version & 0xff);
281 1.3 augustss
282 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
283 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
284 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
285 1.3 augustss if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
286 1.3 augustss printf("%s: wrong number of companions (%d != %d)\n",
287 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
288 1.3 augustss EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
289 1.3 augustss return (USBD_IOERROR);
290 1.3 augustss }
291 1.3 augustss if (sc->sc_ncomp > 0) {
292 1.3 augustss printf("%s: companion controller%s, %d port%s each:",
293 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
294 1.3 augustss EHCI_HCS_N_PCC(sparams),
295 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
296 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
297 1.3 augustss printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
298 1.3 augustss printf("\n");
299 1.3 augustss }
300 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
301 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
302 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
303 1.3 augustss
304 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
305 1.3 augustss
306 1.3 augustss /* Reset the controller */
307 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
308 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
309 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
310 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
311 1.3 augustss for (i = 0; i < 100; i++) {
312 1.3 augustss delay(10);
313 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
314 1.3 augustss if (!hcr)
315 1.3 augustss break;
316 1.3 augustss }
317 1.3 augustss if (hcr) {
318 1.3 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
319 1.3 augustss return (USBD_IOERROR);
320 1.3 augustss }
321 1.3 augustss
322 1.3 augustss /* frame list size at default, read back what we got and use that */
323 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
324 1.3 augustss case 0: sc->sc_flsize = 1024*4; break;
325 1.3 augustss case 1: sc->sc_flsize = 512*4; break;
326 1.3 augustss case 2: sc->sc_flsize = 256*4; break;
327 1.3 augustss case 3: return (USBD_IOERROR);
328 1.3 augustss }
329 1.3 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
330 1.3 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
331 1.3 augustss if (err)
332 1.3 augustss return (err);
333 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
334 1.3 augustss
335 1.5 augustss /* Set up the bus struct. */
336 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
337 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
338 1.5 augustss
339 1.5 augustss sc->sc_powerhook = powerhook_establish(ehci_power, sc);
340 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
341 1.5 augustss
342 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
343 1.6 augustss
344 1.11 augustss /* Allocate dummy QH that starts the async list. */
345 1.11 augustss sqh = ehci_alloc_sqh(sc);
346 1.11 augustss if (sqh == NULL) {
347 1.9 augustss err = USBD_NOMEM;
348 1.9 augustss goto bad1;
349 1.9 augustss }
350 1.11 augustss /* Fill the QH */
351 1.11 augustss sqh->qh.qh_endp =
352 1.11 augustss htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
353 1.11 augustss sqh->qh.qh_link =
354 1.11 augustss htole32(sqh->physaddr | EHCI_LINK_QH);
355 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
356 1.11 augustss sqh->next = NULL;
357 1.11 augustss /* Fill the overlay qTD */
358 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
359 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
360 1.11 augustss sqh->qh.qh_qtd.qtd_status =
361 1.9 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
362 1.11 augustss sqh->sqtd = NULL;
363 1.9 augustss #ifdef EHCI_DEBUG
364 1.9 augustss if (ehcidebug) {
365 1.11 augustss ehci_dump_sqh(sc->sc_async_head);
366 1.9 augustss }
367 1.9 augustss #endif
368 1.9 augustss
369 1.9 augustss /* Point to async list */
370 1.11 augustss sc->sc_async_head = sqh;
371 1.11 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
372 1.9 augustss
373 1.9 augustss usb_callout_init(sc->sc_tmo_pcd);
374 1.9 augustss
375 1.10 augustss lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
376 1.10 augustss
377 1.6 augustss /* Enable interrupts */
378 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
379 1.6 augustss
380 1.6 augustss /* Turn on controller */
381 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
382 1.6 augustss EHCI_CMD_ITC_8 | /* 8 microframes */
383 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
384 1.10 augustss EHCI_CMD_ASE |
385 1.6 augustss /* EHCI_CMD_PSE | */
386 1.6 augustss EHCI_CMD_RS);
387 1.6 augustss
388 1.6 augustss /* Take over port ownership */
389 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
390 1.6 augustss
391 1.8 augustss for (i = 0; i < 100; i++) {
392 1.8 augustss delay(10);
393 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
394 1.8 augustss if (!hcr)
395 1.8 augustss break;
396 1.8 augustss }
397 1.8 augustss if (hcr) {
398 1.8 augustss printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
399 1.8 augustss return (USBD_IOERROR);
400 1.8 augustss }
401 1.8 augustss
402 1.5 augustss return (USBD_NORMAL_COMPLETION);
403 1.9 augustss
404 1.9 augustss #if 0
405 1.9 augustss bad3:
406 1.11 augustss ehci_free_sqh(sc, sc->sc_ctrl_head);
407 1.11 augustss bad2:
408 1.11 augustss ehci_free_sqtd(sc, sc->sc_bulk_head->sqtd);
409 1.9 augustss #endif
410 1.9 augustss bad1:
411 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
412 1.9 augustss return (err);
413 1.1 augustss }
414 1.1 augustss
415 1.1 augustss int
416 1.1 augustss ehci_intr(void *v)
417 1.1 augustss {
418 1.6 augustss ehci_softc_t *sc = v;
419 1.6 augustss
420 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
421 1.6 augustss if (sc->sc_bus.use_polling) {
422 1.6 augustss #ifdef DIAGNOSTIC
423 1.6 augustss printf("ehci_intr: ignored interrupt while polling\n");
424 1.6 augustss #endif
425 1.6 augustss return (0);
426 1.6 augustss }
427 1.6 augustss
428 1.6 augustss return (ehci_intr1(sc));
429 1.6 augustss }
430 1.6 augustss
431 1.6 augustss Static int
432 1.6 augustss ehci_intr1(ehci_softc_t *sc)
433 1.6 augustss {
434 1.6 augustss u_int32_t intrs, eintrs;
435 1.6 augustss
436 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
437 1.6 augustss
438 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
439 1.6 augustss if (sc == NULL) {
440 1.6 augustss #ifdef DIAGNOSTIC
441 1.6 augustss printf("ehci_intr: sc == NULL\n");
442 1.6 augustss #endif
443 1.6 augustss return (0);
444 1.6 augustss }
445 1.6 augustss
446 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
447 1.6 augustss
448 1.6 augustss if (!intrs)
449 1.6 augustss return (0);
450 1.6 augustss
451 1.6 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
452 1.6 augustss eintrs = intrs & sc->sc_eintrs;
453 1.6 augustss DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
454 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
455 1.6 augustss (u_int)eintrs));
456 1.6 augustss if (!eintrs)
457 1.6 augustss return (0);
458 1.6 augustss
459 1.6 augustss sc->sc_bus.intr_context++;
460 1.6 augustss sc->sc_bus.no_intrs++;
461 1.10 augustss if (eintrs & EHCI_STS_IAA) {
462 1.10 augustss DPRINTF(("ehci_intr1: door bell\n"));
463 1.11 augustss wakeup(&sc->sc_async_head);
464 1.10 augustss eintrs &= ~EHCI_STS_INT;
465 1.10 augustss }
466 1.6 augustss if (eintrs & EHCI_STS_INT) {
467 1.6 augustss DPRINTF(("ehci_intr1: something is done\n"));
468 1.6 augustss eintrs &= ~EHCI_STS_INT;
469 1.6 augustss }
470 1.6 augustss if (eintrs & EHCI_STS_ERRINT) {
471 1.6 augustss DPRINTF(("ehci_intr1: some error\n"));
472 1.6 augustss eintrs &= ~EHCI_STS_HSE;
473 1.6 augustss }
474 1.6 augustss if (eintrs & EHCI_STS_HSE) {
475 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
476 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
477 1.6 augustss /* XXX what else */
478 1.6 augustss }
479 1.6 augustss if (eintrs & EHCI_STS_PCD) {
480 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
481 1.6 augustss /*
482 1.6 augustss * Disable PCD interrupt for now, because it will be
483 1.6 augustss * on until the port has been reset.
484 1.6 augustss */
485 1.6 augustss ehci_pcd_able(sc, 0);
486 1.6 augustss /* Do not allow RHSC interrupts > 1 per second */
487 1.6 augustss usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
488 1.6 augustss eintrs &= ~EHCI_STS_PCD;
489 1.6 augustss }
490 1.6 augustss
491 1.6 augustss sc->sc_bus.intr_context--;
492 1.6 augustss
493 1.6 augustss if (eintrs != 0) {
494 1.6 augustss /* Block unprocessed interrupts. */
495 1.6 augustss sc->sc_eintrs &= ~eintrs;
496 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
497 1.6 augustss printf("%s: blocking intrs 0x%x\n",
498 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
499 1.6 augustss }
500 1.6 augustss
501 1.6 augustss return (1);
502 1.6 augustss }
503 1.6 augustss
504 1.6 augustss void
505 1.6 augustss ehci_pcd_able(ehci_softc_t *sc, int on)
506 1.6 augustss {
507 1.6 augustss DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
508 1.6 augustss if (on)
509 1.6 augustss sc->sc_eintrs |= EHCI_STS_PCD;
510 1.6 augustss else
511 1.6 augustss sc->sc_eintrs &= ~EHCI_STS_PCD;
512 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
513 1.6 augustss }
514 1.6 augustss
515 1.6 augustss void
516 1.6 augustss ehci_pcd_enable(void *v_sc)
517 1.6 augustss {
518 1.6 augustss ehci_softc_t *sc = v_sc;
519 1.6 augustss
520 1.6 augustss ehci_pcd_able(sc, 1);
521 1.6 augustss }
522 1.6 augustss
523 1.6 augustss void
524 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
525 1.6 augustss {
526 1.6 augustss usbd_pipe_handle pipe;
527 1.6 augustss struct ehci_pipe *opipe;
528 1.6 augustss u_char *p;
529 1.6 augustss int i, m;
530 1.6 augustss
531 1.6 augustss if (xfer == NULL) {
532 1.6 augustss /* Just ignore the change. */
533 1.6 augustss return;
534 1.6 augustss }
535 1.6 augustss
536 1.6 augustss pipe = xfer->pipe;
537 1.6 augustss opipe = (struct ehci_pipe *)pipe;
538 1.6 augustss
539 1.6 augustss p = KERNADDR(&xfer->dmabuf);
540 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
541 1.6 augustss memset(p, 0, xfer->length);
542 1.6 augustss for (i = 1; i <= m; i++) {
543 1.6 augustss /* Pick out CHANGE bits from the status reg. */
544 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
545 1.6 augustss p[i/8] |= 1 << (i%8);
546 1.6 augustss }
547 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
548 1.6 augustss xfer->actlen = xfer->length;
549 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
550 1.6 augustss
551 1.6 augustss usb_transfer_complete(xfer);
552 1.1 augustss }
553 1.1 augustss
554 1.5 augustss void
555 1.5 augustss ehci_softintr(void *v)
556 1.5 augustss {
557 1.5 augustss //ehci_softc_t *sc = v;
558 1.5 augustss }
559 1.5 augustss
560 1.5 augustss void
561 1.5 augustss ehci_poll(struct usbd_bus *bus)
562 1.5 augustss {
563 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
564 1.5 augustss #ifdef EHCI_DEBUG
565 1.5 augustss static int last;
566 1.5 augustss int new;
567 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
568 1.5 augustss if (new != last) {
569 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
570 1.5 augustss last = new;
571 1.5 augustss }
572 1.5 augustss #endif
573 1.5 augustss
574 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
575 1.5 augustss ehci_intr1(sc);
576 1.5 augustss }
577 1.5 augustss
578 1.1 augustss int
579 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
580 1.1 augustss {
581 1.1 augustss int rv = 0;
582 1.1 augustss
583 1.1 augustss if (sc->sc_child != NULL)
584 1.1 augustss rv = config_detach(sc->sc_child, flags);
585 1.1 augustss
586 1.1 augustss if (rv != 0)
587 1.1 augustss return (rv);
588 1.1 augustss
589 1.6 augustss usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
590 1.6 augustss
591 1.1 augustss if (sc->sc_powerhook != NULL)
592 1.1 augustss powerhook_disestablish(sc->sc_powerhook);
593 1.1 augustss if (sc->sc_shutdownhook != NULL)
594 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
595 1.1 augustss
596 1.1 augustss /* XXX free other data structures XXX */
597 1.1 augustss
598 1.1 augustss return (rv);
599 1.1 augustss }
600 1.1 augustss
601 1.1 augustss
602 1.1 augustss int
603 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
604 1.1 augustss {
605 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
606 1.1 augustss int rv = 0;
607 1.1 augustss
608 1.1 augustss switch (act) {
609 1.1 augustss case DVACT_ACTIVATE:
610 1.1 augustss return (EOPNOTSUPP);
611 1.1 augustss break;
612 1.1 augustss
613 1.1 augustss case DVACT_DEACTIVATE:
614 1.1 augustss if (sc->sc_child != NULL)
615 1.1 augustss rv = config_deactivate(sc->sc_child);
616 1.5 augustss sc->sc_dying = 1;
617 1.1 augustss break;
618 1.1 augustss }
619 1.1 augustss return (rv);
620 1.1 augustss }
621 1.1 augustss
622 1.5 augustss /*
623 1.5 augustss * Handle suspend/resume.
624 1.5 augustss *
625 1.5 augustss * We need to switch to polling mode here, because this routine is
626 1.5 augustss * called from an intterupt context. This is all right since we
627 1.5 augustss * are almost suspended anyway.
628 1.5 augustss */
629 1.5 augustss void
630 1.5 augustss ehci_power(int why, void *v)
631 1.5 augustss {
632 1.5 augustss ehci_softc_t *sc = v;
633 1.5 augustss //u_int32_t ctl;
634 1.5 augustss int s;
635 1.5 augustss
636 1.5 augustss #ifdef EHCI_DEBUG
637 1.5 augustss DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
638 1.5 augustss ehci_dumpregs(sc);
639 1.5 augustss #endif
640 1.5 augustss
641 1.5 augustss s = splhardusb();
642 1.5 augustss switch (why) {
643 1.5 augustss case PWR_SUSPEND:
644 1.5 augustss case PWR_STANDBY:
645 1.5 augustss sc->sc_bus.use_polling++;
646 1.5 augustss #if 0
647 1.5 augustss OOO
648 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
649 1.5 augustss if (sc->sc_control == 0) {
650 1.5 augustss /*
651 1.5 augustss * Preserve register values, in case that APM BIOS
652 1.5 augustss * does not recover them.
653 1.5 augustss */
654 1.5 augustss sc->sc_control = ctl;
655 1.5 augustss sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
656 1.5 augustss }
657 1.5 augustss ctl |= EHCI_HCFS_SUSPEND;
658 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
659 1.5 augustss #endif
660 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
661 1.5 augustss sc->sc_bus.use_polling--;
662 1.5 augustss break;
663 1.5 augustss case PWR_RESUME:
664 1.5 augustss sc->sc_bus.use_polling++;
665 1.5 augustss #if 0
666 1.5 augustss OOO
667 1.5 augustss /* Some broken BIOSes do not recover these values */
668 1.5 augustss OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
669 1.5 augustss OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
670 1.5 augustss OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
671 1.5 augustss if (sc->sc_intre)
672 1.5 augustss OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
673 1.5 augustss sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
674 1.5 augustss if (sc->sc_control)
675 1.5 augustss ctl = sc->sc_control;
676 1.5 augustss else
677 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL);
678 1.5 augustss ctl |= EHCI_HCFS_RESUME;
679 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
680 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
681 1.5 augustss ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
682 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
683 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
684 1.5 augustss sc->sc_control = sc->sc_intre = 0;
685 1.5 augustss #endif
686 1.5 augustss sc->sc_bus.use_polling--;
687 1.5 augustss break;
688 1.5 augustss case PWR_SOFTSUSPEND:
689 1.5 augustss case PWR_SOFTSTANDBY:
690 1.5 augustss case PWR_SOFTRESUME:
691 1.5 augustss break;
692 1.5 augustss }
693 1.5 augustss splx(s);
694 1.5 augustss }
695 1.5 augustss
696 1.5 augustss /*
697 1.5 augustss * Shut down the controller when the system is going down.
698 1.5 augustss */
699 1.5 augustss void
700 1.5 augustss ehci_shutdown(void *v)
701 1.5 augustss {
702 1.8 augustss ehci_softc_t *sc = v;
703 1.5 augustss
704 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
705 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
706 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
707 1.5 augustss }
708 1.5 augustss
709 1.5 augustss usbd_status
710 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
711 1.5 augustss {
712 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
713 1.5 augustss
714 1.5 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
715 1.5 augustss }
716 1.5 augustss
717 1.5 augustss void
718 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
719 1.5 augustss {
720 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
721 1.5 augustss
722 1.5 augustss usb_freemem(&sc->sc_bus, dma);
723 1.5 augustss }
724 1.5 augustss
725 1.5 augustss usbd_xfer_handle
726 1.5 augustss ehci_allocx(struct usbd_bus *bus)
727 1.5 augustss {
728 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
729 1.5 augustss usbd_xfer_handle xfer;
730 1.5 augustss
731 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
732 1.5 augustss if (xfer != NULL)
733 1.5 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
734 1.5 augustss else
735 1.5 augustss xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
736 1.5 augustss if (xfer != NULL)
737 1.5 augustss memset(xfer, 0, sizeof *xfer);
738 1.5 augustss return (xfer);
739 1.5 augustss }
740 1.5 augustss
741 1.5 augustss void
742 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
743 1.5 augustss {
744 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
745 1.5 augustss
746 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
747 1.5 augustss }
748 1.5 augustss
749 1.5 augustss Static void
750 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
751 1.5 augustss {
752 1.5 augustss #if 0
753 1.5 augustss OOO
754 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
755 1.5 augustss
756 1.5 augustss epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
757 1.5 augustss #endif
758 1.5 augustss }
759 1.5 augustss
760 1.5 augustss Static void
761 1.5 augustss ehci_noop(usbd_pipe_handle pipe)
762 1.5 augustss {
763 1.5 augustss }
764 1.5 augustss
765 1.5 augustss #ifdef EHCI_DEBUG
766 1.5 augustss void
767 1.5 augustss ehci_dumpregs(ehci_softc_t *sc)
768 1.5 augustss {
769 1.6 augustss int i;
770 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
771 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
772 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
773 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
774 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
775 1.6 augustss printf("port %d status=0x%08x\n", i,
776 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
777 1.6 augustss }
778 1.6 augustss
779 1.6 augustss void
780 1.6 augustss ehci_dump()
781 1.6 augustss {
782 1.6 augustss ehci_dumpregs(theehci);
783 1.5 augustss }
784 1.9 augustss
785 1.9 augustss void
786 1.9 augustss ehci_dump_link(ehci_link_t link)
787 1.9 augustss {
788 1.9 augustss printf("0x%08x<", link);
789 1.9 augustss switch (EHCI_LINK_TYPE(link)) {
790 1.9 augustss case EHCI_LINK_ITD: printf("ITD"); break;
791 1.9 augustss case EHCI_LINK_QH: printf("QH"); break;
792 1.9 augustss case EHCI_LINK_SITD: printf("SITD"); break;
793 1.9 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
794 1.9 augustss }
795 1.9 augustss if (link & EHCI_LINK_TERMINATE)
796 1.9 augustss printf(",T>");
797 1.9 augustss else
798 1.9 augustss printf(">");
799 1.9 augustss }
800 1.9 augustss
801 1.9 augustss void
802 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
803 1.9 augustss {
804 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
805 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
806 1.9 augustss }
807 1.9 augustss
808 1.9 augustss void
809 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
810 1.9 augustss {
811 1.9 augustss u_int32_t s;
812 1.9 augustss
813 1.9 augustss printf(" next="); ehci_dump_link(qtd->qtd_next);
814 1.12 augustss printf(" altnext="); ehci_dump_link(qtd->qtd_altnext);
815 1.9 augustss printf("\n");
816 1.9 augustss s = qtd->qtd_status;
817 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
818 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
819 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
820 1.9 augustss printf(" cerr=%d pid=%d stat=0x%02x\n", EHCI_QTD_GET_CERR(s),
821 1.9 augustss EHCI_QTD_GET_PID(s), EHCI_QTD_GET_STATUS(s));
822 1.9 augustss for (s = 0; s < 5; s++)
823 1.9 augustss printf(" buffer[%d]=0x%08x\n", s, qtd->qtd_buffer[s]);
824 1.9 augustss }
825 1.9 augustss
826 1.9 augustss void
827 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
828 1.9 augustss {
829 1.9 augustss ehci_qh_t *qh = &sqh->qh;
830 1.9 augustss
831 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
832 1.9 augustss printf(" link="); ehci_dump_link(qh->qh_link); printf("\n");
833 1.9 augustss printf(" endp=0x%08x endphub=0x%08x\n", qh->qh_endp, qh->qh_endphub);
834 1.12 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd); printf("\n");
835 1.12 augustss printf("Overlay qTD:\n");
836 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
837 1.9 augustss }
838 1.9 augustss
839 1.5 augustss #endif
840 1.5 augustss
841 1.5 augustss usbd_status
842 1.5 augustss ehci_open(usbd_pipe_handle pipe)
843 1.5 augustss {
844 1.5 augustss usbd_device_handle dev = pipe->device;
845 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
846 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
847 1.5 augustss u_int8_t addr = dev->address;
848 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
849 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
850 1.10 augustss ehci_soft_qh_t *sqh;
851 1.10 augustss usbd_status err;
852 1.10 augustss #if 0
853 1.5 augustss ehci_soft_itd_t *sitd;
854 1.5 augustss ehci_physaddr_t tdphys;
855 1.5 augustss u_int32_t fmt;
856 1.5 augustss int ival;
857 1.5 augustss #endif
858 1.10 augustss int s;
859 1.10 augustss int speed, naks;
860 1.5 augustss
861 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
862 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
863 1.5 augustss
864 1.5 augustss if (addr == sc->sc_addr) {
865 1.5 augustss switch (ed->bEndpointAddress) {
866 1.5 augustss case USB_CONTROL_ENDPOINT:
867 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
868 1.5 augustss break;
869 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
870 1.5 augustss pipe->methods = &ehci_root_intr_methods;
871 1.5 augustss break;
872 1.5 augustss default:
873 1.5 augustss return (USBD_INVAL);
874 1.5 augustss }
875 1.10 augustss return (USBD_NORMAL_COMPLETION);
876 1.10 augustss }
877 1.10 augustss
878 1.11 augustss switch (dev->speed) {
879 1.11 augustss case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
880 1.11 augustss case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
881 1.11 augustss case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
882 1.11 augustss default: panic("ehci_open: bad device speed %d\n", dev->speed);
883 1.11 augustss }
884 1.10 augustss naks = 8; /* XXX */
885 1.10 augustss sqh = ehci_alloc_sqh(sc);
886 1.10 augustss if (sqh == NULL)
887 1.10 augustss goto bad0;
888 1.10 augustss /* qh_link filled when the QH is added */
889 1.10 augustss sqh->qh.qh_endp = htole32(
890 1.10 augustss EHCI_QH_SET_ADDR(addr) |
891 1.10 augustss EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
892 1.10 augustss EHCI_QH_SET_EPS(speed) | /* XXX */
893 1.10 augustss /* XXX EHCI_QH_DTC ? */
894 1.10 augustss EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
895 1.10 augustss (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
896 1.10 augustss EHCI_QH_CTL : 0) |
897 1.10 augustss EHCI_QH_SET_NRL(naks)
898 1.10 augustss );
899 1.10 augustss sqh->qh.qh_endphub = htole32(
900 1.10 augustss EHCI_QH_SET_MULT(1)
901 1.11 augustss /* XXX TT stuff */
902 1.11 augustss /* XXX interrupt mask */
903 1.10 augustss );
904 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
905 1.11 augustss /* Fill the overlay qTD */
906 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
907 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
908 1.11 augustss sqh->qh.qh_qtd.qtd_status =
909 1.11 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
910 1.10 augustss
911 1.10 augustss epipe->sqh = sqh;
912 1.5 augustss
913 1.10 augustss switch (xfertype) {
914 1.10 augustss case UE_CONTROL:
915 1.11 augustss err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
916 1.10 augustss 0, &epipe->u.ctl.reqdma);
917 1.10 augustss if (err)
918 1.11 augustss goto bad1;
919 1.11 augustss pipe->methods = &ehci_device_ctrl_methods;
920 1.10 augustss s = splusb();
921 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
922 1.10 augustss splx(s);
923 1.10 augustss break;
924 1.10 augustss case UE_BULK:
925 1.10 augustss pipe->methods = &ehci_device_bulk_methods;
926 1.10 augustss s = splusb();
927 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
928 1.10 augustss splx(s);
929 1.10 augustss break;
930 1.10 augustss default:
931 1.10 augustss return (USBD_INVAL);
932 1.5 augustss }
933 1.5 augustss return (USBD_NORMAL_COMPLETION);
934 1.5 augustss
935 1.11 augustss bad1:
936 1.11 augustss ehci_free_sqh(sc, sqh);
937 1.5 augustss bad0:
938 1.5 augustss return (USBD_NOMEM);
939 1.10 augustss }
940 1.10 augustss
941 1.10 augustss /*
942 1.10 augustss * Add an ED to the schedule. Called at splusb().
943 1.10 augustss */
944 1.10 augustss void
945 1.10 augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
946 1.10 augustss {
947 1.10 augustss SPLUSBCHECK;
948 1.10 augustss
949 1.10 augustss sqh->next = head->next;
950 1.10 augustss sqh->qh.qh_link = head->qh.qh_link;
951 1.10 augustss head->next = sqh;
952 1.10 augustss head->qh.qh_link = htole32(sqh->physaddr);
953 1.10 augustss
954 1.10 augustss #ifdef EHCI_DEBUG
955 1.10 augustss if (ehcidebug > 0) {
956 1.10 augustss printf("ehci_add_qh:\n");
957 1.10 augustss ehci_dump_sqh(sqh);
958 1.10 augustss }
959 1.5 augustss #endif
960 1.5 augustss }
961 1.5 augustss
962 1.10 augustss /*
963 1.10 augustss * Remove an ED from the schedule. Called at splusb().
964 1.10 augustss */
965 1.10 augustss void
966 1.10 augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
967 1.10 augustss {
968 1.10 augustss ehci_soft_qh_t *p;
969 1.10 augustss
970 1.10 augustss SPLUSBCHECK;
971 1.10 augustss /* XXX */
972 1.10 augustss for (p = head; p == NULL && p->next != sqh; p = p->next)
973 1.10 augustss ;
974 1.10 augustss if (p == NULL)
975 1.10 augustss panic("ehci_rem_qh: ED not found\n");
976 1.10 augustss p->next = sqh->next;
977 1.10 augustss p->qh.qh_link = sqh->qh.qh_link;
978 1.10 augustss
979 1.11 augustss ehci_sync_hc(sc);
980 1.11 augustss }
981 1.11 augustss
982 1.11 augustss /*
983 1.11 augustss * Ensure that the HC has released all references to the QH. We do this
984 1.11 augustss * by asking for a Async Advance Doorbell interrupt and then we wait for
985 1.11 augustss * the interrupt.
986 1.11 augustss * To make this easier we first obtain exclusive use of the doorbell.
987 1.11 augustss */
988 1.11 augustss void
989 1.11 augustss ehci_sync_hc(ehci_softc_t *sc)
990 1.11 augustss {
991 1.11 augustss int s;
992 1.11 augustss
993 1.12 augustss if (sc->sc_dying) {
994 1.12 augustss DPRINTFN(2,("ehci_sync_hc: dying\n"));
995 1.12 augustss return;
996 1.12 augustss }
997 1.12 augustss DPRINTFN(2,("ehci_sync_hc: enter\n"));
998 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
999 1.10 augustss s = splhardusb();
1000 1.10 augustss /* ask for doorbell */
1001 1.10 augustss EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1002 1.12 augustss tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* wait for doorbell */
1003 1.10 augustss splx(s);
1004 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1005 1.12 augustss DPRINTFN(2,("ehci_sync_hc: exit\n"));
1006 1.10 augustss }
1007 1.10 augustss
1008 1.5 augustss /***********/
1009 1.5 augustss
1010 1.5 augustss /*
1011 1.5 augustss * Data structures and routines to emulate the root hub.
1012 1.5 augustss */
1013 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
1014 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1015 1.5 augustss UDESC_DEVICE, /* type */
1016 1.5 augustss {0x00, 0x02}, /* USB version */
1017 1.5 augustss UDCLASS_HUB, /* class */
1018 1.5 augustss UDSUBCLASS_HUB, /* subclass */
1019 1.11 augustss UDPROTO_HSHUBSTT, /* protocol */
1020 1.5 augustss 64, /* max packet */
1021 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
1022 1.5 augustss 1,2,0, /* string indicies */
1023 1.5 augustss 1 /* # of configurations */
1024 1.5 augustss };
1025 1.5 augustss
1026 1.11 augustss Static usb_device_qualifier_t ehci_odevd = {
1027 1.11 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1028 1.11 augustss UDESC_DEVICE_QUALIFIER, /* type */
1029 1.11 augustss {0x00, 0x02}, /* USB version */
1030 1.11 augustss UDCLASS_HUB, /* class */
1031 1.11 augustss UDSUBCLASS_HUB, /* subclass */
1032 1.11 augustss UDPROTO_FSHUB, /* protocol */
1033 1.11 augustss 64, /* max packet */
1034 1.11 augustss 1, /* # of configurations */
1035 1.11 augustss 0
1036 1.11 augustss };
1037 1.11 augustss
1038 1.5 augustss Static usb_config_descriptor_t ehci_confd = {
1039 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1040 1.5 augustss UDESC_CONFIG,
1041 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1042 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1043 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1044 1.5 augustss 1,
1045 1.5 augustss 1,
1046 1.5 augustss 0,
1047 1.5 augustss UC_SELF_POWERED,
1048 1.5 augustss 0 /* max power */
1049 1.5 augustss };
1050 1.5 augustss
1051 1.5 augustss Static usb_interface_descriptor_t ehci_ifcd = {
1052 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1053 1.5 augustss UDESC_INTERFACE,
1054 1.5 augustss 0,
1055 1.5 augustss 0,
1056 1.5 augustss 1,
1057 1.5 augustss UICLASS_HUB,
1058 1.5 augustss UISUBCLASS_HUB,
1059 1.11 augustss UIPROTO_HSHUBSTT,
1060 1.5 augustss 0
1061 1.5 augustss };
1062 1.5 augustss
1063 1.5 augustss Static usb_endpoint_descriptor_t ehci_endpd = {
1064 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1065 1.5 augustss UDESC_ENDPOINT,
1066 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
1067 1.5 augustss UE_INTERRUPT,
1068 1.5 augustss {8, 0}, /* max packet */
1069 1.5 augustss 255
1070 1.5 augustss };
1071 1.5 augustss
1072 1.5 augustss Static usb_hub_descriptor_t ehci_hubd = {
1073 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
1074 1.5 augustss UDESC_HUB,
1075 1.5 augustss 0,
1076 1.5 augustss {0,0},
1077 1.5 augustss 0,
1078 1.5 augustss 0,
1079 1.5 augustss {0},
1080 1.5 augustss };
1081 1.5 augustss
1082 1.5 augustss Static int
1083 1.5 augustss ehci_str(p, l, s)
1084 1.5 augustss usb_string_descriptor_t *p;
1085 1.5 augustss int l;
1086 1.5 augustss char *s;
1087 1.5 augustss {
1088 1.5 augustss int i;
1089 1.5 augustss
1090 1.5 augustss if (l == 0)
1091 1.5 augustss return (0);
1092 1.5 augustss p->bLength = 2 * strlen(s) + 2;
1093 1.5 augustss if (l == 1)
1094 1.5 augustss return (1);
1095 1.5 augustss p->bDescriptorType = UDESC_STRING;
1096 1.5 augustss l -= 2;
1097 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1098 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1099 1.5 augustss return (2*i+2);
1100 1.5 augustss }
1101 1.5 augustss
1102 1.5 augustss /*
1103 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1104 1.5 augustss */
1105 1.5 augustss Static usbd_status
1106 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1107 1.5 augustss {
1108 1.5 augustss usbd_status err;
1109 1.5 augustss
1110 1.5 augustss /* Insert last in queue. */
1111 1.5 augustss err = usb_insert_transfer(xfer);
1112 1.5 augustss if (err)
1113 1.5 augustss return (err);
1114 1.5 augustss
1115 1.5 augustss /* Pipe isn't running, start first */
1116 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1117 1.5 augustss }
1118 1.5 augustss
1119 1.5 augustss Static usbd_status
1120 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1121 1.5 augustss {
1122 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1123 1.5 augustss usb_device_request_t *req;
1124 1.5 augustss void *buf = NULL;
1125 1.5 augustss int port, i;
1126 1.5 augustss int s, len, value, index, l, totlen = 0;
1127 1.5 augustss usb_port_status_t ps;
1128 1.5 augustss usb_hub_descriptor_t hubd;
1129 1.5 augustss usbd_status err;
1130 1.5 augustss u_int32_t v;
1131 1.5 augustss
1132 1.5 augustss if (sc->sc_dying)
1133 1.5 augustss return (USBD_IOERROR);
1134 1.5 augustss
1135 1.5 augustss #ifdef DIAGNOSTIC
1136 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1137 1.5 augustss /* XXX panic */
1138 1.5 augustss return (USBD_INVAL);
1139 1.5 augustss #endif
1140 1.5 augustss req = &xfer->request;
1141 1.5 augustss
1142 1.5 augustss DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1143 1.5 augustss req->bmRequestType, req->bRequest));
1144 1.5 augustss
1145 1.5 augustss len = UGETW(req->wLength);
1146 1.5 augustss value = UGETW(req->wValue);
1147 1.5 augustss index = UGETW(req->wIndex);
1148 1.5 augustss
1149 1.5 augustss if (len != 0)
1150 1.5 augustss buf = KERNADDR(&xfer->dmabuf);
1151 1.5 augustss
1152 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1153 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1154 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1155 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1156 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1157 1.5 augustss /*
1158 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1159 1.5 augustss * for the integrated root hub.
1160 1.5 augustss */
1161 1.5 augustss break;
1162 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1163 1.5 augustss if (len > 0) {
1164 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1165 1.5 augustss totlen = 1;
1166 1.5 augustss }
1167 1.5 augustss break;
1168 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1169 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1170 1.5 augustss switch(value >> 8) {
1171 1.5 augustss case UDESC_DEVICE:
1172 1.5 augustss if ((value & 0xff) != 0) {
1173 1.5 augustss err = USBD_IOERROR;
1174 1.5 augustss goto ret;
1175 1.5 augustss }
1176 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1177 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1178 1.5 augustss memcpy(buf, &ehci_devd, l);
1179 1.5 augustss break;
1180 1.11 augustss /*
1181 1.11 augustss * We can't really operate at another speed, but the spec says
1182 1.11 augustss * we need this descriptor.
1183 1.11 augustss */
1184 1.11 augustss case UDESC_DEVICE_QUALIFIER:
1185 1.11 augustss if ((value & 0xff) != 0) {
1186 1.11 augustss err = USBD_IOERROR;
1187 1.11 augustss goto ret;
1188 1.11 augustss }
1189 1.11 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1190 1.11 augustss memcpy(buf, &ehci_odevd, l);
1191 1.11 augustss break;
1192 1.11 augustss /*
1193 1.11 augustss * We can't really operate at another speed, but the spec says
1194 1.11 augustss * we need this descriptor.
1195 1.11 augustss */
1196 1.11 augustss case UDESC_OTHER_SPEED_CONFIGURATION:
1197 1.5 augustss case UDESC_CONFIG:
1198 1.5 augustss if ((value & 0xff) != 0) {
1199 1.5 augustss err = USBD_IOERROR;
1200 1.5 augustss goto ret;
1201 1.5 augustss }
1202 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1203 1.5 augustss memcpy(buf, &ehci_confd, l);
1204 1.11 augustss ((usb_config_descriptor_t *)buf)->bDescriptorType =
1205 1.11 augustss value >> 8;
1206 1.5 augustss buf = (char *)buf + l;
1207 1.5 augustss len -= l;
1208 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1209 1.5 augustss totlen += l;
1210 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1211 1.5 augustss buf = (char *)buf + l;
1212 1.5 augustss len -= l;
1213 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1214 1.5 augustss totlen += l;
1215 1.5 augustss memcpy(buf, &ehci_endpd, l);
1216 1.5 augustss break;
1217 1.5 augustss case UDESC_STRING:
1218 1.5 augustss if (len == 0)
1219 1.5 augustss break;
1220 1.5 augustss *(u_int8_t *)buf = 0;
1221 1.5 augustss totlen = 1;
1222 1.5 augustss switch (value & 0xff) {
1223 1.5 augustss case 1: /* Vendor */
1224 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1225 1.5 augustss break;
1226 1.5 augustss case 2: /* Product */
1227 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1228 1.5 augustss break;
1229 1.5 augustss }
1230 1.5 augustss break;
1231 1.5 augustss default:
1232 1.5 augustss err = USBD_IOERROR;
1233 1.5 augustss goto ret;
1234 1.5 augustss }
1235 1.5 augustss break;
1236 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1237 1.5 augustss if (len > 0) {
1238 1.5 augustss *(u_int8_t *)buf = 0;
1239 1.5 augustss totlen = 1;
1240 1.5 augustss }
1241 1.5 augustss break;
1242 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1243 1.5 augustss if (len > 1) {
1244 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1245 1.5 augustss totlen = 2;
1246 1.5 augustss }
1247 1.5 augustss break;
1248 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1249 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1250 1.5 augustss if (len > 1) {
1251 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1252 1.5 augustss totlen = 2;
1253 1.5 augustss }
1254 1.5 augustss break;
1255 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1256 1.5 augustss if (value >= USB_MAX_DEVICES) {
1257 1.5 augustss err = USBD_IOERROR;
1258 1.5 augustss goto ret;
1259 1.5 augustss }
1260 1.5 augustss sc->sc_addr = value;
1261 1.5 augustss break;
1262 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1263 1.5 augustss if (value != 0 && value != 1) {
1264 1.5 augustss err = USBD_IOERROR;
1265 1.5 augustss goto ret;
1266 1.5 augustss }
1267 1.5 augustss sc->sc_conf = value;
1268 1.5 augustss break;
1269 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1270 1.5 augustss break;
1271 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1272 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1273 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1274 1.5 augustss err = USBD_IOERROR;
1275 1.5 augustss goto ret;
1276 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1277 1.5 augustss break;
1278 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1279 1.5 augustss break;
1280 1.5 augustss /* Hub requests */
1281 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1282 1.5 augustss break;
1283 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1284 1.5 augustss DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1285 1.5 augustss "port=%d feature=%d\n",
1286 1.5 augustss index, value));
1287 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1288 1.5 augustss err = USBD_IOERROR;
1289 1.5 augustss goto ret;
1290 1.5 augustss }
1291 1.5 augustss port = EHCI_PORTSC(index);
1292 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1293 1.5 augustss switch(value) {
1294 1.5 augustss case UHF_PORT_ENABLE:
1295 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1296 1.5 augustss break;
1297 1.5 augustss case UHF_PORT_SUSPEND:
1298 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1299 1.5 augustss break;
1300 1.5 augustss case UHF_PORT_POWER:
1301 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1302 1.5 augustss break;
1303 1.14 augustss case UHF_PORT_TEST:
1304 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1305 1.14 augustss "%d\n", index));
1306 1.14 augustss break;
1307 1.14 augustss case UHF_PORT_INDICATOR:
1308 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1309 1.14 augustss "%d\n", index));
1310 1.14 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1311 1.14 augustss break;
1312 1.5 augustss case UHF_C_PORT_CONNECTION:
1313 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1314 1.5 augustss break;
1315 1.5 augustss case UHF_C_PORT_ENABLE:
1316 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1317 1.5 augustss break;
1318 1.5 augustss case UHF_C_PORT_SUSPEND:
1319 1.5 augustss /* how? */
1320 1.5 augustss break;
1321 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1322 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1323 1.5 augustss break;
1324 1.5 augustss case UHF_C_PORT_RESET:
1325 1.6 augustss sc->sc_isreset = 0;
1326 1.5 augustss break;
1327 1.5 augustss default:
1328 1.5 augustss err = USBD_IOERROR;
1329 1.5 augustss goto ret;
1330 1.5 augustss }
1331 1.5 augustss #if 0
1332 1.5 augustss switch(value) {
1333 1.5 augustss case UHF_C_PORT_CONNECTION:
1334 1.5 augustss case UHF_C_PORT_ENABLE:
1335 1.5 augustss case UHF_C_PORT_SUSPEND:
1336 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1337 1.5 augustss case UHF_C_PORT_RESET:
1338 1.5 augustss /* Enable RHSC interrupt if condition is cleared. */
1339 1.5 augustss if ((OREAD4(sc, port) >> 16) == 0)
1340 1.6 augustss ehci_pcd_able(sc, 1);
1341 1.5 augustss break;
1342 1.5 augustss default:
1343 1.5 augustss break;
1344 1.5 augustss }
1345 1.5 augustss #endif
1346 1.5 augustss break;
1347 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1348 1.5 augustss if (value != 0) {
1349 1.5 augustss err = USBD_IOERROR;
1350 1.5 augustss goto ret;
1351 1.5 augustss }
1352 1.5 augustss hubd = ehci_hubd;
1353 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1354 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1355 1.5 augustss USETW(hubd.wHubCharacteristics,
1356 1.14 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1357 1.14 augustss EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1358 1.14 augustss ? UHD_PORT_IND : 0);
1359 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1360 1.5 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1361 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1362 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1363 1.5 augustss l = min(len, hubd.bDescLength);
1364 1.5 augustss totlen = l;
1365 1.5 augustss memcpy(buf, &hubd, l);
1366 1.5 augustss break;
1367 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1368 1.5 augustss if (len != 4) {
1369 1.5 augustss err = USBD_IOERROR;
1370 1.5 augustss goto ret;
1371 1.5 augustss }
1372 1.5 augustss memset(buf, 0, len); /* ? XXX */
1373 1.5 augustss totlen = len;
1374 1.5 augustss break;
1375 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1376 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1377 1.5 augustss index));
1378 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1379 1.5 augustss err = USBD_IOERROR;
1380 1.5 augustss goto ret;
1381 1.5 augustss }
1382 1.5 augustss if (len != 4) {
1383 1.5 augustss err = USBD_IOERROR;
1384 1.5 augustss goto ret;
1385 1.5 augustss }
1386 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1387 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1388 1.5 augustss v));
1389 1.11 augustss i = UPS_HIGH_SPEED;
1390 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1391 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1392 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1393 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1394 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1395 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1396 1.5 augustss USETW(ps.wPortStatus, i);
1397 1.5 augustss i = 0;
1398 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1399 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1400 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1401 1.6 augustss if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1402 1.5 augustss USETW(ps.wPortChange, i);
1403 1.5 augustss l = min(len, sizeof ps);
1404 1.5 augustss memcpy(buf, &ps, l);
1405 1.5 augustss totlen = l;
1406 1.5 augustss break;
1407 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1408 1.5 augustss err = USBD_IOERROR;
1409 1.5 augustss goto ret;
1410 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1411 1.5 augustss break;
1412 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1413 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1414 1.5 augustss err = USBD_IOERROR;
1415 1.5 augustss goto ret;
1416 1.5 augustss }
1417 1.5 augustss port = EHCI_PORTSC(index);
1418 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1419 1.5 augustss switch(value) {
1420 1.5 augustss case UHF_PORT_ENABLE:
1421 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
1422 1.5 augustss break;
1423 1.5 augustss case UHF_PORT_SUSPEND:
1424 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1425 1.5 augustss break;
1426 1.5 augustss case UHF_PORT_RESET:
1427 1.5 augustss DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1428 1.5 augustss index));
1429 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
1430 1.6 augustss /* Low speed device, give up ownership. */
1431 1.6 augustss ehci_disown(sc, index, 1);
1432 1.6 augustss break;
1433 1.6 augustss }
1434 1.8 augustss /* Start reset sequence. */
1435 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1436 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
1437 1.8 augustss /* Wait for reset to complete. */
1438 1.13 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1439 1.8 augustss /* Terminate reset sequence. */
1440 1.8 augustss EOWRITE4(sc, port, v);
1441 1.8 augustss /* Wait for HC to complete reset. */
1442 1.13 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1443 1.8 augustss v = EOREAD4(sc, port);
1444 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
1445 1.8 augustss if (v & EHCI_PS_PR) {
1446 1.8 augustss printf("%s: port reset timeout\n",
1447 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
1448 1.8 augustss return (USBD_TIMEOUT);
1449 1.5 augustss }
1450 1.8 augustss if (!(v & EHCI_PS_PE)) {
1451 1.6 augustss /* Not a high speed device, give up ownership.*/
1452 1.6 augustss ehci_disown(sc, index, 0);
1453 1.6 augustss break;
1454 1.6 augustss }
1455 1.6 augustss sc->sc_isreset = 1;
1456 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1457 1.6 augustss index, v));
1458 1.5 augustss break;
1459 1.5 augustss case UHF_PORT_POWER:
1460 1.5 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1461 1.5 augustss "%d\n", index));
1462 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
1463 1.5 augustss break;
1464 1.11 augustss case UHF_PORT_TEST:
1465 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1466 1.11 augustss "%d\n", index));
1467 1.11 augustss break;
1468 1.11 augustss case UHF_PORT_INDICATOR:
1469 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1470 1.11 augustss "%d\n", index));
1471 1.14 augustss EOWRITE4(sc, port, v | EHCI_PS_PIC);
1472 1.11 augustss break;
1473 1.5 augustss default:
1474 1.5 augustss err = USBD_IOERROR;
1475 1.5 augustss goto ret;
1476 1.5 augustss }
1477 1.5 augustss break;
1478 1.11 augustss case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1479 1.11 augustss case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1480 1.11 augustss case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1481 1.11 augustss case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1482 1.11 augustss break;
1483 1.5 augustss default:
1484 1.5 augustss err = USBD_IOERROR;
1485 1.5 augustss goto ret;
1486 1.5 augustss }
1487 1.5 augustss xfer->actlen = totlen;
1488 1.5 augustss err = USBD_NORMAL_COMPLETION;
1489 1.5 augustss ret:
1490 1.5 augustss xfer->status = err;
1491 1.5 augustss s = splusb();
1492 1.5 augustss usb_transfer_complete(xfer);
1493 1.5 augustss splx(s);
1494 1.5 augustss return (USBD_IN_PROGRESS);
1495 1.6 augustss }
1496 1.6 augustss
1497 1.6 augustss void
1498 1.6 augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1499 1.6 augustss {
1500 1.6 augustss int i, port;
1501 1.6 augustss u_int32_t v;
1502 1.6 augustss
1503 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1504 1.6 augustss #ifdef DIAGNOSTIC
1505 1.6 augustss if (sc->sc_npcomp != 0) {
1506 1.6 augustss i = (index-1) / sc->sc_npcomp;
1507 1.6 augustss if (i >= sc->sc_ncomp)
1508 1.6 augustss printf("%s: strange port\n",
1509 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
1510 1.6 augustss else
1511 1.6 augustss printf("%s: handing over %s speed device on "
1512 1.6 augustss "port %d to %s\n",
1513 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
1514 1.6 augustss lowspeed ? "low" : "full",
1515 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
1516 1.6 augustss } else {
1517 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1518 1.6 augustss }
1519 1.6 augustss #endif
1520 1.6 augustss port = EHCI_PORTSC(index);
1521 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1522 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
1523 1.5 augustss }
1524 1.5 augustss
1525 1.5 augustss /* Abort a root control request. */
1526 1.5 augustss Static void
1527 1.5 augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1528 1.5 augustss {
1529 1.5 augustss /* Nothing to do, all transfers are synchronous. */
1530 1.5 augustss }
1531 1.5 augustss
1532 1.5 augustss /* Close the root pipe. */
1533 1.5 augustss Static void
1534 1.5 augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
1535 1.5 augustss {
1536 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
1537 1.5 augustss /* Nothing to do. */
1538 1.5 augustss }
1539 1.5 augustss
1540 1.5 augustss void
1541 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
1542 1.5 augustss {
1543 1.5 augustss xfer->hcpriv = NULL;
1544 1.5 augustss }
1545 1.5 augustss
1546 1.5 augustss Static usbd_status
1547 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
1548 1.5 augustss {
1549 1.5 augustss usbd_status err;
1550 1.5 augustss
1551 1.5 augustss /* Insert last in queue. */
1552 1.5 augustss err = usb_insert_transfer(xfer);
1553 1.5 augustss if (err)
1554 1.5 augustss return (err);
1555 1.5 augustss
1556 1.5 augustss /* Pipe isn't running, start first */
1557 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1558 1.5 augustss }
1559 1.5 augustss
1560 1.5 augustss Static usbd_status
1561 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
1562 1.5 augustss {
1563 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
1564 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1565 1.5 augustss
1566 1.5 augustss if (sc->sc_dying)
1567 1.5 augustss return (USBD_IOERROR);
1568 1.5 augustss
1569 1.5 augustss sc->sc_intrxfer = xfer;
1570 1.5 augustss
1571 1.5 augustss return (USBD_IN_PROGRESS);
1572 1.5 augustss }
1573 1.5 augustss
1574 1.5 augustss /* Abort a root interrupt request. */
1575 1.5 augustss Static void
1576 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
1577 1.5 augustss {
1578 1.5 augustss int s;
1579 1.5 augustss
1580 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
1581 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
1582 1.5 augustss xfer->pipe->intrxfer = NULL;
1583 1.5 augustss }
1584 1.5 augustss xfer->status = USBD_CANCELLED;
1585 1.5 augustss s = splusb();
1586 1.5 augustss usb_transfer_complete(xfer);
1587 1.5 augustss splx(s);
1588 1.5 augustss }
1589 1.5 augustss
1590 1.5 augustss /* Close the root pipe. */
1591 1.5 augustss Static void
1592 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
1593 1.5 augustss {
1594 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1595 1.5 augustss
1596 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
1597 1.5 augustss
1598 1.5 augustss sc->sc_intrxfer = NULL;
1599 1.5 augustss }
1600 1.5 augustss
1601 1.5 augustss void
1602 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
1603 1.5 augustss {
1604 1.5 augustss xfer->hcpriv = NULL;
1605 1.9 augustss }
1606 1.9 augustss
1607 1.9 augustss /************************/
1608 1.9 augustss
1609 1.9 augustss ehci_soft_qh_t *
1610 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
1611 1.9 augustss {
1612 1.9 augustss ehci_soft_qh_t *sqh;
1613 1.9 augustss usbd_status err;
1614 1.9 augustss int i, offs;
1615 1.9 augustss usb_dma_t dma;
1616 1.9 augustss
1617 1.9 augustss if (sc->sc_freeqhs == NULL) {
1618 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1619 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1620 1.9 augustss EHCI_PAGE_SIZE, &dma);
1621 1.9 augustss if (err)
1622 1.11 augustss return (NULL);
1623 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1624 1.9 augustss offs = i * EHCI_SQH_SIZE;
1625 1.11 augustss sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
1626 1.9 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1627 1.9 augustss sqh->next = sc->sc_freeqhs;
1628 1.9 augustss sc->sc_freeqhs = sqh;
1629 1.9 augustss }
1630 1.9 augustss }
1631 1.9 augustss sqh = sc->sc_freeqhs;
1632 1.9 augustss sc->sc_freeqhs = sqh->next;
1633 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1634 1.11 augustss sqh->next = NULL;
1635 1.9 augustss return (sqh);
1636 1.9 augustss }
1637 1.9 augustss
1638 1.9 augustss void
1639 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1640 1.9 augustss {
1641 1.9 augustss sqh->next = sc->sc_freeqhs;
1642 1.9 augustss sc->sc_freeqhs = sqh;
1643 1.9 augustss }
1644 1.9 augustss
1645 1.9 augustss ehci_soft_qtd_t *
1646 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
1647 1.9 augustss {
1648 1.9 augustss ehci_soft_qtd_t *sqtd;
1649 1.9 augustss usbd_status err;
1650 1.9 augustss int i, offs;
1651 1.9 augustss usb_dma_t dma;
1652 1.9 augustss int s;
1653 1.9 augustss
1654 1.9 augustss if (sc->sc_freeqtds == NULL) {
1655 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1656 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1657 1.9 augustss EHCI_PAGE_SIZE, &dma);
1658 1.9 augustss if (err)
1659 1.9 augustss return (NULL);
1660 1.9 augustss s = splusb();
1661 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1662 1.9 augustss offs = i * EHCI_SQTD_SIZE;
1663 1.9 augustss sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1664 1.9 augustss sqtd->physaddr = DMAADDR(&dma) + offs;
1665 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1666 1.9 augustss sc->sc_freeqtds = sqtd;
1667 1.9 augustss }
1668 1.9 augustss splx(s);
1669 1.9 augustss }
1670 1.9 augustss
1671 1.9 augustss s = splusb();
1672 1.9 augustss sqtd = sc->sc_freeqtds;
1673 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
1674 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1675 1.9 augustss sqtd->nextqtd = NULL;
1676 1.9 augustss sqtd->xfer = NULL;
1677 1.9 augustss splx(s);
1678 1.9 augustss
1679 1.9 augustss return (sqtd);
1680 1.9 augustss }
1681 1.9 augustss
1682 1.9 augustss void
1683 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1684 1.9 augustss {
1685 1.9 augustss int s;
1686 1.9 augustss
1687 1.9 augustss s = splusb();
1688 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1689 1.9 augustss sc->sc_freeqtds = sqtd;
1690 1.9 augustss splx(s);
1691 1.9 augustss }
1692 1.9 augustss
1693 1.9 augustss /*
1694 1.10 augustss * Close a reqular pipe.
1695 1.10 augustss * Assumes that there are no pending transactions.
1696 1.10 augustss */
1697 1.10 augustss void
1698 1.10 augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
1699 1.10 augustss {
1700 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1701 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1702 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
1703 1.10 augustss int s;
1704 1.10 augustss
1705 1.10 augustss s = splusb();
1706 1.10 augustss ehci_rem_qh(sc, sqh, head);
1707 1.10 augustss splx(s);
1708 1.10 augustss ehci_free_sqh(sc, epipe->sqh);
1709 1.10 augustss }
1710 1.10 augustss
1711 1.10 augustss /*
1712 1.10 augustss * Abort a device request.
1713 1.10 augustss * If this routine is called at splusb() it guarantees that the request
1714 1.10 augustss * will be removed from the hardware scheduling and that the callback
1715 1.10 augustss * for it will be called with USBD_CANCELLED status.
1716 1.10 augustss * It's impossible to guarantee that the requested transfer will not
1717 1.10 augustss * have happened since the hardware runs concurrently.
1718 1.10 augustss * If the transaction has already happened we rely on the ordinary
1719 1.10 augustss * interrupt processing to process it.
1720 1.10 augustss */
1721 1.10 augustss void
1722 1.10 augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1723 1.10 augustss {
1724 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
1725 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
1726 1.10 augustss #if 0
1727 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
1728 1.10 augustss ehci_soft_td_t *p, *n;
1729 1.10 augustss ehci_physaddr_t headp;
1730 1.11 augustss int hit;
1731 1.10 augustss #endif
1732 1.11 augustss int s;
1733 1.10 augustss
1734 1.10 augustss DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh));
1735 1.10 augustss
1736 1.10 augustss if (xfer->device->bus->intr_context || !curproc)
1737 1.10 augustss panic("ehci_abort_xfer: not in process context\n");
1738 1.10 augustss
1739 1.11 augustss /*
1740 1.11 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
1741 1.11 augustss */
1742 1.11 augustss s = splusb();
1743 1.11 augustss xfer->status = status; /* make software ignore it */
1744 1.11 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1745 1.11 augustss splx(s);
1746 1.11 augustss /* XXX */
1747 1.11 augustss
1748 1.11 augustss /*
1749 1.11 augustss * Step 2: Wait until we know hardware has finished any possible
1750 1.11 augustss * use of the xfer. Also make sure the soft interrupt routine
1751 1.11 augustss * has run.
1752 1.11 augustss */
1753 1.11 augustss usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */
1754 1.11 augustss /* XXX should have some communication with softintr() to know
1755 1.11 augustss when it's done */
1756 1.11 augustss usb_delay_ms(epipe->pipe.device->bus, 250);
1757 1.11 augustss
1758 1.11 augustss /*
1759 1.11 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
1760 1.11 augustss * The complication here is that the hardware may have executed
1761 1.11 augustss * beyond the xfer we're trying to abort. So as we're scanning
1762 1.11 augustss * the TDs of this xfer we check if the hardware points to
1763 1.11 augustss * any of them.
1764 1.11 augustss */
1765 1.11 augustss s = splusb(); /* XXX why? */
1766 1.11 augustss /* XXX */
1767 1.11 augustss
1768 1.11 augustss /*
1769 1.11 augustss * Step 4: Turn on hardware again.
1770 1.11 augustss */
1771 1.11 augustss /* XXX */
1772 1.11 augustss
1773 1.11 augustss /*
1774 1.11 augustss * Step 5: Execute callback.
1775 1.11 augustss */
1776 1.11 augustss usb_transfer_complete(xfer);
1777 1.11 augustss
1778 1.11 augustss splx(s);
1779 1.10 augustss }
1780 1.10 augustss
1781 1.5 augustss /************************/
1782 1.5 augustss
1783 1.10 augustss Static usbd_status
1784 1.10 augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
1785 1.10 augustss {
1786 1.10 augustss usbd_status err;
1787 1.10 augustss
1788 1.12 augustss return USBD_IOERROR;
1789 1.12 augustss
1790 1.10 augustss /* Insert last in queue. */
1791 1.10 augustss err = usb_insert_transfer(xfer);
1792 1.10 augustss if (err)
1793 1.10 augustss return (err);
1794 1.10 augustss
1795 1.10 augustss /* Pipe isn't running, start first */
1796 1.10 augustss return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1797 1.10 augustss }
1798 1.10 augustss
1799 1.12 augustss Static usbd_status
1800 1.12 augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
1801 1.12 augustss {
1802 1.12 augustss /* Not implemented */
1803 1.12 augustss return USBD_IOERROR;
1804 1.12 augustss }
1805 1.10 augustss
1806 1.10 augustss void
1807 1.10 augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
1808 1.10 augustss {
1809 1.10 augustss DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
1810 1.10 augustss
1811 1.10 augustss #ifdef DIAGNOSTIC
1812 1.10 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1813 1.10 augustss panic("ehci_ctrl_done: not a request\n");
1814 1.10 augustss }
1815 1.10 augustss #endif
1816 1.10 augustss xfer->hcpriv = NULL;
1817 1.10 augustss }
1818 1.10 augustss
1819 1.10 augustss /* Abort a device control request. */
1820 1.10 augustss Static void
1821 1.10 augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
1822 1.10 augustss {
1823 1.10 augustss DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
1824 1.10 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
1825 1.10 augustss }
1826 1.10 augustss
1827 1.10 augustss /* Close a device control pipe. */
1828 1.10 augustss Static void
1829 1.10 augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
1830 1.10 augustss {
1831 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1832 1.10 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
1833 1.10 augustss
1834 1.10 augustss DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
1835 1.11 augustss ehci_close_pipe(pipe, sc->sc_async_head);
1836 1.10 augustss /*ehci_free_std(sc, epipe->tail.td);*/
1837 1.10 augustss }
1838 1.10 augustss
1839 1.10 augustss /************************/
1840 1.5 augustss
1841 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1842 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1843 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { }
1844 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { }
1845 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { }
1846 1.5 augustss
1847 1.10 augustss /************************/
1848 1.10 augustss
1849 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1850 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1851 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
1852 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
1853 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
1854 1.10 augustss
1855 1.10 augustss /************************/
1856 1.5 augustss
1857 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1858 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1859 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
1860 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
1861 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
1862