ehci.c revision 1.15 1 1.11 augustss /* TODO
2 1.11 augustss Add intrinfo.
3 1.11 augustss */
4 1.15 augustss /* $NetBSD: ehci.c,v 1.15 2001/11/21 02:44:30 augustss Exp $ */
5 1.1 augustss
6 1.1 augustss /*
7 1.5 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
8 1.1 augustss * All rights reserved.
9 1.1 augustss *
10 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
11 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
12 1.1 augustss *
13 1.1 augustss * Redistribution and use in source and binary forms, with or without
14 1.1 augustss * modification, are permitted provided that the following conditions
15 1.1 augustss * are met:
16 1.1 augustss * 1. Redistributions of source code must retain the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer.
18 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
19 1.1 augustss * notice, this list of conditions and the following disclaimer in the
20 1.1 augustss * documentation and/or other materials provided with the distribution.
21 1.1 augustss * 3. All advertising materials mentioning features or use of this software
22 1.1 augustss * must display the following acknowledgement:
23 1.1 augustss * This product includes software developed by the NetBSD
24 1.1 augustss * Foundation, Inc. and its contributors.
25 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
26 1.1 augustss * contributors may be used to endorse or promote products derived
27 1.1 augustss * from this software without specific prior written permission.
28 1.1 augustss *
29 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
30 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
33 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
40 1.1 augustss */
41 1.1 augustss
42 1.1 augustss /*
43 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
44 1.1 augustss *
45 1.5 augustss * The EHCI 0.96 spec can be found at
46 1.3 augustss * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
47 1.7 augustss * and the USB 2.0 spec at
48 1.7 augustss * http://www.usb.org/developers/data/usb_20.zip
49 1.1 augustss *
50 1.1 augustss */
51 1.4 lukem
52 1.4 lukem #include <sys/cdefs.h>
53 1.15 augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.15 2001/11/21 02:44:30 augustss Exp $");
54 1.1 augustss
55 1.1 augustss #include <sys/param.h>
56 1.1 augustss #include <sys/systm.h>
57 1.1 augustss #include <sys/kernel.h>
58 1.1 augustss #include <sys/malloc.h>
59 1.1 augustss #include <sys/device.h>
60 1.1 augustss #include <sys/select.h>
61 1.1 augustss #include <sys/proc.h>
62 1.1 augustss #include <sys/queue.h>
63 1.1 augustss
64 1.1 augustss #include <machine/bus.h>
65 1.1 augustss #include <machine/endian.h>
66 1.1 augustss
67 1.1 augustss #include <dev/usb/usb.h>
68 1.1 augustss #include <dev/usb/usbdi.h>
69 1.1 augustss #include <dev/usb/usbdivar.h>
70 1.1 augustss #include <dev/usb/usb_mem.h>
71 1.1 augustss #include <dev/usb/usb_quirks.h>
72 1.1 augustss
73 1.1 augustss #include <dev/usb/ehcireg.h>
74 1.1 augustss #include <dev/usb/ehcivar.h>
75 1.1 augustss
76 1.1 augustss #ifdef EHCI_DEBUG
77 1.1 augustss #define DPRINTF(x) if (ehcidebug) printf x
78 1.1 augustss #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
79 1.6 augustss int ehcidebug = 0;
80 1.15 augustss #ifndef __NetBSD__
81 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
82 1.15 augustss #endif
83 1.1 augustss #else
84 1.1 augustss #define DPRINTF(x)
85 1.1 augustss #define DPRINTFN(n,x)
86 1.1 augustss #endif
87 1.1 augustss
88 1.5 augustss struct ehci_pipe {
89 1.5 augustss struct usbd_pipe pipe;
90 1.10 augustss ehci_soft_qh_t *sqh;
91 1.10 augustss union {
92 1.10 augustss ehci_soft_qtd_t *qtd;
93 1.10 augustss /* ehci_soft_itd_t *itd; */
94 1.10 augustss } tail;
95 1.10 augustss union {
96 1.10 augustss /* Control pipe */
97 1.10 augustss struct {
98 1.10 augustss usb_dma_t reqdma;
99 1.10 augustss u_int length;
100 1.10 augustss ehci_soft_qtd_t *setup, *data, *stat;
101 1.10 augustss } ctl;
102 1.10 augustss /* Interrupt pipe */
103 1.15 augustss /* XXX */
104 1.10 augustss /* Bulk pipe */
105 1.10 augustss struct {
106 1.10 augustss u_int length;
107 1.10 augustss int isread;
108 1.10 augustss } bulk;
109 1.10 augustss /* Iso pipe */
110 1.15 augustss /* XXX */
111 1.10 augustss } u;
112 1.5 augustss };
113 1.5 augustss
114 1.5 augustss Static void ehci_shutdown(void *);
115 1.5 augustss Static void ehci_power(int, void *);
116 1.5 augustss
117 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
118 1.5 augustss Static void ehci_poll(struct usbd_bus *);
119 1.5 augustss Static void ehci_softintr(void *);
120 1.11 augustss Static int ehci_intr1(ehci_softc_t *);
121 1.15 augustss Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
122 1.15 augustss Static void ehci_timeout(void *);
123 1.15 augustss Static void ehci_timeout_task(void *);
124 1.5 augustss
125 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
126 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
127 1.5 augustss
128 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
129 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
130 1.5 augustss
131 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
132 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
133 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
134 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
135 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
136 1.5 augustss
137 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
138 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
139 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
140 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
141 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
142 1.5 augustss
143 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
144 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
145 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
146 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
147 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
148 1.5 augustss
149 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
150 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
151 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
152 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
153 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
154 1.5 augustss
155 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
156 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
157 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
158 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
159 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
160 1.5 augustss
161 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
162 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
163 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
164 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
165 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
166 1.5 augustss
167 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
168 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
169 1.5 augustss
170 1.5 augustss Static int ehci_str(usb_string_descriptor_t *, int, char *);
171 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
172 1.6 augustss Static void ehci_pcd_able(ehci_softc_t *, int);
173 1.6 augustss Static void ehci_pcd_enable(void *);
174 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
175 1.5 augustss
176 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
177 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
178 1.9 augustss
179 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
180 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
181 1.15 augustss Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *,
182 1.15 augustss ehci_softc_t *, int, int, usbd_xfer_handle,
183 1.15 augustss ehci_soft_qtd_t **, ehci_soft_qtd_t **);
184 1.15 augustss
185 1.15 augustss Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
186 1.9 augustss
187 1.10 augustss Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
188 1.10 augustss Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
189 1.10 augustss ehci_soft_qh_t *);
190 1.11 augustss Static void ehci_sync_hc(ehci_softc_t *);
191 1.10 augustss
192 1.10 augustss Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
193 1.10 augustss Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
194 1.9 augustss
195 1.5 augustss #ifdef EHCI_DEBUG
196 1.5 augustss Static void ehci_dumpregs(ehci_softc_t *);
197 1.6 augustss Static void ehci_dump(void);
198 1.6 augustss Static ehci_softc_t *theehci;
199 1.15 augustss Static void ehci_dump_link(ehci_link_t, int);
200 1.15 augustss Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
201 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
202 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
203 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
204 1.5 augustss #endif
205 1.5 augustss
206 1.15 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
207 1.15 augustss
208 1.11 augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
209 1.11 augustss
210 1.5 augustss #define EHCI_INTR_ENDPT 1
211 1.5 augustss
212 1.5 augustss Static struct usbd_bus_methods ehci_bus_methods = {
213 1.5 augustss ehci_open,
214 1.5 augustss ehci_softintr,
215 1.5 augustss ehci_poll,
216 1.5 augustss ehci_allocm,
217 1.5 augustss ehci_freem,
218 1.5 augustss ehci_allocx,
219 1.5 augustss ehci_freex,
220 1.5 augustss };
221 1.5 augustss
222 1.5 augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
223 1.5 augustss ehci_root_ctrl_transfer,
224 1.5 augustss ehci_root_ctrl_start,
225 1.5 augustss ehci_root_ctrl_abort,
226 1.5 augustss ehci_root_ctrl_close,
227 1.5 augustss ehci_noop,
228 1.5 augustss ehci_root_ctrl_done,
229 1.5 augustss };
230 1.5 augustss
231 1.5 augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
232 1.5 augustss ehci_root_intr_transfer,
233 1.5 augustss ehci_root_intr_start,
234 1.5 augustss ehci_root_intr_abort,
235 1.5 augustss ehci_root_intr_close,
236 1.5 augustss ehci_noop,
237 1.5 augustss ehci_root_intr_done,
238 1.5 augustss };
239 1.5 augustss
240 1.5 augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
241 1.5 augustss ehci_device_ctrl_transfer,
242 1.5 augustss ehci_device_ctrl_start,
243 1.5 augustss ehci_device_ctrl_abort,
244 1.5 augustss ehci_device_ctrl_close,
245 1.5 augustss ehci_noop,
246 1.5 augustss ehci_device_ctrl_done,
247 1.5 augustss };
248 1.5 augustss
249 1.5 augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
250 1.5 augustss ehci_device_intr_transfer,
251 1.5 augustss ehci_device_intr_start,
252 1.5 augustss ehci_device_intr_abort,
253 1.5 augustss ehci_device_intr_close,
254 1.5 augustss ehci_device_clear_toggle,
255 1.5 augustss ehci_device_intr_done,
256 1.5 augustss };
257 1.5 augustss
258 1.5 augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
259 1.5 augustss ehci_device_bulk_transfer,
260 1.5 augustss ehci_device_bulk_start,
261 1.5 augustss ehci_device_bulk_abort,
262 1.5 augustss ehci_device_bulk_close,
263 1.5 augustss ehci_device_clear_toggle,
264 1.5 augustss ehci_device_bulk_done,
265 1.5 augustss };
266 1.5 augustss
267 1.5 augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
268 1.5 augustss ehci_device_isoc_transfer,
269 1.5 augustss ehci_device_isoc_start,
270 1.5 augustss ehci_device_isoc_abort,
271 1.5 augustss ehci_device_isoc_close,
272 1.5 augustss ehci_noop,
273 1.5 augustss ehci_device_isoc_done,
274 1.5 augustss };
275 1.5 augustss
276 1.15 augustss int ehcidisable = 0;
277 1.15 augustss
278 1.1 augustss usbd_status
279 1.1 augustss ehci_init(ehci_softc_t *sc)
280 1.1 augustss {
281 1.3 augustss u_int32_t version, sparams, cparams, hcr;
282 1.3 augustss u_int i;
283 1.3 augustss usbd_status err;
284 1.11 augustss ehci_soft_qh_t *sqh;
285 1.3 augustss
286 1.15 augustss if (ehcidisable)
287 1.15 augustss return (USBD_INVAL);
288 1.15 augustss
289 1.3 augustss DPRINTF(("ehci_init: start\n"));
290 1.6 augustss #ifdef EHCI_DEBUG
291 1.6 augustss theehci = sc;
292 1.6 augustss #endif
293 1.3 augustss
294 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
295 1.3 augustss
296 1.3 augustss version = EREAD2(sc, EHCI_HCIVERSION);
297 1.3 augustss printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
298 1.3 augustss version >> 8, version & 0xff);
299 1.3 augustss
300 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
301 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
302 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
303 1.3 augustss if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
304 1.3 augustss printf("%s: wrong number of companions (%d != %d)\n",
305 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
306 1.3 augustss EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
307 1.3 augustss return (USBD_IOERROR);
308 1.3 augustss }
309 1.3 augustss if (sc->sc_ncomp > 0) {
310 1.3 augustss printf("%s: companion controller%s, %d port%s each:",
311 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
312 1.3 augustss EHCI_HCS_N_PCC(sparams),
313 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
314 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
315 1.3 augustss printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
316 1.3 augustss printf("\n");
317 1.3 augustss }
318 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
319 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
320 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
321 1.3 augustss
322 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
323 1.3 augustss
324 1.3 augustss /* Reset the controller */
325 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
326 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
327 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
328 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
329 1.3 augustss for (i = 0; i < 100; i++) {
330 1.3 augustss delay(10);
331 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
332 1.3 augustss if (!hcr)
333 1.3 augustss break;
334 1.3 augustss }
335 1.3 augustss if (hcr) {
336 1.3 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
337 1.3 augustss return (USBD_IOERROR);
338 1.3 augustss }
339 1.3 augustss
340 1.3 augustss /* frame list size at default, read back what we got and use that */
341 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
342 1.3 augustss case 0: sc->sc_flsize = 1024*4; break;
343 1.3 augustss case 1: sc->sc_flsize = 512*4; break;
344 1.3 augustss case 2: sc->sc_flsize = 256*4; break;
345 1.3 augustss case 3: return (USBD_IOERROR);
346 1.3 augustss }
347 1.3 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
348 1.3 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
349 1.3 augustss if (err)
350 1.3 augustss return (err);
351 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
352 1.3 augustss
353 1.5 augustss /* Set up the bus struct. */
354 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
355 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
356 1.5 augustss
357 1.5 augustss sc->sc_powerhook = powerhook_establish(ehci_power, sc);
358 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
359 1.5 augustss
360 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
361 1.6 augustss
362 1.11 augustss /* Allocate dummy QH that starts the async list. */
363 1.11 augustss sqh = ehci_alloc_sqh(sc);
364 1.11 augustss if (sqh == NULL) {
365 1.9 augustss err = USBD_NOMEM;
366 1.9 augustss goto bad1;
367 1.9 augustss }
368 1.11 augustss /* Fill the QH */
369 1.11 augustss sqh->qh.qh_endp =
370 1.11 augustss htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
371 1.11 augustss sqh->qh.qh_link =
372 1.11 augustss htole32(sqh->physaddr | EHCI_LINK_QH);
373 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
374 1.11 augustss sqh->next = NULL;
375 1.11 augustss /* Fill the overlay qTD */
376 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
377 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
378 1.11 augustss sqh->qh.qh_qtd.qtd_status =
379 1.9 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
380 1.11 augustss sqh->sqtd = NULL;
381 1.9 augustss #ifdef EHCI_DEBUG
382 1.9 augustss if (ehcidebug) {
383 1.11 augustss ehci_dump_sqh(sc->sc_async_head);
384 1.9 augustss }
385 1.9 augustss #endif
386 1.9 augustss
387 1.9 augustss /* Point to async list */
388 1.11 augustss sc->sc_async_head = sqh;
389 1.11 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
390 1.9 augustss
391 1.9 augustss usb_callout_init(sc->sc_tmo_pcd);
392 1.9 augustss
393 1.10 augustss lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
394 1.10 augustss
395 1.6 augustss /* Enable interrupts */
396 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
397 1.6 augustss
398 1.6 augustss /* Turn on controller */
399 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
400 1.6 augustss EHCI_CMD_ITC_8 | /* 8 microframes */
401 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
402 1.10 augustss EHCI_CMD_ASE |
403 1.6 augustss /* EHCI_CMD_PSE | */
404 1.6 augustss EHCI_CMD_RS);
405 1.6 augustss
406 1.6 augustss /* Take over port ownership */
407 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
408 1.6 augustss
409 1.8 augustss for (i = 0; i < 100; i++) {
410 1.8 augustss delay(10);
411 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
412 1.8 augustss if (!hcr)
413 1.8 augustss break;
414 1.8 augustss }
415 1.8 augustss if (hcr) {
416 1.8 augustss printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
417 1.8 augustss return (USBD_IOERROR);
418 1.8 augustss }
419 1.8 augustss
420 1.5 augustss return (USBD_NORMAL_COMPLETION);
421 1.9 augustss
422 1.9 augustss #if 0
423 1.11 augustss bad2:
424 1.15 augustss ehci_free_sqh(sc, sc->sc_async_head);
425 1.9 augustss #endif
426 1.9 augustss bad1:
427 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
428 1.9 augustss return (err);
429 1.1 augustss }
430 1.1 augustss
431 1.1 augustss int
432 1.1 augustss ehci_intr(void *v)
433 1.1 augustss {
434 1.6 augustss ehci_softc_t *sc = v;
435 1.6 augustss
436 1.15 augustss if (sc == NULL || sc->sc_dying || ehcidisable)
437 1.15 augustss return (0);
438 1.15 augustss
439 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
440 1.6 augustss if (sc->sc_bus.use_polling) {
441 1.6 augustss #ifdef DIAGNOSTIC
442 1.6 augustss printf("ehci_intr: ignored interrupt while polling\n");
443 1.6 augustss #endif
444 1.6 augustss return (0);
445 1.6 augustss }
446 1.6 augustss
447 1.6 augustss return (ehci_intr1(sc));
448 1.6 augustss }
449 1.6 augustss
450 1.6 augustss Static int
451 1.6 augustss ehci_intr1(ehci_softc_t *sc)
452 1.6 augustss {
453 1.6 augustss u_int32_t intrs, eintrs;
454 1.6 augustss
455 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
456 1.6 augustss
457 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
458 1.6 augustss if (sc == NULL) {
459 1.6 augustss #ifdef DIAGNOSTIC
460 1.6 augustss printf("ehci_intr: sc == NULL\n");
461 1.6 augustss #endif
462 1.6 augustss return (0);
463 1.6 augustss }
464 1.6 augustss
465 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
466 1.6 augustss
467 1.6 augustss if (!intrs)
468 1.6 augustss return (0);
469 1.6 augustss
470 1.6 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
471 1.6 augustss eintrs = intrs & sc->sc_eintrs;
472 1.6 augustss DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
473 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
474 1.6 augustss (u_int)eintrs));
475 1.6 augustss if (!eintrs)
476 1.6 augustss return (0);
477 1.6 augustss
478 1.6 augustss sc->sc_bus.intr_context++;
479 1.6 augustss sc->sc_bus.no_intrs++;
480 1.10 augustss if (eintrs & EHCI_STS_IAA) {
481 1.10 augustss DPRINTF(("ehci_intr1: door bell\n"));
482 1.11 augustss wakeup(&sc->sc_async_head);
483 1.10 augustss eintrs &= ~EHCI_STS_INT;
484 1.10 augustss }
485 1.6 augustss if (eintrs & EHCI_STS_INT) {
486 1.6 augustss DPRINTF(("ehci_intr1: something is done\n"));
487 1.6 augustss eintrs &= ~EHCI_STS_INT;
488 1.6 augustss }
489 1.6 augustss if (eintrs & EHCI_STS_ERRINT) {
490 1.6 augustss DPRINTF(("ehci_intr1: some error\n"));
491 1.6 augustss eintrs &= ~EHCI_STS_HSE;
492 1.6 augustss }
493 1.6 augustss if (eintrs & EHCI_STS_HSE) {
494 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
495 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
496 1.6 augustss /* XXX what else */
497 1.6 augustss }
498 1.6 augustss if (eintrs & EHCI_STS_PCD) {
499 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
500 1.6 augustss /*
501 1.6 augustss * Disable PCD interrupt for now, because it will be
502 1.6 augustss * on until the port has been reset.
503 1.6 augustss */
504 1.6 augustss ehci_pcd_able(sc, 0);
505 1.6 augustss /* Do not allow RHSC interrupts > 1 per second */
506 1.6 augustss usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
507 1.6 augustss eintrs &= ~EHCI_STS_PCD;
508 1.6 augustss }
509 1.6 augustss
510 1.6 augustss sc->sc_bus.intr_context--;
511 1.6 augustss
512 1.6 augustss if (eintrs != 0) {
513 1.6 augustss /* Block unprocessed interrupts. */
514 1.6 augustss sc->sc_eintrs &= ~eintrs;
515 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
516 1.6 augustss printf("%s: blocking intrs 0x%x\n",
517 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
518 1.6 augustss }
519 1.6 augustss
520 1.6 augustss return (1);
521 1.6 augustss }
522 1.6 augustss
523 1.6 augustss void
524 1.6 augustss ehci_pcd_able(ehci_softc_t *sc, int on)
525 1.6 augustss {
526 1.6 augustss DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
527 1.6 augustss if (on)
528 1.6 augustss sc->sc_eintrs |= EHCI_STS_PCD;
529 1.6 augustss else
530 1.6 augustss sc->sc_eintrs &= ~EHCI_STS_PCD;
531 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
532 1.6 augustss }
533 1.6 augustss
534 1.6 augustss void
535 1.6 augustss ehci_pcd_enable(void *v_sc)
536 1.6 augustss {
537 1.6 augustss ehci_softc_t *sc = v_sc;
538 1.6 augustss
539 1.6 augustss ehci_pcd_able(sc, 1);
540 1.6 augustss }
541 1.6 augustss
542 1.6 augustss void
543 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
544 1.6 augustss {
545 1.6 augustss usbd_pipe_handle pipe;
546 1.15 augustss struct ehci_pipe *epipe;
547 1.6 augustss u_char *p;
548 1.6 augustss int i, m;
549 1.6 augustss
550 1.6 augustss if (xfer == NULL) {
551 1.6 augustss /* Just ignore the change. */
552 1.6 augustss return;
553 1.6 augustss }
554 1.6 augustss
555 1.6 augustss pipe = xfer->pipe;
556 1.15 augustss epipe = (struct ehci_pipe *)pipe;
557 1.6 augustss
558 1.6 augustss p = KERNADDR(&xfer->dmabuf);
559 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
560 1.6 augustss memset(p, 0, xfer->length);
561 1.6 augustss for (i = 1; i <= m; i++) {
562 1.6 augustss /* Pick out CHANGE bits from the status reg. */
563 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
564 1.6 augustss p[i/8] |= 1 << (i%8);
565 1.6 augustss }
566 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
567 1.6 augustss xfer->actlen = xfer->length;
568 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
569 1.6 augustss
570 1.6 augustss usb_transfer_complete(xfer);
571 1.1 augustss }
572 1.1 augustss
573 1.5 augustss void
574 1.5 augustss ehci_softintr(void *v)
575 1.5 augustss {
576 1.5 augustss //ehci_softc_t *sc = v;
577 1.5 augustss }
578 1.5 augustss
579 1.15 augustss /*
580 1.15 augustss * Wait here until controller claims to have an interrupt.
581 1.15 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
582 1.15 augustss * too long.
583 1.15 augustss */
584 1.15 augustss void
585 1.15 augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
586 1.15 augustss {
587 1.15 augustss int timo = xfer->timeout;
588 1.15 augustss int usecs;
589 1.15 augustss u_int32_t intrs;
590 1.15 augustss
591 1.15 augustss xfer->status = USBD_IN_PROGRESS;
592 1.15 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
593 1.15 augustss usb_delay_ms(&sc->sc_bus, 1);
594 1.15 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
595 1.15 augustss sc->sc_eintrs;
596 1.15 augustss DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
597 1.15 augustss #ifdef OHCI_DEBUG
598 1.15 augustss if (ehcidebug > 15)
599 1.15 augustss ehci_dumpregs(sc);
600 1.15 augustss #endif
601 1.15 augustss if (intrs) {
602 1.15 augustss ehci_intr1(sc);
603 1.15 augustss if (xfer->status != USBD_IN_PROGRESS)
604 1.15 augustss return;
605 1.15 augustss }
606 1.15 augustss }
607 1.15 augustss
608 1.15 augustss /* Timeout */
609 1.15 augustss DPRINTF(("ehci_waitintr: timeout\n"));
610 1.15 augustss xfer->status = USBD_TIMEOUT;
611 1.15 augustss usb_transfer_complete(xfer);
612 1.15 augustss /* XXX should free TD */
613 1.15 augustss }
614 1.15 augustss
615 1.5 augustss void
616 1.5 augustss ehci_poll(struct usbd_bus *bus)
617 1.5 augustss {
618 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
619 1.5 augustss #ifdef EHCI_DEBUG
620 1.5 augustss static int last;
621 1.5 augustss int new;
622 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
623 1.5 augustss if (new != last) {
624 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
625 1.5 augustss last = new;
626 1.5 augustss }
627 1.5 augustss #endif
628 1.5 augustss
629 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
630 1.5 augustss ehci_intr1(sc);
631 1.5 augustss }
632 1.5 augustss
633 1.1 augustss int
634 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
635 1.1 augustss {
636 1.1 augustss int rv = 0;
637 1.1 augustss
638 1.1 augustss if (sc->sc_child != NULL)
639 1.1 augustss rv = config_detach(sc->sc_child, flags);
640 1.1 augustss
641 1.1 augustss if (rv != 0)
642 1.1 augustss return (rv);
643 1.1 augustss
644 1.6 augustss usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
645 1.6 augustss
646 1.1 augustss if (sc->sc_powerhook != NULL)
647 1.1 augustss powerhook_disestablish(sc->sc_powerhook);
648 1.1 augustss if (sc->sc_shutdownhook != NULL)
649 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
650 1.1 augustss
651 1.15 augustss usb_delay_ms(&sc->sc_bus, 1000); /* XXX let stray task complete */
652 1.15 augustss
653 1.1 augustss /* XXX free other data structures XXX */
654 1.1 augustss
655 1.1 augustss return (rv);
656 1.1 augustss }
657 1.1 augustss
658 1.1 augustss
659 1.1 augustss int
660 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
661 1.1 augustss {
662 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
663 1.1 augustss int rv = 0;
664 1.1 augustss
665 1.1 augustss switch (act) {
666 1.1 augustss case DVACT_ACTIVATE:
667 1.1 augustss return (EOPNOTSUPP);
668 1.1 augustss break;
669 1.1 augustss
670 1.1 augustss case DVACT_DEACTIVATE:
671 1.1 augustss if (sc->sc_child != NULL)
672 1.1 augustss rv = config_deactivate(sc->sc_child);
673 1.5 augustss sc->sc_dying = 1;
674 1.1 augustss break;
675 1.1 augustss }
676 1.1 augustss return (rv);
677 1.1 augustss }
678 1.1 augustss
679 1.5 augustss /*
680 1.5 augustss * Handle suspend/resume.
681 1.5 augustss *
682 1.5 augustss * We need to switch to polling mode here, because this routine is
683 1.5 augustss * called from an intterupt context. This is all right since we
684 1.5 augustss * are almost suspended anyway.
685 1.5 augustss */
686 1.5 augustss void
687 1.5 augustss ehci_power(int why, void *v)
688 1.5 augustss {
689 1.5 augustss ehci_softc_t *sc = v;
690 1.5 augustss //u_int32_t ctl;
691 1.5 augustss int s;
692 1.5 augustss
693 1.5 augustss #ifdef EHCI_DEBUG
694 1.5 augustss DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
695 1.5 augustss ehci_dumpregs(sc);
696 1.5 augustss #endif
697 1.5 augustss
698 1.5 augustss s = splhardusb();
699 1.5 augustss switch (why) {
700 1.5 augustss case PWR_SUSPEND:
701 1.5 augustss case PWR_STANDBY:
702 1.5 augustss sc->sc_bus.use_polling++;
703 1.5 augustss #if 0
704 1.5 augustss OOO
705 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
706 1.5 augustss if (sc->sc_control == 0) {
707 1.5 augustss /*
708 1.5 augustss * Preserve register values, in case that APM BIOS
709 1.5 augustss * does not recover them.
710 1.5 augustss */
711 1.5 augustss sc->sc_control = ctl;
712 1.5 augustss sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
713 1.5 augustss }
714 1.5 augustss ctl |= EHCI_HCFS_SUSPEND;
715 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
716 1.5 augustss #endif
717 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
718 1.5 augustss sc->sc_bus.use_polling--;
719 1.5 augustss break;
720 1.5 augustss case PWR_RESUME:
721 1.5 augustss sc->sc_bus.use_polling++;
722 1.5 augustss #if 0
723 1.5 augustss OOO
724 1.5 augustss /* Some broken BIOSes do not recover these values */
725 1.5 augustss OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
726 1.5 augustss OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
727 1.5 augustss OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
728 1.5 augustss if (sc->sc_intre)
729 1.5 augustss OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
730 1.5 augustss sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
731 1.5 augustss if (sc->sc_control)
732 1.5 augustss ctl = sc->sc_control;
733 1.5 augustss else
734 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL);
735 1.5 augustss ctl |= EHCI_HCFS_RESUME;
736 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
737 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
738 1.5 augustss ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
739 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
740 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
741 1.5 augustss sc->sc_control = sc->sc_intre = 0;
742 1.5 augustss #endif
743 1.5 augustss sc->sc_bus.use_polling--;
744 1.5 augustss break;
745 1.5 augustss case PWR_SOFTSUSPEND:
746 1.5 augustss case PWR_SOFTSTANDBY:
747 1.5 augustss case PWR_SOFTRESUME:
748 1.5 augustss break;
749 1.5 augustss }
750 1.5 augustss splx(s);
751 1.5 augustss }
752 1.5 augustss
753 1.5 augustss /*
754 1.5 augustss * Shut down the controller when the system is going down.
755 1.5 augustss */
756 1.5 augustss void
757 1.5 augustss ehci_shutdown(void *v)
758 1.5 augustss {
759 1.8 augustss ehci_softc_t *sc = v;
760 1.5 augustss
761 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
762 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
763 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
764 1.5 augustss }
765 1.5 augustss
766 1.5 augustss usbd_status
767 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
768 1.5 augustss {
769 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
770 1.5 augustss
771 1.5 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
772 1.5 augustss }
773 1.5 augustss
774 1.5 augustss void
775 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
776 1.5 augustss {
777 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
778 1.5 augustss
779 1.5 augustss usb_freemem(&sc->sc_bus, dma);
780 1.5 augustss }
781 1.5 augustss
782 1.5 augustss usbd_xfer_handle
783 1.5 augustss ehci_allocx(struct usbd_bus *bus)
784 1.5 augustss {
785 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
786 1.5 augustss usbd_xfer_handle xfer;
787 1.5 augustss
788 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
789 1.5 augustss if (xfer != NULL)
790 1.5 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
791 1.5 augustss else
792 1.15 augustss xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
793 1.5 augustss if (xfer != NULL)
794 1.15 augustss memset(xfer, 0, sizeof (struct ehci_xfer));
795 1.5 augustss return (xfer);
796 1.5 augustss }
797 1.5 augustss
798 1.5 augustss void
799 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
800 1.5 augustss {
801 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
802 1.5 augustss
803 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
804 1.5 augustss }
805 1.5 augustss
806 1.5 augustss Static void
807 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
808 1.5 augustss {
809 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
810 1.15 augustss
811 1.15 augustss printf("ehci_device_clear_toggle: epipe=%p\n", epipe);
812 1.5 augustss #if 0
813 1.5 augustss OOO
814 1.5 augustss epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
815 1.5 augustss #endif
816 1.5 augustss }
817 1.5 augustss
818 1.5 augustss Static void
819 1.5 augustss ehci_noop(usbd_pipe_handle pipe)
820 1.5 augustss {
821 1.5 augustss }
822 1.5 augustss
823 1.5 augustss #ifdef EHCI_DEBUG
824 1.5 augustss void
825 1.5 augustss ehci_dumpregs(ehci_softc_t *sc)
826 1.5 augustss {
827 1.6 augustss int i;
828 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
829 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
830 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
831 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
832 1.15 augustss printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
833 1.15 augustss EOREAD4(sc, EHCI_FRINDEX),
834 1.15 augustss EOREAD4(sc, EHCI_CTRLDSSEGMENT),
835 1.15 augustss EOREAD4(sc, EHCI_PERIODICLISTBASE),
836 1.15 augustss EOREAD4(sc, EHCI_ASYNCLISTADDR));
837 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
838 1.6 augustss printf("port %d status=0x%08x\n", i,
839 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
840 1.6 augustss }
841 1.6 augustss
842 1.6 augustss void
843 1.6 augustss ehci_dump()
844 1.6 augustss {
845 1.6 augustss ehci_dumpregs(theehci);
846 1.5 augustss }
847 1.9 augustss
848 1.9 augustss void
849 1.15 augustss ehci_dump_link(ehci_link_t link, int type)
850 1.9 augustss {
851 1.15 augustss link = le32toh(link);
852 1.15 augustss printf("0x%08x", link);
853 1.9 augustss if (link & EHCI_LINK_TERMINATE)
854 1.15 augustss printf("<T>");
855 1.15 augustss else {
856 1.15 augustss printf("<");
857 1.15 augustss if (type) {
858 1.15 augustss switch (EHCI_LINK_TYPE(link)) {
859 1.15 augustss case EHCI_LINK_ITD: printf("ITD"); break;
860 1.15 augustss case EHCI_LINK_QH: printf("QH"); break;
861 1.15 augustss case EHCI_LINK_SITD: printf("SITD"); break;
862 1.15 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
863 1.15 augustss }
864 1.9 augustss printf(">");
865 1.15 augustss }
866 1.15 augustss }
867 1.15 augustss
868 1.15 augustss void
869 1.15 augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
870 1.15 augustss {
871 1.15 augustss for (; sqtd; sqtd = sqtd->nextqtd)
872 1.15 augustss ehci_dump_sqtd(sqtd);
873 1.9 augustss }
874 1.9 augustss
875 1.9 augustss void
876 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
877 1.9 augustss {
878 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
879 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
880 1.9 augustss }
881 1.9 augustss
882 1.9 augustss void
883 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
884 1.9 augustss {
885 1.9 augustss u_int32_t s;
886 1.15 augustss char sbuf[128];
887 1.9 augustss
888 1.15 augustss printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
889 1.15 augustss printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
890 1.9 augustss printf("\n");
891 1.15 augustss s = le32toh(qtd->qtd_status);
892 1.15 augustss bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
893 1.15 augustss "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
894 1.15 augustss "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
895 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
896 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
897 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
898 1.15 augustss printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
899 1.15 augustss EHCI_QTD_GET_PID(s), sbuf);
900 1.9 augustss for (s = 0; s < 5; s++)
901 1.15 augustss printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
902 1.9 augustss }
903 1.9 augustss
904 1.9 augustss void
905 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
906 1.9 augustss {
907 1.9 augustss ehci_qh_t *qh = &sqh->qh;
908 1.15 augustss u_int32_t endp, endphub;
909 1.9 augustss
910 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
911 1.15 augustss printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
912 1.15 augustss endp = le32toh(qh->qh_endp);
913 1.15 augustss printf(" endp=0x%08x\n", endp);
914 1.15 augustss printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
915 1.15 augustss EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
916 1.15 augustss EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
917 1.15 augustss EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
918 1.15 augustss printf(" mpl=0x%x ctl=%d nrl=%d\n",
919 1.15 augustss EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
920 1.15 augustss EHCI_QH_GET_NRL(endp));
921 1.15 augustss endphub = le32toh(qh->qh_endphub);
922 1.15 augustss printf(" endphub=0x%08x\n", endphub);
923 1.15 augustss printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
924 1.15 augustss EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
925 1.15 augustss EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
926 1.15 augustss EHCI_QH_GET_MULT(endphub));
927 1.15 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
928 1.12 augustss printf("Overlay qTD:\n");
929 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
930 1.9 augustss }
931 1.9 augustss
932 1.5 augustss #endif
933 1.5 augustss
934 1.5 augustss usbd_status
935 1.5 augustss ehci_open(usbd_pipe_handle pipe)
936 1.5 augustss {
937 1.5 augustss usbd_device_handle dev = pipe->device;
938 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
939 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
940 1.5 augustss u_int8_t addr = dev->address;
941 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
942 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
943 1.10 augustss ehci_soft_qh_t *sqh;
944 1.10 augustss usbd_status err;
945 1.10 augustss #if 0
946 1.5 augustss ehci_soft_itd_t *sitd;
947 1.5 augustss ehci_physaddr_t tdphys;
948 1.5 augustss u_int32_t fmt;
949 1.5 augustss int ival;
950 1.5 augustss #endif
951 1.10 augustss int s;
952 1.10 augustss int speed, naks;
953 1.5 augustss
954 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
955 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
956 1.5 augustss
957 1.5 augustss if (addr == sc->sc_addr) {
958 1.5 augustss switch (ed->bEndpointAddress) {
959 1.5 augustss case USB_CONTROL_ENDPOINT:
960 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
961 1.5 augustss break;
962 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
963 1.5 augustss pipe->methods = &ehci_root_intr_methods;
964 1.5 augustss break;
965 1.5 augustss default:
966 1.5 augustss return (USBD_INVAL);
967 1.5 augustss }
968 1.10 augustss return (USBD_NORMAL_COMPLETION);
969 1.10 augustss }
970 1.10 augustss
971 1.11 augustss switch (dev->speed) {
972 1.11 augustss case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
973 1.11 augustss case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
974 1.11 augustss case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
975 1.11 augustss default: panic("ehci_open: bad device speed %d\n", dev->speed);
976 1.11 augustss }
977 1.10 augustss naks = 8; /* XXX */
978 1.10 augustss sqh = ehci_alloc_sqh(sc);
979 1.10 augustss if (sqh == NULL)
980 1.10 augustss goto bad0;
981 1.10 augustss /* qh_link filled when the QH is added */
982 1.10 augustss sqh->qh.qh_endp = htole32(
983 1.10 augustss EHCI_QH_SET_ADDR(addr) |
984 1.10 augustss EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
985 1.10 augustss EHCI_QH_SET_EPS(speed) | /* XXX */
986 1.10 augustss /* XXX EHCI_QH_DTC ? */
987 1.10 augustss EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
988 1.10 augustss (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
989 1.10 augustss EHCI_QH_CTL : 0) |
990 1.10 augustss EHCI_QH_SET_NRL(naks)
991 1.10 augustss );
992 1.10 augustss sqh->qh.qh_endphub = htole32(
993 1.10 augustss EHCI_QH_SET_MULT(1)
994 1.11 augustss /* XXX TT stuff */
995 1.11 augustss /* XXX interrupt mask */
996 1.10 augustss );
997 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
998 1.11 augustss /* Fill the overlay qTD */
999 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1000 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1001 1.15 augustss sqh->qh.qh_qtd.qtd_status = htole32(0);
1002 1.10 augustss
1003 1.10 augustss epipe->sqh = sqh;
1004 1.5 augustss
1005 1.10 augustss switch (xfertype) {
1006 1.10 augustss case UE_CONTROL:
1007 1.11 augustss err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1008 1.10 augustss 0, &epipe->u.ctl.reqdma);
1009 1.10 augustss if (err)
1010 1.11 augustss goto bad1;
1011 1.11 augustss pipe->methods = &ehci_device_ctrl_methods;
1012 1.10 augustss s = splusb();
1013 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1014 1.10 augustss splx(s);
1015 1.10 augustss break;
1016 1.10 augustss case UE_BULK:
1017 1.10 augustss pipe->methods = &ehci_device_bulk_methods;
1018 1.10 augustss s = splusb();
1019 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1020 1.10 augustss splx(s);
1021 1.10 augustss break;
1022 1.10 augustss default:
1023 1.10 augustss return (USBD_INVAL);
1024 1.5 augustss }
1025 1.5 augustss return (USBD_NORMAL_COMPLETION);
1026 1.5 augustss
1027 1.11 augustss bad1:
1028 1.11 augustss ehci_free_sqh(sc, sqh);
1029 1.5 augustss bad0:
1030 1.5 augustss return (USBD_NOMEM);
1031 1.10 augustss }
1032 1.10 augustss
1033 1.10 augustss /*
1034 1.10 augustss * Add an ED to the schedule. Called at splusb().
1035 1.10 augustss */
1036 1.10 augustss void
1037 1.10 augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1038 1.10 augustss {
1039 1.10 augustss SPLUSBCHECK;
1040 1.10 augustss
1041 1.10 augustss sqh->next = head->next;
1042 1.10 augustss sqh->qh.qh_link = head->qh.qh_link;
1043 1.10 augustss head->next = sqh;
1044 1.15 augustss head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1045 1.10 augustss
1046 1.10 augustss #ifdef EHCI_DEBUG
1047 1.10 augustss if (ehcidebug > 0) {
1048 1.10 augustss printf("ehci_add_qh:\n");
1049 1.10 augustss ehci_dump_sqh(sqh);
1050 1.10 augustss }
1051 1.5 augustss #endif
1052 1.5 augustss }
1053 1.5 augustss
1054 1.10 augustss /*
1055 1.10 augustss * Remove an ED from the schedule. Called at splusb().
1056 1.10 augustss */
1057 1.10 augustss void
1058 1.10 augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1059 1.10 augustss {
1060 1.10 augustss ehci_soft_qh_t *p;
1061 1.10 augustss
1062 1.10 augustss SPLUSBCHECK;
1063 1.10 augustss /* XXX */
1064 1.10 augustss for (p = head; p == NULL && p->next != sqh; p = p->next)
1065 1.10 augustss ;
1066 1.10 augustss if (p == NULL)
1067 1.10 augustss panic("ehci_rem_qh: ED not found\n");
1068 1.10 augustss p->next = sqh->next;
1069 1.10 augustss p->qh.qh_link = sqh->qh.qh_link;
1070 1.10 augustss
1071 1.11 augustss ehci_sync_hc(sc);
1072 1.11 augustss }
1073 1.11 augustss
1074 1.11 augustss /*
1075 1.11 augustss * Ensure that the HC has released all references to the QH. We do this
1076 1.11 augustss * by asking for a Async Advance Doorbell interrupt and then we wait for
1077 1.11 augustss * the interrupt.
1078 1.11 augustss * To make this easier we first obtain exclusive use of the doorbell.
1079 1.11 augustss */
1080 1.11 augustss void
1081 1.11 augustss ehci_sync_hc(ehci_softc_t *sc)
1082 1.11 augustss {
1083 1.15 augustss int s, error;
1084 1.11 augustss
1085 1.12 augustss if (sc->sc_dying) {
1086 1.12 augustss DPRINTFN(2,("ehci_sync_hc: dying\n"));
1087 1.12 augustss return;
1088 1.12 augustss }
1089 1.12 augustss DPRINTFN(2,("ehci_sync_hc: enter\n"));
1090 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1091 1.10 augustss s = splhardusb();
1092 1.10 augustss /* ask for doorbell */
1093 1.10 augustss EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1094 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1095 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1096 1.15 augustss error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1097 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1098 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1099 1.10 augustss splx(s);
1100 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1101 1.15 augustss #ifdef DIAGNOSTIC
1102 1.15 augustss if (error)
1103 1.15 augustss printf("ehci_sync_hc: tsleep() = %d\n", error);
1104 1.15 augustss #endif
1105 1.12 augustss DPRINTFN(2,("ehci_sync_hc: exit\n"));
1106 1.10 augustss }
1107 1.10 augustss
1108 1.5 augustss /***********/
1109 1.5 augustss
1110 1.5 augustss /*
1111 1.5 augustss * Data structures and routines to emulate the root hub.
1112 1.5 augustss */
1113 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
1114 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1115 1.5 augustss UDESC_DEVICE, /* type */
1116 1.5 augustss {0x00, 0x02}, /* USB version */
1117 1.5 augustss UDCLASS_HUB, /* class */
1118 1.5 augustss UDSUBCLASS_HUB, /* subclass */
1119 1.11 augustss UDPROTO_HSHUBSTT, /* protocol */
1120 1.5 augustss 64, /* max packet */
1121 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
1122 1.5 augustss 1,2,0, /* string indicies */
1123 1.5 augustss 1 /* # of configurations */
1124 1.5 augustss };
1125 1.5 augustss
1126 1.11 augustss Static usb_device_qualifier_t ehci_odevd = {
1127 1.11 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1128 1.11 augustss UDESC_DEVICE_QUALIFIER, /* type */
1129 1.11 augustss {0x00, 0x02}, /* USB version */
1130 1.11 augustss UDCLASS_HUB, /* class */
1131 1.11 augustss UDSUBCLASS_HUB, /* subclass */
1132 1.11 augustss UDPROTO_FSHUB, /* protocol */
1133 1.11 augustss 64, /* max packet */
1134 1.11 augustss 1, /* # of configurations */
1135 1.11 augustss 0
1136 1.11 augustss };
1137 1.11 augustss
1138 1.5 augustss Static usb_config_descriptor_t ehci_confd = {
1139 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1140 1.5 augustss UDESC_CONFIG,
1141 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1142 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1143 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1144 1.5 augustss 1,
1145 1.5 augustss 1,
1146 1.5 augustss 0,
1147 1.5 augustss UC_SELF_POWERED,
1148 1.5 augustss 0 /* max power */
1149 1.5 augustss };
1150 1.5 augustss
1151 1.5 augustss Static usb_interface_descriptor_t ehci_ifcd = {
1152 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1153 1.5 augustss UDESC_INTERFACE,
1154 1.5 augustss 0,
1155 1.5 augustss 0,
1156 1.5 augustss 1,
1157 1.5 augustss UICLASS_HUB,
1158 1.5 augustss UISUBCLASS_HUB,
1159 1.11 augustss UIPROTO_HSHUBSTT,
1160 1.5 augustss 0
1161 1.5 augustss };
1162 1.5 augustss
1163 1.5 augustss Static usb_endpoint_descriptor_t ehci_endpd = {
1164 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1165 1.5 augustss UDESC_ENDPOINT,
1166 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
1167 1.5 augustss UE_INTERRUPT,
1168 1.5 augustss {8, 0}, /* max packet */
1169 1.5 augustss 255
1170 1.5 augustss };
1171 1.5 augustss
1172 1.5 augustss Static usb_hub_descriptor_t ehci_hubd = {
1173 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
1174 1.5 augustss UDESC_HUB,
1175 1.5 augustss 0,
1176 1.5 augustss {0,0},
1177 1.5 augustss 0,
1178 1.5 augustss 0,
1179 1.5 augustss {0},
1180 1.5 augustss };
1181 1.5 augustss
1182 1.5 augustss Static int
1183 1.5 augustss ehci_str(p, l, s)
1184 1.5 augustss usb_string_descriptor_t *p;
1185 1.5 augustss int l;
1186 1.5 augustss char *s;
1187 1.5 augustss {
1188 1.5 augustss int i;
1189 1.5 augustss
1190 1.5 augustss if (l == 0)
1191 1.5 augustss return (0);
1192 1.5 augustss p->bLength = 2 * strlen(s) + 2;
1193 1.5 augustss if (l == 1)
1194 1.5 augustss return (1);
1195 1.5 augustss p->bDescriptorType = UDESC_STRING;
1196 1.5 augustss l -= 2;
1197 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1198 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1199 1.5 augustss return (2*i+2);
1200 1.5 augustss }
1201 1.5 augustss
1202 1.5 augustss /*
1203 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1204 1.5 augustss */
1205 1.5 augustss Static usbd_status
1206 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1207 1.5 augustss {
1208 1.5 augustss usbd_status err;
1209 1.5 augustss
1210 1.5 augustss /* Insert last in queue. */
1211 1.5 augustss err = usb_insert_transfer(xfer);
1212 1.5 augustss if (err)
1213 1.5 augustss return (err);
1214 1.5 augustss
1215 1.5 augustss /* Pipe isn't running, start first */
1216 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1217 1.5 augustss }
1218 1.5 augustss
1219 1.5 augustss Static usbd_status
1220 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1221 1.5 augustss {
1222 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1223 1.5 augustss usb_device_request_t *req;
1224 1.5 augustss void *buf = NULL;
1225 1.5 augustss int port, i;
1226 1.5 augustss int s, len, value, index, l, totlen = 0;
1227 1.5 augustss usb_port_status_t ps;
1228 1.5 augustss usb_hub_descriptor_t hubd;
1229 1.5 augustss usbd_status err;
1230 1.5 augustss u_int32_t v;
1231 1.5 augustss
1232 1.5 augustss if (sc->sc_dying)
1233 1.5 augustss return (USBD_IOERROR);
1234 1.5 augustss
1235 1.5 augustss #ifdef DIAGNOSTIC
1236 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1237 1.5 augustss /* XXX panic */
1238 1.5 augustss return (USBD_INVAL);
1239 1.5 augustss #endif
1240 1.5 augustss req = &xfer->request;
1241 1.5 augustss
1242 1.5 augustss DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1243 1.5 augustss req->bmRequestType, req->bRequest));
1244 1.5 augustss
1245 1.5 augustss len = UGETW(req->wLength);
1246 1.5 augustss value = UGETW(req->wValue);
1247 1.5 augustss index = UGETW(req->wIndex);
1248 1.5 augustss
1249 1.5 augustss if (len != 0)
1250 1.5 augustss buf = KERNADDR(&xfer->dmabuf);
1251 1.5 augustss
1252 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1253 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1254 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1255 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1256 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1257 1.5 augustss /*
1258 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1259 1.5 augustss * for the integrated root hub.
1260 1.5 augustss */
1261 1.5 augustss break;
1262 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1263 1.5 augustss if (len > 0) {
1264 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1265 1.5 augustss totlen = 1;
1266 1.5 augustss }
1267 1.5 augustss break;
1268 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1269 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1270 1.5 augustss switch(value >> 8) {
1271 1.5 augustss case UDESC_DEVICE:
1272 1.5 augustss if ((value & 0xff) != 0) {
1273 1.5 augustss err = USBD_IOERROR;
1274 1.5 augustss goto ret;
1275 1.5 augustss }
1276 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1277 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1278 1.5 augustss memcpy(buf, &ehci_devd, l);
1279 1.5 augustss break;
1280 1.11 augustss /*
1281 1.11 augustss * We can't really operate at another speed, but the spec says
1282 1.11 augustss * we need this descriptor.
1283 1.11 augustss */
1284 1.11 augustss case UDESC_DEVICE_QUALIFIER:
1285 1.11 augustss if ((value & 0xff) != 0) {
1286 1.11 augustss err = USBD_IOERROR;
1287 1.11 augustss goto ret;
1288 1.11 augustss }
1289 1.11 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1290 1.11 augustss memcpy(buf, &ehci_odevd, l);
1291 1.11 augustss break;
1292 1.11 augustss /*
1293 1.11 augustss * We can't really operate at another speed, but the spec says
1294 1.11 augustss * we need this descriptor.
1295 1.11 augustss */
1296 1.11 augustss case UDESC_OTHER_SPEED_CONFIGURATION:
1297 1.5 augustss case UDESC_CONFIG:
1298 1.5 augustss if ((value & 0xff) != 0) {
1299 1.5 augustss err = USBD_IOERROR;
1300 1.5 augustss goto ret;
1301 1.5 augustss }
1302 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1303 1.5 augustss memcpy(buf, &ehci_confd, l);
1304 1.11 augustss ((usb_config_descriptor_t *)buf)->bDescriptorType =
1305 1.11 augustss value >> 8;
1306 1.5 augustss buf = (char *)buf + l;
1307 1.5 augustss len -= l;
1308 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1309 1.5 augustss totlen += l;
1310 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1311 1.5 augustss buf = (char *)buf + l;
1312 1.5 augustss len -= l;
1313 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1314 1.5 augustss totlen += l;
1315 1.5 augustss memcpy(buf, &ehci_endpd, l);
1316 1.5 augustss break;
1317 1.5 augustss case UDESC_STRING:
1318 1.5 augustss if (len == 0)
1319 1.5 augustss break;
1320 1.5 augustss *(u_int8_t *)buf = 0;
1321 1.5 augustss totlen = 1;
1322 1.5 augustss switch (value & 0xff) {
1323 1.5 augustss case 1: /* Vendor */
1324 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1325 1.5 augustss break;
1326 1.5 augustss case 2: /* Product */
1327 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1328 1.5 augustss break;
1329 1.5 augustss }
1330 1.5 augustss break;
1331 1.5 augustss default:
1332 1.5 augustss err = USBD_IOERROR;
1333 1.5 augustss goto ret;
1334 1.5 augustss }
1335 1.5 augustss break;
1336 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1337 1.5 augustss if (len > 0) {
1338 1.5 augustss *(u_int8_t *)buf = 0;
1339 1.5 augustss totlen = 1;
1340 1.5 augustss }
1341 1.5 augustss break;
1342 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1343 1.5 augustss if (len > 1) {
1344 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1345 1.5 augustss totlen = 2;
1346 1.5 augustss }
1347 1.5 augustss break;
1348 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1349 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1350 1.5 augustss if (len > 1) {
1351 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1352 1.5 augustss totlen = 2;
1353 1.5 augustss }
1354 1.5 augustss break;
1355 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1356 1.5 augustss if (value >= USB_MAX_DEVICES) {
1357 1.5 augustss err = USBD_IOERROR;
1358 1.5 augustss goto ret;
1359 1.5 augustss }
1360 1.5 augustss sc->sc_addr = value;
1361 1.5 augustss break;
1362 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1363 1.5 augustss if (value != 0 && value != 1) {
1364 1.5 augustss err = USBD_IOERROR;
1365 1.5 augustss goto ret;
1366 1.5 augustss }
1367 1.5 augustss sc->sc_conf = value;
1368 1.5 augustss break;
1369 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1370 1.5 augustss break;
1371 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1372 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1373 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1374 1.5 augustss err = USBD_IOERROR;
1375 1.5 augustss goto ret;
1376 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1377 1.5 augustss break;
1378 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1379 1.5 augustss break;
1380 1.5 augustss /* Hub requests */
1381 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1382 1.5 augustss break;
1383 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1384 1.5 augustss DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1385 1.5 augustss "port=%d feature=%d\n",
1386 1.5 augustss index, value));
1387 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1388 1.5 augustss err = USBD_IOERROR;
1389 1.5 augustss goto ret;
1390 1.5 augustss }
1391 1.5 augustss port = EHCI_PORTSC(index);
1392 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1393 1.5 augustss switch(value) {
1394 1.5 augustss case UHF_PORT_ENABLE:
1395 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1396 1.5 augustss break;
1397 1.5 augustss case UHF_PORT_SUSPEND:
1398 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1399 1.5 augustss break;
1400 1.5 augustss case UHF_PORT_POWER:
1401 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1402 1.5 augustss break;
1403 1.14 augustss case UHF_PORT_TEST:
1404 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1405 1.14 augustss "%d\n", index));
1406 1.14 augustss break;
1407 1.14 augustss case UHF_PORT_INDICATOR:
1408 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1409 1.14 augustss "%d\n", index));
1410 1.14 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1411 1.14 augustss break;
1412 1.5 augustss case UHF_C_PORT_CONNECTION:
1413 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1414 1.5 augustss break;
1415 1.5 augustss case UHF_C_PORT_ENABLE:
1416 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1417 1.5 augustss break;
1418 1.5 augustss case UHF_C_PORT_SUSPEND:
1419 1.5 augustss /* how? */
1420 1.5 augustss break;
1421 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1422 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1423 1.5 augustss break;
1424 1.5 augustss case UHF_C_PORT_RESET:
1425 1.6 augustss sc->sc_isreset = 0;
1426 1.5 augustss break;
1427 1.5 augustss default:
1428 1.5 augustss err = USBD_IOERROR;
1429 1.5 augustss goto ret;
1430 1.5 augustss }
1431 1.5 augustss #if 0
1432 1.5 augustss switch(value) {
1433 1.5 augustss case UHF_C_PORT_CONNECTION:
1434 1.5 augustss case UHF_C_PORT_ENABLE:
1435 1.5 augustss case UHF_C_PORT_SUSPEND:
1436 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1437 1.5 augustss case UHF_C_PORT_RESET:
1438 1.5 augustss /* Enable RHSC interrupt if condition is cleared. */
1439 1.5 augustss if ((OREAD4(sc, port) >> 16) == 0)
1440 1.6 augustss ehci_pcd_able(sc, 1);
1441 1.5 augustss break;
1442 1.5 augustss default:
1443 1.5 augustss break;
1444 1.5 augustss }
1445 1.5 augustss #endif
1446 1.5 augustss break;
1447 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1448 1.5 augustss if (value != 0) {
1449 1.5 augustss err = USBD_IOERROR;
1450 1.5 augustss goto ret;
1451 1.5 augustss }
1452 1.5 augustss hubd = ehci_hubd;
1453 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1454 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1455 1.5 augustss USETW(hubd.wHubCharacteristics,
1456 1.14 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1457 1.14 augustss EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1458 1.14 augustss ? UHD_PORT_IND : 0);
1459 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1460 1.5 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1461 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1462 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1463 1.5 augustss l = min(len, hubd.bDescLength);
1464 1.5 augustss totlen = l;
1465 1.5 augustss memcpy(buf, &hubd, l);
1466 1.5 augustss break;
1467 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1468 1.5 augustss if (len != 4) {
1469 1.5 augustss err = USBD_IOERROR;
1470 1.5 augustss goto ret;
1471 1.5 augustss }
1472 1.5 augustss memset(buf, 0, len); /* ? XXX */
1473 1.5 augustss totlen = len;
1474 1.5 augustss break;
1475 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1476 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1477 1.5 augustss index));
1478 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1479 1.5 augustss err = USBD_IOERROR;
1480 1.5 augustss goto ret;
1481 1.5 augustss }
1482 1.5 augustss if (len != 4) {
1483 1.5 augustss err = USBD_IOERROR;
1484 1.5 augustss goto ret;
1485 1.5 augustss }
1486 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1487 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1488 1.5 augustss v));
1489 1.11 augustss i = UPS_HIGH_SPEED;
1490 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1491 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1492 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1493 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1494 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1495 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1496 1.5 augustss USETW(ps.wPortStatus, i);
1497 1.5 augustss i = 0;
1498 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1499 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1500 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1501 1.6 augustss if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1502 1.5 augustss USETW(ps.wPortChange, i);
1503 1.5 augustss l = min(len, sizeof ps);
1504 1.5 augustss memcpy(buf, &ps, l);
1505 1.5 augustss totlen = l;
1506 1.5 augustss break;
1507 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1508 1.5 augustss err = USBD_IOERROR;
1509 1.5 augustss goto ret;
1510 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1511 1.5 augustss break;
1512 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1513 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1514 1.5 augustss err = USBD_IOERROR;
1515 1.5 augustss goto ret;
1516 1.5 augustss }
1517 1.5 augustss port = EHCI_PORTSC(index);
1518 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1519 1.5 augustss switch(value) {
1520 1.5 augustss case UHF_PORT_ENABLE:
1521 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
1522 1.5 augustss break;
1523 1.5 augustss case UHF_PORT_SUSPEND:
1524 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1525 1.5 augustss break;
1526 1.5 augustss case UHF_PORT_RESET:
1527 1.5 augustss DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1528 1.5 augustss index));
1529 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
1530 1.6 augustss /* Low speed device, give up ownership. */
1531 1.6 augustss ehci_disown(sc, index, 1);
1532 1.6 augustss break;
1533 1.6 augustss }
1534 1.8 augustss /* Start reset sequence. */
1535 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1536 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
1537 1.8 augustss /* Wait for reset to complete. */
1538 1.13 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1539 1.8 augustss /* Terminate reset sequence. */
1540 1.8 augustss EOWRITE4(sc, port, v);
1541 1.8 augustss /* Wait for HC to complete reset. */
1542 1.13 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1543 1.8 augustss v = EOREAD4(sc, port);
1544 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
1545 1.8 augustss if (v & EHCI_PS_PR) {
1546 1.8 augustss printf("%s: port reset timeout\n",
1547 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
1548 1.8 augustss return (USBD_TIMEOUT);
1549 1.5 augustss }
1550 1.8 augustss if (!(v & EHCI_PS_PE)) {
1551 1.6 augustss /* Not a high speed device, give up ownership.*/
1552 1.6 augustss ehci_disown(sc, index, 0);
1553 1.6 augustss break;
1554 1.6 augustss }
1555 1.6 augustss sc->sc_isreset = 1;
1556 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1557 1.6 augustss index, v));
1558 1.5 augustss break;
1559 1.5 augustss case UHF_PORT_POWER:
1560 1.5 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1561 1.5 augustss "%d\n", index));
1562 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
1563 1.5 augustss break;
1564 1.11 augustss case UHF_PORT_TEST:
1565 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1566 1.11 augustss "%d\n", index));
1567 1.11 augustss break;
1568 1.11 augustss case UHF_PORT_INDICATOR:
1569 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1570 1.11 augustss "%d\n", index));
1571 1.14 augustss EOWRITE4(sc, port, v | EHCI_PS_PIC);
1572 1.11 augustss break;
1573 1.5 augustss default:
1574 1.5 augustss err = USBD_IOERROR;
1575 1.5 augustss goto ret;
1576 1.5 augustss }
1577 1.5 augustss break;
1578 1.11 augustss case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1579 1.11 augustss case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1580 1.11 augustss case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1581 1.11 augustss case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1582 1.11 augustss break;
1583 1.5 augustss default:
1584 1.5 augustss err = USBD_IOERROR;
1585 1.5 augustss goto ret;
1586 1.5 augustss }
1587 1.5 augustss xfer->actlen = totlen;
1588 1.5 augustss err = USBD_NORMAL_COMPLETION;
1589 1.5 augustss ret:
1590 1.5 augustss xfer->status = err;
1591 1.5 augustss s = splusb();
1592 1.5 augustss usb_transfer_complete(xfer);
1593 1.5 augustss splx(s);
1594 1.5 augustss return (USBD_IN_PROGRESS);
1595 1.6 augustss }
1596 1.6 augustss
1597 1.6 augustss void
1598 1.6 augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1599 1.6 augustss {
1600 1.6 augustss int i, port;
1601 1.6 augustss u_int32_t v;
1602 1.6 augustss
1603 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1604 1.6 augustss #ifdef DIAGNOSTIC
1605 1.6 augustss if (sc->sc_npcomp != 0) {
1606 1.6 augustss i = (index-1) / sc->sc_npcomp;
1607 1.6 augustss if (i >= sc->sc_ncomp)
1608 1.6 augustss printf("%s: strange port\n",
1609 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
1610 1.6 augustss else
1611 1.6 augustss printf("%s: handing over %s speed device on "
1612 1.6 augustss "port %d to %s\n",
1613 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
1614 1.6 augustss lowspeed ? "low" : "full",
1615 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
1616 1.6 augustss } else {
1617 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1618 1.6 augustss }
1619 1.6 augustss #endif
1620 1.6 augustss port = EHCI_PORTSC(index);
1621 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1622 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
1623 1.5 augustss }
1624 1.5 augustss
1625 1.5 augustss /* Abort a root control request. */
1626 1.5 augustss Static void
1627 1.5 augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1628 1.5 augustss {
1629 1.5 augustss /* Nothing to do, all transfers are synchronous. */
1630 1.5 augustss }
1631 1.5 augustss
1632 1.5 augustss /* Close the root pipe. */
1633 1.5 augustss Static void
1634 1.5 augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
1635 1.5 augustss {
1636 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
1637 1.5 augustss /* Nothing to do. */
1638 1.5 augustss }
1639 1.5 augustss
1640 1.5 augustss void
1641 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
1642 1.5 augustss {
1643 1.5 augustss xfer->hcpriv = NULL;
1644 1.5 augustss }
1645 1.5 augustss
1646 1.5 augustss Static usbd_status
1647 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
1648 1.5 augustss {
1649 1.5 augustss usbd_status err;
1650 1.5 augustss
1651 1.5 augustss /* Insert last in queue. */
1652 1.5 augustss err = usb_insert_transfer(xfer);
1653 1.5 augustss if (err)
1654 1.5 augustss return (err);
1655 1.5 augustss
1656 1.5 augustss /* Pipe isn't running, start first */
1657 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1658 1.5 augustss }
1659 1.5 augustss
1660 1.5 augustss Static usbd_status
1661 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
1662 1.5 augustss {
1663 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
1664 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1665 1.5 augustss
1666 1.5 augustss if (sc->sc_dying)
1667 1.5 augustss return (USBD_IOERROR);
1668 1.5 augustss
1669 1.5 augustss sc->sc_intrxfer = xfer;
1670 1.5 augustss
1671 1.5 augustss return (USBD_IN_PROGRESS);
1672 1.5 augustss }
1673 1.5 augustss
1674 1.5 augustss /* Abort a root interrupt request. */
1675 1.5 augustss Static void
1676 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
1677 1.5 augustss {
1678 1.5 augustss int s;
1679 1.5 augustss
1680 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
1681 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
1682 1.5 augustss xfer->pipe->intrxfer = NULL;
1683 1.5 augustss }
1684 1.5 augustss xfer->status = USBD_CANCELLED;
1685 1.5 augustss s = splusb();
1686 1.5 augustss usb_transfer_complete(xfer);
1687 1.5 augustss splx(s);
1688 1.5 augustss }
1689 1.5 augustss
1690 1.5 augustss /* Close the root pipe. */
1691 1.5 augustss Static void
1692 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
1693 1.5 augustss {
1694 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1695 1.5 augustss
1696 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
1697 1.5 augustss
1698 1.5 augustss sc->sc_intrxfer = NULL;
1699 1.5 augustss }
1700 1.5 augustss
1701 1.5 augustss void
1702 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
1703 1.5 augustss {
1704 1.5 augustss xfer->hcpriv = NULL;
1705 1.9 augustss }
1706 1.9 augustss
1707 1.9 augustss /************************/
1708 1.9 augustss
1709 1.9 augustss ehci_soft_qh_t *
1710 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
1711 1.9 augustss {
1712 1.9 augustss ehci_soft_qh_t *sqh;
1713 1.9 augustss usbd_status err;
1714 1.9 augustss int i, offs;
1715 1.9 augustss usb_dma_t dma;
1716 1.9 augustss
1717 1.9 augustss if (sc->sc_freeqhs == NULL) {
1718 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1719 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1720 1.9 augustss EHCI_PAGE_SIZE, &dma);
1721 1.9 augustss if (err)
1722 1.11 augustss return (NULL);
1723 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1724 1.9 augustss offs = i * EHCI_SQH_SIZE;
1725 1.11 augustss sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
1726 1.9 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1727 1.9 augustss sqh->next = sc->sc_freeqhs;
1728 1.9 augustss sc->sc_freeqhs = sqh;
1729 1.9 augustss }
1730 1.9 augustss }
1731 1.9 augustss sqh = sc->sc_freeqhs;
1732 1.9 augustss sc->sc_freeqhs = sqh->next;
1733 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1734 1.11 augustss sqh->next = NULL;
1735 1.9 augustss return (sqh);
1736 1.9 augustss }
1737 1.9 augustss
1738 1.9 augustss void
1739 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1740 1.9 augustss {
1741 1.9 augustss sqh->next = sc->sc_freeqhs;
1742 1.9 augustss sc->sc_freeqhs = sqh;
1743 1.9 augustss }
1744 1.9 augustss
1745 1.9 augustss ehci_soft_qtd_t *
1746 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
1747 1.9 augustss {
1748 1.9 augustss ehci_soft_qtd_t *sqtd;
1749 1.9 augustss usbd_status err;
1750 1.9 augustss int i, offs;
1751 1.9 augustss usb_dma_t dma;
1752 1.9 augustss int s;
1753 1.9 augustss
1754 1.9 augustss if (sc->sc_freeqtds == NULL) {
1755 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1756 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1757 1.9 augustss EHCI_PAGE_SIZE, &dma);
1758 1.9 augustss if (err)
1759 1.9 augustss return (NULL);
1760 1.9 augustss s = splusb();
1761 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1762 1.9 augustss offs = i * EHCI_SQTD_SIZE;
1763 1.9 augustss sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1764 1.9 augustss sqtd->physaddr = DMAADDR(&dma) + offs;
1765 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1766 1.9 augustss sc->sc_freeqtds = sqtd;
1767 1.9 augustss }
1768 1.9 augustss splx(s);
1769 1.9 augustss }
1770 1.9 augustss
1771 1.9 augustss s = splusb();
1772 1.9 augustss sqtd = sc->sc_freeqtds;
1773 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
1774 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1775 1.9 augustss sqtd->nextqtd = NULL;
1776 1.9 augustss sqtd->xfer = NULL;
1777 1.9 augustss splx(s);
1778 1.9 augustss
1779 1.9 augustss return (sqtd);
1780 1.9 augustss }
1781 1.9 augustss
1782 1.9 augustss void
1783 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1784 1.9 augustss {
1785 1.9 augustss int s;
1786 1.9 augustss
1787 1.9 augustss s = splusb();
1788 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1789 1.9 augustss sc->sc_freeqtds = sqtd;
1790 1.9 augustss splx(s);
1791 1.9 augustss }
1792 1.9 augustss
1793 1.15 augustss usbd_status
1794 1.15 augustss ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
1795 1.15 augustss int alen, int rd, usbd_xfer_handle xfer,
1796 1.15 augustss ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
1797 1.15 augustss {
1798 1.15 augustss ehci_soft_qtd_t *next, *cur;
1799 1.15 augustss ehci_physaddr_t dataphys, dataphysend, nextphys;
1800 1.15 augustss u_int32_t qtdstatus;
1801 1.15 augustss int len, curlen;
1802 1.15 augustss int i;
1803 1.15 augustss usb_dma_t *dma = &xfer->dmabuf;
1804 1.15 augustss
1805 1.15 augustss DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen));
1806 1.15 augustss
1807 1.15 augustss len = alen;
1808 1.15 augustss dataphys = DMAADDR(dma);
1809 1.15 augustss dataphysend = EHCI_PAGE(dataphys + len - 1);
1810 1.15 augustss qtdstatus = htole32(
1811 1.15 augustss EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
1812 1.15 augustss EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
1813 1.15 augustss EHCI_QTD_SET_CERR(3)
1814 1.15 augustss /* IOC set below */
1815 1.15 augustss /* BYTES set below */
1816 1.15 augustss /* XXX Data toggle */
1817 1.15 augustss );
1818 1.15 augustss
1819 1.15 augustss cur = ehci_alloc_sqtd(sc);
1820 1.15 augustss if (cur == NULL)
1821 1.15 augustss goto nomem;
1822 1.15 augustss *sp = cur;
1823 1.15 augustss for (;;) {
1824 1.15 augustss /* The EHCI hardware can handle at most 4 page crossings. */
1825 1.15 augustss if (EHCI_PAGE(dataphys) == dataphysend ||
1826 1.15 augustss EHCI_PAGE(dataphys) + EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE
1827 1.15 augustss == dataphysend) {
1828 1.15 augustss /* we can handle it in this QTD */
1829 1.15 augustss curlen = len;
1830 1.15 augustss } else {
1831 1.15 augustss #if 0
1832 1.15 augustss /* must use multiple TDs, fill as much as possible. */
1833 1.15 augustss curlen = 2 * EHCI_PAGE_SIZE -
1834 1.15 augustss (dataphys & (EHCI_PAGE_SIZE-1));
1835 1.15 augustss /* the length must be a multiple of the max size */
1836 1.15 augustss curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
1837 1.15 augustss #ifdef DIAGNOSTIC
1838 1.15 augustss if (curlen == 0)
1839 1.15 augustss panic("ehci_alloc_std: curlen == 0\n");
1840 1.15 augustss #endif
1841 1.15 augustss #else
1842 1.15 augustss printf("ehci_alloc_std_chain: multiple QTDs\n");
1843 1.15 augustss return (USBD_NOMEM);
1844 1.15 augustss #endif
1845 1.15 augustss }
1846 1.15 augustss DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x "
1847 1.15 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
1848 1.15 augustss dataphys, dataphysend,
1849 1.15 augustss len, curlen));
1850 1.15 augustss len -= curlen;
1851 1.15 augustss
1852 1.15 augustss if (len != 0) {
1853 1.15 augustss next = ehci_alloc_sqtd(sc);
1854 1.15 augustss if (next == NULL)
1855 1.15 augustss goto nomem;
1856 1.15 augustss nextphys = next->physaddr;
1857 1.15 augustss } else {
1858 1.15 augustss next = NULL;
1859 1.15 augustss nextphys = EHCI_NULL;
1860 1.15 augustss }
1861 1.15 augustss
1862 1.15 augustss for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
1863 1.15 augustss ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
1864 1.15 augustss if (i != 0) /* use offset only in first buffer */
1865 1.15 augustss a = EHCI_PAGE(a);
1866 1.15 augustss cur->qtd.qtd_buffer[i] = htole32(a);
1867 1.15 augustss }
1868 1.15 augustss cur->nextqtd = next;
1869 1.15 augustss cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
1870 1.15 augustss cur->qtd.qtd_status =
1871 1.15 augustss qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
1872 1.15 augustss cur->xfer = xfer;
1873 1.15 augustss DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
1874 1.15 augustss dataphys, dataphys + curlen - 1));
1875 1.15 augustss if (len == 0)
1876 1.15 augustss break;
1877 1.15 augustss DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n"));
1878 1.15 augustss dataphys += curlen;
1879 1.15 augustss cur = next;
1880 1.15 augustss }
1881 1.15 augustss cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
1882 1.15 augustss *ep = cur;
1883 1.15 augustss
1884 1.15 augustss return (USBD_NORMAL_COMPLETION);
1885 1.15 augustss
1886 1.15 augustss nomem:
1887 1.15 augustss /* XXX free chain */
1888 1.15 augustss return (USBD_NOMEM);
1889 1.15 augustss }
1890 1.15 augustss
1891 1.15 augustss /****************/
1892 1.15 augustss
1893 1.9 augustss /*
1894 1.10 augustss * Close a reqular pipe.
1895 1.10 augustss * Assumes that there are no pending transactions.
1896 1.10 augustss */
1897 1.10 augustss void
1898 1.10 augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
1899 1.10 augustss {
1900 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1901 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1902 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
1903 1.10 augustss int s;
1904 1.10 augustss
1905 1.10 augustss s = splusb();
1906 1.10 augustss ehci_rem_qh(sc, sqh, head);
1907 1.10 augustss splx(s);
1908 1.10 augustss ehci_free_sqh(sc, epipe->sqh);
1909 1.10 augustss }
1910 1.10 augustss
1911 1.10 augustss /*
1912 1.10 augustss * Abort a device request.
1913 1.10 augustss * If this routine is called at splusb() it guarantees that the request
1914 1.10 augustss * will be removed from the hardware scheduling and that the callback
1915 1.10 augustss * for it will be called with USBD_CANCELLED status.
1916 1.10 augustss * It's impossible to guarantee that the requested transfer will not
1917 1.10 augustss * have happened since the hardware runs concurrently.
1918 1.10 augustss * If the transaction has already happened we rely on the ordinary
1919 1.10 augustss * interrupt processing to process it.
1920 1.10 augustss */
1921 1.10 augustss void
1922 1.10 augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1923 1.10 augustss {
1924 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
1925 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
1926 1.10 augustss #if 0
1927 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
1928 1.10 augustss ehci_soft_td_t *p, *n;
1929 1.10 augustss ehci_physaddr_t headp;
1930 1.11 augustss int hit;
1931 1.10 augustss #endif
1932 1.11 augustss int s;
1933 1.10 augustss
1934 1.10 augustss DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh));
1935 1.10 augustss
1936 1.10 augustss if (xfer->device->bus->intr_context || !curproc)
1937 1.10 augustss panic("ehci_abort_xfer: not in process context\n");
1938 1.10 augustss
1939 1.11 augustss /*
1940 1.11 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
1941 1.11 augustss */
1942 1.11 augustss s = splusb();
1943 1.11 augustss xfer->status = status; /* make software ignore it */
1944 1.15 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
1945 1.11 augustss splx(s);
1946 1.11 augustss /* XXX */
1947 1.11 augustss
1948 1.11 augustss /*
1949 1.11 augustss * Step 2: Wait until we know hardware has finished any possible
1950 1.11 augustss * use of the xfer. Also make sure the soft interrupt routine
1951 1.11 augustss * has run.
1952 1.11 augustss */
1953 1.11 augustss usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */
1954 1.11 augustss /* XXX should have some communication with softintr() to know
1955 1.11 augustss when it's done */
1956 1.11 augustss usb_delay_ms(epipe->pipe.device->bus, 250);
1957 1.11 augustss
1958 1.11 augustss /*
1959 1.11 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
1960 1.11 augustss * The complication here is that the hardware may have executed
1961 1.11 augustss * beyond the xfer we're trying to abort. So as we're scanning
1962 1.11 augustss * the TDs of this xfer we check if the hardware points to
1963 1.11 augustss * any of them.
1964 1.11 augustss */
1965 1.11 augustss s = splusb(); /* XXX why? */
1966 1.11 augustss /* XXX */
1967 1.11 augustss
1968 1.11 augustss /*
1969 1.11 augustss * Step 4: Turn on hardware again.
1970 1.11 augustss */
1971 1.11 augustss /* XXX */
1972 1.11 augustss
1973 1.11 augustss /*
1974 1.11 augustss * Step 5: Execute callback.
1975 1.11 augustss */
1976 1.11 augustss usb_transfer_complete(xfer);
1977 1.11 augustss
1978 1.11 augustss splx(s);
1979 1.10 augustss }
1980 1.10 augustss
1981 1.15 augustss void
1982 1.15 augustss ehci_timeout(void *addr)
1983 1.15 augustss {
1984 1.15 augustss struct ehci_xfer *exfer = addr;
1985 1.15 augustss
1986 1.15 augustss DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
1987 1.15 augustss
1988 1.15 augustss /* Execute the abort in a process context. */
1989 1.15 augustss usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
1990 1.15 augustss usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
1991 1.15 augustss }
1992 1.15 augustss
1993 1.15 augustss void
1994 1.15 augustss ehci_timeout_task(void *addr)
1995 1.15 augustss {
1996 1.15 augustss usbd_xfer_handle xfer = addr;
1997 1.15 augustss int s;
1998 1.15 augustss
1999 1.15 augustss DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2000 1.15 augustss
2001 1.15 augustss s = splusb();
2002 1.15 augustss ehci_abort_xfer(xfer, USBD_TIMEOUT);
2003 1.15 augustss splx(s);
2004 1.15 augustss }
2005 1.15 augustss
2006 1.5 augustss /************************/
2007 1.5 augustss
2008 1.10 augustss Static usbd_status
2009 1.10 augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2010 1.10 augustss {
2011 1.10 augustss usbd_status err;
2012 1.10 augustss
2013 1.10 augustss /* Insert last in queue. */
2014 1.10 augustss err = usb_insert_transfer(xfer);
2015 1.10 augustss if (err)
2016 1.10 augustss return (err);
2017 1.10 augustss
2018 1.10 augustss /* Pipe isn't running, start first */
2019 1.10 augustss return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2020 1.10 augustss }
2021 1.10 augustss
2022 1.12 augustss Static usbd_status
2023 1.12 augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
2024 1.12 augustss {
2025 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2026 1.15 augustss usbd_status err;
2027 1.15 augustss
2028 1.15 augustss if (sc->sc_dying)
2029 1.15 augustss return (USBD_IOERROR);
2030 1.15 augustss
2031 1.15 augustss #ifdef DIAGNOSTIC
2032 1.15 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2033 1.15 augustss /* XXX panic */
2034 1.15 augustss printf("ehci_device_ctrl_transfer: not a request\n");
2035 1.15 augustss return (USBD_INVAL);
2036 1.15 augustss }
2037 1.15 augustss #endif
2038 1.15 augustss
2039 1.15 augustss err = ehci_device_request(xfer);
2040 1.15 augustss if (err)
2041 1.15 augustss return (err);
2042 1.15 augustss
2043 1.15 augustss if (sc->sc_bus.use_polling)
2044 1.15 augustss ehci_waitintr(sc, xfer);
2045 1.15 augustss return (USBD_IN_PROGRESS);
2046 1.12 augustss }
2047 1.10 augustss
2048 1.10 augustss void
2049 1.10 augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
2050 1.10 augustss {
2051 1.10 augustss DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2052 1.10 augustss
2053 1.10 augustss #ifdef DIAGNOSTIC
2054 1.10 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2055 1.10 augustss panic("ehci_ctrl_done: not a request\n");
2056 1.10 augustss }
2057 1.10 augustss #endif
2058 1.10 augustss xfer->hcpriv = NULL;
2059 1.10 augustss }
2060 1.10 augustss
2061 1.10 augustss /* Abort a device control request. */
2062 1.10 augustss Static void
2063 1.10 augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2064 1.10 augustss {
2065 1.10 augustss DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2066 1.10 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
2067 1.10 augustss }
2068 1.10 augustss
2069 1.10 augustss /* Close a device control pipe. */
2070 1.10 augustss Static void
2071 1.10 augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
2072 1.10 augustss {
2073 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2074 1.10 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2075 1.10 augustss
2076 1.10 augustss DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2077 1.11 augustss ehci_close_pipe(pipe, sc->sc_async_head);
2078 1.10 augustss /*ehci_free_std(sc, epipe->tail.td);*/
2079 1.15 augustss }
2080 1.15 augustss
2081 1.15 augustss usbd_status
2082 1.15 augustss ehci_device_request(usbd_xfer_handle xfer)
2083 1.15 augustss {
2084 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2085 1.15 augustss usb_device_request_t *req = &xfer->request;
2086 1.15 augustss usbd_device_handle dev = epipe->pipe.device;
2087 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2088 1.15 augustss int addr = dev->address;
2089 1.15 augustss ehci_soft_qtd_t *setup, *stat, *next;
2090 1.15 augustss ehci_soft_qh_t *sqh;
2091 1.15 augustss int isread;
2092 1.15 augustss int len;
2093 1.15 augustss usbd_status err;
2094 1.15 augustss int s;
2095 1.15 augustss
2096 1.15 augustss isread = req->bmRequestType & UT_READ;
2097 1.15 augustss len = UGETW(req->wLength);
2098 1.15 augustss
2099 1.15 augustss DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2100 1.15 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2101 1.15 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2102 1.15 augustss UGETW(req->wIndex), len, addr,
2103 1.15 augustss epipe->pipe.endpoint->edesc->bEndpointAddress));
2104 1.15 augustss
2105 1.15 augustss setup = ehci_alloc_sqtd(sc);
2106 1.15 augustss if (setup == NULL) {
2107 1.15 augustss err = USBD_NOMEM;
2108 1.15 augustss goto bad1;
2109 1.15 augustss }
2110 1.15 augustss stat = ehci_alloc_sqtd(sc);
2111 1.15 augustss if (stat == NULL) {
2112 1.15 augustss err = USBD_NOMEM;
2113 1.15 augustss goto bad2;
2114 1.15 augustss }
2115 1.15 augustss
2116 1.15 augustss sqh = epipe->sqh;
2117 1.15 augustss epipe->u.ctl.length = len;
2118 1.15 augustss
2119 1.15 augustss /* XXX
2120 1.15 augustss * Since we're messing with the QH we must know the HC is in sync.
2121 1.15 augustss * This needs to go away since it slows down control transfers.
2122 1.15 augustss * Removing it entails:
2123 1.15 augustss * - fill the QH only once with addr & wMaxPacketSize
2124 1.15 augustss * - put the correct data toggles in the qtds and set DTC
2125 1.15 augustss */
2126 1.15 augustss /* ehci_sync_hc(sc); */
2127 1.15 augustss /* Update device address and length since they may have changed. */
2128 1.15 augustss /* XXX This only needs to be done once, but it's too early in open. */
2129 1.15 augustss /* XXXX Should not touch ED here! */
2130 1.15 augustss sqh->qh.qh_endp =
2131 1.15 augustss (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2132 1.15 augustss htole32(
2133 1.15 augustss EHCI_QH_SET_ADDR(addr) |
2134 1.15 augustss /* EHCI_QH_DTC | */
2135 1.15 augustss EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2136 1.15 augustss );
2137 1.15 augustss /* Clear toggle */
2138 1.15 augustss sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2139 1.15 augustss
2140 1.15 augustss /* Set up data transaction */
2141 1.15 augustss if (len != 0) {
2142 1.15 augustss ehci_soft_qtd_t *end;
2143 1.15 augustss
2144 1.15 augustss err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer,
2145 1.15 augustss &next, &end);
2146 1.15 augustss if (err)
2147 1.15 augustss goto bad3;
2148 1.15 augustss end->nextqtd = stat;
2149 1.15 augustss end->qtd.qtd_next =
2150 1.15 augustss end->qtd.qtd_altnext = htole32(stat->physaddr);
2151 1.15 augustss /* Start toggle at 1. */
2152 1.15 augustss /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2153 1.15 augustss } else {
2154 1.15 augustss next = stat;
2155 1.15 augustss }
2156 1.15 augustss
2157 1.15 augustss memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req);
2158 1.15 augustss
2159 1.15 augustss setup->qtd.qtd_status = htole32(
2160 1.15 augustss EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2161 1.15 augustss EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2162 1.15 augustss EHCI_QTD_SET_CERR(3) |
2163 1.15 augustss EHCI_QTD_SET_BYTES(sizeof *req)
2164 1.15 augustss );
2165 1.15 augustss setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma));
2166 1.15 augustss setup->nextqtd = next;
2167 1.15 augustss setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2168 1.15 augustss setup->xfer = xfer;
2169 1.15 augustss
2170 1.15 augustss stat->qtd.qtd_status = htole32(
2171 1.15 augustss EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2172 1.15 augustss EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2173 1.15 augustss EHCI_QTD_SET_CERR(3) |
2174 1.15 augustss EHCI_QTD_IOC
2175 1.15 augustss );
2176 1.15 augustss stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2177 1.15 augustss stat->nextqtd = NULL;
2178 1.15 augustss stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2179 1.15 augustss stat->xfer = xfer;
2180 1.15 augustss
2181 1.15 augustss #ifdef EHCI_DEBUG
2182 1.15 augustss if (ehcidebug > 2) {
2183 1.15 augustss DPRINTF(("ehci_device_request:\n"));
2184 1.15 augustss ehci_dump_sqh(sqh);
2185 1.15 augustss ehci_dump_sqtds(setup);
2186 1.15 augustss }
2187 1.15 augustss #endif
2188 1.15 augustss
2189 1.15 augustss /* Insert qTD in QH list. */
2190 1.15 augustss s = splusb();
2191 1.15 augustss sqh->qh.qh_curqtd = 0;
2192 1.15 augustss sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr);
2193 1.15 augustss sqh->sqtd = setup;
2194 1.15 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2195 1.15 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2196 1.15 augustss ehci_timeout, xfer);
2197 1.15 augustss }
2198 1.15 augustss splx(s);
2199 1.15 augustss
2200 1.15 augustss #if 1
2201 1.15 augustss if (ehcidebug > 10) {
2202 1.15 augustss delay(10000);
2203 1.15 augustss DPRINTF(("ehci_device_request: status=%x\n",
2204 1.15 augustss EOREAD4(sc, EHCI_USBSTS)));
2205 1.15 augustss ehci_dumpregs(sc);
2206 1.15 augustss ehci_dump_sqh(sc->sc_async_head);
2207 1.15 augustss ehci_dump_sqh(sqh);
2208 1.15 augustss ehci_dump_sqtds(setup);
2209 1.15 augustss }
2210 1.15 augustss #endif
2211 1.15 augustss
2212 1.15 augustss return (USBD_NORMAL_COMPLETION);
2213 1.15 augustss
2214 1.15 augustss bad3:
2215 1.15 augustss ehci_free_sqtd(sc, stat);
2216 1.15 augustss bad2:
2217 1.15 augustss ehci_free_sqtd(sc, setup);
2218 1.15 augustss bad1:
2219 1.15 augustss return (err);
2220 1.10 augustss }
2221 1.10 augustss
2222 1.10 augustss /************************/
2223 1.5 augustss
2224 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2225 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2226 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { }
2227 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { }
2228 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { }
2229 1.5 augustss
2230 1.10 augustss /************************/
2231 1.10 augustss
2232 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2233 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2234 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2235 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2236 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2237 1.10 augustss
2238 1.10 augustss /************************/
2239 1.5 augustss
2240 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2241 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2242 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2243 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2244 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
2245