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ehci.c revision 1.17
      1  1.11  augustss /* TODO
      2  1.11  augustss Add intrinfo.
      3  1.11  augustss */
      4  1.17  augustss /*	$NetBSD: ehci.c,v 1.17 2001/11/21 08:18:39 augustss Exp $	*/
      5   1.1  augustss 
      6   1.1  augustss /*
      7   1.5  augustss  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      8   1.1  augustss  * All rights reserved.
      9   1.1  augustss  *
     10   1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
     11   1.1  augustss  * by Lennart Augustsson (lennart (at) augustsson.net).
     12   1.1  augustss  *
     13   1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14   1.1  augustss  * modification, are permitted provided that the following conditions
     15   1.1  augustss  * are met:
     16   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18   1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19   1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20   1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21   1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     22   1.1  augustss  *    must display the following acknowledgement:
     23   1.1  augustss  *        This product includes software developed by the NetBSD
     24   1.1  augustss  *        Foundation, Inc. and its contributors.
     25   1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     26   1.1  augustss  *    contributors may be used to endorse or promote products derived
     27   1.1  augustss  *    from this software without specific prior written permission.
     28   1.1  augustss  *
     29   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     30   1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     31   1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     32   1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     33   1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     34   1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     35   1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     36   1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     37   1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     38   1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     39   1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     40   1.1  augustss  */
     41   1.1  augustss 
     42   1.1  augustss /*
     43   1.3  augustss  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
     44   1.1  augustss  *
     45   1.5  augustss  * The EHCI 0.96 spec can be found at
     46   1.3  augustss  * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
     47   1.7  augustss  * and the USB 2.0 spec at
     48   1.7  augustss  * http://www.usb.org/developers/data/usb_20.zip
     49   1.1  augustss  *
     50   1.1  augustss  */
     51   1.4     lukem 
     52   1.4     lukem #include <sys/cdefs.h>
     53  1.17  augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.17 2001/11/21 08:18:39 augustss Exp $");
     54   1.1  augustss 
     55   1.1  augustss #include <sys/param.h>
     56   1.1  augustss #include <sys/systm.h>
     57   1.1  augustss #include <sys/kernel.h>
     58   1.1  augustss #include <sys/malloc.h>
     59   1.1  augustss #include <sys/device.h>
     60   1.1  augustss #include <sys/select.h>
     61   1.1  augustss #include <sys/proc.h>
     62   1.1  augustss #include <sys/queue.h>
     63   1.1  augustss 
     64   1.1  augustss #include <machine/bus.h>
     65   1.1  augustss #include <machine/endian.h>
     66   1.1  augustss 
     67   1.1  augustss #include <dev/usb/usb.h>
     68   1.1  augustss #include <dev/usb/usbdi.h>
     69   1.1  augustss #include <dev/usb/usbdivar.h>
     70   1.1  augustss #include <dev/usb/usb_mem.h>
     71   1.1  augustss #include <dev/usb/usb_quirks.h>
     72   1.1  augustss 
     73   1.1  augustss #include <dev/usb/ehcireg.h>
     74   1.1  augustss #include <dev/usb/ehcivar.h>
     75   1.1  augustss 
     76   1.1  augustss #ifdef EHCI_DEBUG
     77   1.1  augustss #define DPRINTF(x)	if (ehcidebug) printf x
     78   1.1  augustss #define DPRINTFN(n,x)	if (ehcidebug>(n)) printf x
     79   1.6  augustss int ehcidebug = 0;
     80  1.15  augustss #ifndef __NetBSD__
     81   1.1  augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
     82  1.15  augustss #endif
     83   1.1  augustss #else
     84   1.1  augustss #define DPRINTF(x)
     85   1.1  augustss #define DPRINTFN(n,x)
     86   1.1  augustss #endif
     87   1.1  augustss 
     88   1.5  augustss struct ehci_pipe {
     89   1.5  augustss 	struct usbd_pipe pipe;
     90  1.10  augustss 	ehci_soft_qh_t *sqh;
     91  1.10  augustss 	union {
     92  1.10  augustss 		ehci_soft_qtd_t *qtd;
     93  1.10  augustss 		/* ehci_soft_itd_t *itd; */
     94  1.10  augustss 	} tail;
     95  1.10  augustss 	union {
     96  1.10  augustss 		/* Control pipe */
     97  1.10  augustss 		struct {
     98  1.10  augustss 			usb_dma_t reqdma;
     99  1.10  augustss 			u_int length;
    100  1.10  augustss 			ehci_soft_qtd_t *setup, *data, *stat;
    101  1.10  augustss 		} ctl;
    102  1.10  augustss 		/* Interrupt pipe */
    103  1.15  augustss 		/* XXX */
    104  1.10  augustss 		/* Bulk pipe */
    105  1.10  augustss 		struct {
    106  1.10  augustss 			u_int length;
    107  1.10  augustss 			int isread;
    108  1.10  augustss 		} bulk;
    109  1.10  augustss 		/* Iso pipe */
    110  1.15  augustss 		/* XXX */
    111  1.10  augustss 	} u;
    112   1.5  augustss };
    113   1.5  augustss 
    114   1.5  augustss Static void		ehci_shutdown(void *);
    115   1.5  augustss Static void		ehci_power(int, void *);
    116   1.5  augustss 
    117   1.5  augustss Static usbd_status	ehci_open(usbd_pipe_handle);
    118   1.5  augustss Static void		ehci_poll(struct usbd_bus *);
    119   1.5  augustss Static void		ehci_softintr(void *);
    120  1.11  augustss Static int		ehci_intr1(ehci_softc_t *);
    121  1.15  augustss Static void		ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
    122  1.15  augustss Static void		ehci_timeout(void *);
    123  1.15  augustss Static void		ehci_timeout_task(void *);
    124   1.5  augustss 
    125   1.5  augustss Static usbd_status	ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    126   1.5  augustss Static void		ehci_freem(struct usbd_bus *, usb_dma_t *);
    127   1.5  augustss 
    128   1.5  augustss Static usbd_xfer_handle	ehci_allocx(struct usbd_bus *);
    129   1.5  augustss Static void		ehci_freex(struct usbd_bus *, usbd_xfer_handle);
    130   1.5  augustss 
    131   1.5  augustss Static usbd_status	ehci_root_ctrl_transfer(usbd_xfer_handle);
    132   1.5  augustss Static usbd_status	ehci_root_ctrl_start(usbd_xfer_handle);
    133   1.5  augustss Static void		ehci_root_ctrl_abort(usbd_xfer_handle);
    134   1.5  augustss Static void		ehci_root_ctrl_close(usbd_pipe_handle);
    135   1.5  augustss Static void		ehci_root_ctrl_done(usbd_xfer_handle);
    136   1.5  augustss 
    137   1.5  augustss Static usbd_status	ehci_root_intr_transfer(usbd_xfer_handle);
    138   1.5  augustss Static usbd_status	ehci_root_intr_start(usbd_xfer_handle);
    139   1.5  augustss Static void		ehci_root_intr_abort(usbd_xfer_handle);
    140   1.5  augustss Static void		ehci_root_intr_close(usbd_pipe_handle);
    141   1.5  augustss Static void		ehci_root_intr_done(usbd_xfer_handle);
    142   1.5  augustss 
    143   1.5  augustss Static usbd_status	ehci_device_ctrl_transfer(usbd_xfer_handle);
    144   1.5  augustss Static usbd_status	ehci_device_ctrl_start(usbd_xfer_handle);
    145   1.5  augustss Static void		ehci_device_ctrl_abort(usbd_xfer_handle);
    146   1.5  augustss Static void		ehci_device_ctrl_close(usbd_pipe_handle);
    147   1.5  augustss Static void		ehci_device_ctrl_done(usbd_xfer_handle);
    148   1.5  augustss 
    149   1.5  augustss Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle);
    150   1.5  augustss Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle);
    151   1.5  augustss Static void		ehci_device_bulk_abort(usbd_xfer_handle);
    152   1.5  augustss Static void		ehci_device_bulk_close(usbd_pipe_handle);
    153   1.5  augustss Static void		ehci_device_bulk_done(usbd_xfer_handle);
    154   1.5  augustss 
    155   1.5  augustss Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle);
    156   1.5  augustss Static usbd_status	ehci_device_intr_start(usbd_xfer_handle);
    157   1.5  augustss Static void		ehci_device_intr_abort(usbd_xfer_handle);
    158   1.5  augustss Static void		ehci_device_intr_close(usbd_pipe_handle);
    159   1.5  augustss Static void		ehci_device_intr_done(usbd_xfer_handle);
    160   1.5  augustss 
    161   1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle);
    162   1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle);
    163   1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle);
    164   1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle);
    165   1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle);
    166   1.5  augustss 
    167   1.5  augustss Static void		ehci_device_clear_toggle(usbd_pipe_handle pipe);
    168   1.5  augustss Static void		ehci_noop(usbd_pipe_handle pipe);
    169   1.5  augustss 
    170   1.5  augustss Static int		ehci_str(usb_string_descriptor_t *, int, char *);
    171   1.6  augustss Static void		ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
    172   1.6  augustss Static void		ehci_pcd_able(ehci_softc_t *, int);
    173   1.6  augustss Static void		ehci_pcd_enable(void *);
    174   1.6  augustss Static void		ehci_disown(ehci_softc_t *, int, int);
    175   1.5  augustss 
    176   1.9  augustss Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
    177   1.9  augustss Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
    178   1.9  augustss 
    179   1.9  augustss Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
    180   1.9  augustss Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
    181  1.15  augustss Static usbd_status	ehci_alloc_std_chain(struct ehci_pipe *,
    182  1.15  augustss 			    ehci_softc_t *, int, int, usbd_xfer_handle,
    183  1.15  augustss 			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
    184  1.15  augustss 
    185  1.15  augustss Static usbd_status	ehci_device_request(usbd_xfer_handle xfer);
    186   1.9  augustss 
    187  1.10  augustss Static void		ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
    188  1.10  augustss Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
    189  1.10  augustss 				    ehci_soft_qh_t *);
    190  1.11  augustss Static void		ehci_sync_hc(ehci_softc_t *);
    191  1.10  augustss 
    192  1.10  augustss Static void		ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
    193  1.10  augustss Static void		ehci_abort_xfer(usbd_xfer_handle, usbd_status);
    194   1.9  augustss 
    195   1.5  augustss #ifdef EHCI_DEBUG
    196   1.5  augustss Static void		ehci_dumpregs(ehci_softc_t *);
    197   1.6  augustss Static void		ehci_dump(void);
    198   1.6  augustss Static ehci_softc_t 	*theehci;
    199  1.15  augustss Static void		ehci_dump_link(ehci_link_t, int);
    200  1.15  augustss Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
    201   1.9  augustss Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
    202   1.9  augustss Static void		ehci_dump_qtd(ehci_qtd_t *);
    203   1.9  augustss Static void		ehci_dump_sqh(ehci_soft_qh_t *);
    204   1.5  augustss #endif
    205   1.5  augustss 
    206  1.15  augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
    207  1.15  augustss 
    208  1.11  augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
    209  1.11  augustss 
    210   1.5  augustss #define EHCI_INTR_ENDPT 1
    211   1.5  augustss 
    212   1.5  augustss Static struct usbd_bus_methods ehci_bus_methods = {
    213   1.5  augustss 	ehci_open,
    214   1.5  augustss 	ehci_softintr,
    215   1.5  augustss 	ehci_poll,
    216   1.5  augustss 	ehci_allocm,
    217   1.5  augustss 	ehci_freem,
    218   1.5  augustss 	ehci_allocx,
    219   1.5  augustss 	ehci_freex,
    220   1.5  augustss };
    221   1.5  augustss 
    222   1.5  augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
    223   1.5  augustss 	ehci_root_ctrl_transfer,
    224   1.5  augustss 	ehci_root_ctrl_start,
    225   1.5  augustss 	ehci_root_ctrl_abort,
    226   1.5  augustss 	ehci_root_ctrl_close,
    227   1.5  augustss 	ehci_noop,
    228   1.5  augustss 	ehci_root_ctrl_done,
    229   1.5  augustss };
    230   1.5  augustss 
    231   1.5  augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
    232   1.5  augustss 	ehci_root_intr_transfer,
    233   1.5  augustss 	ehci_root_intr_start,
    234   1.5  augustss 	ehci_root_intr_abort,
    235   1.5  augustss 	ehci_root_intr_close,
    236   1.5  augustss 	ehci_noop,
    237   1.5  augustss 	ehci_root_intr_done,
    238   1.5  augustss };
    239   1.5  augustss 
    240   1.5  augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
    241   1.5  augustss 	ehci_device_ctrl_transfer,
    242   1.5  augustss 	ehci_device_ctrl_start,
    243   1.5  augustss 	ehci_device_ctrl_abort,
    244   1.5  augustss 	ehci_device_ctrl_close,
    245   1.5  augustss 	ehci_noop,
    246   1.5  augustss 	ehci_device_ctrl_done,
    247   1.5  augustss };
    248   1.5  augustss 
    249   1.5  augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
    250   1.5  augustss 	ehci_device_intr_transfer,
    251   1.5  augustss 	ehci_device_intr_start,
    252   1.5  augustss 	ehci_device_intr_abort,
    253   1.5  augustss 	ehci_device_intr_close,
    254   1.5  augustss 	ehci_device_clear_toggle,
    255   1.5  augustss 	ehci_device_intr_done,
    256   1.5  augustss };
    257   1.5  augustss 
    258   1.5  augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
    259   1.5  augustss 	ehci_device_bulk_transfer,
    260   1.5  augustss 	ehci_device_bulk_start,
    261   1.5  augustss 	ehci_device_bulk_abort,
    262   1.5  augustss 	ehci_device_bulk_close,
    263   1.5  augustss 	ehci_device_clear_toggle,
    264   1.5  augustss 	ehci_device_bulk_done,
    265   1.5  augustss };
    266   1.5  augustss 
    267   1.5  augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
    268   1.5  augustss 	ehci_device_isoc_transfer,
    269   1.5  augustss 	ehci_device_isoc_start,
    270   1.5  augustss 	ehci_device_isoc_abort,
    271   1.5  augustss 	ehci_device_isoc_close,
    272   1.5  augustss 	ehci_noop,
    273   1.5  augustss 	ehci_device_isoc_done,
    274   1.5  augustss };
    275   1.5  augustss 
    276   1.1  augustss usbd_status
    277   1.1  augustss ehci_init(ehci_softc_t *sc)
    278   1.1  augustss {
    279   1.3  augustss 	u_int32_t version, sparams, cparams, hcr;
    280   1.3  augustss 	u_int i;
    281   1.3  augustss 	usbd_status err;
    282  1.11  augustss 	ehci_soft_qh_t *sqh;
    283   1.3  augustss 
    284   1.3  augustss 	DPRINTF(("ehci_init: start\n"));
    285   1.6  augustss #ifdef EHCI_DEBUG
    286   1.6  augustss 	theehci = sc;
    287   1.6  augustss #endif
    288   1.3  augustss 
    289   1.3  augustss 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
    290   1.3  augustss 
    291   1.3  augustss 	version = EREAD2(sc, EHCI_HCIVERSION);
    292   1.3  augustss 	printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
    293   1.3  augustss 	       version >> 8, version & 0xff);
    294   1.3  augustss 
    295   1.3  augustss 	sparams = EREAD4(sc, EHCI_HCSPARAMS);
    296   1.3  augustss 	DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
    297   1.6  augustss 	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
    298   1.3  augustss 	if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
    299   1.3  augustss 		printf("%s: wrong number of companions (%d != %d)\n",
    300   1.3  augustss 		       USBDEVNAME(sc->sc_bus.bdev),
    301   1.3  augustss 		       EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
    302   1.3  augustss 		return (USBD_IOERROR);
    303   1.3  augustss 	}
    304   1.3  augustss 	if (sc->sc_ncomp > 0) {
    305   1.3  augustss 		printf("%s: companion controller%s, %d port%s each:",
    306   1.3  augustss 		    USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
    307   1.3  augustss 		    EHCI_HCS_N_PCC(sparams),
    308   1.3  augustss 		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
    309   1.3  augustss 		for (i = 0; i < sc->sc_ncomp; i++)
    310   1.3  augustss 			printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
    311   1.3  augustss 		printf("\n");
    312   1.3  augustss 	}
    313   1.5  augustss 	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
    314   1.3  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    315   1.3  augustss 	DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
    316   1.3  augustss 
    317   1.3  augustss 	sc->sc_bus.usbrev = USBREV_2_0;
    318   1.3  augustss 
    319   1.3  augustss 	/* Reset the controller */
    320   1.3  augustss 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    321   1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
    322   1.3  augustss 	usb_delay_ms(&sc->sc_bus, 1);
    323   1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
    324   1.3  augustss 	for (i = 0; i < 100; i++) {
    325   1.3  augustss 		delay(10);
    326   1.3  augustss 		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
    327   1.3  augustss 		if (!hcr)
    328   1.3  augustss 			break;
    329   1.3  augustss 	}
    330   1.3  augustss 	if (hcr) {
    331   1.3  augustss 		printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    332   1.3  augustss 		return (USBD_IOERROR);
    333   1.3  augustss 	}
    334   1.3  augustss 
    335   1.3  augustss 	/* frame list size at default, read back what we got and use that */
    336   1.3  augustss 	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
    337   1.3  augustss 	case 0: sc->sc_flsize = 1024*4; break;
    338   1.3  augustss 	case 1: sc->sc_flsize = 512*4; break;
    339   1.3  augustss 	case 2: sc->sc_flsize = 256*4; break;
    340   1.3  augustss 	case 3: return (USBD_IOERROR);
    341   1.3  augustss 	}
    342   1.3  augustss 	err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
    343   1.3  augustss 			   EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
    344   1.3  augustss 	if (err)
    345   1.3  augustss 		return (err);
    346   1.3  augustss 	DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
    347   1.3  augustss 
    348   1.5  augustss 	/* Set up the bus struct. */
    349   1.5  augustss 	sc->sc_bus.methods = &ehci_bus_methods;
    350   1.5  augustss 	sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
    351   1.5  augustss 
    352   1.5  augustss 	sc->sc_powerhook = powerhook_establish(ehci_power, sc);
    353   1.5  augustss 	sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
    354   1.5  augustss 
    355   1.6  augustss 	sc->sc_eintrs = EHCI_NORMAL_INTRS;
    356   1.6  augustss 
    357  1.11  augustss 	/* Allocate dummy QH that starts the async list. */
    358  1.11  augustss 	sqh = ehci_alloc_sqh(sc);
    359  1.11  augustss 	if (sqh == NULL) {
    360   1.9  augustss 		err = USBD_NOMEM;
    361   1.9  augustss 		goto bad1;
    362   1.9  augustss 	}
    363  1.11  augustss 	/* Fill the QH */
    364  1.11  augustss 	sqh->qh.qh_endp =
    365  1.11  augustss 	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
    366  1.11  augustss 	sqh->qh.qh_link =
    367  1.11  augustss 	    htole32(sqh->physaddr | EHCI_LINK_QH);
    368  1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
    369  1.11  augustss 	sqh->next = NULL;
    370  1.11  augustss 	/* Fill the overlay qTD */
    371  1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    372  1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    373  1.11  augustss 	sqh->qh.qh_qtd.qtd_status =
    374   1.9  augustss 	    htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
    375  1.11  augustss 	sqh->sqtd = NULL;
    376   1.9  augustss #ifdef EHCI_DEBUG
    377   1.9  augustss 	if (ehcidebug) {
    378  1.11  augustss 		ehci_dump_sqh(sc->sc_async_head);
    379   1.9  augustss 	}
    380   1.9  augustss #endif
    381   1.9  augustss 
    382   1.9  augustss 	/* Point to async list */
    383  1.11  augustss 	sc->sc_async_head = sqh;
    384  1.11  augustss 	EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
    385   1.9  augustss 
    386   1.9  augustss 	usb_callout_init(sc->sc_tmo_pcd);
    387   1.9  augustss 
    388  1.10  augustss 	lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
    389  1.10  augustss 
    390   1.6  augustss 	/* Enable interrupts */
    391   1.6  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    392   1.6  augustss 
    393   1.6  augustss 	/* Turn on controller */
    394   1.6  augustss 	EOWRITE4(sc, EHCI_USBCMD,
    395   1.6  augustss 		 EHCI_CMD_ITC_8 | /* 8 microframes */
    396   1.6  augustss 		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
    397  1.10  augustss 		 EHCI_CMD_ASE |
    398   1.6  augustss 		 /* EHCI_CMD_PSE | */
    399   1.6  augustss 		 EHCI_CMD_RS);
    400   1.6  augustss 
    401   1.6  augustss 	/* Take over port ownership */
    402   1.6  augustss 	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
    403   1.6  augustss 
    404   1.8  augustss 	for (i = 0; i < 100; i++) {
    405   1.8  augustss 		delay(10);
    406   1.8  augustss 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
    407   1.8  augustss 		if (!hcr)
    408   1.8  augustss 			break;
    409   1.8  augustss 	}
    410   1.8  augustss 	if (hcr) {
    411   1.8  augustss 		printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    412   1.8  augustss 		return (USBD_IOERROR);
    413   1.8  augustss 	}
    414   1.8  augustss 
    415   1.5  augustss 	return (USBD_NORMAL_COMPLETION);
    416   1.9  augustss 
    417   1.9  augustss #if 0
    418  1.11  augustss  bad2:
    419  1.15  augustss 	ehci_free_sqh(sc, sc->sc_async_head);
    420   1.9  augustss #endif
    421   1.9  augustss  bad1:
    422   1.9  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_fldma);
    423   1.9  augustss 	return (err);
    424   1.1  augustss }
    425   1.1  augustss 
    426   1.1  augustss int
    427   1.1  augustss ehci_intr(void *v)
    428   1.1  augustss {
    429   1.6  augustss 	ehci_softc_t *sc = v;
    430   1.6  augustss 
    431  1.17  augustss 	if (sc == NULL || sc->sc_dying)
    432  1.15  augustss 		return (0);
    433  1.15  augustss 
    434   1.6  augustss 	/* If we get an interrupt while polling, then just ignore it. */
    435   1.6  augustss 	if (sc->sc_bus.use_polling) {
    436   1.6  augustss #ifdef DIAGNOSTIC
    437   1.6  augustss 		printf("ehci_intr: ignored interrupt while polling\n");
    438   1.6  augustss #endif
    439   1.6  augustss 		return (0);
    440   1.6  augustss 	}
    441   1.6  augustss 
    442   1.6  augustss 	return (ehci_intr1(sc));
    443   1.6  augustss }
    444   1.6  augustss 
    445   1.6  augustss Static int
    446   1.6  augustss ehci_intr1(ehci_softc_t *sc)
    447   1.6  augustss {
    448   1.6  augustss 	u_int32_t intrs, eintrs;
    449   1.6  augustss 
    450   1.6  augustss 	DPRINTFN(20,("ehci_intr1: enter\n"));
    451   1.6  augustss 
    452   1.6  augustss 	/* In case the interrupt occurs before initialization has completed. */
    453   1.6  augustss 	if (sc == NULL) {
    454   1.6  augustss #ifdef DIAGNOSTIC
    455   1.6  augustss 		printf("ehci_intr: sc == NULL\n");
    456   1.6  augustss #endif
    457   1.6  augustss 		return (0);
    458   1.6  augustss 	}
    459   1.6  augustss 
    460   1.6  augustss 	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    461   1.6  augustss 
    462   1.6  augustss 	if (!intrs)
    463   1.6  augustss 		return (0);
    464   1.6  augustss 
    465   1.6  augustss 	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    466   1.6  augustss 	eintrs = intrs & sc->sc_eintrs;
    467   1.6  augustss 	DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
    468   1.6  augustss 		     sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
    469   1.6  augustss 		     (u_int)eintrs));
    470   1.6  augustss 	if (!eintrs)
    471   1.6  augustss 		return (0);
    472   1.6  augustss 
    473   1.6  augustss 	sc->sc_bus.intr_context++;
    474   1.6  augustss 	sc->sc_bus.no_intrs++;
    475  1.10  augustss 	if (eintrs & EHCI_STS_IAA) {
    476  1.10  augustss 		DPRINTF(("ehci_intr1: door bell\n"));
    477  1.11  augustss 		wakeup(&sc->sc_async_head);
    478  1.10  augustss 		eintrs &= ~EHCI_STS_INT;
    479  1.10  augustss 	}
    480   1.6  augustss 	if (eintrs & EHCI_STS_INT) {
    481   1.6  augustss 		DPRINTF(("ehci_intr1: something is done\n"));
    482   1.6  augustss 		eintrs &= ~EHCI_STS_INT;
    483   1.6  augustss 	}
    484   1.6  augustss 	if (eintrs & EHCI_STS_ERRINT) {
    485   1.6  augustss 		DPRINTF(("ehci_intr1: some error\n"));
    486   1.6  augustss 		eintrs &= ~EHCI_STS_HSE;
    487   1.6  augustss 	}
    488   1.6  augustss 	if (eintrs & EHCI_STS_HSE) {
    489   1.6  augustss 		printf("%s: unrecoverable error, controller halted\n",
    490   1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
    491   1.6  augustss 		/* XXX what else */
    492   1.6  augustss 	}
    493   1.6  augustss 	if (eintrs & EHCI_STS_PCD) {
    494   1.6  augustss 		ehci_pcd(sc, sc->sc_intrxfer);
    495   1.6  augustss 		/*
    496   1.6  augustss 		 * Disable PCD interrupt for now, because it will be
    497   1.6  augustss 		 * on until the port has been reset.
    498   1.6  augustss 		 */
    499   1.6  augustss 		ehci_pcd_able(sc, 0);
    500   1.6  augustss 		/* Do not allow RHSC interrupts > 1 per second */
    501   1.6  augustss                 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
    502   1.6  augustss 		eintrs &= ~EHCI_STS_PCD;
    503   1.6  augustss 	}
    504   1.6  augustss 
    505   1.6  augustss 	sc->sc_bus.intr_context--;
    506   1.6  augustss 
    507   1.6  augustss 	if (eintrs != 0) {
    508   1.6  augustss 		/* Block unprocessed interrupts. */
    509   1.6  augustss 		sc->sc_eintrs &= ~eintrs;
    510   1.6  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    511   1.6  augustss 		printf("%s: blocking intrs 0x%x\n",
    512   1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev), eintrs);
    513   1.6  augustss 	}
    514   1.6  augustss 
    515   1.6  augustss 	return (1);
    516   1.6  augustss }
    517   1.6  augustss 
    518   1.6  augustss void
    519   1.6  augustss ehci_pcd_able(ehci_softc_t *sc, int on)
    520   1.6  augustss {
    521   1.6  augustss 	DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
    522   1.6  augustss 	if (on)
    523   1.6  augustss 		sc->sc_eintrs |= EHCI_STS_PCD;
    524   1.6  augustss 	else
    525   1.6  augustss 		sc->sc_eintrs &= ~EHCI_STS_PCD;
    526   1.6  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    527   1.6  augustss }
    528   1.6  augustss 
    529   1.6  augustss void
    530   1.6  augustss ehci_pcd_enable(void *v_sc)
    531   1.6  augustss {
    532   1.6  augustss 	ehci_softc_t *sc = v_sc;
    533   1.6  augustss 
    534   1.6  augustss 	ehci_pcd_able(sc, 1);
    535   1.6  augustss }
    536   1.6  augustss 
    537   1.6  augustss void
    538   1.6  augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
    539   1.6  augustss {
    540   1.6  augustss 	usbd_pipe_handle pipe;
    541  1.15  augustss 	struct ehci_pipe *epipe;
    542   1.6  augustss 	u_char *p;
    543   1.6  augustss 	int i, m;
    544   1.6  augustss 
    545   1.6  augustss 	if (xfer == NULL) {
    546   1.6  augustss 		/* Just ignore the change. */
    547   1.6  augustss 		return;
    548   1.6  augustss 	}
    549   1.6  augustss 
    550   1.6  augustss 	pipe = xfer->pipe;
    551  1.15  augustss 	epipe = (struct ehci_pipe *)pipe;
    552   1.6  augustss 
    553   1.6  augustss 	p = KERNADDR(&xfer->dmabuf);
    554   1.6  augustss 	m = min(sc->sc_noport, xfer->length * 8 - 1);
    555   1.6  augustss 	memset(p, 0, xfer->length);
    556   1.6  augustss 	for (i = 1; i <= m; i++) {
    557   1.6  augustss 		/* Pick out CHANGE bits from the status reg. */
    558   1.6  augustss 		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
    559   1.6  augustss 			p[i/8] |= 1 << (i%8);
    560   1.6  augustss 	}
    561   1.6  augustss 	DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
    562   1.6  augustss 	xfer->actlen = xfer->length;
    563   1.6  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    564   1.6  augustss 
    565   1.6  augustss 	usb_transfer_complete(xfer);
    566   1.1  augustss }
    567   1.1  augustss 
    568   1.5  augustss void
    569   1.5  augustss ehci_softintr(void *v)
    570   1.5  augustss {
    571   1.5  augustss 	//ehci_softc_t *sc = v;
    572   1.5  augustss }
    573   1.5  augustss 
    574  1.15  augustss /*
    575  1.15  augustss  * Wait here until controller claims to have an interrupt.
    576  1.15  augustss  * Then call ohci_intr and return.  Use timeout to avoid waiting
    577  1.15  augustss  * too long.
    578  1.15  augustss  */
    579  1.15  augustss void
    580  1.15  augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
    581  1.15  augustss {
    582  1.15  augustss 	int timo = xfer->timeout;
    583  1.15  augustss 	int usecs;
    584  1.15  augustss 	u_int32_t intrs;
    585  1.15  augustss 
    586  1.15  augustss 	xfer->status = USBD_IN_PROGRESS;
    587  1.15  augustss 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
    588  1.15  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    589  1.17  augustss 		if (sc->sc_dying)
    590  1.17  augustss 			break;
    591  1.15  augustss 		intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
    592  1.15  augustss 			sc->sc_eintrs;
    593  1.15  augustss 		DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
    594  1.15  augustss #ifdef OHCI_DEBUG
    595  1.15  augustss 		if (ehcidebug > 15)
    596  1.15  augustss 			ehci_dumpregs(sc);
    597  1.15  augustss #endif
    598  1.15  augustss 		if (intrs) {
    599  1.15  augustss 			ehci_intr1(sc);
    600  1.15  augustss 			if (xfer->status != USBD_IN_PROGRESS)
    601  1.15  augustss 				return;
    602  1.15  augustss 		}
    603  1.15  augustss 	}
    604  1.15  augustss 
    605  1.15  augustss 	/* Timeout */
    606  1.15  augustss 	DPRINTF(("ehci_waitintr: timeout\n"));
    607  1.15  augustss 	xfer->status = USBD_TIMEOUT;
    608  1.15  augustss 	usb_transfer_complete(xfer);
    609  1.15  augustss 	/* XXX should free TD */
    610  1.15  augustss }
    611  1.15  augustss 
    612   1.5  augustss void
    613   1.5  augustss ehci_poll(struct usbd_bus *bus)
    614   1.5  augustss {
    615   1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)bus;
    616   1.5  augustss #ifdef EHCI_DEBUG
    617   1.5  augustss 	static int last;
    618   1.5  augustss 	int new;
    619   1.6  augustss 	new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    620   1.5  augustss 	if (new != last) {
    621   1.5  augustss 		DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
    622   1.5  augustss 		last = new;
    623   1.5  augustss 	}
    624   1.5  augustss #endif
    625   1.5  augustss 
    626   1.6  augustss 	if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
    627   1.5  augustss 		ehci_intr1(sc);
    628   1.5  augustss }
    629   1.5  augustss 
    630   1.1  augustss int
    631   1.1  augustss ehci_detach(struct ehci_softc *sc, int flags)
    632   1.1  augustss {
    633   1.1  augustss 	int rv = 0;
    634   1.1  augustss 
    635   1.1  augustss 	if (sc->sc_child != NULL)
    636   1.1  augustss 		rv = config_detach(sc->sc_child, flags);
    637   1.1  augustss 
    638   1.1  augustss 	if (rv != 0)
    639   1.1  augustss 		return (rv);
    640   1.1  augustss 
    641   1.6  augustss 	usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
    642   1.6  augustss 
    643   1.1  augustss 	if (sc->sc_powerhook != NULL)
    644   1.1  augustss 		powerhook_disestablish(sc->sc_powerhook);
    645   1.1  augustss 	if (sc->sc_shutdownhook != NULL)
    646   1.1  augustss 		shutdownhook_disestablish(sc->sc_shutdownhook);
    647   1.1  augustss 
    648  1.17  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    649  1.15  augustss 
    650   1.1  augustss 	/* XXX free other data structures XXX */
    651   1.1  augustss 
    652   1.1  augustss 	return (rv);
    653   1.1  augustss }
    654   1.1  augustss 
    655   1.1  augustss 
    656   1.1  augustss int
    657   1.1  augustss ehci_activate(device_ptr_t self, enum devact act)
    658   1.1  augustss {
    659   1.1  augustss 	struct ehci_softc *sc = (struct ehci_softc *)self;
    660   1.1  augustss 	int rv = 0;
    661   1.1  augustss 
    662   1.1  augustss 	switch (act) {
    663   1.1  augustss 	case DVACT_ACTIVATE:
    664   1.1  augustss 		return (EOPNOTSUPP);
    665   1.1  augustss 		break;
    666   1.1  augustss 
    667   1.1  augustss 	case DVACT_DEACTIVATE:
    668   1.1  augustss 		if (sc->sc_child != NULL)
    669   1.1  augustss 			rv = config_deactivate(sc->sc_child);
    670   1.5  augustss 		sc->sc_dying = 1;
    671   1.1  augustss 		break;
    672   1.1  augustss 	}
    673   1.1  augustss 	return (rv);
    674   1.1  augustss }
    675   1.1  augustss 
    676   1.5  augustss /*
    677   1.5  augustss  * Handle suspend/resume.
    678   1.5  augustss  *
    679   1.5  augustss  * We need to switch to polling mode here, because this routine is
    680   1.5  augustss  * called from an intterupt context.  This is all right since we
    681   1.5  augustss  * are almost suspended anyway.
    682   1.5  augustss  */
    683   1.5  augustss void
    684   1.5  augustss ehci_power(int why, void *v)
    685   1.5  augustss {
    686   1.5  augustss 	ehci_softc_t *sc = v;
    687   1.5  augustss 	//u_int32_t ctl;
    688   1.5  augustss 	int s;
    689   1.5  augustss 
    690   1.5  augustss #ifdef EHCI_DEBUG
    691   1.5  augustss 	DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
    692   1.5  augustss 	ehci_dumpregs(sc);
    693   1.5  augustss #endif
    694   1.5  augustss 
    695   1.5  augustss 	s = splhardusb();
    696   1.5  augustss 	switch (why) {
    697   1.5  augustss 	case PWR_SUSPEND:
    698   1.5  augustss 	case PWR_STANDBY:
    699   1.5  augustss 		sc->sc_bus.use_polling++;
    700   1.5  augustss #if 0
    701   1.5  augustss OOO
    702   1.5  augustss 		ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
    703   1.5  augustss 		if (sc->sc_control == 0) {
    704   1.5  augustss 			/*
    705   1.5  augustss 			 * Preserve register values, in case that APM BIOS
    706   1.5  augustss 			 * does not recover them.
    707   1.5  augustss 			 */
    708   1.5  augustss 			sc->sc_control = ctl;
    709   1.5  augustss 			sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
    710   1.5  augustss 		}
    711   1.5  augustss 		ctl |= EHCI_HCFS_SUSPEND;
    712   1.5  augustss 		OWRITE4(sc, EHCI_CONTROL, ctl);
    713   1.5  augustss #endif
    714   1.5  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    715   1.5  augustss 		sc->sc_bus.use_polling--;
    716   1.5  augustss 		break;
    717   1.5  augustss 	case PWR_RESUME:
    718   1.5  augustss 		sc->sc_bus.use_polling++;
    719   1.5  augustss #if 0
    720   1.5  augustss OOO
    721   1.5  augustss 		/* Some broken BIOSes do not recover these values */
    722   1.5  augustss 		OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
    723   1.5  augustss 		OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    724   1.5  augustss 		OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    725   1.5  augustss 		if (sc->sc_intre)
    726   1.5  augustss 			OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
    727   1.5  augustss 				sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
    728   1.5  augustss 		if (sc->sc_control)
    729   1.5  augustss 			ctl = sc->sc_control;
    730   1.5  augustss 		else
    731   1.5  augustss 			ctl = OREAD4(sc, EHCI_CONTROL);
    732   1.5  augustss 		ctl |= EHCI_HCFS_RESUME;
    733   1.5  augustss 		OWRITE4(sc, EHCI_CONTROL, ctl);
    734   1.5  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    735   1.5  augustss 		ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
    736   1.5  augustss 		OWRITE4(sc, EHCI_CONTROL, ctl);
    737   1.5  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    738   1.5  augustss 		sc->sc_control = sc->sc_intre = 0;
    739   1.5  augustss #endif
    740   1.5  augustss 		sc->sc_bus.use_polling--;
    741   1.5  augustss 		break;
    742   1.5  augustss 	case PWR_SOFTSUSPEND:
    743   1.5  augustss 	case PWR_SOFTSTANDBY:
    744   1.5  augustss 	case PWR_SOFTRESUME:
    745   1.5  augustss 		break;
    746   1.5  augustss 	}
    747   1.5  augustss 	splx(s);
    748   1.5  augustss }
    749   1.5  augustss 
    750   1.5  augustss /*
    751   1.5  augustss  * Shut down the controller when the system is going down.
    752   1.5  augustss  */
    753   1.5  augustss void
    754   1.5  augustss ehci_shutdown(void *v)
    755   1.5  augustss {
    756   1.8  augustss 	ehci_softc_t *sc = v;
    757   1.5  augustss 
    758   1.5  augustss 	DPRINTF(("ehci_shutdown: stopping the HC\n"));
    759   1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
    760   1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
    761   1.5  augustss }
    762   1.5  augustss 
    763   1.5  augustss usbd_status
    764   1.5  augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    765   1.5  augustss {
    766   1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
    767   1.5  augustss 
    768   1.5  augustss 	return (usb_allocmem(&sc->sc_bus, size, 0, dma));
    769   1.5  augustss }
    770   1.5  augustss 
    771   1.5  augustss void
    772   1.5  augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    773   1.5  augustss {
    774   1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
    775   1.5  augustss 
    776   1.5  augustss 	usb_freemem(&sc->sc_bus, dma);
    777   1.5  augustss }
    778   1.5  augustss 
    779   1.5  augustss usbd_xfer_handle
    780   1.5  augustss ehci_allocx(struct usbd_bus *bus)
    781   1.5  augustss {
    782   1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
    783   1.5  augustss 	usbd_xfer_handle xfer;
    784   1.5  augustss 
    785   1.5  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    786   1.5  augustss 	if (xfer != NULL)
    787   1.5  augustss 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
    788   1.5  augustss 	else
    789  1.15  augustss 		xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
    790   1.5  augustss 	if (xfer != NULL)
    791  1.15  augustss 		memset(xfer, 0, sizeof (struct ehci_xfer));
    792   1.5  augustss 	return (xfer);
    793   1.5  augustss }
    794   1.5  augustss 
    795   1.5  augustss void
    796   1.5  augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    797   1.5  augustss {
    798   1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
    799   1.5  augustss 
    800   1.5  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    801   1.5  augustss }
    802   1.5  augustss 
    803   1.5  augustss Static void
    804   1.5  augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
    805   1.5  augustss {
    806  1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
    807  1.15  augustss 
    808  1.15  augustss 	printf("ehci_device_clear_toggle: epipe=%p\n", epipe);
    809   1.5  augustss #if 0
    810   1.5  augustss OOO
    811   1.5  augustss 	epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
    812   1.5  augustss #endif
    813   1.5  augustss }
    814   1.5  augustss 
    815   1.5  augustss Static void
    816   1.5  augustss ehci_noop(usbd_pipe_handle pipe)
    817   1.5  augustss {
    818   1.5  augustss }
    819   1.5  augustss 
    820   1.5  augustss #ifdef EHCI_DEBUG
    821   1.5  augustss void
    822   1.5  augustss ehci_dumpregs(ehci_softc_t *sc)
    823   1.5  augustss {
    824   1.6  augustss 	int i;
    825   1.6  augustss 	printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
    826   1.6  augustss 	       EOREAD4(sc, EHCI_USBCMD),
    827   1.6  augustss 	       EOREAD4(sc, EHCI_USBSTS),
    828   1.6  augustss 	       EOREAD4(sc, EHCI_USBINTR));
    829  1.15  augustss 	printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
    830  1.15  augustss 	       EOREAD4(sc, EHCI_FRINDEX),
    831  1.15  augustss 	       EOREAD4(sc, EHCI_CTRLDSSEGMENT),
    832  1.15  augustss 	       EOREAD4(sc, EHCI_PERIODICLISTBASE),
    833  1.15  augustss 	       EOREAD4(sc, EHCI_ASYNCLISTADDR));
    834   1.6  augustss 	for (i = 1; i <= sc->sc_noport; i++)
    835   1.6  augustss 		printf("port %d status=0x%08x\n", i,
    836   1.6  augustss 		       EOREAD4(sc, EHCI_PORTSC(i)));
    837   1.6  augustss }
    838   1.6  augustss 
    839   1.6  augustss void
    840   1.6  augustss ehci_dump()
    841   1.6  augustss {
    842   1.6  augustss 	ehci_dumpregs(theehci);
    843   1.5  augustss }
    844   1.9  augustss 
    845   1.9  augustss void
    846  1.15  augustss ehci_dump_link(ehci_link_t link, int type)
    847   1.9  augustss {
    848  1.15  augustss 	link = le32toh(link);
    849  1.15  augustss 	printf("0x%08x", link);
    850   1.9  augustss 	if (link & EHCI_LINK_TERMINATE)
    851  1.15  augustss 		printf("<T>");
    852  1.15  augustss 	else {
    853  1.15  augustss 		printf("<");
    854  1.15  augustss 		if (type) {
    855  1.15  augustss 			switch (EHCI_LINK_TYPE(link)) {
    856  1.15  augustss 			case EHCI_LINK_ITD: printf("ITD"); break;
    857  1.15  augustss 			case EHCI_LINK_QH: printf("QH"); break;
    858  1.15  augustss 			case EHCI_LINK_SITD: printf("SITD"); break;
    859  1.15  augustss 			case EHCI_LINK_FSTN: printf("FSTN"); break;
    860  1.16  augustss 			}
    861  1.15  augustss 		}
    862   1.9  augustss 		printf(">");
    863  1.15  augustss 	}
    864  1.15  augustss }
    865  1.15  augustss 
    866  1.15  augustss void
    867  1.15  augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
    868  1.15  augustss {
    869  1.15  augustss 	for (; sqtd; sqtd = sqtd->nextqtd)
    870  1.15  augustss 		ehci_dump_sqtd(sqtd);
    871   1.9  augustss }
    872   1.9  augustss 
    873   1.9  augustss void
    874   1.9  augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
    875   1.9  augustss {
    876   1.9  augustss 	printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
    877   1.9  augustss 	ehci_dump_qtd(&sqtd->qtd);
    878   1.9  augustss }
    879   1.9  augustss 
    880   1.9  augustss void
    881   1.9  augustss ehci_dump_qtd(ehci_qtd_t *qtd)
    882   1.9  augustss {
    883   1.9  augustss 	u_int32_t s;
    884  1.15  augustss 	char sbuf[128];
    885   1.9  augustss 
    886  1.15  augustss 	printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
    887  1.15  augustss 	printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
    888   1.9  augustss 	printf("\n");
    889  1.15  augustss 	s = le32toh(qtd->qtd_status);
    890  1.15  augustss 	bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
    891  1.15  augustss 			 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
    892  1.15  augustss 			 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
    893   1.9  augustss 	printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
    894   1.9  augustss 	       s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
    895   1.9  augustss 	       EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
    896  1.15  augustss 	printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
    897  1.15  augustss 	       EHCI_QTD_GET_PID(s), sbuf);
    898   1.9  augustss 	for (s = 0; s < 5; s++)
    899  1.15  augustss 		printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
    900   1.9  augustss }
    901   1.9  augustss 
    902   1.9  augustss void
    903   1.9  augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
    904   1.9  augustss {
    905   1.9  augustss 	ehci_qh_t *qh = &sqh->qh;
    906  1.15  augustss 	u_int32_t endp, endphub;
    907   1.9  augustss 
    908   1.9  augustss 	printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
    909  1.15  augustss 	printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
    910  1.15  augustss 	endp = le32toh(qh->qh_endp);
    911  1.15  augustss 	printf("  endp=0x%08x\n", endp);
    912  1.15  augustss 	printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
    913  1.15  augustss 	       EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
    914  1.15  augustss 	       EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
    915  1.15  augustss 	       EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
    916  1.15  augustss 	printf("    mpl=0x%x ctl=%d nrl=%d\n",
    917  1.15  augustss 	       EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
    918  1.15  augustss 	       EHCI_QH_GET_NRL(endp));
    919  1.15  augustss 	endphub = le32toh(qh->qh_endphub);
    920  1.15  augustss 	printf("  endphub=0x%08x\n", endphub);
    921  1.15  augustss 	printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
    922  1.15  augustss 	       EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
    923  1.15  augustss 	       EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
    924  1.15  augustss 	       EHCI_QH_GET_MULT(endphub));
    925  1.15  augustss 	printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
    926  1.12  augustss 	printf("Overlay qTD:\n");
    927   1.9  augustss 	ehci_dump_qtd(&qh->qh_qtd);
    928   1.9  augustss }
    929   1.9  augustss 
    930   1.5  augustss #endif
    931   1.5  augustss 
    932   1.5  augustss usbd_status
    933   1.5  augustss ehci_open(usbd_pipe_handle pipe)
    934   1.5  augustss {
    935   1.5  augustss 	usbd_device_handle dev = pipe->device;
    936   1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
    937   1.5  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
    938   1.5  augustss 	u_int8_t addr = dev->address;
    939   1.5  augustss 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
    940   1.5  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
    941  1.10  augustss 	ehci_soft_qh_t *sqh;
    942  1.10  augustss 	usbd_status err;
    943  1.10  augustss #if 0
    944   1.5  augustss 	ehci_soft_itd_t *sitd;
    945   1.5  augustss 	ehci_physaddr_t tdphys;
    946   1.5  augustss 	u_int32_t fmt;
    947   1.5  augustss 	int ival;
    948   1.5  augustss #endif
    949  1.10  augustss 	int s;
    950  1.10  augustss 	int speed, naks;
    951   1.5  augustss 
    952   1.5  augustss 	DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
    953   1.5  augustss 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
    954   1.5  augustss 
    955  1.17  augustss 	if (sc->sc_dying)
    956  1.17  augustss 		return (USBD_IOERROR);
    957  1.17  augustss 
    958   1.5  augustss 	if (addr == sc->sc_addr) {
    959   1.5  augustss 		switch (ed->bEndpointAddress) {
    960   1.5  augustss 		case USB_CONTROL_ENDPOINT:
    961   1.5  augustss 			pipe->methods = &ehci_root_ctrl_methods;
    962   1.5  augustss 			break;
    963   1.5  augustss 		case UE_DIR_IN | EHCI_INTR_ENDPT:
    964   1.5  augustss 			pipe->methods = &ehci_root_intr_methods;
    965   1.5  augustss 			break;
    966   1.5  augustss 		default:
    967   1.5  augustss 			return (USBD_INVAL);
    968   1.5  augustss 		}
    969  1.10  augustss 		return (USBD_NORMAL_COMPLETION);
    970  1.10  augustss 	}
    971  1.10  augustss 
    972  1.11  augustss 	switch (dev->speed) {
    973  1.11  augustss 	case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
    974  1.11  augustss 	case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
    975  1.11  augustss 	case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
    976  1.11  augustss 	default: panic("ehci_open: bad device speed %d\n", dev->speed);
    977  1.11  augustss 	}
    978  1.10  augustss 	naks = 8;		/* XXX */
    979  1.10  augustss 	sqh = ehci_alloc_sqh(sc);
    980  1.10  augustss 	if (sqh == NULL)
    981  1.10  augustss 		goto bad0;
    982  1.10  augustss 	/* qh_link filled when the QH is added */
    983  1.10  augustss 	sqh->qh.qh_endp = htole32(
    984  1.10  augustss 		EHCI_QH_SET_ADDR(addr) |
    985  1.10  augustss 		EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
    986  1.10  augustss 		EHCI_QH_SET_EPS(speed) | /* XXX */
    987  1.10  augustss 		/* XXX EHCI_QH_DTC ? */
    988  1.10  augustss 		EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
    989  1.10  augustss 		(speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
    990  1.10  augustss 		 EHCI_QH_CTL : 0) |
    991  1.10  augustss 		EHCI_QH_SET_NRL(naks)
    992  1.10  augustss 		);
    993  1.10  augustss 	sqh->qh.qh_endphub = htole32(
    994  1.10  augustss 		EHCI_QH_SET_MULT(1)
    995  1.11  augustss 		/* XXX TT stuff */
    996  1.11  augustss 		/* XXX interrupt mask */
    997  1.10  augustss 		);
    998  1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
    999  1.11  augustss 	/* Fill the overlay qTD */
   1000  1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
   1001  1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   1002  1.15  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(0);
   1003  1.10  augustss 
   1004  1.10  augustss 	epipe->sqh = sqh;
   1005   1.5  augustss 
   1006  1.10  augustss 	switch (xfertype) {
   1007  1.10  augustss 	case UE_CONTROL:
   1008  1.11  augustss 		err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
   1009  1.10  augustss 				   0, &epipe->u.ctl.reqdma);
   1010  1.10  augustss 		if (err)
   1011  1.11  augustss 			goto bad1;
   1012  1.11  augustss 		pipe->methods = &ehci_device_ctrl_methods;
   1013  1.10  augustss 		s = splusb();
   1014  1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1015  1.10  augustss 		splx(s);
   1016  1.10  augustss 		break;
   1017  1.10  augustss 	case UE_BULK:
   1018  1.10  augustss 		pipe->methods = &ehci_device_bulk_methods;
   1019  1.10  augustss 		s = splusb();
   1020  1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1021  1.10  augustss 		splx(s);
   1022  1.10  augustss 		break;
   1023  1.10  augustss 	default:
   1024  1.10  augustss 		return (USBD_INVAL);
   1025   1.5  augustss 	}
   1026   1.5  augustss 	return (USBD_NORMAL_COMPLETION);
   1027   1.5  augustss 
   1028  1.11  augustss  bad1:
   1029  1.11  augustss 	ehci_free_sqh(sc, sqh);
   1030   1.5  augustss  bad0:
   1031   1.5  augustss 	return (USBD_NOMEM);
   1032  1.10  augustss }
   1033  1.10  augustss 
   1034  1.10  augustss /*
   1035  1.10  augustss  * Add an ED to the schedule.  Called at splusb().
   1036  1.10  augustss  */
   1037  1.10  augustss void
   1038  1.10  augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1039  1.10  augustss {
   1040  1.10  augustss 	SPLUSBCHECK;
   1041  1.10  augustss 
   1042  1.10  augustss 	sqh->next = head->next;
   1043  1.10  augustss 	sqh->qh.qh_link = head->qh.qh_link;
   1044  1.10  augustss 	head->next = sqh;
   1045  1.15  augustss 	head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
   1046  1.10  augustss 
   1047  1.10  augustss #ifdef EHCI_DEBUG
   1048  1.10  augustss 	if (ehcidebug > 0) {
   1049  1.10  augustss 		printf("ehci_add_qh:\n");
   1050  1.10  augustss 		ehci_dump_sqh(sqh);
   1051  1.10  augustss 	}
   1052   1.5  augustss #endif
   1053   1.5  augustss }
   1054   1.5  augustss 
   1055  1.10  augustss /*
   1056  1.10  augustss  * Remove an ED from the schedule.  Called at splusb().
   1057  1.10  augustss  */
   1058  1.10  augustss void
   1059  1.10  augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1060  1.10  augustss {
   1061  1.10  augustss 	ehci_soft_qh_t *p;
   1062  1.10  augustss 
   1063  1.10  augustss 	SPLUSBCHECK;
   1064  1.10  augustss 	/* XXX */
   1065  1.10  augustss 	for (p = head; p == NULL && p->next != sqh; p = p->next)
   1066  1.10  augustss 		;
   1067  1.10  augustss 	if (p == NULL)
   1068  1.10  augustss 		panic("ehci_rem_qh: ED not found\n");
   1069  1.10  augustss 	p->next = sqh->next;
   1070  1.10  augustss 	p->qh.qh_link = sqh->qh.qh_link;
   1071  1.10  augustss 
   1072  1.11  augustss 	ehci_sync_hc(sc);
   1073  1.11  augustss }
   1074  1.11  augustss 
   1075  1.11  augustss /*
   1076  1.11  augustss  * Ensure that the HC has released all references to the QH.  We do this
   1077  1.11  augustss  * by asking for a Async Advance Doorbell interrupt and then we wait for
   1078  1.11  augustss  * the interrupt.
   1079  1.11  augustss  * To make this easier we first obtain exclusive use of the doorbell.
   1080  1.11  augustss  */
   1081  1.11  augustss void
   1082  1.11  augustss ehci_sync_hc(ehci_softc_t *sc)
   1083  1.11  augustss {
   1084  1.15  augustss 	int s, error;
   1085  1.11  augustss 
   1086  1.12  augustss 	if (sc->sc_dying) {
   1087  1.12  augustss 		DPRINTFN(2,("ehci_sync_hc: dying\n"));
   1088  1.12  augustss 		return;
   1089  1.12  augustss 	}
   1090  1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: enter\n"));
   1091  1.10  augustss 	lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
   1092  1.10  augustss 	s = splhardusb();
   1093  1.10  augustss 	/* ask for doorbell */
   1094  1.10  augustss 	EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
   1095  1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1096  1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1097  1.15  augustss 	error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
   1098  1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1099  1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1100  1.10  augustss 	splx(s);
   1101  1.10  augustss 	lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
   1102  1.15  augustss #ifdef DIAGNOSTIC
   1103  1.15  augustss 	if (error)
   1104  1.15  augustss 		printf("ehci_sync_hc: tsleep() = %d\n", error);
   1105  1.15  augustss #endif
   1106  1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: exit\n"));
   1107  1.10  augustss }
   1108  1.10  augustss 
   1109   1.5  augustss /***********/
   1110   1.5  augustss 
   1111   1.5  augustss /*
   1112   1.5  augustss  * Data structures and routines to emulate the root hub.
   1113   1.5  augustss  */
   1114   1.5  augustss Static usb_device_descriptor_t ehci_devd = {
   1115   1.5  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1116   1.5  augustss 	UDESC_DEVICE,		/* type */
   1117   1.5  augustss 	{0x00, 0x02},		/* USB version */
   1118   1.5  augustss 	UDCLASS_HUB,		/* class */
   1119   1.5  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1120  1.11  augustss 	UDPROTO_HSHUBSTT,	/* protocol */
   1121   1.5  augustss 	64,			/* max packet */
   1122   1.5  augustss 	{0},{0},{0x00,0x01},	/* device id */
   1123   1.5  augustss 	1,2,0,			/* string indicies */
   1124   1.5  augustss 	1			/* # of configurations */
   1125   1.5  augustss };
   1126   1.5  augustss 
   1127  1.11  augustss Static usb_device_qualifier_t ehci_odevd = {
   1128  1.11  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1129  1.11  augustss 	UDESC_DEVICE_QUALIFIER,	/* type */
   1130  1.11  augustss 	{0x00, 0x02},		/* USB version */
   1131  1.11  augustss 	UDCLASS_HUB,		/* class */
   1132  1.11  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1133  1.11  augustss 	UDPROTO_FSHUB,		/* protocol */
   1134  1.11  augustss 	64,			/* max packet */
   1135  1.11  augustss 	1,			/* # of configurations */
   1136  1.11  augustss 	0
   1137  1.11  augustss };
   1138  1.11  augustss 
   1139   1.5  augustss Static usb_config_descriptor_t ehci_confd = {
   1140   1.5  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   1141   1.5  augustss 	UDESC_CONFIG,
   1142   1.5  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1143   1.5  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1144   1.5  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1145   1.5  augustss 	1,
   1146   1.5  augustss 	1,
   1147   1.5  augustss 	0,
   1148   1.5  augustss 	UC_SELF_POWERED,
   1149   1.5  augustss 	0			/* max power */
   1150   1.5  augustss };
   1151   1.5  augustss 
   1152   1.5  augustss Static usb_interface_descriptor_t ehci_ifcd = {
   1153   1.5  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1154   1.5  augustss 	UDESC_INTERFACE,
   1155   1.5  augustss 	0,
   1156   1.5  augustss 	0,
   1157   1.5  augustss 	1,
   1158   1.5  augustss 	UICLASS_HUB,
   1159   1.5  augustss 	UISUBCLASS_HUB,
   1160  1.11  augustss 	UIPROTO_HSHUBSTT,
   1161   1.5  augustss 	0
   1162   1.5  augustss };
   1163   1.5  augustss 
   1164   1.5  augustss Static usb_endpoint_descriptor_t ehci_endpd = {
   1165   1.5  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1166   1.5  augustss 	UDESC_ENDPOINT,
   1167   1.5  augustss 	UE_DIR_IN | EHCI_INTR_ENDPT,
   1168   1.5  augustss 	UE_INTERRUPT,
   1169   1.5  augustss 	{8, 0},			/* max packet */
   1170   1.5  augustss 	255
   1171   1.5  augustss };
   1172   1.5  augustss 
   1173   1.5  augustss Static usb_hub_descriptor_t ehci_hubd = {
   1174   1.5  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   1175   1.5  augustss 	UDESC_HUB,
   1176   1.5  augustss 	0,
   1177   1.5  augustss 	{0,0},
   1178   1.5  augustss 	0,
   1179   1.5  augustss 	0,
   1180   1.5  augustss 	{0},
   1181   1.5  augustss };
   1182   1.5  augustss 
   1183   1.5  augustss Static int
   1184   1.5  augustss ehci_str(p, l, s)
   1185   1.5  augustss 	usb_string_descriptor_t *p;
   1186   1.5  augustss 	int l;
   1187   1.5  augustss 	char *s;
   1188   1.5  augustss {
   1189   1.5  augustss 	int i;
   1190   1.5  augustss 
   1191   1.5  augustss 	if (l == 0)
   1192   1.5  augustss 		return (0);
   1193   1.5  augustss 	p->bLength = 2 * strlen(s) + 2;
   1194   1.5  augustss 	if (l == 1)
   1195   1.5  augustss 		return (1);
   1196   1.5  augustss 	p->bDescriptorType = UDESC_STRING;
   1197   1.5  augustss 	l -= 2;
   1198   1.5  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1199   1.5  augustss 		USETW2(p->bString[i], 0, s[i]);
   1200   1.5  augustss 	return (2*i+2);
   1201   1.5  augustss }
   1202   1.5  augustss 
   1203   1.5  augustss /*
   1204   1.5  augustss  * Simulate a hardware hub by handling all the necessary requests.
   1205   1.5  augustss  */
   1206   1.5  augustss Static usbd_status
   1207   1.5  augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
   1208   1.5  augustss {
   1209   1.5  augustss 	usbd_status err;
   1210   1.5  augustss 
   1211   1.5  augustss 	/* Insert last in queue. */
   1212   1.5  augustss 	err = usb_insert_transfer(xfer);
   1213   1.5  augustss 	if (err)
   1214   1.5  augustss 		return (err);
   1215   1.5  augustss 
   1216   1.5  augustss 	/* Pipe isn't running, start first */
   1217   1.5  augustss 	return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1218   1.5  augustss }
   1219   1.5  augustss 
   1220   1.5  augustss Static usbd_status
   1221   1.5  augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
   1222   1.5  augustss {
   1223   1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   1224   1.5  augustss 	usb_device_request_t *req;
   1225   1.5  augustss 	void *buf = NULL;
   1226   1.5  augustss 	int port, i;
   1227   1.5  augustss 	int s, len, value, index, l, totlen = 0;
   1228   1.5  augustss 	usb_port_status_t ps;
   1229   1.5  augustss 	usb_hub_descriptor_t hubd;
   1230   1.5  augustss 	usbd_status err;
   1231   1.5  augustss 	u_int32_t v;
   1232   1.5  augustss 
   1233   1.5  augustss 	if (sc->sc_dying)
   1234   1.5  augustss 		return (USBD_IOERROR);
   1235   1.5  augustss 
   1236   1.5  augustss #ifdef DIAGNOSTIC
   1237   1.5  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   1238   1.5  augustss 		/* XXX panic */
   1239   1.5  augustss 		return (USBD_INVAL);
   1240   1.5  augustss #endif
   1241   1.5  augustss 	req = &xfer->request;
   1242   1.5  augustss 
   1243   1.5  augustss 	DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
   1244   1.5  augustss 		    req->bmRequestType, req->bRequest));
   1245   1.5  augustss 
   1246   1.5  augustss 	len = UGETW(req->wLength);
   1247   1.5  augustss 	value = UGETW(req->wValue);
   1248   1.5  augustss 	index = UGETW(req->wIndex);
   1249   1.5  augustss 
   1250   1.5  augustss 	if (len != 0)
   1251   1.5  augustss 		buf = KERNADDR(&xfer->dmabuf);
   1252   1.5  augustss 
   1253   1.5  augustss #define C(x,y) ((x) | ((y) << 8))
   1254   1.5  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   1255   1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1256   1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1257   1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1258   1.5  augustss 		/*
   1259   1.5  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1260   1.5  augustss 		 * for the integrated root hub.
   1261   1.5  augustss 		 */
   1262   1.5  augustss 		break;
   1263   1.5  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1264   1.5  augustss 		if (len > 0) {
   1265   1.5  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   1266   1.5  augustss 			totlen = 1;
   1267   1.5  augustss 		}
   1268   1.5  augustss 		break;
   1269   1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1270   1.5  augustss 		DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
   1271   1.5  augustss 		switch(value >> 8) {
   1272   1.5  augustss 		case UDESC_DEVICE:
   1273   1.5  augustss 			if ((value & 0xff) != 0) {
   1274   1.5  augustss 				err = USBD_IOERROR;
   1275   1.5  augustss 				goto ret;
   1276   1.5  augustss 			}
   1277   1.5  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1278   1.5  augustss 			USETW(ehci_devd.idVendor, sc->sc_id_vendor);
   1279   1.5  augustss 			memcpy(buf, &ehci_devd, l);
   1280   1.5  augustss 			break;
   1281  1.11  augustss 		/*
   1282  1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1283  1.11  augustss 		 * we need this descriptor.
   1284  1.11  augustss 		 */
   1285  1.11  augustss 		case UDESC_DEVICE_QUALIFIER:
   1286  1.11  augustss 			if ((value & 0xff) != 0) {
   1287  1.11  augustss 				err = USBD_IOERROR;
   1288  1.11  augustss 				goto ret;
   1289  1.11  augustss 			}
   1290  1.11  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1291  1.11  augustss 			memcpy(buf, &ehci_odevd, l);
   1292  1.11  augustss 			break;
   1293  1.11  augustss 		/*
   1294  1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1295  1.11  augustss 		 * we need this descriptor.
   1296  1.11  augustss 		 */
   1297  1.11  augustss 		case UDESC_OTHER_SPEED_CONFIGURATION:
   1298   1.5  augustss 		case UDESC_CONFIG:
   1299   1.5  augustss 			if ((value & 0xff) != 0) {
   1300   1.5  augustss 				err = USBD_IOERROR;
   1301   1.5  augustss 				goto ret;
   1302   1.5  augustss 			}
   1303   1.5  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1304   1.5  augustss 			memcpy(buf, &ehci_confd, l);
   1305  1.11  augustss 			((usb_config_descriptor_t *)buf)->bDescriptorType =
   1306  1.11  augustss 				value >> 8;
   1307   1.5  augustss 			buf = (char *)buf + l;
   1308   1.5  augustss 			len -= l;
   1309   1.5  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1310   1.5  augustss 			totlen += l;
   1311   1.5  augustss 			memcpy(buf, &ehci_ifcd, l);
   1312   1.5  augustss 			buf = (char *)buf + l;
   1313   1.5  augustss 			len -= l;
   1314   1.5  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1315   1.5  augustss 			totlen += l;
   1316   1.5  augustss 			memcpy(buf, &ehci_endpd, l);
   1317   1.5  augustss 			break;
   1318   1.5  augustss 		case UDESC_STRING:
   1319   1.5  augustss 			if (len == 0)
   1320   1.5  augustss 				break;
   1321   1.5  augustss 			*(u_int8_t *)buf = 0;
   1322   1.5  augustss 			totlen = 1;
   1323   1.5  augustss 			switch (value & 0xff) {
   1324   1.5  augustss 			case 1: /* Vendor */
   1325   1.5  augustss 				totlen = ehci_str(buf, len, sc->sc_vendor);
   1326   1.5  augustss 				break;
   1327   1.5  augustss 			case 2: /* Product */
   1328   1.5  augustss 				totlen = ehci_str(buf, len, "EHCI root hub");
   1329   1.5  augustss 				break;
   1330   1.5  augustss 			}
   1331   1.5  augustss 			break;
   1332   1.5  augustss 		default:
   1333   1.5  augustss 			err = USBD_IOERROR;
   1334   1.5  augustss 			goto ret;
   1335   1.5  augustss 		}
   1336   1.5  augustss 		break;
   1337   1.5  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1338   1.5  augustss 		if (len > 0) {
   1339   1.5  augustss 			*(u_int8_t *)buf = 0;
   1340   1.5  augustss 			totlen = 1;
   1341   1.5  augustss 		}
   1342   1.5  augustss 		break;
   1343   1.5  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1344   1.5  augustss 		if (len > 1) {
   1345   1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1346   1.5  augustss 			totlen = 2;
   1347   1.5  augustss 		}
   1348   1.5  augustss 		break;
   1349   1.5  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1350   1.5  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1351   1.5  augustss 		if (len > 1) {
   1352   1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1353   1.5  augustss 			totlen = 2;
   1354   1.5  augustss 		}
   1355   1.5  augustss 		break;
   1356   1.5  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1357   1.5  augustss 		if (value >= USB_MAX_DEVICES) {
   1358   1.5  augustss 			err = USBD_IOERROR;
   1359   1.5  augustss 			goto ret;
   1360   1.5  augustss 		}
   1361   1.5  augustss 		sc->sc_addr = value;
   1362   1.5  augustss 		break;
   1363   1.5  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1364   1.5  augustss 		if (value != 0 && value != 1) {
   1365   1.5  augustss 			err = USBD_IOERROR;
   1366   1.5  augustss 			goto ret;
   1367   1.5  augustss 		}
   1368   1.5  augustss 		sc->sc_conf = value;
   1369   1.5  augustss 		break;
   1370   1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1371   1.5  augustss 		break;
   1372   1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1373   1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1374   1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1375   1.5  augustss 		err = USBD_IOERROR;
   1376   1.5  augustss 		goto ret;
   1377   1.5  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1378   1.5  augustss 		break;
   1379   1.5  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1380   1.5  augustss 		break;
   1381   1.5  augustss 	/* Hub requests */
   1382   1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1383   1.5  augustss 		break;
   1384   1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1385   1.5  augustss 		DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   1386   1.5  augustss 			     "port=%d feature=%d\n",
   1387   1.5  augustss 			     index, value));
   1388   1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1389   1.5  augustss 			err = USBD_IOERROR;
   1390   1.5  augustss 			goto ret;
   1391   1.5  augustss 		}
   1392   1.5  augustss 		port = EHCI_PORTSC(index);
   1393   1.5  augustss 		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   1394   1.5  augustss 		switch(value) {
   1395   1.5  augustss 		case UHF_PORT_ENABLE:
   1396   1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PE);
   1397   1.5  augustss 			break;
   1398   1.5  augustss 		case UHF_PORT_SUSPEND:
   1399   1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
   1400   1.5  augustss 			break;
   1401   1.5  augustss 		case UHF_PORT_POWER:
   1402   1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PP);
   1403   1.5  augustss 			break;
   1404  1.14  augustss 		case UHF_PORT_TEST:
   1405  1.14  augustss 			DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
   1406  1.14  augustss 				    "%d\n", index));
   1407  1.14  augustss 			break;
   1408  1.14  augustss 		case UHF_PORT_INDICATOR:
   1409  1.14  augustss 			DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
   1410  1.14  augustss 				    "%d\n", index));
   1411  1.14  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
   1412  1.14  augustss 			break;
   1413   1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1414   1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_CSC);
   1415   1.5  augustss 			break;
   1416   1.5  augustss 		case UHF_C_PORT_ENABLE:
   1417   1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PEC);
   1418   1.5  augustss 			break;
   1419   1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1420   1.5  augustss 			/* how? */
   1421   1.5  augustss 			break;
   1422   1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1423   1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_OCC);
   1424   1.5  augustss 			break;
   1425   1.5  augustss 		case UHF_C_PORT_RESET:
   1426   1.6  augustss 			sc->sc_isreset = 0;
   1427   1.5  augustss 			break;
   1428   1.5  augustss 		default:
   1429   1.5  augustss 			err = USBD_IOERROR;
   1430   1.5  augustss 			goto ret;
   1431   1.5  augustss 		}
   1432   1.5  augustss #if 0
   1433   1.5  augustss 		switch(value) {
   1434   1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1435   1.5  augustss 		case UHF_C_PORT_ENABLE:
   1436   1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1437   1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1438   1.5  augustss 		case UHF_C_PORT_RESET:
   1439   1.5  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   1440   1.5  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   1441   1.6  augustss 				ehci_pcd_able(sc, 1);
   1442   1.5  augustss 			break;
   1443   1.5  augustss 		default:
   1444   1.5  augustss 			break;
   1445   1.5  augustss 		}
   1446   1.5  augustss #endif
   1447   1.5  augustss 		break;
   1448   1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1449   1.5  augustss 		if (value != 0) {
   1450   1.5  augustss 			err = USBD_IOERROR;
   1451   1.5  augustss 			goto ret;
   1452   1.5  augustss 		}
   1453   1.5  augustss 		hubd = ehci_hubd;
   1454   1.5  augustss 		hubd.bNbrPorts = sc->sc_noport;
   1455   1.5  augustss 		v = EOREAD4(sc, EHCI_HCSPARAMS);
   1456   1.5  augustss 		USETW(hubd.wHubCharacteristics,
   1457  1.14  augustss 		    EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
   1458  1.14  augustss 		    EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
   1459  1.14  augustss 		        ? UHD_PORT_IND : 0);
   1460   1.5  augustss 		hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
   1461   1.5  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1462   1.5  augustss 			hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
   1463   1.5  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1464   1.5  augustss 		l = min(len, hubd.bDescLength);
   1465   1.5  augustss 		totlen = l;
   1466   1.5  augustss 		memcpy(buf, &hubd, l);
   1467   1.5  augustss 		break;
   1468   1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1469   1.5  augustss 		if (len != 4) {
   1470   1.5  augustss 			err = USBD_IOERROR;
   1471   1.5  augustss 			goto ret;
   1472   1.5  augustss 		}
   1473   1.5  augustss 		memset(buf, 0, len); /* ? XXX */
   1474   1.5  augustss 		totlen = len;
   1475   1.5  augustss 		break;
   1476   1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1477   1.5  augustss 		DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
   1478   1.5  augustss 			    index));
   1479   1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1480   1.5  augustss 			err = USBD_IOERROR;
   1481   1.5  augustss 			goto ret;
   1482   1.5  augustss 		}
   1483   1.5  augustss 		if (len != 4) {
   1484   1.5  augustss 			err = USBD_IOERROR;
   1485   1.5  augustss 			goto ret;
   1486   1.5  augustss 		}
   1487   1.5  augustss 		v = EOREAD4(sc, EHCI_PORTSC(index));
   1488   1.5  augustss 		DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
   1489   1.5  augustss 			    v));
   1490  1.11  augustss 		i = UPS_HIGH_SPEED;
   1491   1.5  augustss 		if (v & EHCI_PS_CS)	i |= UPS_CURRENT_CONNECT_STATUS;
   1492   1.5  augustss 		if (v & EHCI_PS_PE)	i |= UPS_PORT_ENABLED;
   1493   1.5  augustss 		if (v & EHCI_PS_SUSP)	i |= UPS_SUSPEND;
   1494   1.5  augustss 		if (v & EHCI_PS_OCA)	i |= UPS_OVERCURRENT_INDICATOR;
   1495   1.5  augustss 		if (v & EHCI_PS_PR)	i |= UPS_RESET;
   1496   1.5  augustss 		if (v & EHCI_PS_PP)	i |= UPS_PORT_POWER;
   1497   1.5  augustss 		USETW(ps.wPortStatus, i);
   1498   1.5  augustss 		i = 0;
   1499   1.5  augustss 		if (v & EHCI_PS_CSC)	i |= UPS_C_CONNECT_STATUS;
   1500   1.5  augustss 		if (v & EHCI_PS_PEC)	i |= UPS_C_PORT_ENABLED;
   1501   1.5  augustss 		if (v & EHCI_PS_OCC)	i |= UPS_C_OVERCURRENT_INDICATOR;
   1502   1.6  augustss 		if (sc->sc_isreset)	i |= UPS_C_PORT_RESET;
   1503   1.5  augustss 		USETW(ps.wPortChange, i);
   1504   1.5  augustss 		l = min(len, sizeof ps);
   1505   1.5  augustss 		memcpy(buf, &ps, l);
   1506   1.5  augustss 		totlen = l;
   1507   1.5  augustss 		break;
   1508   1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1509   1.5  augustss 		err = USBD_IOERROR;
   1510   1.5  augustss 		goto ret;
   1511   1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1512   1.5  augustss 		break;
   1513   1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1514   1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1515   1.5  augustss 			err = USBD_IOERROR;
   1516   1.5  augustss 			goto ret;
   1517   1.5  augustss 		}
   1518   1.5  augustss 		port = EHCI_PORTSC(index);
   1519   1.5  augustss 		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   1520   1.5  augustss 		switch(value) {
   1521   1.5  augustss 		case UHF_PORT_ENABLE:
   1522   1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PE);
   1523   1.5  augustss 			break;
   1524   1.5  augustss 		case UHF_PORT_SUSPEND:
   1525   1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_SUSP);
   1526   1.5  augustss 			break;
   1527   1.5  augustss 		case UHF_PORT_RESET:
   1528   1.5  augustss 			DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
   1529   1.5  augustss 				    index));
   1530   1.6  augustss 			if (EHCI_PS_IS_LOWSPEED(v)) {
   1531   1.6  augustss 				/* Low speed device, give up ownership. */
   1532   1.6  augustss 				ehci_disown(sc, index, 1);
   1533   1.6  augustss 				break;
   1534   1.6  augustss 			}
   1535   1.8  augustss 			/* Start reset sequence. */
   1536   1.8  augustss 			v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
   1537   1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PR);
   1538   1.8  augustss 			/* Wait for reset to complete. */
   1539  1.13  augustss 			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   1540  1.17  augustss 			if (sc->sc_dying) {
   1541  1.17  augustss 				err = USBD_IOERROR;
   1542  1.17  augustss 				goto ret;
   1543  1.17  augustss 			}
   1544   1.8  augustss 			/* Terminate reset sequence. */
   1545   1.8  augustss 			EOWRITE4(sc, port, v);
   1546   1.8  augustss 			/* Wait for HC to complete reset. */
   1547  1.13  augustss 			usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
   1548  1.17  augustss 			if (sc->sc_dying) {
   1549  1.17  augustss 				err = USBD_IOERROR;
   1550  1.17  augustss 				goto ret;
   1551  1.17  augustss 			}
   1552   1.8  augustss 			v = EOREAD4(sc, port);
   1553   1.8  augustss 			DPRINTF(("ehci after reset, status=0x%08x\n", v));
   1554   1.8  augustss 			if (v & EHCI_PS_PR) {
   1555   1.8  augustss 				printf("%s: port reset timeout\n",
   1556   1.8  augustss 				       USBDEVNAME(sc->sc_bus.bdev));
   1557   1.8  augustss 				return (USBD_TIMEOUT);
   1558   1.5  augustss 			}
   1559   1.8  augustss 			if (!(v & EHCI_PS_PE)) {
   1560   1.6  augustss 				/* Not a high speed device, give up ownership.*/
   1561   1.6  augustss 				ehci_disown(sc, index, 0);
   1562   1.6  augustss 				break;
   1563   1.6  augustss 			}
   1564   1.6  augustss 			sc->sc_isreset = 1;
   1565   1.8  augustss 			DPRINTF(("ehci port %d reset, status = 0x%08x\n",
   1566   1.6  augustss 				 index, v));
   1567   1.5  augustss 			break;
   1568   1.5  augustss 		case UHF_PORT_POWER:
   1569   1.5  augustss 			DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
   1570   1.5  augustss 				    "%d\n", index));
   1571   1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PP);
   1572   1.5  augustss 			break;
   1573  1.11  augustss 		case UHF_PORT_TEST:
   1574  1.11  augustss 			DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
   1575  1.11  augustss 				    "%d\n", index));
   1576  1.11  augustss 			break;
   1577  1.11  augustss 		case UHF_PORT_INDICATOR:
   1578  1.11  augustss 			DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
   1579  1.11  augustss 				    "%d\n", index));
   1580  1.14  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PIC);
   1581  1.11  augustss 			break;
   1582   1.5  augustss 		default:
   1583   1.5  augustss 			err = USBD_IOERROR;
   1584   1.5  augustss 			goto ret;
   1585   1.5  augustss 		}
   1586   1.5  augustss 		break;
   1587  1.11  augustss 	case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
   1588  1.11  augustss 	case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
   1589  1.11  augustss 	case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
   1590  1.11  augustss 	case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
   1591  1.11  augustss 		break;
   1592   1.5  augustss 	default:
   1593   1.5  augustss 		err = USBD_IOERROR;
   1594   1.5  augustss 		goto ret;
   1595   1.5  augustss 	}
   1596   1.5  augustss 	xfer->actlen = totlen;
   1597   1.5  augustss 	err = USBD_NORMAL_COMPLETION;
   1598   1.5  augustss  ret:
   1599   1.5  augustss 	xfer->status = err;
   1600   1.5  augustss 	s = splusb();
   1601   1.5  augustss 	usb_transfer_complete(xfer);
   1602   1.5  augustss 	splx(s);
   1603   1.5  augustss 	return (USBD_IN_PROGRESS);
   1604   1.6  augustss }
   1605   1.6  augustss 
   1606   1.6  augustss void
   1607   1.6  augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
   1608   1.6  augustss {
   1609   1.6  augustss 	int i, port;
   1610   1.6  augustss 	u_int32_t v;
   1611   1.6  augustss 
   1612   1.6  augustss 	DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
   1613   1.6  augustss #ifdef DIAGNOSTIC
   1614   1.6  augustss 	if (sc->sc_npcomp != 0) {
   1615   1.6  augustss 		i = (index-1) / sc->sc_npcomp;
   1616   1.6  augustss 		if (i >= sc->sc_ncomp)
   1617   1.6  augustss 			printf("%s: strange port\n",
   1618   1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev));
   1619   1.6  augustss 		else
   1620   1.6  augustss 			printf("%s: handing over %s speed device on "
   1621   1.6  augustss 			       "port %d to %s\n",
   1622   1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev),
   1623   1.6  augustss 			       lowspeed ? "low" : "full",
   1624   1.6  augustss 			       index, USBDEVNAME(sc->sc_comps[i]->bdev));
   1625   1.6  augustss 	} else {
   1626   1.6  augustss 		printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
   1627   1.6  augustss 	}
   1628   1.6  augustss #endif
   1629   1.6  augustss 	port = EHCI_PORTSC(index);
   1630   1.6  augustss 	v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   1631   1.6  augustss 	EOWRITE4(sc, port, v | EHCI_PS_PO);
   1632   1.5  augustss }
   1633   1.5  augustss 
   1634   1.5  augustss /* Abort a root control request. */
   1635   1.5  augustss Static void
   1636   1.5  augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
   1637   1.5  augustss {
   1638   1.5  augustss 	/* Nothing to do, all transfers are synchronous. */
   1639   1.5  augustss }
   1640   1.5  augustss 
   1641   1.5  augustss /* Close the root pipe. */
   1642   1.5  augustss Static void
   1643   1.5  augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
   1644   1.5  augustss {
   1645   1.5  augustss 	DPRINTF(("ehci_root_ctrl_close\n"));
   1646   1.5  augustss 	/* Nothing to do. */
   1647   1.5  augustss }
   1648   1.5  augustss 
   1649   1.5  augustss void
   1650   1.5  augustss ehci_root_intr_done(usbd_xfer_handle xfer)
   1651   1.5  augustss {
   1652   1.5  augustss 	xfer->hcpriv = NULL;
   1653   1.5  augustss }
   1654   1.5  augustss 
   1655   1.5  augustss Static usbd_status
   1656   1.5  augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
   1657   1.5  augustss {
   1658   1.5  augustss 	usbd_status err;
   1659   1.5  augustss 
   1660   1.5  augustss 	/* Insert last in queue. */
   1661   1.5  augustss 	err = usb_insert_transfer(xfer);
   1662   1.5  augustss 	if (err)
   1663   1.5  augustss 		return (err);
   1664   1.5  augustss 
   1665   1.5  augustss 	/* Pipe isn't running, start first */
   1666   1.5  augustss 	return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1667   1.5  augustss }
   1668   1.5  augustss 
   1669   1.5  augustss Static usbd_status
   1670   1.5  augustss ehci_root_intr_start(usbd_xfer_handle xfer)
   1671   1.5  augustss {
   1672   1.5  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   1673   1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   1674   1.5  augustss 
   1675   1.5  augustss 	if (sc->sc_dying)
   1676   1.5  augustss 		return (USBD_IOERROR);
   1677   1.5  augustss 
   1678   1.5  augustss 	sc->sc_intrxfer = xfer;
   1679   1.5  augustss 
   1680   1.5  augustss 	return (USBD_IN_PROGRESS);
   1681   1.5  augustss }
   1682   1.5  augustss 
   1683   1.5  augustss /* Abort a root interrupt request. */
   1684   1.5  augustss Static void
   1685   1.5  augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
   1686   1.5  augustss {
   1687   1.5  augustss 	int s;
   1688   1.5  augustss 
   1689   1.5  augustss 	if (xfer->pipe->intrxfer == xfer) {
   1690   1.5  augustss 		DPRINTF(("ehci_root_intr_abort: remove\n"));
   1691   1.5  augustss 		xfer->pipe->intrxfer = NULL;
   1692   1.5  augustss 	}
   1693   1.5  augustss 	xfer->status = USBD_CANCELLED;
   1694   1.5  augustss 	s = splusb();
   1695   1.5  augustss 	usb_transfer_complete(xfer);
   1696   1.5  augustss 	splx(s);
   1697   1.5  augustss }
   1698   1.5  augustss 
   1699   1.5  augustss /* Close the root pipe. */
   1700   1.5  augustss Static void
   1701   1.5  augustss ehci_root_intr_close(usbd_pipe_handle pipe)
   1702   1.5  augustss {
   1703   1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   1704   1.5  augustss 
   1705   1.5  augustss 	DPRINTF(("ehci_root_intr_close\n"));
   1706   1.5  augustss 
   1707   1.5  augustss 	sc->sc_intrxfer = NULL;
   1708   1.5  augustss }
   1709   1.5  augustss 
   1710   1.5  augustss void
   1711   1.5  augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
   1712   1.5  augustss {
   1713   1.5  augustss 	xfer->hcpriv = NULL;
   1714   1.9  augustss }
   1715   1.9  augustss 
   1716   1.9  augustss /************************/
   1717   1.9  augustss 
   1718   1.9  augustss ehci_soft_qh_t *
   1719   1.9  augustss ehci_alloc_sqh(ehci_softc_t *sc)
   1720   1.9  augustss {
   1721   1.9  augustss 	ehci_soft_qh_t *sqh;
   1722   1.9  augustss 	usbd_status err;
   1723   1.9  augustss 	int i, offs;
   1724   1.9  augustss 	usb_dma_t dma;
   1725   1.9  augustss 
   1726   1.9  augustss 	if (sc->sc_freeqhs == NULL) {
   1727   1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
   1728   1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
   1729   1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   1730   1.9  augustss 		if (err)
   1731  1.11  augustss 			return (NULL);
   1732   1.9  augustss 		for(i = 0; i < EHCI_SQH_CHUNK; i++) {
   1733   1.9  augustss 			offs = i * EHCI_SQH_SIZE;
   1734  1.11  augustss 			sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
   1735   1.9  augustss 			sqh->physaddr = DMAADDR(&dma) + offs;
   1736   1.9  augustss 			sqh->next = sc->sc_freeqhs;
   1737   1.9  augustss 			sc->sc_freeqhs = sqh;
   1738   1.9  augustss 		}
   1739   1.9  augustss 	}
   1740   1.9  augustss 	sqh = sc->sc_freeqhs;
   1741   1.9  augustss 	sc->sc_freeqhs = sqh->next;
   1742   1.9  augustss 	memset(&sqh->qh, 0, sizeof(ehci_qh_t));
   1743  1.11  augustss 	sqh->next = NULL;
   1744   1.9  augustss 	return (sqh);
   1745   1.9  augustss }
   1746   1.9  augustss 
   1747   1.9  augustss void
   1748   1.9  augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
   1749   1.9  augustss {
   1750   1.9  augustss 	sqh->next = sc->sc_freeqhs;
   1751   1.9  augustss 	sc->sc_freeqhs = sqh;
   1752   1.9  augustss }
   1753   1.9  augustss 
   1754   1.9  augustss ehci_soft_qtd_t *
   1755   1.9  augustss ehci_alloc_sqtd(ehci_softc_t *sc)
   1756   1.9  augustss {
   1757   1.9  augustss 	ehci_soft_qtd_t *sqtd;
   1758   1.9  augustss 	usbd_status err;
   1759   1.9  augustss 	int i, offs;
   1760   1.9  augustss 	usb_dma_t dma;
   1761   1.9  augustss 	int s;
   1762   1.9  augustss 
   1763   1.9  augustss 	if (sc->sc_freeqtds == NULL) {
   1764   1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
   1765   1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
   1766   1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   1767   1.9  augustss 		if (err)
   1768   1.9  augustss 			return (NULL);
   1769   1.9  augustss 		s = splusb();
   1770   1.9  augustss 		for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
   1771   1.9  augustss 			offs = i * EHCI_SQTD_SIZE;
   1772   1.9  augustss 			sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
   1773   1.9  augustss 			sqtd->physaddr = DMAADDR(&dma) + offs;
   1774   1.9  augustss 			sqtd->nextqtd = sc->sc_freeqtds;
   1775   1.9  augustss 			sc->sc_freeqtds = sqtd;
   1776   1.9  augustss 		}
   1777   1.9  augustss 		splx(s);
   1778   1.9  augustss 	}
   1779   1.9  augustss 
   1780   1.9  augustss 	s = splusb();
   1781   1.9  augustss 	sqtd = sc->sc_freeqtds;
   1782   1.9  augustss 	sc->sc_freeqtds = sqtd->nextqtd;
   1783   1.9  augustss 	memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
   1784   1.9  augustss 	sqtd->nextqtd = NULL;
   1785   1.9  augustss 	sqtd->xfer = NULL;
   1786   1.9  augustss 	splx(s);
   1787   1.9  augustss 
   1788   1.9  augustss 	return (sqtd);
   1789   1.9  augustss }
   1790   1.9  augustss 
   1791   1.9  augustss void
   1792   1.9  augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
   1793   1.9  augustss {
   1794   1.9  augustss 	int s;
   1795   1.9  augustss 
   1796   1.9  augustss 	s = splusb();
   1797   1.9  augustss 	sqtd->nextqtd = sc->sc_freeqtds;
   1798   1.9  augustss 	sc->sc_freeqtds = sqtd;
   1799   1.9  augustss 	splx(s);
   1800   1.9  augustss }
   1801   1.9  augustss 
   1802  1.15  augustss usbd_status
   1803  1.15  augustss ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
   1804  1.15  augustss 		     int alen, int rd, usbd_xfer_handle xfer,
   1805  1.15  augustss 		     ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
   1806  1.15  augustss {
   1807  1.15  augustss 	ehci_soft_qtd_t *next, *cur;
   1808  1.15  augustss 	ehci_physaddr_t dataphys, dataphysend, nextphys;
   1809  1.15  augustss 	u_int32_t qtdstatus;
   1810  1.15  augustss 	int len, curlen;
   1811  1.15  augustss 	int i;
   1812  1.15  augustss 	usb_dma_t *dma = &xfer->dmabuf;
   1813  1.15  augustss 
   1814  1.15  augustss 	DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen));
   1815  1.15  augustss 
   1816  1.15  augustss 	len = alen;
   1817  1.15  augustss 	dataphys = DMAADDR(dma);
   1818  1.15  augustss 	dataphysend = EHCI_PAGE(dataphys + len - 1);
   1819  1.15  augustss 	qtdstatus = htole32(
   1820  1.15  augustss 	    EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
   1821  1.15  augustss 	    EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
   1822  1.15  augustss 	    EHCI_QTD_SET_CERR(3)
   1823  1.15  augustss 	    /* IOC set below */
   1824  1.15  augustss 	    /* BYTES set below */
   1825  1.15  augustss 	    /* XXX Data toggle */
   1826  1.15  augustss 	    );
   1827  1.15  augustss 
   1828  1.15  augustss 	cur = ehci_alloc_sqtd(sc);
   1829  1.15  augustss 	if (cur == NULL)
   1830  1.15  augustss 		goto nomem;
   1831  1.15  augustss 	*sp = cur;
   1832  1.15  augustss 	for (;;) {
   1833  1.15  augustss 		/* The EHCI hardware can handle at most 4 page crossings. */
   1834  1.15  augustss 		if (EHCI_PAGE(dataphys) == dataphysend ||
   1835  1.15  augustss 		    EHCI_PAGE(dataphys) + EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE
   1836  1.15  augustss 		      == dataphysend) {
   1837  1.15  augustss 			/* we can handle it in this QTD */
   1838  1.15  augustss 			curlen = len;
   1839  1.15  augustss 		} else {
   1840  1.15  augustss #if 0
   1841  1.15  augustss 			/* must use multiple TDs, fill as much as possible. */
   1842  1.15  augustss 			curlen = 2 * EHCI_PAGE_SIZE -
   1843  1.15  augustss 				 (dataphys & (EHCI_PAGE_SIZE-1));
   1844  1.15  augustss 			/* the length must be a multiple of the max size */
   1845  1.15  augustss 			curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
   1846  1.15  augustss #ifdef DIAGNOSTIC
   1847  1.15  augustss 			if (curlen == 0)
   1848  1.15  augustss 				panic("ehci_alloc_std: curlen == 0\n");
   1849  1.15  augustss #endif
   1850  1.15  augustss #else
   1851  1.15  augustss 			printf("ehci_alloc_std_chain: multiple QTDs\n");
   1852  1.15  augustss 			return (USBD_NOMEM);
   1853  1.15  augustss #endif
   1854  1.15  augustss 		}
   1855  1.15  augustss 		DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x "
   1856  1.15  augustss 			    "dataphysend=0x%08x len=%d curlen=%d\n",
   1857  1.15  augustss 			    dataphys, dataphysend,
   1858  1.15  augustss 			    len, curlen));
   1859  1.15  augustss 		len -= curlen;
   1860  1.15  augustss 
   1861  1.15  augustss 		if (len != 0) {
   1862  1.15  augustss 			next = ehci_alloc_sqtd(sc);
   1863  1.15  augustss 			if (next == NULL)
   1864  1.15  augustss 				goto nomem;
   1865  1.15  augustss 			nextphys = next->physaddr;
   1866  1.15  augustss 		} else {
   1867  1.15  augustss 			next = NULL;
   1868  1.15  augustss 			nextphys = EHCI_NULL;
   1869  1.15  augustss 		}
   1870  1.15  augustss 
   1871  1.15  augustss 		for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
   1872  1.15  augustss 			ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
   1873  1.15  augustss 			if (i != 0) /* use offset only in first buffer */
   1874  1.15  augustss 				a = EHCI_PAGE(a);
   1875  1.15  augustss 			cur->qtd.qtd_buffer[i] = htole32(a);
   1876  1.15  augustss 		}
   1877  1.15  augustss 		cur->nextqtd = next;
   1878  1.15  augustss 		cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
   1879  1.15  augustss 		cur->qtd.qtd_status =
   1880  1.15  augustss 		    qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
   1881  1.15  augustss 		cur->xfer = xfer;
   1882  1.15  augustss 		DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
   1883  1.15  augustss 			    dataphys, dataphys + curlen - 1));
   1884  1.15  augustss 		if (len == 0)
   1885  1.15  augustss 			break;
   1886  1.15  augustss 		DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n"));
   1887  1.15  augustss 		dataphys += curlen;
   1888  1.15  augustss 		cur = next;
   1889  1.15  augustss 	}
   1890  1.15  augustss 	cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
   1891  1.15  augustss 	*ep = cur;
   1892  1.15  augustss 
   1893  1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   1894  1.15  augustss 
   1895  1.15  augustss  nomem:
   1896  1.15  augustss 	/* XXX free chain */
   1897  1.15  augustss 	return (USBD_NOMEM);
   1898  1.15  augustss }
   1899  1.15  augustss 
   1900  1.15  augustss /****************/
   1901  1.15  augustss 
   1902   1.9  augustss /*
   1903  1.10  augustss  * Close a reqular pipe.
   1904  1.10  augustss  * Assumes that there are no pending transactions.
   1905  1.10  augustss  */
   1906  1.10  augustss void
   1907  1.10  augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
   1908  1.10  augustss {
   1909  1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1910  1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   1911  1.10  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   1912  1.10  augustss 	int s;
   1913  1.10  augustss 
   1914  1.10  augustss 	s = splusb();
   1915  1.10  augustss 	ehci_rem_qh(sc, sqh, head);
   1916  1.10  augustss 	splx(s);
   1917  1.10  augustss 	ehci_free_sqh(sc, epipe->sqh);
   1918  1.10  augustss }
   1919  1.10  augustss 
   1920  1.10  augustss /*
   1921  1.10  augustss  * Abort a device request.
   1922  1.10  augustss  * If this routine is called at splusb() it guarantees that the request
   1923  1.10  augustss  * will be removed from the hardware scheduling and that the callback
   1924  1.10  augustss  * for it will be called with USBD_CANCELLED status.
   1925  1.10  augustss  * It's impossible to guarantee that the requested transfer will not
   1926  1.10  augustss  * have happened since the hardware runs concurrently.
   1927  1.10  augustss  * If the transaction has already happened we rely on the ordinary
   1928  1.10  augustss  * interrupt processing to process it.
   1929  1.10  augustss  */
   1930  1.10  augustss void
   1931  1.10  augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   1932  1.10  augustss {
   1933  1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   1934  1.10  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   1935  1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   1936  1.10  augustss #if 0
   1937  1.10  augustss 	ehci_soft_td_t *p, *n;
   1938  1.10  augustss 	ehci_physaddr_t headp;
   1939  1.11  augustss 	int hit;
   1940  1.10  augustss #endif
   1941  1.11  augustss 	int s;
   1942  1.10  augustss 
   1943  1.10  augustss 	DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh));
   1944  1.10  augustss 
   1945  1.17  augustss 	if (sc->sc_dying) {
   1946  1.17  augustss 		/* If we're dying, just do the software part. */
   1947  1.17  augustss 		s = splusb();
   1948  1.17  augustss 		xfer->status = status;	/* make software ignore it */
   1949  1.17  augustss 		usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   1950  1.17  augustss 		usb_transfer_complete(xfer);
   1951  1.17  augustss 		splx(s);
   1952  1.17  augustss 		return;
   1953  1.17  augustss 	}
   1954  1.17  augustss 
   1955  1.10  augustss 	if (xfer->device->bus->intr_context || !curproc)
   1956  1.10  augustss 		panic("ehci_abort_xfer: not in process context\n");
   1957  1.10  augustss 
   1958  1.11  augustss 	/*
   1959  1.11  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   1960  1.11  augustss 	 */
   1961  1.11  augustss 	s = splusb();
   1962  1.11  augustss 	xfer->status = status;	/* make software ignore it */
   1963  1.15  augustss 	usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   1964  1.11  augustss 	splx(s);
   1965  1.11  augustss 	/* XXX */
   1966  1.11  augustss 
   1967  1.11  augustss 	/*
   1968  1.11  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   1969  1.11  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   1970  1.11  augustss 	 * has run.
   1971  1.11  augustss 	 */
   1972  1.11  augustss 	usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */
   1973  1.11  augustss 	/* XXX should have some communication with softintr() to know
   1974  1.11  augustss 	   when it's done */
   1975  1.11  augustss 	usb_delay_ms(epipe->pipe.device->bus, 250);
   1976  1.11  augustss 
   1977  1.11  augustss 	/*
   1978  1.11  augustss 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   1979  1.11  augustss 	 * The complication here is that the hardware may have executed
   1980  1.11  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   1981  1.11  augustss 	 * the TDs of this xfer we check if the hardware points to
   1982  1.11  augustss 	 * any of them.
   1983  1.11  augustss 	 */
   1984  1.11  augustss 	s = splusb();		/* XXX why? */
   1985  1.11  augustss 	/* XXX */
   1986  1.11  augustss 
   1987  1.11  augustss 	/*
   1988  1.11  augustss 	 * Step 4: Turn on hardware again.
   1989  1.11  augustss 	 */
   1990  1.11  augustss 	/* XXX */
   1991  1.11  augustss 
   1992  1.11  augustss 	/*
   1993  1.11  augustss 	 * Step 5: Execute callback.
   1994  1.11  augustss 	 */
   1995  1.11  augustss 	usb_transfer_complete(xfer);
   1996  1.11  augustss 
   1997  1.11  augustss 	splx(s);
   1998  1.10  augustss }
   1999  1.10  augustss 
   2000  1.15  augustss void
   2001  1.15  augustss ehci_timeout(void *addr)
   2002  1.15  augustss {
   2003  1.15  augustss 	struct ehci_xfer *exfer = addr;
   2004  1.17  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
   2005  1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2006  1.15  augustss 
   2007  1.15  augustss 	DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
   2008  1.15  augustss 
   2009  1.17  augustss 	if (sc->sc_dying) {
   2010  1.17  augustss 		ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
   2011  1.17  augustss 		return;
   2012  1.17  augustss 	}
   2013  1.17  augustss 
   2014  1.15  augustss 	/* Execute the abort in a process context. */
   2015  1.15  augustss 	usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
   2016  1.15  augustss 	usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
   2017  1.15  augustss }
   2018  1.15  augustss 
   2019  1.15  augustss void
   2020  1.15  augustss ehci_timeout_task(void *addr)
   2021  1.15  augustss {
   2022  1.15  augustss 	usbd_xfer_handle xfer = addr;
   2023  1.15  augustss 	int s;
   2024  1.15  augustss 
   2025  1.15  augustss 	DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
   2026  1.15  augustss 
   2027  1.15  augustss 	s = splusb();
   2028  1.15  augustss 	ehci_abort_xfer(xfer, USBD_TIMEOUT);
   2029  1.15  augustss 	splx(s);
   2030  1.15  augustss }
   2031  1.15  augustss 
   2032   1.5  augustss /************************/
   2033   1.5  augustss 
   2034  1.10  augustss Static usbd_status
   2035  1.10  augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2036  1.10  augustss {
   2037  1.10  augustss 	usbd_status err;
   2038  1.10  augustss 
   2039  1.10  augustss 	/* Insert last in queue. */
   2040  1.10  augustss 	err = usb_insert_transfer(xfer);
   2041  1.10  augustss 	if (err)
   2042  1.10  augustss 		return (err);
   2043  1.10  augustss 
   2044  1.10  augustss 	/* Pipe isn't running, start first */
   2045  1.10  augustss 	return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2046  1.10  augustss }
   2047  1.10  augustss 
   2048  1.12  augustss Static usbd_status
   2049  1.12  augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
   2050  1.12  augustss {
   2051  1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2052  1.15  augustss 	usbd_status err;
   2053  1.15  augustss 
   2054  1.15  augustss 	if (sc->sc_dying)
   2055  1.15  augustss 		return (USBD_IOERROR);
   2056  1.15  augustss 
   2057  1.15  augustss #ifdef DIAGNOSTIC
   2058  1.15  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2059  1.15  augustss 		/* XXX panic */
   2060  1.15  augustss 		printf("ehci_device_ctrl_transfer: not a request\n");
   2061  1.15  augustss 		return (USBD_INVAL);
   2062  1.15  augustss 	}
   2063  1.15  augustss #endif
   2064  1.15  augustss 
   2065  1.15  augustss 	err = ehci_device_request(xfer);
   2066  1.15  augustss 	if (err)
   2067  1.15  augustss 		return (err);
   2068  1.15  augustss 
   2069  1.15  augustss 	if (sc->sc_bus.use_polling)
   2070  1.15  augustss 		ehci_waitintr(sc, xfer);
   2071  1.15  augustss 	return (USBD_IN_PROGRESS);
   2072  1.12  augustss }
   2073  1.10  augustss 
   2074  1.10  augustss void
   2075  1.10  augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
   2076  1.10  augustss {
   2077  1.10  augustss 	DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
   2078  1.10  augustss 
   2079  1.10  augustss #ifdef DIAGNOSTIC
   2080  1.10  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2081  1.10  augustss 		panic("ehci_ctrl_done: not a request\n");
   2082  1.10  augustss 	}
   2083  1.10  augustss #endif
   2084  1.10  augustss 	xfer->hcpriv = NULL;
   2085  1.10  augustss }
   2086  1.10  augustss 
   2087  1.10  augustss /* Abort a device control request. */
   2088  1.10  augustss Static void
   2089  1.10  augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
   2090  1.10  augustss {
   2091  1.10  augustss 	DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
   2092  1.10  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2093  1.10  augustss }
   2094  1.10  augustss 
   2095  1.10  augustss /* Close a device control pipe. */
   2096  1.10  augustss Static void
   2097  1.10  augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
   2098  1.10  augustss {
   2099  1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2100  1.10  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
   2101  1.10  augustss 
   2102  1.10  augustss 	DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
   2103  1.11  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2104  1.10  augustss 	/*ehci_free_std(sc, epipe->tail.td);*/
   2105  1.15  augustss }
   2106  1.15  augustss 
   2107  1.15  augustss usbd_status
   2108  1.15  augustss ehci_device_request(usbd_xfer_handle xfer)
   2109  1.15  augustss {
   2110  1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2111  1.15  augustss 	usb_device_request_t *req = &xfer->request;
   2112  1.15  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2113  1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2114  1.15  augustss 	int addr = dev->address;
   2115  1.15  augustss 	ehci_soft_qtd_t *setup, *stat, *next;
   2116  1.15  augustss 	ehci_soft_qh_t *sqh;
   2117  1.15  augustss 	int isread;
   2118  1.15  augustss 	int len;
   2119  1.15  augustss 	usbd_status err;
   2120  1.15  augustss 	int s;
   2121  1.15  augustss 
   2122  1.15  augustss 	isread = req->bmRequestType & UT_READ;
   2123  1.15  augustss 	len = UGETW(req->wLength);
   2124  1.15  augustss 
   2125  1.15  augustss 	DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
   2126  1.15  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2127  1.15  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2128  1.15  augustss 		    UGETW(req->wIndex), len, addr,
   2129  1.15  augustss 		    epipe->pipe.endpoint->edesc->bEndpointAddress));
   2130  1.15  augustss 
   2131  1.15  augustss 	setup = ehci_alloc_sqtd(sc);
   2132  1.15  augustss 	if (setup == NULL) {
   2133  1.15  augustss 		err = USBD_NOMEM;
   2134  1.15  augustss 		goto bad1;
   2135  1.15  augustss 	}
   2136  1.15  augustss 	stat = ehci_alloc_sqtd(sc);
   2137  1.15  augustss 	if (stat == NULL) {
   2138  1.15  augustss 		err = USBD_NOMEM;
   2139  1.15  augustss 		goto bad2;
   2140  1.15  augustss 	}
   2141  1.15  augustss 
   2142  1.15  augustss 	sqh = epipe->sqh;
   2143  1.15  augustss 	epipe->u.ctl.length = len;
   2144  1.15  augustss 
   2145  1.15  augustss 	/* XXX
   2146  1.15  augustss 	 * Since we're messing with the QH we must know the HC is in sync.
   2147  1.15  augustss 	 * This needs to go away since it slows down control transfers.
   2148  1.15  augustss 	 * Removing it entails:
   2149  1.15  augustss 	 *  - fill the QH only once with addr & wMaxPacketSize
   2150  1.15  augustss 	 *  - put the correct data toggles in the qtds and set DTC
   2151  1.15  augustss 	 */
   2152  1.15  augustss 	/* ehci_sync_hc(sc); */
   2153  1.15  augustss 	/* Update device address and length since they may have changed. */
   2154  1.15  augustss 	/* XXX This only needs to be done once, but it's too early in open. */
   2155  1.15  augustss 	/* XXXX Should not touch ED here! */
   2156  1.15  augustss 	sqh->qh.qh_endp =
   2157  1.15  augustss 	    (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
   2158  1.15  augustss 	    htole32(
   2159  1.15  augustss 	     EHCI_QH_SET_ADDR(addr) |
   2160  1.15  augustss 	     /* EHCI_QH_DTC | */
   2161  1.15  augustss 	     EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
   2162  1.15  augustss 	    );
   2163  1.15  augustss 	/* Clear toggle */
   2164  1.15  augustss 	sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
   2165  1.15  augustss 
   2166  1.15  augustss 	/* Set up data transaction */
   2167  1.15  augustss 	if (len != 0) {
   2168  1.15  augustss 		ehci_soft_qtd_t *end;
   2169  1.15  augustss 
   2170  1.15  augustss 		err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer,
   2171  1.15  augustss 			  &next, &end);
   2172  1.15  augustss 		if (err)
   2173  1.15  augustss 			goto bad3;
   2174  1.15  augustss 		end->nextqtd = stat;
   2175  1.15  augustss 		end->qtd.qtd_next =
   2176  1.15  augustss 		end->qtd.qtd_altnext = htole32(stat->physaddr);
   2177  1.15  augustss 		/* Start toggle at 1. */
   2178  1.15  augustss 		/*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
   2179  1.15  augustss 	} else {
   2180  1.15  augustss 		next = stat;
   2181  1.15  augustss 	}
   2182  1.15  augustss 
   2183  1.15  augustss 	memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req);
   2184  1.15  augustss 
   2185  1.15  augustss 	setup->qtd.qtd_status = htole32(
   2186  1.15  augustss 	    EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
   2187  1.15  augustss 	    EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
   2188  1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2189  1.15  augustss 	    EHCI_QTD_SET_BYTES(sizeof *req)
   2190  1.15  augustss 	    );
   2191  1.15  augustss 	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma));
   2192  1.15  augustss 	setup->nextqtd = next;
   2193  1.15  augustss 	setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
   2194  1.15  augustss 	setup->xfer = xfer;
   2195  1.15  augustss 
   2196  1.15  augustss 	stat->qtd.qtd_status = htole32(
   2197  1.15  augustss 	    EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
   2198  1.15  augustss 	    EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
   2199  1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2200  1.15  augustss 	    EHCI_QTD_IOC
   2201  1.15  augustss 	    );
   2202  1.15  augustss 	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
   2203  1.15  augustss 	stat->nextqtd = NULL;
   2204  1.15  augustss 	stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
   2205  1.15  augustss 	stat->xfer = xfer;
   2206  1.15  augustss 
   2207  1.15  augustss #ifdef EHCI_DEBUG
   2208  1.15  augustss 	if (ehcidebug > 2) {
   2209  1.15  augustss 		DPRINTF(("ehci_device_request:\n"));
   2210  1.15  augustss 		ehci_dump_sqh(sqh);
   2211  1.15  augustss 		ehci_dump_sqtds(setup);
   2212  1.15  augustss 	}
   2213  1.15  augustss #endif
   2214  1.15  augustss 
   2215  1.15  augustss 	/* Insert qTD in QH list. */
   2216  1.15  augustss 	s = splusb();
   2217  1.15  augustss 	sqh->qh.qh_curqtd = 0;
   2218  1.15  augustss 	sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr);
   2219  1.15  augustss 	sqh->sqtd = setup;
   2220  1.15  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2221  1.15  augustss                 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   2222  1.15  augustss 			    ehci_timeout, xfer);
   2223  1.15  augustss 	}
   2224  1.15  augustss 	splx(s);
   2225  1.15  augustss 
   2226  1.17  augustss #ifdef EHCI_DEBUG
   2227  1.15  augustss 	if (ehcidebug > 10) {
   2228  1.15  augustss 		delay(10000);
   2229  1.15  augustss 		DPRINTF(("ehci_device_request: status=%x\n",
   2230  1.15  augustss 			 EOREAD4(sc, EHCI_USBSTS)));
   2231  1.15  augustss 		ehci_dumpregs(sc);
   2232  1.15  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2233  1.15  augustss 		ehci_dump_sqh(sqh);
   2234  1.15  augustss 		ehci_dump_sqtds(setup);
   2235  1.15  augustss 	}
   2236  1.15  augustss #endif
   2237  1.15  augustss 
   2238  1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2239  1.15  augustss 
   2240  1.15  augustss  bad3:
   2241  1.15  augustss 	ehci_free_sqtd(sc, stat);
   2242  1.15  augustss  bad2:
   2243  1.15  augustss 	ehci_free_sqtd(sc, setup);
   2244  1.15  augustss  bad1:
   2245  1.15  augustss 	return (err);
   2246  1.10  augustss }
   2247  1.10  augustss 
   2248  1.10  augustss /************************/
   2249   1.5  augustss 
   2250   1.5  augustss Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   2251   1.5  augustss Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   2252   1.5  augustss Static void		ehci_device_bulk_abort(usbd_xfer_handle xfer) { }
   2253   1.5  augustss Static void		ehci_device_bulk_close(usbd_pipe_handle pipe) { }
   2254   1.5  augustss Static void		ehci_device_bulk_done(usbd_xfer_handle xfer) { }
   2255   1.5  augustss 
   2256  1.10  augustss /************************/
   2257  1.10  augustss 
   2258   1.5  augustss Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   2259   1.5  augustss Static usbd_status	ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   2260   1.5  augustss Static void		ehci_device_intr_abort(usbd_xfer_handle xfer) { }
   2261   1.5  augustss Static void		ehci_device_intr_close(usbd_pipe_handle pipe) { }
   2262   1.5  augustss Static void		ehci_device_intr_done(usbd_xfer_handle xfer) { }
   2263  1.10  augustss 
   2264  1.10  augustss /************************/
   2265   1.5  augustss 
   2266   1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   2267   1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   2268   1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
   2269   1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle pipe) { }
   2270   1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle xfer) { }
   2271