ehci.c revision 1.18 1 1.11 augustss /* TODO
2 1.11 augustss Add intrinfo.
3 1.11 augustss */
4 1.18 augustss /* $NetBSD: ehci.c,v 1.18 2001/11/21 12:28:23 augustss Exp $ */
5 1.1 augustss
6 1.1 augustss /*
7 1.5 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
8 1.1 augustss * All rights reserved.
9 1.1 augustss *
10 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
11 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
12 1.1 augustss *
13 1.1 augustss * Redistribution and use in source and binary forms, with or without
14 1.1 augustss * modification, are permitted provided that the following conditions
15 1.1 augustss * are met:
16 1.1 augustss * 1. Redistributions of source code must retain the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer.
18 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
19 1.1 augustss * notice, this list of conditions and the following disclaimer in the
20 1.1 augustss * documentation and/or other materials provided with the distribution.
21 1.1 augustss * 3. All advertising materials mentioning features or use of this software
22 1.1 augustss * must display the following acknowledgement:
23 1.1 augustss * This product includes software developed by the NetBSD
24 1.1 augustss * Foundation, Inc. and its contributors.
25 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
26 1.1 augustss * contributors may be used to endorse or promote products derived
27 1.1 augustss * from this software without specific prior written permission.
28 1.1 augustss *
29 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
30 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
33 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
40 1.1 augustss */
41 1.1 augustss
42 1.1 augustss /*
43 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
44 1.1 augustss *
45 1.5 augustss * The EHCI 0.96 spec can be found at
46 1.3 augustss * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
47 1.7 augustss * and the USB 2.0 spec at
48 1.7 augustss * http://www.usb.org/developers/data/usb_20.zip
49 1.1 augustss *
50 1.1 augustss */
51 1.4 lukem
52 1.4 lukem #include <sys/cdefs.h>
53 1.18 augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.18 2001/11/21 12:28:23 augustss Exp $");
54 1.1 augustss
55 1.1 augustss #include <sys/param.h>
56 1.1 augustss #include <sys/systm.h>
57 1.1 augustss #include <sys/kernel.h>
58 1.1 augustss #include <sys/malloc.h>
59 1.1 augustss #include <sys/device.h>
60 1.1 augustss #include <sys/select.h>
61 1.1 augustss #include <sys/proc.h>
62 1.1 augustss #include <sys/queue.h>
63 1.1 augustss
64 1.1 augustss #include <machine/bus.h>
65 1.1 augustss #include <machine/endian.h>
66 1.1 augustss
67 1.1 augustss #include <dev/usb/usb.h>
68 1.1 augustss #include <dev/usb/usbdi.h>
69 1.1 augustss #include <dev/usb/usbdivar.h>
70 1.1 augustss #include <dev/usb/usb_mem.h>
71 1.1 augustss #include <dev/usb/usb_quirks.h>
72 1.1 augustss
73 1.1 augustss #include <dev/usb/ehcireg.h>
74 1.1 augustss #include <dev/usb/ehcivar.h>
75 1.1 augustss
76 1.1 augustss #ifdef EHCI_DEBUG
77 1.1 augustss #define DPRINTF(x) if (ehcidebug) printf x
78 1.1 augustss #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
79 1.6 augustss int ehcidebug = 0;
80 1.15 augustss #ifndef __NetBSD__
81 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
82 1.15 augustss #endif
83 1.1 augustss #else
84 1.1 augustss #define DPRINTF(x)
85 1.1 augustss #define DPRINTFN(n,x)
86 1.1 augustss #endif
87 1.1 augustss
88 1.5 augustss struct ehci_pipe {
89 1.5 augustss struct usbd_pipe pipe;
90 1.10 augustss ehci_soft_qh_t *sqh;
91 1.10 augustss union {
92 1.10 augustss ehci_soft_qtd_t *qtd;
93 1.10 augustss /* ehci_soft_itd_t *itd; */
94 1.10 augustss } tail;
95 1.10 augustss union {
96 1.10 augustss /* Control pipe */
97 1.10 augustss struct {
98 1.10 augustss usb_dma_t reqdma;
99 1.10 augustss u_int length;
100 1.10 augustss ehci_soft_qtd_t *setup, *data, *stat;
101 1.10 augustss } ctl;
102 1.10 augustss /* Interrupt pipe */
103 1.15 augustss /* XXX */
104 1.10 augustss /* Bulk pipe */
105 1.10 augustss struct {
106 1.10 augustss u_int length;
107 1.10 augustss int isread;
108 1.10 augustss } bulk;
109 1.10 augustss /* Iso pipe */
110 1.15 augustss /* XXX */
111 1.10 augustss } u;
112 1.5 augustss };
113 1.5 augustss
114 1.5 augustss Static void ehci_shutdown(void *);
115 1.5 augustss Static void ehci_power(int, void *);
116 1.5 augustss
117 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
118 1.5 augustss Static void ehci_poll(struct usbd_bus *);
119 1.5 augustss Static void ehci_softintr(void *);
120 1.11 augustss Static int ehci_intr1(ehci_softc_t *);
121 1.15 augustss Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
122 1.18 augustss Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
123 1.18 augustss Static void ehci_idone(struct ehci_xfer *);
124 1.15 augustss Static void ehci_timeout(void *);
125 1.15 augustss Static void ehci_timeout_task(void *);
126 1.5 augustss
127 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
128 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
129 1.5 augustss
130 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
131 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
132 1.5 augustss
133 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
134 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
135 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
136 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
137 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
138 1.5 augustss
139 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
140 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
141 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
142 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
143 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
144 1.5 augustss
145 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
146 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
147 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
148 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
149 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
150 1.5 augustss
151 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
152 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
153 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
154 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
155 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
156 1.5 augustss
157 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
158 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
159 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
160 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
161 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
162 1.5 augustss
163 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
164 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
165 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
166 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
167 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
168 1.5 augustss
169 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
170 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
171 1.5 augustss
172 1.5 augustss Static int ehci_str(usb_string_descriptor_t *, int, char *);
173 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
174 1.6 augustss Static void ehci_pcd_able(ehci_softc_t *, int);
175 1.6 augustss Static void ehci_pcd_enable(void *);
176 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
177 1.5 augustss
178 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
179 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
180 1.9 augustss
181 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
182 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
183 1.15 augustss Static usbd_status ehci_alloc_std_chain(struct ehci_pipe *,
184 1.15 augustss ehci_softc_t *, int, int, usbd_xfer_handle,
185 1.15 augustss ehci_soft_qtd_t **, ehci_soft_qtd_t **);
186 1.18 augustss Static void ehci_free_std_chain(ehci_softc_t *, ehci_soft_qtd_t *,
187 1.18 augustss ehci_soft_qtd_t *);
188 1.15 augustss
189 1.15 augustss Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
190 1.9 augustss
191 1.10 augustss Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
192 1.10 augustss Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
193 1.10 augustss ehci_soft_qh_t *);
194 1.11 augustss Static void ehci_sync_hc(ehci_softc_t *);
195 1.10 augustss
196 1.10 augustss Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
197 1.10 augustss Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
198 1.9 augustss
199 1.5 augustss #ifdef EHCI_DEBUG
200 1.18 augustss Static void ehci_dump_regs(ehci_softc_t *);
201 1.6 augustss Static void ehci_dump(void);
202 1.6 augustss Static ehci_softc_t *theehci;
203 1.15 augustss Static void ehci_dump_link(ehci_link_t, int);
204 1.15 augustss Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
205 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
206 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
207 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
208 1.18 augustss Static void ehci_dump_exfer(struct ehci_xfer *);
209 1.5 augustss #endif
210 1.5 augustss
211 1.15 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
212 1.15 augustss
213 1.11 augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
214 1.11 augustss
215 1.5 augustss #define EHCI_INTR_ENDPT 1
216 1.5 augustss
217 1.18 augustss #define ehci_add_intr_list(sc, ex) \
218 1.18 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
219 1.18 augustss #define ehci_del_intr_list(ex) \
220 1.18 augustss LIST_REMOVE((ex), inext)
221 1.18 augustss
222 1.5 augustss Static struct usbd_bus_methods ehci_bus_methods = {
223 1.5 augustss ehci_open,
224 1.5 augustss ehci_softintr,
225 1.5 augustss ehci_poll,
226 1.5 augustss ehci_allocm,
227 1.5 augustss ehci_freem,
228 1.5 augustss ehci_allocx,
229 1.5 augustss ehci_freex,
230 1.5 augustss };
231 1.5 augustss
232 1.5 augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
233 1.5 augustss ehci_root_ctrl_transfer,
234 1.5 augustss ehci_root_ctrl_start,
235 1.5 augustss ehci_root_ctrl_abort,
236 1.5 augustss ehci_root_ctrl_close,
237 1.5 augustss ehci_noop,
238 1.5 augustss ehci_root_ctrl_done,
239 1.5 augustss };
240 1.5 augustss
241 1.5 augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
242 1.5 augustss ehci_root_intr_transfer,
243 1.5 augustss ehci_root_intr_start,
244 1.5 augustss ehci_root_intr_abort,
245 1.5 augustss ehci_root_intr_close,
246 1.5 augustss ehci_noop,
247 1.5 augustss ehci_root_intr_done,
248 1.5 augustss };
249 1.5 augustss
250 1.5 augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
251 1.5 augustss ehci_device_ctrl_transfer,
252 1.5 augustss ehci_device_ctrl_start,
253 1.5 augustss ehci_device_ctrl_abort,
254 1.5 augustss ehci_device_ctrl_close,
255 1.5 augustss ehci_noop,
256 1.5 augustss ehci_device_ctrl_done,
257 1.5 augustss };
258 1.5 augustss
259 1.5 augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
260 1.5 augustss ehci_device_intr_transfer,
261 1.5 augustss ehci_device_intr_start,
262 1.5 augustss ehci_device_intr_abort,
263 1.5 augustss ehci_device_intr_close,
264 1.5 augustss ehci_device_clear_toggle,
265 1.5 augustss ehci_device_intr_done,
266 1.5 augustss };
267 1.5 augustss
268 1.5 augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
269 1.5 augustss ehci_device_bulk_transfer,
270 1.5 augustss ehci_device_bulk_start,
271 1.5 augustss ehci_device_bulk_abort,
272 1.5 augustss ehci_device_bulk_close,
273 1.5 augustss ehci_device_clear_toggle,
274 1.5 augustss ehci_device_bulk_done,
275 1.5 augustss };
276 1.5 augustss
277 1.5 augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
278 1.5 augustss ehci_device_isoc_transfer,
279 1.5 augustss ehci_device_isoc_start,
280 1.5 augustss ehci_device_isoc_abort,
281 1.5 augustss ehci_device_isoc_close,
282 1.5 augustss ehci_noop,
283 1.5 augustss ehci_device_isoc_done,
284 1.5 augustss };
285 1.5 augustss
286 1.1 augustss usbd_status
287 1.1 augustss ehci_init(ehci_softc_t *sc)
288 1.1 augustss {
289 1.3 augustss u_int32_t version, sparams, cparams, hcr;
290 1.3 augustss u_int i;
291 1.3 augustss usbd_status err;
292 1.11 augustss ehci_soft_qh_t *sqh;
293 1.3 augustss
294 1.3 augustss DPRINTF(("ehci_init: start\n"));
295 1.6 augustss #ifdef EHCI_DEBUG
296 1.6 augustss theehci = sc;
297 1.6 augustss #endif
298 1.3 augustss
299 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
300 1.3 augustss
301 1.3 augustss version = EREAD2(sc, EHCI_HCIVERSION);
302 1.3 augustss printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
303 1.3 augustss version >> 8, version & 0xff);
304 1.3 augustss
305 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
306 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
307 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
308 1.3 augustss if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
309 1.3 augustss printf("%s: wrong number of companions (%d != %d)\n",
310 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
311 1.3 augustss EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
312 1.3 augustss return (USBD_IOERROR);
313 1.3 augustss }
314 1.3 augustss if (sc->sc_ncomp > 0) {
315 1.3 augustss printf("%s: companion controller%s, %d port%s each:",
316 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
317 1.3 augustss EHCI_HCS_N_PCC(sparams),
318 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
319 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
320 1.3 augustss printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
321 1.3 augustss printf("\n");
322 1.3 augustss }
323 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
324 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
325 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
326 1.3 augustss
327 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
328 1.3 augustss
329 1.3 augustss /* Reset the controller */
330 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
331 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
332 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
333 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
334 1.3 augustss for (i = 0; i < 100; i++) {
335 1.3 augustss delay(10);
336 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
337 1.3 augustss if (!hcr)
338 1.3 augustss break;
339 1.3 augustss }
340 1.3 augustss if (hcr) {
341 1.3 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
342 1.3 augustss return (USBD_IOERROR);
343 1.3 augustss }
344 1.3 augustss
345 1.3 augustss /* frame list size at default, read back what we got and use that */
346 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
347 1.3 augustss case 0: sc->sc_flsize = 1024*4; break;
348 1.3 augustss case 1: sc->sc_flsize = 512*4; break;
349 1.3 augustss case 2: sc->sc_flsize = 256*4; break;
350 1.3 augustss case 3: return (USBD_IOERROR);
351 1.3 augustss }
352 1.3 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
353 1.3 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
354 1.3 augustss if (err)
355 1.3 augustss return (err);
356 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
357 1.3 augustss
358 1.5 augustss /* Set up the bus struct. */
359 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
360 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
361 1.5 augustss
362 1.5 augustss sc->sc_powerhook = powerhook_establish(ehci_power, sc);
363 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
364 1.5 augustss
365 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
366 1.6 augustss
367 1.11 augustss /* Allocate dummy QH that starts the async list. */
368 1.11 augustss sqh = ehci_alloc_sqh(sc);
369 1.11 augustss if (sqh == NULL) {
370 1.9 augustss err = USBD_NOMEM;
371 1.9 augustss goto bad1;
372 1.9 augustss }
373 1.11 augustss /* Fill the QH */
374 1.11 augustss sqh->qh.qh_endp =
375 1.11 augustss htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
376 1.11 augustss sqh->qh.qh_link =
377 1.11 augustss htole32(sqh->physaddr | EHCI_LINK_QH);
378 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
379 1.11 augustss sqh->next = NULL;
380 1.11 augustss /* Fill the overlay qTD */
381 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
382 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
383 1.11 augustss sqh->qh.qh_qtd.qtd_status =
384 1.9 augustss htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
385 1.11 augustss sqh->sqtd = NULL;
386 1.9 augustss #ifdef EHCI_DEBUG
387 1.9 augustss if (ehcidebug) {
388 1.11 augustss ehci_dump_sqh(sc->sc_async_head);
389 1.9 augustss }
390 1.9 augustss #endif
391 1.9 augustss
392 1.9 augustss /* Point to async list */
393 1.11 augustss sc->sc_async_head = sqh;
394 1.11 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
395 1.9 augustss
396 1.9 augustss usb_callout_init(sc->sc_tmo_pcd);
397 1.9 augustss
398 1.10 augustss lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
399 1.10 augustss
400 1.6 augustss /* Enable interrupts */
401 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
402 1.6 augustss
403 1.6 augustss /* Turn on controller */
404 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
405 1.6 augustss EHCI_CMD_ITC_8 | /* 8 microframes */
406 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
407 1.10 augustss EHCI_CMD_ASE |
408 1.6 augustss /* EHCI_CMD_PSE | */
409 1.6 augustss EHCI_CMD_RS);
410 1.6 augustss
411 1.6 augustss /* Take over port ownership */
412 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
413 1.6 augustss
414 1.8 augustss for (i = 0; i < 100; i++) {
415 1.8 augustss delay(10);
416 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
417 1.8 augustss if (!hcr)
418 1.8 augustss break;
419 1.8 augustss }
420 1.8 augustss if (hcr) {
421 1.8 augustss printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
422 1.8 augustss return (USBD_IOERROR);
423 1.8 augustss }
424 1.8 augustss
425 1.5 augustss return (USBD_NORMAL_COMPLETION);
426 1.9 augustss
427 1.9 augustss #if 0
428 1.11 augustss bad2:
429 1.15 augustss ehci_free_sqh(sc, sc->sc_async_head);
430 1.9 augustss #endif
431 1.9 augustss bad1:
432 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
433 1.9 augustss return (err);
434 1.1 augustss }
435 1.1 augustss
436 1.1 augustss int
437 1.1 augustss ehci_intr(void *v)
438 1.1 augustss {
439 1.6 augustss ehci_softc_t *sc = v;
440 1.6 augustss
441 1.17 augustss if (sc == NULL || sc->sc_dying)
442 1.15 augustss return (0);
443 1.15 augustss
444 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
445 1.6 augustss if (sc->sc_bus.use_polling) {
446 1.6 augustss #ifdef DIAGNOSTIC
447 1.6 augustss printf("ehci_intr: ignored interrupt while polling\n");
448 1.6 augustss #endif
449 1.6 augustss return (0);
450 1.6 augustss }
451 1.6 augustss
452 1.6 augustss return (ehci_intr1(sc));
453 1.6 augustss }
454 1.6 augustss
455 1.6 augustss Static int
456 1.6 augustss ehci_intr1(ehci_softc_t *sc)
457 1.6 augustss {
458 1.6 augustss u_int32_t intrs, eintrs;
459 1.6 augustss
460 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
461 1.6 augustss
462 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
463 1.6 augustss if (sc == NULL) {
464 1.6 augustss #ifdef DIAGNOSTIC
465 1.6 augustss printf("ehci_intr: sc == NULL\n");
466 1.6 augustss #endif
467 1.6 augustss return (0);
468 1.6 augustss }
469 1.6 augustss
470 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
471 1.6 augustss
472 1.6 augustss if (!intrs)
473 1.6 augustss return (0);
474 1.6 augustss
475 1.6 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
476 1.6 augustss eintrs = intrs & sc->sc_eintrs;
477 1.6 augustss DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
478 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
479 1.6 augustss (u_int)eintrs));
480 1.6 augustss if (!eintrs)
481 1.6 augustss return (0);
482 1.6 augustss
483 1.6 augustss sc->sc_bus.intr_context++;
484 1.6 augustss sc->sc_bus.no_intrs++;
485 1.10 augustss if (eintrs & EHCI_STS_IAA) {
486 1.10 augustss DPRINTF(("ehci_intr1: door bell\n"));
487 1.11 augustss wakeup(&sc->sc_async_head);
488 1.10 augustss eintrs &= ~EHCI_STS_INT;
489 1.10 augustss }
490 1.18 augustss if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
491 1.18 augustss DPRINTF(("ehci_intr1: INT/ERRINT\n"));
492 1.18 augustss usb_schedsoftintr(&sc->sc_bus);
493 1.18 augustss eintrs &= ~(EHCI_STS_INT | EHCI_STS_HSE);
494 1.6 augustss }
495 1.6 augustss if (eintrs & EHCI_STS_HSE) {
496 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
497 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
498 1.6 augustss /* XXX what else */
499 1.6 augustss }
500 1.6 augustss if (eintrs & EHCI_STS_PCD) {
501 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
502 1.6 augustss /*
503 1.6 augustss * Disable PCD interrupt for now, because it will be
504 1.6 augustss * on until the port has been reset.
505 1.6 augustss */
506 1.6 augustss ehci_pcd_able(sc, 0);
507 1.6 augustss /* Do not allow RHSC interrupts > 1 per second */
508 1.6 augustss usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
509 1.6 augustss eintrs &= ~EHCI_STS_PCD;
510 1.6 augustss }
511 1.6 augustss
512 1.6 augustss sc->sc_bus.intr_context--;
513 1.6 augustss
514 1.6 augustss if (eintrs != 0) {
515 1.6 augustss /* Block unprocessed interrupts. */
516 1.6 augustss sc->sc_eintrs &= ~eintrs;
517 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
518 1.6 augustss printf("%s: blocking intrs 0x%x\n",
519 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
520 1.6 augustss }
521 1.6 augustss
522 1.6 augustss return (1);
523 1.6 augustss }
524 1.6 augustss
525 1.6 augustss void
526 1.6 augustss ehci_pcd_able(ehci_softc_t *sc, int on)
527 1.6 augustss {
528 1.6 augustss DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
529 1.6 augustss if (on)
530 1.6 augustss sc->sc_eintrs |= EHCI_STS_PCD;
531 1.6 augustss else
532 1.6 augustss sc->sc_eintrs &= ~EHCI_STS_PCD;
533 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
534 1.6 augustss }
535 1.6 augustss
536 1.6 augustss void
537 1.6 augustss ehci_pcd_enable(void *v_sc)
538 1.6 augustss {
539 1.6 augustss ehci_softc_t *sc = v_sc;
540 1.6 augustss
541 1.6 augustss ehci_pcd_able(sc, 1);
542 1.6 augustss }
543 1.6 augustss
544 1.6 augustss void
545 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
546 1.6 augustss {
547 1.6 augustss usbd_pipe_handle pipe;
548 1.15 augustss struct ehci_pipe *epipe;
549 1.6 augustss u_char *p;
550 1.6 augustss int i, m;
551 1.6 augustss
552 1.6 augustss if (xfer == NULL) {
553 1.6 augustss /* Just ignore the change. */
554 1.6 augustss return;
555 1.6 augustss }
556 1.6 augustss
557 1.6 augustss pipe = xfer->pipe;
558 1.15 augustss epipe = (struct ehci_pipe *)pipe;
559 1.6 augustss
560 1.6 augustss p = KERNADDR(&xfer->dmabuf);
561 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
562 1.6 augustss memset(p, 0, xfer->length);
563 1.6 augustss for (i = 1; i <= m; i++) {
564 1.6 augustss /* Pick out CHANGE bits from the status reg. */
565 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
566 1.6 augustss p[i/8] |= 1 << (i%8);
567 1.6 augustss }
568 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
569 1.6 augustss xfer->actlen = xfer->length;
570 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
571 1.6 augustss
572 1.6 augustss usb_transfer_complete(xfer);
573 1.1 augustss }
574 1.1 augustss
575 1.5 augustss void
576 1.5 augustss ehci_softintr(void *v)
577 1.5 augustss {
578 1.18 augustss ehci_softc_t *sc = v;
579 1.18 augustss struct ehci_xfer *ex;
580 1.18 augustss
581 1.18 augustss DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
582 1.18 augustss sc->sc_bus.intr_context));
583 1.18 augustss
584 1.18 augustss sc->sc_bus.intr_context++;
585 1.18 augustss
586 1.18 augustss /*
587 1.18 augustss * The only explanation I can think of for why EHCI is as brain dead
588 1.18 augustss * as UHCI interrupt-wise is that Intel was involved in both.
589 1.18 augustss * An interrupt just tells us that something is done, we have no
590 1.18 augustss * clue what, so we need to scan through all active transfers. :-(
591 1.18 augustss */
592 1.18 augustss for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext))
593 1.18 augustss ehci_check_intr(sc, ex);
594 1.18 augustss
595 1.18 augustss sc->sc_bus.intr_context--;
596 1.18 augustss }
597 1.18 augustss
598 1.18 augustss /* Check for an interrupt. */
599 1.18 augustss void
600 1.18 augustss ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
601 1.18 augustss {
602 1.18 augustss ehci_soft_qtd_t *sqtd, *lsqtd;
603 1.18 augustss u_int32_t status;
604 1.18 augustss
605 1.18 augustss DPRINTFN(15, ("ehci_check_intr: ex=%p\n", ex));
606 1.18 augustss
607 1.18 augustss if (ex->sqtdstart == NULL) {
608 1.18 augustss printf("ehci_check_intr: sqtdstart=NULL\n");
609 1.18 augustss return;
610 1.18 augustss }
611 1.18 augustss lsqtd = ex->sqtdend;
612 1.18 augustss #ifdef DIAGNOSTIC
613 1.18 augustss if (lsqtd == NULL) {
614 1.18 augustss printf("ehci_check_intr: sqtd==0\n");
615 1.18 augustss return;
616 1.18 augustss }
617 1.18 augustss #endif
618 1.18 augustss /*
619 1.18 augustss * If the last TD is still active we need to check whether there
620 1.18 augustss * is a an error somewhere in the middle, or whether there was a
621 1.18 augustss * short packet (SPD and not ACTIVE).
622 1.18 augustss */
623 1.18 augustss if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
624 1.18 augustss DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
625 1.18 augustss for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
626 1.18 augustss status = le32toh(sqtd->qtd.qtd_status);
627 1.18 augustss /* If there's an active QTD the xfer isn't done. */
628 1.18 augustss if (status & EHCI_QTD_ACTIVE)
629 1.18 augustss break;
630 1.18 augustss /* Any kind of error makes the xfer done. */
631 1.18 augustss if (status & EHCI_QTD_HALTED)
632 1.18 augustss goto done;
633 1.18 augustss /* We want short packets, and it is short: it's done */
634 1.18 augustss if (EHCI_QTD_SET_BYTES(status) != 0)
635 1.18 augustss goto done;
636 1.18 augustss }
637 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
638 1.18 augustss ex, ex->sqtdstart));
639 1.18 augustss return;
640 1.18 augustss }
641 1.18 augustss done:
642 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
643 1.18 augustss usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
644 1.18 augustss ehci_idone(ex);
645 1.18 augustss }
646 1.18 augustss
647 1.18 augustss void
648 1.18 augustss ehci_idone(struct ehci_xfer *ex)
649 1.18 augustss {
650 1.18 augustss usbd_xfer_handle xfer = &ex->xfer;
651 1.18 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
652 1.18 augustss ehci_soft_qtd_t *sqtd;
653 1.18 augustss u_int32_t status = 0, nstatus;
654 1.18 augustss int actlen;
655 1.18 augustss
656 1.18 augustss DPRINTFN(12, ("ehci_idone: ex=%p\n", ex));
657 1.18 augustss #ifdef DIAGNOSTIC
658 1.18 augustss {
659 1.18 augustss int s = splhigh();
660 1.18 augustss if (ex->isdone) {
661 1.18 augustss splx(s);
662 1.18 augustss #ifdef EHCI_DEBUG
663 1.18 augustss printf("ehci_idone: ex is done!\n ");
664 1.18 augustss ehci_dump_exfer(ex);
665 1.18 augustss #else
666 1.18 augustss printf("ehci_idone: ex=%p is done!\n", ex);
667 1.18 augustss #endif
668 1.18 augustss return;
669 1.18 augustss }
670 1.18 augustss ex->isdone = 1;
671 1.18 augustss splx(s);
672 1.18 augustss }
673 1.18 augustss #endif
674 1.18 augustss
675 1.18 augustss if (xfer->status == USBD_CANCELLED ||
676 1.18 augustss xfer->status == USBD_TIMEOUT) {
677 1.18 augustss DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
678 1.18 augustss return;
679 1.18 augustss }
680 1.18 augustss
681 1.18 augustss #ifdef EHCI_DEBUG
682 1.18 augustss DPRINTFN(10, ("ehci_idone: ex=%p, xfer=%p, pipe=%p ready\n",
683 1.18 augustss ex, xfer, epipe));
684 1.18 augustss if (ehcidebug > 10)
685 1.18 augustss ehci_dump_sqtds(ex->sqtdstart);
686 1.18 augustss #endif
687 1.18 augustss
688 1.18 augustss /* The transfer is done, compute actual length and status. */
689 1.18 augustss actlen = 0;
690 1.18 augustss for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
691 1.18 augustss nstatus = le32toh(sqtd->qtd.qtd_status);
692 1.18 augustss if (nstatus & EHCI_QTD_ACTIVE)
693 1.18 augustss break;
694 1.18 augustss
695 1.18 augustss status = nstatus;
696 1.18 augustss if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
697 1.18 augustss actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
698 1.18 augustss }
699 1.18 augustss #if 0
700 1.18 augustss /* If there are left over TDs we need to update the toggle. */
701 1.18 augustss if (sqtd != NULL)
702 1.18 augustss epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
703 1.18 augustss #endif
704 1.18 augustss
705 1.18 augustss status &= EHCI_QTD_STATERRS;
706 1.18 augustss DPRINTFN(10, ("ehci_idone: actlen=%d, status=0x%x\n", actlen, status));
707 1.18 augustss xfer->actlen = actlen;
708 1.18 augustss if (status != 0) {
709 1.18 augustss #ifdef EHCI_DEBUG
710 1.18 augustss char sbuf[128];
711 1.18 augustss
712 1.18 augustss bitmask_snprintf((u_int32_t)status,
713 1.18 augustss "\20\2MISSEDMICRO\3XACT\4BABBLE\5BABBLE"
714 1.18 augustss "\6HALTED",
715 1.18 augustss sbuf, sizeof(sbuf));
716 1.18 augustss
717 1.18 augustss DPRINTFN((status == EHCI_QTD_HALTED)*10,
718 1.18 augustss ("ehci_idone: error, addr=%d, endpt=0x%02x, "
719 1.18 augustss "status 0x%s\n",
720 1.18 augustss xfer->pipe->device->address,
721 1.18 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
722 1.18 augustss sbuf));
723 1.18 augustss #endif
724 1.18 augustss
725 1.18 augustss if (status == EHCI_QTD_HALTED)
726 1.18 augustss xfer->status = USBD_STALLED;
727 1.18 augustss else
728 1.18 augustss xfer->status = USBD_IOERROR; /* more info XXX */
729 1.18 augustss } else {
730 1.18 augustss xfer->status = USBD_NORMAL_COMPLETION;
731 1.18 augustss }
732 1.18 augustss
733 1.18 augustss usb_transfer_complete(xfer);
734 1.18 augustss DPRINTFN(12, ("ehci_idone: ex=%p done\n", ex));
735 1.5 augustss }
736 1.5 augustss
737 1.15 augustss /*
738 1.15 augustss * Wait here until controller claims to have an interrupt.
739 1.18 augustss * Then call ehci_intr and return. Use timeout to avoid waiting
740 1.15 augustss * too long.
741 1.15 augustss */
742 1.15 augustss void
743 1.15 augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
744 1.15 augustss {
745 1.15 augustss int timo = xfer->timeout;
746 1.15 augustss int usecs;
747 1.15 augustss u_int32_t intrs;
748 1.15 augustss
749 1.15 augustss xfer->status = USBD_IN_PROGRESS;
750 1.15 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
751 1.15 augustss usb_delay_ms(&sc->sc_bus, 1);
752 1.17 augustss if (sc->sc_dying)
753 1.17 augustss break;
754 1.15 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
755 1.15 augustss sc->sc_eintrs;
756 1.15 augustss DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
757 1.15 augustss #ifdef OHCI_DEBUG
758 1.15 augustss if (ehcidebug > 15)
759 1.18 augustss ehci_dump_regs(sc);
760 1.15 augustss #endif
761 1.15 augustss if (intrs) {
762 1.15 augustss ehci_intr1(sc);
763 1.15 augustss if (xfer->status != USBD_IN_PROGRESS)
764 1.15 augustss return;
765 1.15 augustss }
766 1.15 augustss }
767 1.15 augustss
768 1.15 augustss /* Timeout */
769 1.15 augustss DPRINTF(("ehci_waitintr: timeout\n"));
770 1.15 augustss xfer->status = USBD_TIMEOUT;
771 1.15 augustss usb_transfer_complete(xfer);
772 1.15 augustss /* XXX should free TD */
773 1.15 augustss }
774 1.15 augustss
775 1.5 augustss void
776 1.5 augustss ehci_poll(struct usbd_bus *bus)
777 1.5 augustss {
778 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
779 1.5 augustss #ifdef EHCI_DEBUG
780 1.5 augustss static int last;
781 1.5 augustss int new;
782 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
783 1.5 augustss if (new != last) {
784 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
785 1.5 augustss last = new;
786 1.5 augustss }
787 1.5 augustss #endif
788 1.5 augustss
789 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
790 1.5 augustss ehci_intr1(sc);
791 1.5 augustss }
792 1.5 augustss
793 1.1 augustss int
794 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
795 1.1 augustss {
796 1.1 augustss int rv = 0;
797 1.1 augustss
798 1.1 augustss if (sc->sc_child != NULL)
799 1.1 augustss rv = config_detach(sc->sc_child, flags);
800 1.1 augustss
801 1.1 augustss if (rv != 0)
802 1.1 augustss return (rv);
803 1.1 augustss
804 1.6 augustss usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
805 1.6 augustss
806 1.1 augustss if (sc->sc_powerhook != NULL)
807 1.1 augustss powerhook_disestablish(sc->sc_powerhook);
808 1.1 augustss if (sc->sc_shutdownhook != NULL)
809 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
810 1.1 augustss
811 1.17 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
812 1.15 augustss
813 1.1 augustss /* XXX free other data structures XXX */
814 1.1 augustss
815 1.1 augustss return (rv);
816 1.1 augustss }
817 1.1 augustss
818 1.1 augustss
819 1.1 augustss int
820 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
821 1.1 augustss {
822 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
823 1.1 augustss int rv = 0;
824 1.1 augustss
825 1.1 augustss switch (act) {
826 1.1 augustss case DVACT_ACTIVATE:
827 1.1 augustss return (EOPNOTSUPP);
828 1.1 augustss break;
829 1.1 augustss
830 1.1 augustss case DVACT_DEACTIVATE:
831 1.1 augustss if (sc->sc_child != NULL)
832 1.1 augustss rv = config_deactivate(sc->sc_child);
833 1.5 augustss sc->sc_dying = 1;
834 1.1 augustss break;
835 1.1 augustss }
836 1.1 augustss return (rv);
837 1.1 augustss }
838 1.1 augustss
839 1.5 augustss /*
840 1.5 augustss * Handle suspend/resume.
841 1.5 augustss *
842 1.5 augustss * We need to switch to polling mode here, because this routine is
843 1.5 augustss * called from an intterupt context. This is all right since we
844 1.5 augustss * are almost suspended anyway.
845 1.5 augustss */
846 1.5 augustss void
847 1.5 augustss ehci_power(int why, void *v)
848 1.5 augustss {
849 1.5 augustss ehci_softc_t *sc = v;
850 1.5 augustss //u_int32_t ctl;
851 1.5 augustss int s;
852 1.5 augustss
853 1.5 augustss #ifdef EHCI_DEBUG
854 1.5 augustss DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
855 1.18 augustss ehci_dump_regs(sc);
856 1.5 augustss #endif
857 1.5 augustss
858 1.5 augustss s = splhardusb();
859 1.5 augustss switch (why) {
860 1.5 augustss case PWR_SUSPEND:
861 1.5 augustss case PWR_STANDBY:
862 1.5 augustss sc->sc_bus.use_polling++;
863 1.5 augustss #if 0
864 1.5 augustss OOO
865 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
866 1.5 augustss if (sc->sc_control == 0) {
867 1.5 augustss /*
868 1.5 augustss * Preserve register values, in case that APM BIOS
869 1.5 augustss * does not recover them.
870 1.5 augustss */
871 1.5 augustss sc->sc_control = ctl;
872 1.5 augustss sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
873 1.5 augustss }
874 1.5 augustss ctl |= EHCI_HCFS_SUSPEND;
875 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
876 1.5 augustss #endif
877 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
878 1.5 augustss sc->sc_bus.use_polling--;
879 1.5 augustss break;
880 1.5 augustss case PWR_RESUME:
881 1.5 augustss sc->sc_bus.use_polling++;
882 1.5 augustss #if 0
883 1.5 augustss OOO
884 1.5 augustss /* Some broken BIOSes do not recover these values */
885 1.5 augustss OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
886 1.5 augustss OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
887 1.5 augustss OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
888 1.5 augustss if (sc->sc_intre)
889 1.5 augustss OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
890 1.5 augustss sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
891 1.5 augustss if (sc->sc_control)
892 1.5 augustss ctl = sc->sc_control;
893 1.5 augustss else
894 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL);
895 1.5 augustss ctl |= EHCI_HCFS_RESUME;
896 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
897 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
898 1.5 augustss ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
899 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
900 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
901 1.5 augustss sc->sc_control = sc->sc_intre = 0;
902 1.5 augustss #endif
903 1.5 augustss sc->sc_bus.use_polling--;
904 1.5 augustss break;
905 1.5 augustss case PWR_SOFTSUSPEND:
906 1.5 augustss case PWR_SOFTSTANDBY:
907 1.5 augustss case PWR_SOFTRESUME:
908 1.5 augustss break;
909 1.5 augustss }
910 1.5 augustss splx(s);
911 1.5 augustss }
912 1.5 augustss
913 1.5 augustss /*
914 1.5 augustss * Shut down the controller when the system is going down.
915 1.5 augustss */
916 1.5 augustss void
917 1.5 augustss ehci_shutdown(void *v)
918 1.5 augustss {
919 1.8 augustss ehci_softc_t *sc = v;
920 1.5 augustss
921 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
922 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
923 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
924 1.5 augustss }
925 1.5 augustss
926 1.5 augustss usbd_status
927 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
928 1.5 augustss {
929 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
930 1.5 augustss
931 1.5 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
932 1.5 augustss }
933 1.5 augustss
934 1.5 augustss void
935 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
936 1.5 augustss {
937 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
938 1.5 augustss
939 1.5 augustss usb_freemem(&sc->sc_bus, dma);
940 1.5 augustss }
941 1.5 augustss
942 1.5 augustss usbd_xfer_handle
943 1.5 augustss ehci_allocx(struct usbd_bus *bus)
944 1.5 augustss {
945 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
946 1.5 augustss usbd_xfer_handle xfer;
947 1.5 augustss
948 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
949 1.5 augustss if (xfer != NULL)
950 1.5 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
951 1.5 augustss else
952 1.15 augustss xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
953 1.18 augustss if (xfer != NULL) {
954 1.15 augustss memset(xfer, 0, sizeof (struct ehci_xfer));
955 1.18 augustss #ifdef DIAGNOSTIC
956 1.18 augustss EXFER(xfer)->isdone = 1;
957 1.18 augustss xfer->busy_free = XFER_BUSY;
958 1.18 augustss #endif
959 1.18 augustss }
960 1.5 augustss return (xfer);
961 1.5 augustss }
962 1.5 augustss
963 1.5 augustss void
964 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
965 1.5 augustss {
966 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
967 1.5 augustss
968 1.18 augustss #ifdef DIAGNOSTIC
969 1.18 augustss if (xfer->busy_free != XFER_BUSY) {
970 1.18 augustss printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
971 1.18 augustss xfer->busy_free);
972 1.18 augustss return;
973 1.18 augustss }
974 1.18 augustss xfer->busy_free = XFER_FREE;
975 1.18 augustss if (!EXFER(xfer)->isdone) {
976 1.18 augustss printf("ehci_freex: !isdone\n");
977 1.18 augustss return;
978 1.18 augustss }
979 1.18 augustss #endif
980 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
981 1.5 augustss }
982 1.5 augustss
983 1.5 augustss Static void
984 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
985 1.5 augustss {
986 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
987 1.15 augustss
988 1.15 augustss printf("ehci_device_clear_toggle: epipe=%p\n", epipe);
989 1.5 augustss #if 0
990 1.5 augustss OOO
991 1.5 augustss epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
992 1.5 augustss #endif
993 1.5 augustss }
994 1.5 augustss
995 1.5 augustss Static void
996 1.5 augustss ehci_noop(usbd_pipe_handle pipe)
997 1.5 augustss {
998 1.5 augustss }
999 1.5 augustss
1000 1.5 augustss #ifdef EHCI_DEBUG
1001 1.5 augustss void
1002 1.18 augustss ehci_dump_regs(ehci_softc_t *sc)
1003 1.5 augustss {
1004 1.6 augustss int i;
1005 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1006 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
1007 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
1008 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
1009 1.15 augustss printf("frindex=0x08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1010 1.15 augustss EOREAD4(sc, EHCI_FRINDEX),
1011 1.15 augustss EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1012 1.15 augustss EOREAD4(sc, EHCI_PERIODICLISTBASE),
1013 1.15 augustss EOREAD4(sc, EHCI_ASYNCLISTADDR));
1014 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
1015 1.6 augustss printf("port %d status=0x%08x\n", i,
1016 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
1017 1.6 augustss }
1018 1.6 augustss
1019 1.6 augustss void
1020 1.6 augustss ehci_dump()
1021 1.6 augustss {
1022 1.18 augustss ehci_dump_regs(theehci);
1023 1.5 augustss }
1024 1.9 augustss
1025 1.9 augustss void
1026 1.15 augustss ehci_dump_link(ehci_link_t link, int type)
1027 1.9 augustss {
1028 1.15 augustss link = le32toh(link);
1029 1.15 augustss printf("0x%08x", link);
1030 1.9 augustss if (link & EHCI_LINK_TERMINATE)
1031 1.15 augustss printf("<T>");
1032 1.15 augustss else {
1033 1.15 augustss printf("<");
1034 1.15 augustss if (type) {
1035 1.15 augustss switch (EHCI_LINK_TYPE(link)) {
1036 1.15 augustss case EHCI_LINK_ITD: printf("ITD"); break;
1037 1.15 augustss case EHCI_LINK_QH: printf("QH"); break;
1038 1.15 augustss case EHCI_LINK_SITD: printf("SITD"); break;
1039 1.15 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
1040 1.16 augustss }
1041 1.15 augustss }
1042 1.9 augustss printf(">");
1043 1.15 augustss }
1044 1.15 augustss }
1045 1.15 augustss
1046 1.15 augustss void
1047 1.15 augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1048 1.15 augustss {
1049 1.15 augustss for (; sqtd; sqtd = sqtd->nextqtd)
1050 1.15 augustss ehci_dump_sqtd(sqtd);
1051 1.9 augustss }
1052 1.9 augustss
1053 1.9 augustss void
1054 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1055 1.9 augustss {
1056 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1057 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
1058 1.9 augustss }
1059 1.9 augustss
1060 1.9 augustss void
1061 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
1062 1.9 augustss {
1063 1.9 augustss u_int32_t s;
1064 1.15 augustss char sbuf[128];
1065 1.9 augustss
1066 1.15 augustss printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1067 1.15 augustss printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1068 1.9 augustss printf("\n");
1069 1.15 augustss s = le32toh(qtd->qtd_status);
1070 1.15 augustss bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1071 1.15 augustss "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1072 1.15 augustss "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1073 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1074 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1075 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1076 1.15 augustss printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1077 1.15 augustss EHCI_QTD_GET_PID(s), sbuf);
1078 1.9 augustss for (s = 0; s < 5; s++)
1079 1.15 augustss printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1080 1.9 augustss }
1081 1.9 augustss
1082 1.9 augustss void
1083 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
1084 1.9 augustss {
1085 1.9 augustss ehci_qh_t *qh = &sqh->qh;
1086 1.15 augustss u_int32_t endp, endphub;
1087 1.9 augustss
1088 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1089 1.15 augustss printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1090 1.15 augustss endp = le32toh(qh->qh_endp);
1091 1.15 augustss printf(" endp=0x%08x\n", endp);
1092 1.15 augustss printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1093 1.15 augustss EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1094 1.15 augustss EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1095 1.15 augustss EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1096 1.15 augustss printf(" mpl=0x%x ctl=%d nrl=%d\n",
1097 1.15 augustss EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1098 1.15 augustss EHCI_QH_GET_NRL(endp));
1099 1.15 augustss endphub = le32toh(qh->qh_endphub);
1100 1.15 augustss printf(" endphub=0x%08x\n", endphub);
1101 1.15 augustss printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1102 1.15 augustss EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1103 1.15 augustss EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1104 1.15 augustss EHCI_QH_GET_MULT(endphub));
1105 1.15 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1106 1.12 augustss printf("Overlay qTD:\n");
1107 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
1108 1.9 augustss }
1109 1.9 augustss
1110 1.18 augustss Static void
1111 1.18 augustss ehci_dump_exfer(struct ehci_xfer *ex)
1112 1.18 augustss {
1113 1.18 augustss printf("ehci_dump_exfer: ex=%p\n", ex);
1114 1.18 augustss }
1115 1.5 augustss #endif
1116 1.5 augustss
1117 1.5 augustss usbd_status
1118 1.5 augustss ehci_open(usbd_pipe_handle pipe)
1119 1.5 augustss {
1120 1.5 augustss usbd_device_handle dev = pipe->device;
1121 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1122 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1123 1.5 augustss u_int8_t addr = dev->address;
1124 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1125 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1126 1.10 augustss ehci_soft_qh_t *sqh;
1127 1.10 augustss usbd_status err;
1128 1.10 augustss #if 0
1129 1.5 augustss ehci_soft_itd_t *sitd;
1130 1.5 augustss ehci_physaddr_t tdphys;
1131 1.5 augustss u_int32_t fmt;
1132 1.5 augustss int ival;
1133 1.5 augustss #endif
1134 1.10 augustss int s;
1135 1.10 augustss int speed, naks;
1136 1.5 augustss
1137 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1138 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1139 1.5 augustss
1140 1.17 augustss if (sc->sc_dying)
1141 1.17 augustss return (USBD_IOERROR);
1142 1.17 augustss
1143 1.5 augustss if (addr == sc->sc_addr) {
1144 1.5 augustss switch (ed->bEndpointAddress) {
1145 1.5 augustss case USB_CONTROL_ENDPOINT:
1146 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
1147 1.5 augustss break;
1148 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
1149 1.5 augustss pipe->methods = &ehci_root_intr_methods;
1150 1.5 augustss break;
1151 1.5 augustss default:
1152 1.5 augustss return (USBD_INVAL);
1153 1.5 augustss }
1154 1.10 augustss return (USBD_NORMAL_COMPLETION);
1155 1.10 augustss }
1156 1.10 augustss
1157 1.11 augustss switch (dev->speed) {
1158 1.11 augustss case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1159 1.11 augustss case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1160 1.11 augustss case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1161 1.11 augustss default: panic("ehci_open: bad device speed %d\n", dev->speed);
1162 1.11 augustss }
1163 1.10 augustss naks = 8; /* XXX */
1164 1.10 augustss sqh = ehci_alloc_sqh(sc);
1165 1.10 augustss if (sqh == NULL)
1166 1.10 augustss goto bad0;
1167 1.10 augustss /* qh_link filled when the QH is added */
1168 1.10 augustss sqh->qh.qh_endp = htole32(
1169 1.10 augustss EHCI_QH_SET_ADDR(addr) |
1170 1.10 augustss EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
1171 1.10 augustss EHCI_QH_SET_EPS(speed) | /* XXX */
1172 1.10 augustss /* XXX EHCI_QH_DTC ? */
1173 1.10 augustss EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1174 1.10 augustss (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1175 1.10 augustss EHCI_QH_CTL : 0) |
1176 1.10 augustss EHCI_QH_SET_NRL(naks)
1177 1.10 augustss );
1178 1.10 augustss sqh->qh.qh_endphub = htole32(
1179 1.10 augustss EHCI_QH_SET_MULT(1)
1180 1.11 augustss /* XXX TT stuff */
1181 1.11 augustss /* XXX interrupt mask */
1182 1.10 augustss );
1183 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
1184 1.11 augustss /* Fill the overlay qTD */
1185 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1186 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1187 1.15 augustss sqh->qh.qh_qtd.qtd_status = htole32(0);
1188 1.10 augustss
1189 1.10 augustss epipe->sqh = sqh;
1190 1.5 augustss
1191 1.10 augustss switch (xfertype) {
1192 1.10 augustss case UE_CONTROL:
1193 1.11 augustss err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1194 1.10 augustss 0, &epipe->u.ctl.reqdma);
1195 1.10 augustss if (err)
1196 1.11 augustss goto bad1;
1197 1.11 augustss pipe->methods = &ehci_device_ctrl_methods;
1198 1.10 augustss s = splusb();
1199 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1200 1.10 augustss splx(s);
1201 1.10 augustss break;
1202 1.10 augustss case UE_BULK:
1203 1.10 augustss pipe->methods = &ehci_device_bulk_methods;
1204 1.10 augustss s = splusb();
1205 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1206 1.10 augustss splx(s);
1207 1.10 augustss break;
1208 1.10 augustss default:
1209 1.10 augustss return (USBD_INVAL);
1210 1.5 augustss }
1211 1.5 augustss return (USBD_NORMAL_COMPLETION);
1212 1.5 augustss
1213 1.11 augustss bad1:
1214 1.11 augustss ehci_free_sqh(sc, sqh);
1215 1.5 augustss bad0:
1216 1.5 augustss return (USBD_NOMEM);
1217 1.10 augustss }
1218 1.10 augustss
1219 1.10 augustss /*
1220 1.10 augustss * Add an ED to the schedule. Called at splusb().
1221 1.10 augustss */
1222 1.10 augustss void
1223 1.10 augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1224 1.10 augustss {
1225 1.10 augustss SPLUSBCHECK;
1226 1.10 augustss
1227 1.10 augustss sqh->next = head->next;
1228 1.10 augustss sqh->qh.qh_link = head->qh.qh_link;
1229 1.10 augustss head->next = sqh;
1230 1.15 augustss head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1231 1.10 augustss
1232 1.10 augustss #ifdef EHCI_DEBUG
1233 1.10 augustss if (ehcidebug > 0) {
1234 1.10 augustss printf("ehci_add_qh:\n");
1235 1.10 augustss ehci_dump_sqh(sqh);
1236 1.10 augustss }
1237 1.5 augustss #endif
1238 1.5 augustss }
1239 1.5 augustss
1240 1.10 augustss /*
1241 1.10 augustss * Remove an ED from the schedule. Called at splusb().
1242 1.10 augustss */
1243 1.10 augustss void
1244 1.10 augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1245 1.10 augustss {
1246 1.10 augustss ehci_soft_qh_t *p;
1247 1.10 augustss
1248 1.10 augustss SPLUSBCHECK;
1249 1.10 augustss /* XXX */
1250 1.10 augustss for (p = head; p == NULL && p->next != sqh; p = p->next)
1251 1.10 augustss ;
1252 1.10 augustss if (p == NULL)
1253 1.10 augustss panic("ehci_rem_qh: ED not found\n");
1254 1.10 augustss p->next = sqh->next;
1255 1.10 augustss p->qh.qh_link = sqh->qh.qh_link;
1256 1.10 augustss
1257 1.11 augustss ehci_sync_hc(sc);
1258 1.11 augustss }
1259 1.11 augustss
1260 1.11 augustss /*
1261 1.11 augustss * Ensure that the HC has released all references to the QH. We do this
1262 1.11 augustss * by asking for a Async Advance Doorbell interrupt and then we wait for
1263 1.11 augustss * the interrupt.
1264 1.11 augustss * To make this easier we first obtain exclusive use of the doorbell.
1265 1.11 augustss */
1266 1.11 augustss void
1267 1.11 augustss ehci_sync_hc(ehci_softc_t *sc)
1268 1.11 augustss {
1269 1.15 augustss int s, error;
1270 1.11 augustss
1271 1.12 augustss if (sc->sc_dying) {
1272 1.12 augustss DPRINTFN(2,("ehci_sync_hc: dying\n"));
1273 1.12 augustss return;
1274 1.12 augustss }
1275 1.12 augustss DPRINTFN(2,("ehci_sync_hc: enter\n"));
1276 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1277 1.10 augustss s = splhardusb();
1278 1.10 augustss /* ask for doorbell */
1279 1.10 augustss EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1280 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1281 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1282 1.15 augustss error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1283 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1284 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1285 1.10 augustss splx(s);
1286 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1287 1.15 augustss #ifdef DIAGNOSTIC
1288 1.15 augustss if (error)
1289 1.15 augustss printf("ehci_sync_hc: tsleep() = %d\n", error);
1290 1.15 augustss #endif
1291 1.12 augustss DPRINTFN(2,("ehci_sync_hc: exit\n"));
1292 1.10 augustss }
1293 1.10 augustss
1294 1.5 augustss /***********/
1295 1.5 augustss
1296 1.5 augustss /*
1297 1.5 augustss * Data structures and routines to emulate the root hub.
1298 1.5 augustss */
1299 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
1300 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1301 1.5 augustss UDESC_DEVICE, /* type */
1302 1.5 augustss {0x00, 0x02}, /* USB version */
1303 1.5 augustss UDCLASS_HUB, /* class */
1304 1.5 augustss UDSUBCLASS_HUB, /* subclass */
1305 1.11 augustss UDPROTO_HSHUBSTT, /* protocol */
1306 1.5 augustss 64, /* max packet */
1307 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
1308 1.5 augustss 1,2,0, /* string indicies */
1309 1.5 augustss 1 /* # of configurations */
1310 1.5 augustss };
1311 1.5 augustss
1312 1.11 augustss Static usb_device_qualifier_t ehci_odevd = {
1313 1.11 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1314 1.11 augustss UDESC_DEVICE_QUALIFIER, /* type */
1315 1.11 augustss {0x00, 0x02}, /* USB version */
1316 1.11 augustss UDCLASS_HUB, /* class */
1317 1.11 augustss UDSUBCLASS_HUB, /* subclass */
1318 1.11 augustss UDPROTO_FSHUB, /* protocol */
1319 1.11 augustss 64, /* max packet */
1320 1.11 augustss 1, /* # of configurations */
1321 1.11 augustss 0
1322 1.11 augustss };
1323 1.11 augustss
1324 1.5 augustss Static usb_config_descriptor_t ehci_confd = {
1325 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1326 1.5 augustss UDESC_CONFIG,
1327 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1328 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1329 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1330 1.5 augustss 1,
1331 1.5 augustss 1,
1332 1.5 augustss 0,
1333 1.5 augustss UC_SELF_POWERED,
1334 1.5 augustss 0 /* max power */
1335 1.5 augustss };
1336 1.5 augustss
1337 1.5 augustss Static usb_interface_descriptor_t ehci_ifcd = {
1338 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1339 1.5 augustss UDESC_INTERFACE,
1340 1.5 augustss 0,
1341 1.5 augustss 0,
1342 1.5 augustss 1,
1343 1.5 augustss UICLASS_HUB,
1344 1.5 augustss UISUBCLASS_HUB,
1345 1.11 augustss UIPROTO_HSHUBSTT,
1346 1.5 augustss 0
1347 1.5 augustss };
1348 1.5 augustss
1349 1.5 augustss Static usb_endpoint_descriptor_t ehci_endpd = {
1350 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1351 1.5 augustss UDESC_ENDPOINT,
1352 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
1353 1.5 augustss UE_INTERRUPT,
1354 1.5 augustss {8, 0}, /* max packet */
1355 1.5 augustss 255
1356 1.5 augustss };
1357 1.5 augustss
1358 1.5 augustss Static usb_hub_descriptor_t ehci_hubd = {
1359 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
1360 1.5 augustss UDESC_HUB,
1361 1.5 augustss 0,
1362 1.5 augustss {0,0},
1363 1.5 augustss 0,
1364 1.5 augustss 0,
1365 1.5 augustss {0},
1366 1.5 augustss };
1367 1.5 augustss
1368 1.5 augustss Static int
1369 1.5 augustss ehci_str(p, l, s)
1370 1.5 augustss usb_string_descriptor_t *p;
1371 1.5 augustss int l;
1372 1.5 augustss char *s;
1373 1.5 augustss {
1374 1.5 augustss int i;
1375 1.5 augustss
1376 1.5 augustss if (l == 0)
1377 1.5 augustss return (0);
1378 1.5 augustss p->bLength = 2 * strlen(s) + 2;
1379 1.5 augustss if (l == 1)
1380 1.5 augustss return (1);
1381 1.5 augustss p->bDescriptorType = UDESC_STRING;
1382 1.5 augustss l -= 2;
1383 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1384 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1385 1.5 augustss return (2*i+2);
1386 1.5 augustss }
1387 1.5 augustss
1388 1.5 augustss /*
1389 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1390 1.5 augustss */
1391 1.5 augustss Static usbd_status
1392 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1393 1.5 augustss {
1394 1.5 augustss usbd_status err;
1395 1.5 augustss
1396 1.5 augustss /* Insert last in queue. */
1397 1.5 augustss err = usb_insert_transfer(xfer);
1398 1.5 augustss if (err)
1399 1.5 augustss return (err);
1400 1.5 augustss
1401 1.5 augustss /* Pipe isn't running, start first */
1402 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1403 1.5 augustss }
1404 1.5 augustss
1405 1.5 augustss Static usbd_status
1406 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1407 1.5 augustss {
1408 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1409 1.5 augustss usb_device_request_t *req;
1410 1.5 augustss void *buf = NULL;
1411 1.5 augustss int port, i;
1412 1.5 augustss int s, len, value, index, l, totlen = 0;
1413 1.5 augustss usb_port_status_t ps;
1414 1.5 augustss usb_hub_descriptor_t hubd;
1415 1.5 augustss usbd_status err;
1416 1.5 augustss u_int32_t v;
1417 1.5 augustss
1418 1.5 augustss if (sc->sc_dying)
1419 1.5 augustss return (USBD_IOERROR);
1420 1.5 augustss
1421 1.5 augustss #ifdef DIAGNOSTIC
1422 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1423 1.5 augustss /* XXX panic */
1424 1.5 augustss return (USBD_INVAL);
1425 1.5 augustss #endif
1426 1.5 augustss req = &xfer->request;
1427 1.5 augustss
1428 1.5 augustss DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1429 1.5 augustss req->bmRequestType, req->bRequest));
1430 1.5 augustss
1431 1.5 augustss len = UGETW(req->wLength);
1432 1.5 augustss value = UGETW(req->wValue);
1433 1.5 augustss index = UGETW(req->wIndex);
1434 1.5 augustss
1435 1.5 augustss if (len != 0)
1436 1.5 augustss buf = KERNADDR(&xfer->dmabuf);
1437 1.5 augustss
1438 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1439 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1440 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1441 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1442 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1443 1.5 augustss /*
1444 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1445 1.5 augustss * for the integrated root hub.
1446 1.5 augustss */
1447 1.5 augustss break;
1448 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1449 1.5 augustss if (len > 0) {
1450 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1451 1.5 augustss totlen = 1;
1452 1.5 augustss }
1453 1.5 augustss break;
1454 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1455 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1456 1.5 augustss switch(value >> 8) {
1457 1.5 augustss case UDESC_DEVICE:
1458 1.5 augustss if ((value & 0xff) != 0) {
1459 1.5 augustss err = USBD_IOERROR;
1460 1.5 augustss goto ret;
1461 1.5 augustss }
1462 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1463 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1464 1.5 augustss memcpy(buf, &ehci_devd, l);
1465 1.5 augustss break;
1466 1.11 augustss /*
1467 1.11 augustss * We can't really operate at another speed, but the spec says
1468 1.11 augustss * we need this descriptor.
1469 1.11 augustss */
1470 1.11 augustss case UDESC_DEVICE_QUALIFIER:
1471 1.11 augustss if ((value & 0xff) != 0) {
1472 1.11 augustss err = USBD_IOERROR;
1473 1.11 augustss goto ret;
1474 1.11 augustss }
1475 1.11 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1476 1.11 augustss memcpy(buf, &ehci_odevd, l);
1477 1.11 augustss break;
1478 1.11 augustss /*
1479 1.11 augustss * We can't really operate at another speed, but the spec says
1480 1.11 augustss * we need this descriptor.
1481 1.11 augustss */
1482 1.11 augustss case UDESC_OTHER_SPEED_CONFIGURATION:
1483 1.5 augustss case UDESC_CONFIG:
1484 1.5 augustss if ((value & 0xff) != 0) {
1485 1.5 augustss err = USBD_IOERROR;
1486 1.5 augustss goto ret;
1487 1.5 augustss }
1488 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1489 1.5 augustss memcpy(buf, &ehci_confd, l);
1490 1.11 augustss ((usb_config_descriptor_t *)buf)->bDescriptorType =
1491 1.11 augustss value >> 8;
1492 1.5 augustss buf = (char *)buf + l;
1493 1.5 augustss len -= l;
1494 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1495 1.5 augustss totlen += l;
1496 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1497 1.5 augustss buf = (char *)buf + l;
1498 1.5 augustss len -= l;
1499 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1500 1.5 augustss totlen += l;
1501 1.5 augustss memcpy(buf, &ehci_endpd, l);
1502 1.5 augustss break;
1503 1.5 augustss case UDESC_STRING:
1504 1.5 augustss if (len == 0)
1505 1.5 augustss break;
1506 1.5 augustss *(u_int8_t *)buf = 0;
1507 1.5 augustss totlen = 1;
1508 1.5 augustss switch (value & 0xff) {
1509 1.5 augustss case 1: /* Vendor */
1510 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1511 1.5 augustss break;
1512 1.5 augustss case 2: /* Product */
1513 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1514 1.5 augustss break;
1515 1.5 augustss }
1516 1.5 augustss break;
1517 1.5 augustss default:
1518 1.5 augustss err = USBD_IOERROR;
1519 1.5 augustss goto ret;
1520 1.5 augustss }
1521 1.5 augustss break;
1522 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1523 1.5 augustss if (len > 0) {
1524 1.5 augustss *(u_int8_t *)buf = 0;
1525 1.5 augustss totlen = 1;
1526 1.5 augustss }
1527 1.5 augustss break;
1528 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1529 1.5 augustss if (len > 1) {
1530 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1531 1.5 augustss totlen = 2;
1532 1.5 augustss }
1533 1.5 augustss break;
1534 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1535 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1536 1.5 augustss if (len > 1) {
1537 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1538 1.5 augustss totlen = 2;
1539 1.5 augustss }
1540 1.5 augustss break;
1541 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1542 1.5 augustss if (value >= USB_MAX_DEVICES) {
1543 1.5 augustss err = USBD_IOERROR;
1544 1.5 augustss goto ret;
1545 1.5 augustss }
1546 1.5 augustss sc->sc_addr = value;
1547 1.5 augustss break;
1548 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1549 1.5 augustss if (value != 0 && value != 1) {
1550 1.5 augustss err = USBD_IOERROR;
1551 1.5 augustss goto ret;
1552 1.5 augustss }
1553 1.5 augustss sc->sc_conf = value;
1554 1.5 augustss break;
1555 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1556 1.5 augustss break;
1557 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1558 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1559 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1560 1.5 augustss err = USBD_IOERROR;
1561 1.5 augustss goto ret;
1562 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1563 1.5 augustss break;
1564 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1565 1.5 augustss break;
1566 1.5 augustss /* Hub requests */
1567 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1568 1.5 augustss break;
1569 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1570 1.5 augustss DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1571 1.5 augustss "port=%d feature=%d\n",
1572 1.5 augustss index, value));
1573 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1574 1.5 augustss err = USBD_IOERROR;
1575 1.5 augustss goto ret;
1576 1.5 augustss }
1577 1.5 augustss port = EHCI_PORTSC(index);
1578 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1579 1.5 augustss switch(value) {
1580 1.5 augustss case UHF_PORT_ENABLE:
1581 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1582 1.5 augustss break;
1583 1.5 augustss case UHF_PORT_SUSPEND:
1584 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1585 1.5 augustss break;
1586 1.5 augustss case UHF_PORT_POWER:
1587 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1588 1.5 augustss break;
1589 1.14 augustss case UHF_PORT_TEST:
1590 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1591 1.14 augustss "%d\n", index));
1592 1.14 augustss break;
1593 1.14 augustss case UHF_PORT_INDICATOR:
1594 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1595 1.14 augustss "%d\n", index));
1596 1.14 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1597 1.14 augustss break;
1598 1.5 augustss case UHF_C_PORT_CONNECTION:
1599 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1600 1.5 augustss break;
1601 1.5 augustss case UHF_C_PORT_ENABLE:
1602 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1603 1.5 augustss break;
1604 1.5 augustss case UHF_C_PORT_SUSPEND:
1605 1.5 augustss /* how? */
1606 1.5 augustss break;
1607 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1608 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1609 1.5 augustss break;
1610 1.5 augustss case UHF_C_PORT_RESET:
1611 1.6 augustss sc->sc_isreset = 0;
1612 1.5 augustss break;
1613 1.5 augustss default:
1614 1.5 augustss err = USBD_IOERROR;
1615 1.5 augustss goto ret;
1616 1.5 augustss }
1617 1.5 augustss #if 0
1618 1.5 augustss switch(value) {
1619 1.5 augustss case UHF_C_PORT_CONNECTION:
1620 1.5 augustss case UHF_C_PORT_ENABLE:
1621 1.5 augustss case UHF_C_PORT_SUSPEND:
1622 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1623 1.5 augustss case UHF_C_PORT_RESET:
1624 1.5 augustss /* Enable RHSC interrupt if condition is cleared. */
1625 1.5 augustss if ((OREAD4(sc, port) >> 16) == 0)
1626 1.6 augustss ehci_pcd_able(sc, 1);
1627 1.5 augustss break;
1628 1.5 augustss default:
1629 1.5 augustss break;
1630 1.5 augustss }
1631 1.5 augustss #endif
1632 1.5 augustss break;
1633 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1634 1.5 augustss if (value != 0) {
1635 1.5 augustss err = USBD_IOERROR;
1636 1.5 augustss goto ret;
1637 1.5 augustss }
1638 1.5 augustss hubd = ehci_hubd;
1639 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1640 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1641 1.5 augustss USETW(hubd.wHubCharacteristics,
1642 1.14 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1643 1.14 augustss EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1644 1.14 augustss ? UHD_PORT_IND : 0);
1645 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1646 1.5 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1647 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1648 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1649 1.5 augustss l = min(len, hubd.bDescLength);
1650 1.5 augustss totlen = l;
1651 1.5 augustss memcpy(buf, &hubd, l);
1652 1.5 augustss break;
1653 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1654 1.5 augustss if (len != 4) {
1655 1.5 augustss err = USBD_IOERROR;
1656 1.5 augustss goto ret;
1657 1.5 augustss }
1658 1.5 augustss memset(buf, 0, len); /* ? XXX */
1659 1.5 augustss totlen = len;
1660 1.5 augustss break;
1661 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1662 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1663 1.5 augustss index));
1664 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1665 1.5 augustss err = USBD_IOERROR;
1666 1.5 augustss goto ret;
1667 1.5 augustss }
1668 1.5 augustss if (len != 4) {
1669 1.5 augustss err = USBD_IOERROR;
1670 1.5 augustss goto ret;
1671 1.5 augustss }
1672 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1673 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1674 1.5 augustss v));
1675 1.11 augustss i = UPS_HIGH_SPEED;
1676 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1677 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1678 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1679 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1680 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1681 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1682 1.5 augustss USETW(ps.wPortStatus, i);
1683 1.5 augustss i = 0;
1684 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1685 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1686 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1687 1.6 augustss if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1688 1.5 augustss USETW(ps.wPortChange, i);
1689 1.5 augustss l = min(len, sizeof ps);
1690 1.5 augustss memcpy(buf, &ps, l);
1691 1.5 augustss totlen = l;
1692 1.5 augustss break;
1693 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1694 1.5 augustss err = USBD_IOERROR;
1695 1.5 augustss goto ret;
1696 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1697 1.5 augustss break;
1698 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1699 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1700 1.5 augustss err = USBD_IOERROR;
1701 1.5 augustss goto ret;
1702 1.5 augustss }
1703 1.5 augustss port = EHCI_PORTSC(index);
1704 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1705 1.5 augustss switch(value) {
1706 1.5 augustss case UHF_PORT_ENABLE:
1707 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
1708 1.5 augustss break;
1709 1.5 augustss case UHF_PORT_SUSPEND:
1710 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1711 1.5 augustss break;
1712 1.5 augustss case UHF_PORT_RESET:
1713 1.5 augustss DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1714 1.5 augustss index));
1715 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
1716 1.6 augustss /* Low speed device, give up ownership. */
1717 1.6 augustss ehci_disown(sc, index, 1);
1718 1.6 augustss break;
1719 1.6 augustss }
1720 1.8 augustss /* Start reset sequence. */
1721 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1722 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
1723 1.8 augustss /* Wait for reset to complete. */
1724 1.13 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1725 1.17 augustss if (sc->sc_dying) {
1726 1.17 augustss err = USBD_IOERROR;
1727 1.17 augustss goto ret;
1728 1.17 augustss }
1729 1.8 augustss /* Terminate reset sequence. */
1730 1.8 augustss EOWRITE4(sc, port, v);
1731 1.8 augustss /* Wait for HC to complete reset. */
1732 1.13 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1733 1.17 augustss if (sc->sc_dying) {
1734 1.17 augustss err = USBD_IOERROR;
1735 1.17 augustss goto ret;
1736 1.17 augustss }
1737 1.8 augustss v = EOREAD4(sc, port);
1738 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
1739 1.8 augustss if (v & EHCI_PS_PR) {
1740 1.8 augustss printf("%s: port reset timeout\n",
1741 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
1742 1.8 augustss return (USBD_TIMEOUT);
1743 1.5 augustss }
1744 1.8 augustss if (!(v & EHCI_PS_PE)) {
1745 1.6 augustss /* Not a high speed device, give up ownership.*/
1746 1.6 augustss ehci_disown(sc, index, 0);
1747 1.6 augustss break;
1748 1.6 augustss }
1749 1.6 augustss sc->sc_isreset = 1;
1750 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1751 1.6 augustss index, v));
1752 1.5 augustss break;
1753 1.5 augustss case UHF_PORT_POWER:
1754 1.5 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1755 1.5 augustss "%d\n", index));
1756 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
1757 1.5 augustss break;
1758 1.11 augustss case UHF_PORT_TEST:
1759 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1760 1.11 augustss "%d\n", index));
1761 1.11 augustss break;
1762 1.11 augustss case UHF_PORT_INDICATOR:
1763 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1764 1.11 augustss "%d\n", index));
1765 1.14 augustss EOWRITE4(sc, port, v | EHCI_PS_PIC);
1766 1.11 augustss break;
1767 1.5 augustss default:
1768 1.5 augustss err = USBD_IOERROR;
1769 1.5 augustss goto ret;
1770 1.5 augustss }
1771 1.5 augustss break;
1772 1.11 augustss case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1773 1.11 augustss case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1774 1.11 augustss case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1775 1.11 augustss case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1776 1.11 augustss break;
1777 1.5 augustss default:
1778 1.5 augustss err = USBD_IOERROR;
1779 1.5 augustss goto ret;
1780 1.5 augustss }
1781 1.5 augustss xfer->actlen = totlen;
1782 1.5 augustss err = USBD_NORMAL_COMPLETION;
1783 1.5 augustss ret:
1784 1.5 augustss xfer->status = err;
1785 1.5 augustss s = splusb();
1786 1.5 augustss usb_transfer_complete(xfer);
1787 1.5 augustss splx(s);
1788 1.5 augustss return (USBD_IN_PROGRESS);
1789 1.6 augustss }
1790 1.6 augustss
1791 1.6 augustss void
1792 1.6 augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1793 1.6 augustss {
1794 1.6 augustss int i, port;
1795 1.6 augustss u_int32_t v;
1796 1.6 augustss
1797 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1798 1.6 augustss #ifdef DIAGNOSTIC
1799 1.6 augustss if (sc->sc_npcomp != 0) {
1800 1.6 augustss i = (index-1) / sc->sc_npcomp;
1801 1.6 augustss if (i >= sc->sc_ncomp)
1802 1.6 augustss printf("%s: strange port\n",
1803 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
1804 1.6 augustss else
1805 1.6 augustss printf("%s: handing over %s speed device on "
1806 1.6 augustss "port %d to %s\n",
1807 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
1808 1.6 augustss lowspeed ? "low" : "full",
1809 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
1810 1.6 augustss } else {
1811 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1812 1.6 augustss }
1813 1.6 augustss #endif
1814 1.6 augustss port = EHCI_PORTSC(index);
1815 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1816 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
1817 1.5 augustss }
1818 1.5 augustss
1819 1.5 augustss /* Abort a root control request. */
1820 1.5 augustss Static void
1821 1.5 augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1822 1.5 augustss {
1823 1.5 augustss /* Nothing to do, all transfers are synchronous. */
1824 1.5 augustss }
1825 1.5 augustss
1826 1.5 augustss /* Close the root pipe. */
1827 1.5 augustss Static void
1828 1.5 augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
1829 1.5 augustss {
1830 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
1831 1.5 augustss /* Nothing to do. */
1832 1.5 augustss }
1833 1.5 augustss
1834 1.5 augustss void
1835 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
1836 1.5 augustss {
1837 1.5 augustss xfer->hcpriv = NULL;
1838 1.5 augustss }
1839 1.5 augustss
1840 1.5 augustss Static usbd_status
1841 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
1842 1.5 augustss {
1843 1.5 augustss usbd_status err;
1844 1.5 augustss
1845 1.5 augustss /* Insert last in queue. */
1846 1.5 augustss err = usb_insert_transfer(xfer);
1847 1.5 augustss if (err)
1848 1.5 augustss return (err);
1849 1.5 augustss
1850 1.5 augustss /* Pipe isn't running, start first */
1851 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1852 1.5 augustss }
1853 1.5 augustss
1854 1.5 augustss Static usbd_status
1855 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
1856 1.5 augustss {
1857 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
1858 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1859 1.5 augustss
1860 1.5 augustss if (sc->sc_dying)
1861 1.5 augustss return (USBD_IOERROR);
1862 1.5 augustss
1863 1.5 augustss sc->sc_intrxfer = xfer;
1864 1.5 augustss
1865 1.5 augustss return (USBD_IN_PROGRESS);
1866 1.5 augustss }
1867 1.5 augustss
1868 1.5 augustss /* Abort a root interrupt request. */
1869 1.5 augustss Static void
1870 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
1871 1.5 augustss {
1872 1.5 augustss int s;
1873 1.5 augustss
1874 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
1875 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
1876 1.5 augustss xfer->pipe->intrxfer = NULL;
1877 1.5 augustss }
1878 1.5 augustss xfer->status = USBD_CANCELLED;
1879 1.5 augustss s = splusb();
1880 1.5 augustss usb_transfer_complete(xfer);
1881 1.5 augustss splx(s);
1882 1.5 augustss }
1883 1.5 augustss
1884 1.5 augustss /* Close the root pipe. */
1885 1.5 augustss Static void
1886 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
1887 1.5 augustss {
1888 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1889 1.5 augustss
1890 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
1891 1.5 augustss
1892 1.5 augustss sc->sc_intrxfer = NULL;
1893 1.5 augustss }
1894 1.5 augustss
1895 1.5 augustss void
1896 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
1897 1.5 augustss {
1898 1.5 augustss xfer->hcpriv = NULL;
1899 1.9 augustss }
1900 1.9 augustss
1901 1.9 augustss /************************/
1902 1.9 augustss
1903 1.9 augustss ehci_soft_qh_t *
1904 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
1905 1.9 augustss {
1906 1.9 augustss ehci_soft_qh_t *sqh;
1907 1.9 augustss usbd_status err;
1908 1.9 augustss int i, offs;
1909 1.9 augustss usb_dma_t dma;
1910 1.9 augustss
1911 1.9 augustss if (sc->sc_freeqhs == NULL) {
1912 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1913 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1914 1.9 augustss EHCI_PAGE_SIZE, &dma);
1915 1.9 augustss if (err)
1916 1.11 augustss return (NULL);
1917 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1918 1.9 augustss offs = i * EHCI_SQH_SIZE;
1919 1.11 augustss sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) + offs);
1920 1.9 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1921 1.9 augustss sqh->next = sc->sc_freeqhs;
1922 1.9 augustss sc->sc_freeqhs = sqh;
1923 1.9 augustss }
1924 1.9 augustss }
1925 1.9 augustss sqh = sc->sc_freeqhs;
1926 1.9 augustss sc->sc_freeqhs = sqh->next;
1927 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1928 1.11 augustss sqh->next = NULL;
1929 1.9 augustss return (sqh);
1930 1.9 augustss }
1931 1.9 augustss
1932 1.9 augustss void
1933 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1934 1.9 augustss {
1935 1.9 augustss sqh->next = sc->sc_freeqhs;
1936 1.9 augustss sc->sc_freeqhs = sqh;
1937 1.9 augustss }
1938 1.9 augustss
1939 1.9 augustss ehci_soft_qtd_t *
1940 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
1941 1.9 augustss {
1942 1.9 augustss ehci_soft_qtd_t *sqtd;
1943 1.9 augustss usbd_status err;
1944 1.9 augustss int i, offs;
1945 1.9 augustss usb_dma_t dma;
1946 1.9 augustss int s;
1947 1.9 augustss
1948 1.9 augustss if (sc->sc_freeqtds == NULL) {
1949 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1950 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1951 1.9 augustss EHCI_PAGE_SIZE, &dma);
1952 1.9 augustss if (err)
1953 1.9 augustss return (NULL);
1954 1.9 augustss s = splusb();
1955 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1956 1.9 augustss offs = i * EHCI_SQTD_SIZE;
1957 1.9 augustss sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1958 1.9 augustss sqtd->physaddr = DMAADDR(&dma) + offs;
1959 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1960 1.9 augustss sc->sc_freeqtds = sqtd;
1961 1.9 augustss }
1962 1.9 augustss splx(s);
1963 1.9 augustss }
1964 1.9 augustss
1965 1.9 augustss s = splusb();
1966 1.9 augustss sqtd = sc->sc_freeqtds;
1967 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
1968 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1969 1.9 augustss sqtd->nextqtd = NULL;
1970 1.9 augustss sqtd->xfer = NULL;
1971 1.9 augustss splx(s);
1972 1.9 augustss
1973 1.9 augustss return (sqtd);
1974 1.9 augustss }
1975 1.9 augustss
1976 1.9 augustss void
1977 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1978 1.9 augustss {
1979 1.9 augustss int s;
1980 1.9 augustss
1981 1.9 augustss s = splusb();
1982 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
1983 1.9 augustss sc->sc_freeqtds = sqtd;
1984 1.9 augustss splx(s);
1985 1.9 augustss }
1986 1.9 augustss
1987 1.15 augustss usbd_status
1988 1.15 augustss ehci_alloc_std_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
1989 1.15 augustss int alen, int rd, usbd_xfer_handle xfer,
1990 1.15 augustss ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
1991 1.15 augustss {
1992 1.15 augustss ehci_soft_qtd_t *next, *cur;
1993 1.15 augustss ehci_physaddr_t dataphys, dataphysend, nextphys;
1994 1.15 augustss u_int32_t qtdstatus;
1995 1.15 augustss int len, curlen;
1996 1.15 augustss int i;
1997 1.15 augustss usb_dma_t *dma = &xfer->dmabuf;
1998 1.15 augustss
1999 1.15 augustss DPRINTFN(alen < 4096,("ehci_alloc_std_chain: start len=%d\n", alen));
2000 1.15 augustss
2001 1.15 augustss len = alen;
2002 1.15 augustss dataphys = DMAADDR(dma);
2003 1.15 augustss dataphysend = EHCI_PAGE(dataphys + len - 1);
2004 1.15 augustss qtdstatus = htole32(
2005 1.15 augustss EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2006 1.15 augustss EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2007 1.15 augustss EHCI_QTD_SET_CERR(3)
2008 1.15 augustss /* IOC set below */
2009 1.15 augustss /* BYTES set below */
2010 1.15 augustss /* XXX Data toggle */
2011 1.15 augustss );
2012 1.15 augustss
2013 1.15 augustss cur = ehci_alloc_sqtd(sc);
2014 1.15 augustss if (cur == NULL)
2015 1.15 augustss goto nomem;
2016 1.15 augustss *sp = cur;
2017 1.15 augustss for (;;) {
2018 1.15 augustss /* The EHCI hardware can handle at most 4 page crossings. */
2019 1.15 augustss if (EHCI_PAGE(dataphys) == dataphysend ||
2020 1.15 augustss EHCI_PAGE(dataphys) + EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE
2021 1.15 augustss == dataphysend) {
2022 1.15 augustss /* we can handle it in this QTD */
2023 1.15 augustss curlen = len;
2024 1.15 augustss } else {
2025 1.15 augustss #if 0
2026 1.15 augustss /* must use multiple TDs, fill as much as possible. */
2027 1.15 augustss curlen = 2 * EHCI_PAGE_SIZE -
2028 1.15 augustss (dataphys & (EHCI_PAGE_SIZE-1));
2029 1.15 augustss /* the length must be a multiple of the max size */
2030 1.15 augustss curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2031 1.15 augustss #ifdef DIAGNOSTIC
2032 1.15 augustss if (curlen == 0)
2033 1.15 augustss panic("ehci_alloc_std: curlen == 0\n");
2034 1.15 augustss #endif
2035 1.15 augustss #else
2036 1.15 augustss printf("ehci_alloc_std_chain: multiple QTDs\n");
2037 1.15 augustss return (USBD_NOMEM);
2038 1.15 augustss #endif
2039 1.15 augustss }
2040 1.15 augustss DPRINTFN(4,("ehci_alloc_std_chain: dataphys=0x%08x "
2041 1.15 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
2042 1.15 augustss dataphys, dataphysend,
2043 1.15 augustss len, curlen));
2044 1.15 augustss len -= curlen;
2045 1.15 augustss
2046 1.15 augustss if (len != 0) {
2047 1.15 augustss next = ehci_alloc_sqtd(sc);
2048 1.15 augustss if (next == NULL)
2049 1.15 augustss goto nomem;
2050 1.15 augustss nextphys = next->physaddr;
2051 1.15 augustss } else {
2052 1.15 augustss next = NULL;
2053 1.15 augustss nextphys = EHCI_NULL;
2054 1.15 augustss }
2055 1.15 augustss
2056 1.15 augustss for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2057 1.15 augustss ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2058 1.15 augustss if (i != 0) /* use offset only in first buffer */
2059 1.15 augustss a = EHCI_PAGE(a);
2060 1.15 augustss cur->qtd.qtd_buffer[i] = htole32(a);
2061 1.15 augustss }
2062 1.15 augustss cur->nextqtd = next;
2063 1.15 augustss cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
2064 1.15 augustss cur->qtd.qtd_status =
2065 1.15 augustss qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
2066 1.15 augustss cur->xfer = xfer;
2067 1.18 augustss cur->len = curlen;
2068 1.15 augustss DPRINTFN(10,("ehci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
2069 1.15 augustss dataphys, dataphys + curlen - 1));
2070 1.15 augustss if (len == 0)
2071 1.15 augustss break;
2072 1.15 augustss DPRINTFN(10,("ehci_alloc_std_chain: extend chain\n"));
2073 1.15 augustss dataphys += curlen;
2074 1.15 augustss cur = next;
2075 1.15 augustss }
2076 1.15 augustss cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2077 1.15 augustss *ep = cur;
2078 1.15 augustss
2079 1.15 augustss return (USBD_NORMAL_COMPLETION);
2080 1.15 augustss
2081 1.15 augustss nomem:
2082 1.15 augustss /* XXX free chain */
2083 1.15 augustss return (USBD_NOMEM);
2084 1.15 augustss }
2085 1.15 augustss
2086 1.18 augustss Static void
2087 1.18 augustss ehci_free_std_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2088 1.18 augustss ehci_soft_qtd_t *sqtdend)
2089 1.18 augustss {
2090 1.18 augustss ehci_soft_qtd_t *p;
2091 1.18 augustss
2092 1.18 augustss for (; sqtd != sqtdend; sqtd = p) {
2093 1.18 augustss p = sqtd->nextqtd;
2094 1.18 augustss ehci_free_sqtd(sc, sqtd);
2095 1.18 augustss }
2096 1.18 augustss }
2097 1.18 augustss
2098 1.15 augustss /****************/
2099 1.15 augustss
2100 1.9 augustss /*
2101 1.10 augustss * Close a reqular pipe.
2102 1.10 augustss * Assumes that there are no pending transactions.
2103 1.10 augustss */
2104 1.10 augustss void
2105 1.10 augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2106 1.10 augustss {
2107 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2108 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2109 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2110 1.10 augustss int s;
2111 1.10 augustss
2112 1.10 augustss s = splusb();
2113 1.10 augustss ehci_rem_qh(sc, sqh, head);
2114 1.10 augustss splx(s);
2115 1.10 augustss ehci_free_sqh(sc, epipe->sqh);
2116 1.10 augustss }
2117 1.10 augustss
2118 1.10 augustss /*
2119 1.10 augustss * Abort a device request.
2120 1.10 augustss * If this routine is called at splusb() it guarantees that the request
2121 1.10 augustss * will be removed from the hardware scheduling and that the callback
2122 1.10 augustss * for it will be called with USBD_CANCELLED status.
2123 1.10 augustss * It's impossible to guarantee that the requested transfer will not
2124 1.10 augustss * have happened since the hardware runs concurrently.
2125 1.10 augustss * If the transaction has already happened we rely on the ordinary
2126 1.10 augustss * interrupt processing to process it.
2127 1.10 augustss */
2128 1.10 augustss void
2129 1.10 augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2130 1.10 augustss {
2131 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2132 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2133 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2134 1.10 augustss #if 0
2135 1.10 augustss ehci_soft_td_t *p, *n;
2136 1.10 augustss ehci_physaddr_t headp;
2137 1.11 augustss int hit;
2138 1.10 augustss #endif
2139 1.11 augustss int s;
2140 1.10 augustss
2141 1.10 augustss DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p sqh=%p\n", xfer, epipe,sqh));
2142 1.10 augustss
2143 1.17 augustss if (sc->sc_dying) {
2144 1.17 augustss /* If we're dying, just do the software part. */
2145 1.17 augustss s = splusb();
2146 1.17 augustss xfer->status = status; /* make software ignore it */
2147 1.17 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2148 1.17 augustss usb_transfer_complete(xfer);
2149 1.17 augustss splx(s);
2150 1.17 augustss return;
2151 1.17 augustss }
2152 1.17 augustss
2153 1.10 augustss if (xfer->device->bus->intr_context || !curproc)
2154 1.10 augustss panic("ehci_abort_xfer: not in process context\n");
2155 1.10 augustss
2156 1.11 augustss /*
2157 1.11 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2158 1.11 augustss */
2159 1.11 augustss s = splusb();
2160 1.11 augustss xfer->status = status; /* make software ignore it */
2161 1.15 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2162 1.11 augustss splx(s);
2163 1.11 augustss /* XXX */
2164 1.11 augustss
2165 1.11 augustss /*
2166 1.11 augustss * Step 2: Wait until we know hardware has finished any possible
2167 1.11 augustss * use of the xfer. Also make sure the soft interrupt routine
2168 1.11 augustss * has run.
2169 1.11 augustss */
2170 1.11 augustss usb_delay_ms(epipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */
2171 1.11 augustss /* XXX should have some communication with softintr() to know
2172 1.11 augustss when it's done */
2173 1.11 augustss usb_delay_ms(epipe->pipe.device->bus, 250);
2174 1.11 augustss
2175 1.11 augustss /*
2176 1.11 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2177 1.11 augustss * The complication here is that the hardware may have executed
2178 1.11 augustss * beyond the xfer we're trying to abort. So as we're scanning
2179 1.11 augustss * the TDs of this xfer we check if the hardware points to
2180 1.11 augustss * any of them.
2181 1.11 augustss */
2182 1.11 augustss s = splusb(); /* XXX why? */
2183 1.11 augustss /* XXX */
2184 1.11 augustss
2185 1.11 augustss /*
2186 1.11 augustss * Step 4: Turn on hardware again.
2187 1.11 augustss */
2188 1.11 augustss /* XXX */
2189 1.11 augustss
2190 1.11 augustss /*
2191 1.11 augustss * Step 5: Execute callback.
2192 1.11 augustss */
2193 1.18 augustss #ifdef DIAGNOSTIC
2194 1.18 augustss EXFER(xfer)->isdone = 1;
2195 1.18 augustss #endif
2196 1.11 augustss usb_transfer_complete(xfer);
2197 1.11 augustss
2198 1.11 augustss splx(s);
2199 1.10 augustss }
2200 1.10 augustss
2201 1.15 augustss void
2202 1.15 augustss ehci_timeout(void *addr)
2203 1.15 augustss {
2204 1.15 augustss struct ehci_xfer *exfer = addr;
2205 1.17 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2206 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2207 1.15 augustss
2208 1.15 augustss DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2209 1.15 augustss
2210 1.17 augustss if (sc->sc_dying) {
2211 1.17 augustss ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2212 1.17 augustss return;
2213 1.17 augustss }
2214 1.17 augustss
2215 1.15 augustss /* Execute the abort in a process context. */
2216 1.15 augustss usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2217 1.15 augustss usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2218 1.15 augustss }
2219 1.15 augustss
2220 1.15 augustss void
2221 1.15 augustss ehci_timeout_task(void *addr)
2222 1.15 augustss {
2223 1.15 augustss usbd_xfer_handle xfer = addr;
2224 1.15 augustss int s;
2225 1.15 augustss
2226 1.15 augustss DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2227 1.15 augustss
2228 1.15 augustss s = splusb();
2229 1.15 augustss ehci_abort_xfer(xfer, USBD_TIMEOUT);
2230 1.15 augustss splx(s);
2231 1.15 augustss }
2232 1.15 augustss
2233 1.5 augustss /************************/
2234 1.5 augustss
2235 1.10 augustss Static usbd_status
2236 1.10 augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2237 1.10 augustss {
2238 1.10 augustss usbd_status err;
2239 1.10 augustss
2240 1.10 augustss /* Insert last in queue. */
2241 1.10 augustss err = usb_insert_transfer(xfer);
2242 1.10 augustss if (err)
2243 1.10 augustss return (err);
2244 1.10 augustss
2245 1.10 augustss /* Pipe isn't running, start first */
2246 1.10 augustss return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2247 1.10 augustss }
2248 1.10 augustss
2249 1.12 augustss Static usbd_status
2250 1.12 augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
2251 1.12 augustss {
2252 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2253 1.15 augustss usbd_status err;
2254 1.15 augustss
2255 1.15 augustss if (sc->sc_dying)
2256 1.15 augustss return (USBD_IOERROR);
2257 1.15 augustss
2258 1.15 augustss #ifdef DIAGNOSTIC
2259 1.15 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2260 1.15 augustss /* XXX panic */
2261 1.15 augustss printf("ehci_device_ctrl_transfer: not a request\n");
2262 1.15 augustss return (USBD_INVAL);
2263 1.15 augustss }
2264 1.15 augustss #endif
2265 1.15 augustss
2266 1.15 augustss err = ehci_device_request(xfer);
2267 1.15 augustss if (err)
2268 1.15 augustss return (err);
2269 1.15 augustss
2270 1.15 augustss if (sc->sc_bus.use_polling)
2271 1.15 augustss ehci_waitintr(sc, xfer);
2272 1.15 augustss return (USBD_IN_PROGRESS);
2273 1.12 augustss }
2274 1.10 augustss
2275 1.10 augustss void
2276 1.10 augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
2277 1.10 augustss {
2278 1.18 augustss struct ehci_xfer *ex = EXFER(xfer);
2279 1.18 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2280 1.18 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2281 1.18 augustss
2282 1.10 augustss DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2283 1.10 augustss
2284 1.10 augustss #ifdef DIAGNOSTIC
2285 1.10 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2286 1.10 augustss panic("ehci_ctrl_done: not a request\n");
2287 1.10 augustss }
2288 1.10 augustss #endif
2289 1.18 augustss
2290 1.18 augustss ehci_del_intr_list(ex); /* remove from active list */
2291 1.18 augustss
2292 1.18 augustss if (epipe->u.ctl.length != 0)
2293 1.18 augustss ehci_free_std_chain(sc, ex->sqtdstart, ex->sqtdend);
2294 1.18 augustss
2295 1.18 augustss DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen));
2296 1.10 augustss }
2297 1.10 augustss
2298 1.10 augustss /* Abort a device control request. */
2299 1.10 augustss Static void
2300 1.10 augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2301 1.10 augustss {
2302 1.10 augustss DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2303 1.10 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
2304 1.10 augustss }
2305 1.10 augustss
2306 1.10 augustss /* Close a device control pipe. */
2307 1.10 augustss Static void
2308 1.10 augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
2309 1.10 augustss {
2310 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2311 1.10 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2312 1.10 augustss
2313 1.10 augustss DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2314 1.11 augustss ehci_close_pipe(pipe, sc->sc_async_head);
2315 1.15 augustss }
2316 1.15 augustss
2317 1.15 augustss usbd_status
2318 1.15 augustss ehci_device_request(usbd_xfer_handle xfer)
2319 1.15 augustss {
2320 1.18 augustss #define exfer EXFER(xfer)
2321 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2322 1.15 augustss usb_device_request_t *req = &xfer->request;
2323 1.15 augustss usbd_device_handle dev = epipe->pipe.device;
2324 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2325 1.15 augustss int addr = dev->address;
2326 1.15 augustss ehci_soft_qtd_t *setup, *stat, *next;
2327 1.15 augustss ehci_soft_qh_t *sqh;
2328 1.15 augustss int isread;
2329 1.15 augustss int len;
2330 1.15 augustss usbd_status err;
2331 1.15 augustss int s;
2332 1.15 augustss
2333 1.15 augustss isread = req->bmRequestType & UT_READ;
2334 1.15 augustss len = UGETW(req->wLength);
2335 1.15 augustss
2336 1.15 augustss DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2337 1.15 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2338 1.15 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2339 1.15 augustss UGETW(req->wIndex), len, addr,
2340 1.15 augustss epipe->pipe.endpoint->edesc->bEndpointAddress));
2341 1.15 augustss
2342 1.15 augustss setup = ehci_alloc_sqtd(sc);
2343 1.15 augustss if (setup == NULL) {
2344 1.15 augustss err = USBD_NOMEM;
2345 1.15 augustss goto bad1;
2346 1.15 augustss }
2347 1.15 augustss stat = ehci_alloc_sqtd(sc);
2348 1.15 augustss if (stat == NULL) {
2349 1.15 augustss err = USBD_NOMEM;
2350 1.15 augustss goto bad2;
2351 1.15 augustss }
2352 1.15 augustss
2353 1.15 augustss sqh = epipe->sqh;
2354 1.15 augustss epipe->u.ctl.length = len;
2355 1.15 augustss
2356 1.15 augustss /* XXX
2357 1.15 augustss * Since we're messing with the QH we must know the HC is in sync.
2358 1.15 augustss * This needs to go away since it slows down control transfers.
2359 1.15 augustss * Removing it entails:
2360 1.15 augustss * - fill the QH only once with addr & wMaxPacketSize
2361 1.15 augustss * - put the correct data toggles in the qtds and set DTC
2362 1.15 augustss */
2363 1.15 augustss /* ehci_sync_hc(sc); */
2364 1.15 augustss /* Update device address and length since they may have changed. */
2365 1.15 augustss /* XXX This only needs to be done once, but it's too early in open. */
2366 1.15 augustss /* XXXX Should not touch ED here! */
2367 1.15 augustss sqh->qh.qh_endp =
2368 1.15 augustss (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2369 1.15 augustss htole32(
2370 1.15 augustss EHCI_QH_SET_ADDR(addr) |
2371 1.15 augustss /* EHCI_QH_DTC | */
2372 1.15 augustss EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2373 1.15 augustss );
2374 1.15 augustss /* Clear toggle */
2375 1.15 augustss sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2376 1.15 augustss
2377 1.15 augustss /* Set up data transaction */
2378 1.15 augustss if (len != 0) {
2379 1.15 augustss ehci_soft_qtd_t *end;
2380 1.15 augustss
2381 1.15 augustss err = ehci_alloc_std_chain(epipe, sc, len, isread, xfer,
2382 1.15 augustss &next, &end);
2383 1.15 augustss if (err)
2384 1.15 augustss goto bad3;
2385 1.15 augustss end->nextqtd = stat;
2386 1.15 augustss end->qtd.qtd_next =
2387 1.15 augustss end->qtd.qtd_altnext = htole32(stat->physaddr);
2388 1.15 augustss /* Start toggle at 1. */
2389 1.15 augustss /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2390 1.15 augustss } else {
2391 1.15 augustss next = stat;
2392 1.15 augustss }
2393 1.15 augustss
2394 1.15 augustss memcpy(KERNADDR(&epipe->u.ctl.reqdma), req, sizeof *req);
2395 1.15 augustss
2396 1.15 augustss setup->qtd.qtd_status = htole32(
2397 1.15 augustss EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2398 1.15 augustss EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2399 1.15 augustss EHCI_QTD_SET_CERR(3) |
2400 1.15 augustss EHCI_QTD_SET_BYTES(sizeof *req)
2401 1.15 augustss );
2402 1.15 augustss setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma));
2403 1.15 augustss setup->nextqtd = next;
2404 1.15 augustss setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2405 1.15 augustss setup->xfer = xfer;
2406 1.18 augustss setup->len = sizeof *req;
2407 1.15 augustss
2408 1.15 augustss stat->qtd.qtd_status = htole32(
2409 1.15 augustss EHCI_QTD_SET_STATUS(EHCI_QTD_ACTIVE) |
2410 1.15 augustss EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2411 1.15 augustss EHCI_QTD_SET_CERR(3) |
2412 1.15 augustss EHCI_QTD_IOC
2413 1.15 augustss );
2414 1.15 augustss stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2415 1.15 augustss stat->nextqtd = NULL;
2416 1.15 augustss stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2417 1.15 augustss stat->xfer = xfer;
2418 1.18 augustss stat->len = 0;
2419 1.15 augustss
2420 1.15 augustss #ifdef EHCI_DEBUG
2421 1.15 augustss if (ehcidebug > 2) {
2422 1.15 augustss DPRINTF(("ehci_device_request:\n"));
2423 1.15 augustss ehci_dump_sqh(sqh);
2424 1.15 augustss ehci_dump_sqtds(setup);
2425 1.15 augustss }
2426 1.15 augustss #endif
2427 1.15 augustss
2428 1.18 augustss exfer->sqtdstart = setup;
2429 1.18 augustss exfer->sqtdend = stat;
2430 1.18 augustss #ifdef DIAGNOSTIC
2431 1.18 augustss if (!exfer->isdone) {
2432 1.18 augustss printf("ehci_device_request: not done, exfer=%p\n", exfer);
2433 1.18 augustss }
2434 1.18 augustss exfer->isdone = 0;
2435 1.18 augustss #endif
2436 1.18 augustss
2437 1.15 augustss /* Insert qTD in QH list. */
2438 1.15 augustss s = splusb();
2439 1.15 augustss sqh->qh.qh_curqtd = 0;
2440 1.15 augustss sqh->qh.qh_qtd.qtd_next = htole32(setup->physaddr);
2441 1.15 augustss sqh->sqtd = setup;
2442 1.15 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2443 1.15 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2444 1.15 augustss ehci_timeout, xfer);
2445 1.15 augustss }
2446 1.18 augustss ehci_add_intr_list(sc, exfer);
2447 1.18 augustss xfer->status = USBD_IN_PROGRESS;
2448 1.15 augustss splx(s);
2449 1.15 augustss
2450 1.17 augustss #ifdef EHCI_DEBUG
2451 1.15 augustss if (ehcidebug > 10) {
2452 1.15 augustss delay(10000);
2453 1.15 augustss DPRINTF(("ehci_device_request: status=%x\n",
2454 1.15 augustss EOREAD4(sc, EHCI_USBSTS)));
2455 1.18 augustss ehci_dump_regs(sc);
2456 1.15 augustss ehci_dump_sqh(sc->sc_async_head);
2457 1.15 augustss ehci_dump_sqh(sqh);
2458 1.15 augustss ehci_dump_sqtds(setup);
2459 1.15 augustss }
2460 1.15 augustss #endif
2461 1.15 augustss
2462 1.15 augustss return (USBD_NORMAL_COMPLETION);
2463 1.15 augustss
2464 1.15 augustss bad3:
2465 1.15 augustss ehci_free_sqtd(sc, stat);
2466 1.15 augustss bad2:
2467 1.15 augustss ehci_free_sqtd(sc, setup);
2468 1.15 augustss bad1:
2469 1.15 augustss return (err);
2470 1.18 augustss #undef exfer
2471 1.10 augustss }
2472 1.10 augustss
2473 1.10 augustss /************************/
2474 1.5 augustss
2475 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2476 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2477 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { }
2478 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { }
2479 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { }
2480 1.5 augustss
2481 1.10 augustss /************************/
2482 1.10 augustss
2483 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2484 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2485 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2486 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2487 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2488 1.10 augustss
2489 1.10 augustss /************************/
2490 1.5 augustss
2491 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2492 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2493 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2494 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2495 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
2496