ehci.c revision 1.30 1 1.30 augustss /* $NetBSD: ehci.c,v 1.30 2002/05/19 06:24:30 augustss Exp $ */
2 1.29 augustss
3 1.29 augustss /*
4 1.29 augustss * TODO
5 1.29 augustss * hold off explorations by companion controllers until ehci has started.
6 1.29 augustss */
7 1.1 augustss
8 1.1 augustss /*
9 1.5 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
10 1.1 augustss * All rights reserved.
11 1.1 augustss *
12 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
13 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
14 1.1 augustss *
15 1.1 augustss * Redistribution and use in source and binary forms, with or without
16 1.1 augustss * modification, are permitted provided that the following conditions
17 1.1 augustss * are met:
18 1.1 augustss * 1. Redistributions of source code must retain the above copyright
19 1.1 augustss * notice, this list of conditions and the following disclaimer.
20 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
21 1.1 augustss * notice, this list of conditions and the following disclaimer in the
22 1.1 augustss * documentation and/or other materials provided with the distribution.
23 1.1 augustss * 3. All advertising materials mentioning features or use of this software
24 1.1 augustss * must display the following acknowledgement:
25 1.1 augustss * This product includes software developed by the NetBSD
26 1.1 augustss * Foundation, Inc. and its contributors.
27 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
28 1.1 augustss * contributors may be used to endorse or promote products derived
29 1.1 augustss * from this software without specific prior written permission.
30 1.1 augustss *
31 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
32 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
33 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
34 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
35 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
36 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
37 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
38 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
39 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
42 1.1 augustss */
43 1.1 augustss
44 1.1 augustss /*
45 1.3 augustss * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
46 1.1 augustss *
47 1.5 augustss * The EHCI 0.96 spec can be found at
48 1.3 augustss * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
49 1.7 augustss * and the USB 2.0 spec at
50 1.7 augustss * http://www.usb.org/developers/data/usb_20.zip
51 1.1 augustss *
52 1.1 augustss */
53 1.4 lukem
54 1.4 lukem #include <sys/cdefs.h>
55 1.30 augustss __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.30 2002/05/19 06:24:30 augustss Exp $");
56 1.1 augustss
57 1.1 augustss #include <sys/param.h>
58 1.1 augustss #include <sys/systm.h>
59 1.1 augustss #include <sys/kernel.h>
60 1.1 augustss #include <sys/malloc.h>
61 1.1 augustss #include <sys/device.h>
62 1.1 augustss #include <sys/select.h>
63 1.1 augustss #include <sys/proc.h>
64 1.1 augustss #include <sys/queue.h>
65 1.1 augustss
66 1.1 augustss #include <machine/bus.h>
67 1.1 augustss #include <machine/endian.h>
68 1.1 augustss
69 1.1 augustss #include <dev/usb/usb.h>
70 1.1 augustss #include <dev/usb/usbdi.h>
71 1.1 augustss #include <dev/usb/usbdivar.h>
72 1.1 augustss #include <dev/usb/usb_mem.h>
73 1.1 augustss #include <dev/usb/usb_quirks.h>
74 1.1 augustss
75 1.1 augustss #include <dev/usb/ehcireg.h>
76 1.1 augustss #include <dev/usb/ehcivar.h>
77 1.1 augustss
78 1.1 augustss #ifdef EHCI_DEBUG
79 1.1 augustss #define DPRINTF(x) if (ehcidebug) printf x
80 1.1 augustss #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
81 1.6 augustss int ehcidebug = 0;
82 1.15 augustss #ifndef __NetBSD__
83 1.1 augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
84 1.15 augustss #endif
85 1.1 augustss #else
86 1.1 augustss #define DPRINTF(x)
87 1.1 augustss #define DPRINTFN(n,x)
88 1.1 augustss #endif
89 1.1 augustss
90 1.5 augustss struct ehci_pipe {
91 1.5 augustss struct usbd_pipe pipe;
92 1.10 augustss ehci_soft_qh_t *sqh;
93 1.10 augustss union {
94 1.10 augustss ehci_soft_qtd_t *qtd;
95 1.10 augustss /* ehci_soft_itd_t *itd; */
96 1.10 augustss } tail;
97 1.10 augustss union {
98 1.10 augustss /* Control pipe */
99 1.10 augustss struct {
100 1.10 augustss usb_dma_t reqdma;
101 1.10 augustss u_int length;
102 1.19 augustss /*ehci_soft_qtd_t *setup, *data, *stat;*/
103 1.10 augustss } ctl;
104 1.10 augustss /* Interrupt pipe */
105 1.15 augustss /* XXX */
106 1.10 augustss /* Bulk pipe */
107 1.10 augustss struct {
108 1.10 augustss u_int length;
109 1.10 augustss } bulk;
110 1.10 augustss /* Iso pipe */
111 1.15 augustss /* XXX */
112 1.10 augustss } u;
113 1.5 augustss };
114 1.5 augustss
115 1.5 augustss Static void ehci_shutdown(void *);
116 1.5 augustss Static void ehci_power(int, void *);
117 1.5 augustss
118 1.5 augustss Static usbd_status ehci_open(usbd_pipe_handle);
119 1.5 augustss Static void ehci_poll(struct usbd_bus *);
120 1.5 augustss Static void ehci_softintr(void *);
121 1.11 augustss Static int ehci_intr1(ehci_softc_t *);
122 1.15 augustss Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
123 1.18 augustss Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
124 1.18 augustss Static void ehci_idone(struct ehci_xfer *);
125 1.15 augustss Static void ehci_timeout(void *);
126 1.15 augustss Static void ehci_timeout_task(void *);
127 1.5 augustss
128 1.5 augustss Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
129 1.5 augustss Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
130 1.5 augustss
131 1.5 augustss Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
132 1.5 augustss Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
133 1.5 augustss
134 1.5 augustss Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
135 1.5 augustss Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
136 1.5 augustss Static void ehci_root_ctrl_abort(usbd_xfer_handle);
137 1.5 augustss Static void ehci_root_ctrl_close(usbd_pipe_handle);
138 1.5 augustss Static void ehci_root_ctrl_done(usbd_xfer_handle);
139 1.5 augustss
140 1.5 augustss Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
141 1.5 augustss Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
142 1.5 augustss Static void ehci_root_intr_abort(usbd_xfer_handle);
143 1.5 augustss Static void ehci_root_intr_close(usbd_pipe_handle);
144 1.5 augustss Static void ehci_root_intr_done(usbd_xfer_handle);
145 1.5 augustss
146 1.5 augustss Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
147 1.5 augustss Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
148 1.5 augustss Static void ehci_device_ctrl_abort(usbd_xfer_handle);
149 1.5 augustss Static void ehci_device_ctrl_close(usbd_pipe_handle);
150 1.5 augustss Static void ehci_device_ctrl_done(usbd_xfer_handle);
151 1.5 augustss
152 1.5 augustss Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
153 1.5 augustss Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
154 1.5 augustss Static void ehci_device_bulk_abort(usbd_xfer_handle);
155 1.5 augustss Static void ehci_device_bulk_close(usbd_pipe_handle);
156 1.5 augustss Static void ehci_device_bulk_done(usbd_xfer_handle);
157 1.5 augustss
158 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
159 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
160 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle);
161 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle);
162 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle);
163 1.5 augustss
164 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
165 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
166 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle);
167 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle);
168 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle);
169 1.5 augustss
170 1.5 augustss Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
171 1.5 augustss Static void ehci_noop(usbd_pipe_handle pipe);
172 1.5 augustss
173 1.5 augustss Static int ehci_str(usb_string_descriptor_t *, int, char *);
174 1.6 augustss Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
175 1.6 augustss Static void ehci_pcd_able(ehci_softc_t *, int);
176 1.6 augustss Static void ehci_pcd_enable(void *);
177 1.6 augustss Static void ehci_disown(ehci_softc_t *, int, int);
178 1.5 augustss
179 1.9 augustss Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
180 1.9 augustss Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
181 1.9 augustss
182 1.9 augustss Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
183 1.9 augustss Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
184 1.25 augustss Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
185 1.15 augustss ehci_softc_t *, int, int, usbd_xfer_handle,
186 1.15 augustss ehci_soft_qtd_t **, ehci_soft_qtd_t **);
187 1.25 augustss Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
188 1.18 augustss ehci_soft_qtd_t *);
189 1.15 augustss
190 1.15 augustss Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
191 1.9 augustss
192 1.10 augustss Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
193 1.10 augustss Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
194 1.10 augustss ehci_soft_qh_t *);
195 1.23 augustss Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
196 1.11 augustss Static void ehci_sync_hc(ehci_softc_t *);
197 1.10 augustss
198 1.10 augustss Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
199 1.10 augustss Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
200 1.9 augustss
201 1.5 augustss #ifdef EHCI_DEBUG
202 1.18 augustss Static void ehci_dump_regs(ehci_softc_t *);
203 1.6 augustss Static void ehci_dump(void);
204 1.6 augustss Static ehci_softc_t *theehci;
205 1.15 augustss Static void ehci_dump_link(ehci_link_t, int);
206 1.15 augustss Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
207 1.9 augustss Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
208 1.9 augustss Static void ehci_dump_qtd(ehci_qtd_t *);
209 1.9 augustss Static void ehci_dump_sqh(ehci_soft_qh_t *);
210 1.18 augustss Static void ehci_dump_exfer(struct ehci_xfer *);
211 1.5 augustss #endif
212 1.5 augustss
213 1.15 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
214 1.15 augustss
215 1.11 augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
216 1.11 augustss
217 1.5 augustss #define EHCI_INTR_ENDPT 1
218 1.5 augustss
219 1.18 augustss #define ehci_add_intr_list(sc, ex) \
220 1.18 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
221 1.18 augustss #define ehci_del_intr_list(ex) \
222 1.18 augustss LIST_REMOVE((ex), inext)
223 1.18 augustss
224 1.5 augustss Static struct usbd_bus_methods ehci_bus_methods = {
225 1.5 augustss ehci_open,
226 1.5 augustss ehci_softintr,
227 1.5 augustss ehci_poll,
228 1.5 augustss ehci_allocm,
229 1.5 augustss ehci_freem,
230 1.5 augustss ehci_allocx,
231 1.5 augustss ehci_freex,
232 1.5 augustss };
233 1.5 augustss
234 1.5 augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
235 1.5 augustss ehci_root_ctrl_transfer,
236 1.5 augustss ehci_root_ctrl_start,
237 1.5 augustss ehci_root_ctrl_abort,
238 1.5 augustss ehci_root_ctrl_close,
239 1.5 augustss ehci_noop,
240 1.5 augustss ehci_root_ctrl_done,
241 1.5 augustss };
242 1.5 augustss
243 1.5 augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
244 1.5 augustss ehci_root_intr_transfer,
245 1.5 augustss ehci_root_intr_start,
246 1.5 augustss ehci_root_intr_abort,
247 1.5 augustss ehci_root_intr_close,
248 1.5 augustss ehci_noop,
249 1.5 augustss ehci_root_intr_done,
250 1.5 augustss };
251 1.5 augustss
252 1.5 augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
253 1.5 augustss ehci_device_ctrl_transfer,
254 1.5 augustss ehci_device_ctrl_start,
255 1.5 augustss ehci_device_ctrl_abort,
256 1.5 augustss ehci_device_ctrl_close,
257 1.5 augustss ehci_noop,
258 1.5 augustss ehci_device_ctrl_done,
259 1.5 augustss };
260 1.5 augustss
261 1.5 augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
262 1.5 augustss ehci_device_intr_transfer,
263 1.5 augustss ehci_device_intr_start,
264 1.5 augustss ehci_device_intr_abort,
265 1.5 augustss ehci_device_intr_close,
266 1.5 augustss ehci_device_clear_toggle,
267 1.5 augustss ehci_device_intr_done,
268 1.5 augustss };
269 1.5 augustss
270 1.5 augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
271 1.5 augustss ehci_device_bulk_transfer,
272 1.5 augustss ehci_device_bulk_start,
273 1.5 augustss ehci_device_bulk_abort,
274 1.5 augustss ehci_device_bulk_close,
275 1.5 augustss ehci_device_clear_toggle,
276 1.5 augustss ehci_device_bulk_done,
277 1.5 augustss };
278 1.5 augustss
279 1.5 augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
280 1.5 augustss ehci_device_isoc_transfer,
281 1.5 augustss ehci_device_isoc_start,
282 1.5 augustss ehci_device_isoc_abort,
283 1.5 augustss ehci_device_isoc_close,
284 1.5 augustss ehci_noop,
285 1.5 augustss ehci_device_isoc_done,
286 1.5 augustss };
287 1.5 augustss
288 1.1 augustss usbd_status
289 1.1 augustss ehci_init(ehci_softc_t *sc)
290 1.1 augustss {
291 1.3 augustss u_int32_t version, sparams, cparams, hcr;
292 1.3 augustss u_int i;
293 1.3 augustss usbd_status err;
294 1.11 augustss ehci_soft_qh_t *sqh;
295 1.3 augustss
296 1.3 augustss DPRINTF(("ehci_init: start\n"));
297 1.6 augustss #ifdef EHCI_DEBUG
298 1.6 augustss theehci = sc;
299 1.6 augustss #endif
300 1.3 augustss
301 1.3 augustss sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
302 1.3 augustss
303 1.3 augustss version = EREAD2(sc, EHCI_HCIVERSION);
304 1.3 augustss printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
305 1.3 augustss version >> 8, version & 0xff);
306 1.3 augustss
307 1.3 augustss sparams = EREAD4(sc, EHCI_HCSPARAMS);
308 1.3 augustss DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
309 1.6 augustss sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
310 1.3 augustss if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
311 1.3 augustss printf("%s: wrong number of companions (%d != %d)\n",
312 1.3 augustss USBDEVNAME(sc->sc_bus.bdev),
313 1.3 augustss EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
314 1.3 augustss return (USBD_IOERROR);
315 1.3 augustss }
316 1.3 augustss if (sc->sc_ncomp > 0) {
317 1.3 augustss printf("%s: companion controller%s, %d port%s each:",
318 1.3 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
319 1.3 augustss EHCI_HCS_N_PCC(sparams),
320 1.3 augustss EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
321 1.3 augustss for (i = 0; i < sc->sc_ncomp; i++)
322 1.3 augustss printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
323 1.3 augustss printf("\n");
324 1.3 augustss }
325 1.5 augustss sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
326 1.3 augustss cparams = EREAD4(sc, EHCI_HCCPARAMS);
327 1.3 augustss DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
328 1.3 augustss
329 1.3 augustss sc->sc_bus.usbrev = USBREV_2_0;
330 1.3 augustss
331 1.3 augustss /* Reset the controller */
332 1.3 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
333 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
334 1.3 augustss usb_delay_ms(&sc->sc_bus, 1);
335 1.3 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
336 1.3 augustss for (i = 0; i < 100; i++) {
337 1.3 augustss delay(10);
338 1.3 augustss hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
339 1.3 augustss if (!hcr)
340 1.3 augustss break;
341 1.3 augustss }
342 1.3 augustss if (hcr) {
343 1.3 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
344 1.3 augustss return (USBD_IOERROR);
345 1.3 augustss }
346 1.3 augustss
347 1.3 augustss /* frame list size at default, read back what we got and use that */
348 1.3 augustss switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
349 1.3 augustss case 0: sc->sc_flsize = 1024*4; break;
350 1.3 augustss case 1: sc->sc_flsize = 512*4; break;
351 1.3 augustss case 2: sc->sc_flsize = 256*4; break;
352 1.3 augustss case 3: return (USBD_IOERROR);
353 1.3 augustss }
354 1.3 augustss err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
355 1.3 augustss EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
356 1.3 augustss if (err)
357 1.3 augustss return (err);
358 1.3 augustss DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
359 1.3 augustss
360 1.5 augustss /* Set up the bus struct. */
361 1.5 augustss sc->sc_bus.methods = &ehci_bus_methods;
362 1.5 augustss sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
363 1.5 augustss
364 1.5 augustss sc->sc_powerhook = powerhook_establish(ehci_power, sc);
365 1.5 augustss sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
366 1.5 augustss
367 1.6 augustss sc->sc_eintrs = EHCI_NORMAL_INTRS;
368 1.6 augustss
369 1.11 augustss /* Allocate dummy QH that starts the async list. */
370 1.11 augustss sqh = ehci_alloc_sqh(sc);
371 1.11 augustss if (sqh == NULL) {
372 1.9 augustss err = USBD_NOMEM;
373 1.9 augustss goto bad1;
374 1.9 augustss }
375 1.11 augustss /* Fill the QH */
376 1.11 augustss sqh->qh.qh_endp =
377 1.11 augustss htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
378 1.11 augustss sqh->qh.qh_link =
379 1.11 augustss htole32(sqh->physaddr | EHCI_LINK_QH);
380 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
381 1.11 augustss sqh->next = NULL;
382 1.11 augustss /* Fill the overlay qTD */
383 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
384 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
385 1.26 augustss sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
386 1.11 augustss sqh->sqtd = NULL;
387 1.9 augustss #ifdef EHCI_DEBUG
388 1.9 augustss if (ehcidebug) {
389 1.27 enami ehci_dump_sqh(sqh);
390 1.9 augustss }
391 1.9 augustss #endif
392 1.9 augustss
393 1.9 augustss /* Point to async list */
394 1.11 augustss sc->sc_async_head = sqh;
395 1.11 augustss EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
396 1.9 augustss
397 1.9 augustss usb_callout_init(sc->sc_tmo_pcd);
398 1.9 augustss
399 1.10 augustss lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
400 1.10 augustss
401 1.6 augustss /* Enable interrupts */
402 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
403 1.6 augustss
404 1.6 augustss /* Turn on controller */
405 1.6 augustss EOWRITE4(sc, EHCI_USBCMD,
406 1.6 augustss EHCI_CMD_ITC_8 | /* 8 microframes */
407 1.6 augustss (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
408 1.10 augustss EHCI_CMD_ASE |
409 1.6 augustss /* EHCI_CMD_PSE | */
410 1.6 augustss EHCI_CMD_RS);
411 1.6 augustss
412 1.6 augustss /* Take over port ownership */
413 1.6 augustss EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
414 1.6 augustss
415 1.8 augustss for (i = 0; i < 100; i++) {
416 1.8 augustss delay(10);
417 1.8 augustss hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
418 1.8 augustss if (!hcr)
419 1.8 augustss break;
420 1.8 augustss }
421 1.8 augustss if (hcr) {
422 1.8 augustss printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
423 1.8 augustss return (USBD_IOERROR);
424 1.8 augustss }
425 1.8 augustss
426 1.5 augustss return (USBD_NORMAL_COMPLETION);
427 1.9 augustss
428 1.9 augustss #if 0
429 1.11 augustss bad2:
430 1.15 augustss ehci_free_sqh(sc, sc->sc_async_head);
431 1.9 augustss #endif
432 1.9 augustss bad1:
433 1.9 augustss usb_freemem(&sc->sc_bus, &sc->sc_fldma);
434 1.9 augustss return (err);
435 1.1 augustss }
436 1.1 augustss
437 1.1 augustss int
438 1.1 augustss ehci_intr(void *v)
439 1.1 augustss {
440 1.6 augustss ehci_softc_t *sc = v;
441 1.6 augustss
442 1.17 augustss if (sc == NULL || sc->sc_dying)
443 1.15 augustss return (0);
444 1.15 augustss
445 1.6 augustss /* If we get an interrupt while polling, then just ignore it. */
446 1.6 augustss if (sc->sc_bus.use_polling) {
447 1.6 augustss #ifdef DIAGNOSTIC
448 1.6 augustss printf("ehci_intr: ignored interrupt while polling\n");
449 1.6 augustss #endif
450 1.6 augustss return (0);
451 1.6 augustss }
452 1.6 augustss
453 1.6 augustss return (ehci_intr1(sc));
454 1.6 augustss }
455 1.6 augustss
456 1.6 augustss Static int
457 1.6 augustss ehci_intr1(ehci_softc_t *sc)
458 1.6 augustss {
459 1.6 augustss u_int32_t intrs, eintrs;
460 1.6 augustss
461 1.6 augustss DPRINTFN(20,("ehci_intr1: enter\n"));
462 1.6 augustss
463 1.6 augustss /* In case the interrupt occurs before initialization has completed. */
464 1.6 augustss if (sc == NULL) {
465 1.6 augustss #ifdef DIAGNOSTIC
466 1.6 augustss printf("ehci_intr: sc == NULL\n");
467 1.6 augustss #endif
468 1.6 augustss return (0);
469 1.6 augustss }
470 1.6 augustss
471 1.6 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
472 1.6 augustss
473 1.6 augustss if (!intrs)
474 1.6 augustss return (0);
475 1.6 augustss
476 1.6 augustss EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
477 1.6 augustss eintrs = intrs & sc->sc_eintrs;
478 1.6 augustss DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
479 1.6 augustss sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
480 1.6 augustss (u_int)eintrs));
481 1.6 augustss if (!eintrs)
482 1.6 augustss return (0);
483 1.6 augustss
484 1.6 augustss sc->sc_bus.intr_context++;
485 1.6 augustss sc->sc_bus.no_intrs++;
486 1.10 augustss if (eintrs & EHCI_STS_IAA) {
487 1.10 augustss DPRINTF(("ehci_intr1: door bell\n"));
488 1.11 augustss wakeup(&sc->sc_async_head);
489 1.20 augustss eintrs &= ~EHCI_STS_IAA;
490 1.10 augustss }
491 1.18 augustss if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
492 1.22 augustss DPRINTF(("ehci_intr1: %s %s\n",
493 1.22 augustss eintrs & EHCI_STS_INT ? "INT" : "",
494 1.22 augustss eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
495 1.18 augustss usb_schedsoftintr(&sc->sc_bus);
496 1.21 augustss eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
497 1.6 augustss }
498 1.6 augustss if (eintrs & EHCI_STS_HSE) {
499 1.6 augustss printf("%s: unrecoverable error, controller halted\n",
500 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
501 1.6 augustss /* XXX what else */
502 1.6 augustss }
503 1.6 augustss if (eintrs & EHCI_STS_PCD) {
504 1.6 augustss ehci_pcd(sc, sc->sc_intrxfer);
505 1.6 augustss /*
506 1.6 augustss * Disable PCD interrupt for now, because it will be
507 1.6 augustss * on until the port has been reset.
508 1.6 augustss */
509 1.6 augustss ehci_pcd_able(sc, 0);
510 1.6 augustss /* Do not allow RHSC interrupts > 1 per second */
511 1.6 augustss usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
512 1.6 augustss eintrs &= ~EHCI_STS_PCD;
513 1.6 augustss }
514 1.6 augustss
515 1.6 augustss sc->sc_bus.intr_context--;
516 1.6 augustss
517 1.6 augustss if (eintrs != 0) {
518 1.6 augustss /* Block unprocessed interrupts. */
519 1.6 augustss sc->sc_eintrs &= ~eintrs;
520 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
521 1.6 augustss printf("%s: blocking intrs 0x%x\n",
522 1.6 augustss USBDEVNAME(sc->sc_bus.bdev), eintrs);
523 1.6 augustss }
524 1.6 augustss
525 1.6 augustss return (1);
526 1.6 augustss }
527 1.6 augustss
528 1.6 augustss void
529 1.6 augustss ehci_pcd_able(ehci_softc_t *sc, int on)
530 1.6 augustss {
531 1.6 augustss DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
532 1.6 augustss if (on)
533 1.6 augustss sc->sc_eintrs |= EHCI_STS_PCD;
534 1.6 augustss else
535 1.6 augustss sc->sc_eintrs &= ~EHCI_STS_PCD;
536 1.6 augustss EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
537 1.6 augustss }
538 1.6 augustss
539 1.6 augustss void
540 1.6 augustss ehci_pcd_enable(void *v_sc)
541 1.6 augustss {
542 1.6 augustss ehci_softc_t *sc = v_sc;
543 1.6 augustss
544 1.6 augustss ehci_pcd_able(sc, 1);
545 1.6 augustss }
546 1.6 augustss
547 1.6 augustss void
548 1.6 augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
549 1.6 augustss {
550 1.6 augustss usbd_pipe_handle pipe;
551 1.15 augustss struct ehci_pipe *epipe;
552 1.6 augustss u_char *p;
553 1.6 augustss int i, m;
554 1.6 augustss
555 1.6 augustss if (xfer == NULL) {
556 1.6 augustss /* Just ignore the change. */
557 1.6 augustss return;
558 1.6 augustss }
559 1.6 augustss
560 1.6 augustss pipe = xfer->pipe;
561 1.15 augustss epipe = (struct ehci_pipe *)pipe;
562 1.6 augustss
563 1.30 augustss p = KERNADDR(&xfer->dmabuf, 0);
564 1.6 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
565 1.6 augustss memset(p, 0, xfer->length);
566 1.6 augustss for (i = 1; i <= m; i++) {
567 1.6 augustss /* Pick out CHANGE bits from the status reg. */
568 1.6 augustss if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
569 1.6 augustss p[i/8] |= 1 << (i%8);
570 1.6 augustss }
571 1.6 augustss DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
572 1.6 augustss xfer->actlen = xfer->length;
573 1.6 augustss xfer->status = USBD_NORMAL_COMPLETION;
574 1.6 augustss
575 1.6 augustss usb_transfer_complete(xfer);
576 1.1 augustss }
577 1.1 augustss
578 1.5 augustss void
579 1.5 augustss ehci_softintr(void *v)
580 1.5 augustss {
581 1.18 augustss ehci_softc_t *sc = v;
582 1.18 augustss struct ehci_xfer *ex;
583 1.18 augustss
584 1.18 augustss DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
585 1.18 augustss sc->sc_bus.intr_context));
586 1.18 augustss
587 1.18 augustss sc->sc_bus.intr_context++;
588 1.18 augustss
589 1.18 augustss /*
590 1.18 augustss * The only explanation I can think of for why EHCI is as brain dead
591 1.18 augustss * as UHCI interrupt-wise is that Intel was involved in both.
592 1.18 augustss * An interrupt just tells us that something is done, we have no
593 1.18 augustss * clue what, so we need to scan through all active transfers. :-(
594 1.18 augustss */
595 1.18 augustss for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext))
596 1.18 augustss ehci_check_intr(sc, ex);
597 1.18 augustss
598 1.29 augustss if (sc->sc_softwake) {
599 1.29 augustss sc->sc_softwake = 0;
600 1.29 augustss wakeup(&sc->sc_softwake);
601 1.29 augustss }
602 1.29 augustss
603 1.18 augustss sc->sc_bus.intr_context--;
604 1.18 augustss }
605 1.18 augustss
606 1.18 augustss /* Check for an interrupt. */
607 1.18 augustss void
608 1.18 augustss ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
609 1.18 augustss {
610 1.18 augustss ehci_soft_qtd_t *sqtd, *lsqtd;
611 1.18 augustss u_int32_t status;
612 1.18 augustss
613 1.22 augustss DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
614 1.18 augustss
615 1.18 augustss if (ex->sqtdstart == NULL) {
616 1.18 augustss printf("ehci_check_intr: sqtdstart=NULL\n");
617 1.18 augustss return;
618 1.18 augustss }
619 1.18 augustss lsqtd = ex->sqtdend;
620 1.18 augustss #ifdef DIAGNOSTIC
621 1.18 augustss if (lsqtd == NULL) {
622 1.18 augustss printf("ehci_check_intr: sqtd==0\n");
623 1.18 augustss return;
624 1.18 augustss }
625 1.18 augustss #endif
626 1.18 augustss /*
627 1.18 augustss * If the last TD is still active we need to check whether there
628 1.18 augustss * is a an error somewhere in the middle, or whether there was a
629 1.18 augustss * short packet (SPD and not ACTIVE).
630 1.18 augustss */
631 1.18 augustss if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
632 1.18 augustss DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
633 1.18 augustss for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
634 1.18 augustss status = le32toh(sqtd->qtd.qtd_status);
635 1.18 augustss /* If there's an active QTD the xfer isn't done. */
636 1.18 augustss if (status & EHCI_QTD_ACTIVE)
637 1.18 augustss break;
638 1.18 augustss /* Any kind of error makes the xfer done. */
639 1.18 augustss if (status & EHCI_QTD_HALTED)
640 1.18 augustss goto done;
641 1.18 augustss /* We want short packets, and it is short: it's done */
642 1.18 augustss if (EHCI_QTD_SET_BYTES(status) != 0)
643 1.18 augustss goto done;
644 1.18 augustss }
645 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
646 1.18 augustss ex, ex->sqtdstart));
647 1.18 augustss return;
648 1.18 augustss }
649 1.18 augustss done:
650 1.18 augustss DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
651 1.18 augustss usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
652 1.18 augustss ehci_idone(ex);
653 1.18 augustss }
654 1.18 augustss
655 1.18 augustss void
656 1.18 augustss ehci_idone(struct ehci_xfer *ex)
657 1.18 augustss {
658 1.18 augustss usbd_xfer_handle xfer = &ex->xfer;
659 1.24 augustss #ifdef EHCI_DEBUG
660 1.18 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
661 1.24 augustss #endif
662 1.18 augustss ehci_soft_qtd_t *sqtd;
663 1.18 augustss u_int32_t status = 0, nstatus;
664 1.18 augustss int actlen;
665 1.18 augustss
666 1.22 augustss DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
667 1.18 augustss #ifdef DIAGNOSTIC
668 1.18 augustss {
669 1.18 augustss int s = splhigh();
670 1.18 augustss if (ex->isdone) {
671 1.18 augustss splx(s);
672 1.18 augustss #ifdef EHCI_DEBUG
673 1.18 augustss printf("ehci_idone: ex is done!\n ");
674 1.18 augustss ehci_dump_exfer(ex);
675 1.18 augustss #else
676 1.18 augustss printf("ehci_idone: ex=%p is done!\n", ex);
677 1.18 augustss #endif
678 1.18 augustss return;
679 1.18 augustss }
680 1.18 augustss ex->isdone = 1;
681 1.18 augustss splx(s);
682 1.18 augustss }
683 1.18 augustss #endif
684 1.18 augustss
685 1.18 augustss if (xfer->status == USBD_CANCELLED ||
686 1.18 augustss xfer->status == USBD_TIMEOUT) {
687 1.18 augustss DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
688 1.18 augustss return;
689 1.18 augustss }
690 1.18 augustss
691 1.18 augustss #ifdef EHCI_DEBUG
692 1.23 augustss DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
693 1.18 augustss if (ehcidebug > 10)
694 1.18 augustss ehci_dump_sqtds(ex->sqtdstart);
695 1.18 augustss #endif
696 1.18 augustss
697 1.18 augustss /* The transfer is done, compute actual length and status. */
698 1.18 augustss actlen = 0;
699 1.18 augustss for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
700 1.18 augustss nstatus = le32toh(sqtd->qtd.qtd_status);
701 1.18 augustss if (nstatus & EHCI_QTD_ACTIVE)
702 1.18 augustss break;
703 1.18 augustss
704 1.18 augustss status = nstatus;
705 1.18 augustss if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
706 1.18 augustss actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
707 1.18 augustss }
708 1.22 augustss
709 1.22 augustss /* If there are left over TDs we need to update the toggle. */
710 1.22 augustss if (sqtd != NULL) {
711 1.26 augustss if (!(xfer->rqflags & URQ_REQUEST))
712 1.26 augustss printf("ehci_idone: need toggle update\n");
713 1.18 augustss #if 0
714 1.18 augustss epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
715 1.18 augustss #endif
716 1.22 augustss }
717 1.18 augustss
718 1.18 augustss status &= EHCI_QTD_STATERRS;
719 1.23 augustss DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
720 1.22 augustss xfer->length, actlen, status));
721 1.18 augustss xfer->actlen = actlen;
722 1.18 augustss if (status != 0) {
723 1.18 augustss #ifdef EHCI_DEBUG
724 1.18 augustss char sbuf[128];
725 1.18 augustss
726 1.18 augustss bitmask_snprintf((u_int32_t)status,
727 1.23 augustss "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE"
728 1.23 augustss "\7HALTED",
729 1.18 augustss sbuf, sizeof(sbuf));
730 1.18 augustss
731 1.22 augustss DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2,
732 1.18 augustss ("ehci_idone: error, addr=%d, endpt=0x%02x, "
733 1.18 augustss "status 0x%s\n",
734 1.18 augustss xfer->pipe->device->address,
735 1.18 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
736 1.18 augustss sbuf));
737 1.23 augustss if (ehcidebug > 2) {
738 1.23 augustss ehci_dump_sqh(epipe->sqh);
739 1.23 augustss ehci_dump_sqtds(ex->sqtdstart);
740 1.23 augustss }
741 1.18 augustss #endif
742 1.18 augustss if (status == EHCI_QTD_HALTED)
743 1.18 augustss xfer->status = USBD_STALLED;
744 1.18 augustss else
745 1.18 augustss xfer->status = USBD_IOERROR; /* more info XXX */
746 1.18 augustss } else {
747 1.18 augustss xfer->status = USBD_NORMAL_COMPLETION;
748 1.18 augustss }
749 1.18 augustss
750 1.18 augustss usb_transfer_complete(xfer);
751 1.22 augustss DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
752 1.5 augustss }
753 1.5 augustss
754 1.15 augustss /*
755 1.15 augustss * Wait here until controller claims to have an interrupt.
756 1.18 augustss * Then call ehci_intr and return. Use timeout to avoid waiting
757 1.15 augustss * too long.
758 1.15 augustss */
759 1.15 augustss void
760 1.15 augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
761 1.15 augustss {
762 1.15 augustss int timo = xfer->timeout;
763 1.15 augustss int usecs;
764 1.15 augustss u_int32_t intrs;
765 1.15 augustss
766 1.15 augustss xfer->status = USBD_IN_PROGRESS;
767 1.15 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
768 1.15 augustss usb_delay_ms(&sc->sc_bus, 1);
769 1.17 augustss if (sc->sc_dying)
770 1.17 augustss break;
771 1.15 augustss intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
772 1.15 augustss sc->sc_eintrs;
773 1.15 augustss DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
774 1.15 augustss #ifdef OHCI_DEBUG
775 1.15 augustss if (ehcidebug > 15)
776 1.18 augustss ehci_dump_regs(sc);
777 1.15 augustss #endif
778 1.15 augustss if (intrs) {
779 1.15 augustss ehci_intr1(sc);
780 1.15 augustss if (xfer->status != USBD_IN_PROGRESS)
781 1.15 augustss return;
782 1.15 augustss }
783 1.15 augustss }
784 1.15 augustss
785 1.15 augustss /* Timeout */
786 1.15 augustss DPRINTF(("ehci_waitintr: timeout\n"));
787 1.15 augustss xfer->status = USBD_TIMEOUT;
788 1.15 augustss usb_transfer_complete(xfer);
789 1.15 augustss /* XXX should free TD */
790 1.15 augustss }
791 1.15 augustss
792 1.5 augustss void
793 1.5 augustss ehci_poll(struct usbd_bus *bus)
794 1.5 augustss {
795 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)bus;
796 1.5 augustss #ifdef EHCI_DEBUG
797 1.5 augustss static int last;
798 1.5 augustss int new;
799 1.6 augustss new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
800 1.5 augustss if (new != last) {
801 1.5 augustss DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
802 1.5 augustss last = new;
803 1.5 augustss }
804 1.5 augustss #endif
805 1.5 augustss
806 1.6 augustss if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
807 1.5 augustss ehci_intr1(sc);
808 1.5 augustss }
809 1.5 augustss
810 1.1 augustss int
811 1.1 augustss ehci_detach(struct ehci_softc *sc, int flags)
812 1.1 augustss {
813 1.1 augustss int rv = 0;
814 1.1 augustss
815 1.1 augustss if (sc->sc_child != NULL)
816 1.1 augustss rv = config_detach(sc->sc_child, flags);
817 1.1 augustss
818 1.1 augustss if (rv != 0)
819 1.1 augustss return (rv);
820 1.1 augustss
821 1.6 augustss usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
822 1.6 augustss
823 1.1 augustss if (sc->sc_powerhook != NULL)
824 1.1 augustss powerhook_disestablish(sc->sc_powerhook);
825 1.1 augustss if (sc->sc_shutdownhook != NULL)
826 1.1 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
827 1.1 augustss
828 1.17 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
829 1.15 augustss
830 1.1 augustss /* XXX free other data structures XXX */
831 1.1 augustss
832 1.1 augustss return (rv);
833 1.1 augustss }
834 1.1 augustss
835 1.1 augustss
836 1.1 augustss int
837 1.1 augustss ehci_activate(device_ptr_t self, enum devact act)
838 1.1 augustss {
839 1.1 augustss struct ehci_softc *sc = (struct ehci_softc *)self;
840 1.1 augustss int rv = 0;
841 1.1 augustss
842 1.1 augustss switch (act) {
843 1.1 augustss case DVACT_ACTIVATE:
844 1.1 augustss return (EOPNOTSUPP);
845 1.1 augustss break;
846 1.1 augustss
847 1.1 augustss case DVACT_DEACTIVATE:
848 1.1 augustss if (sc->sc_child != NULL)
849 1.1 augustss rv = config_deactivate(sc->sc_child);
850 1.5 augustss sc->sc_dying = 1;
851 1.1 augustss break;
852 1.1 augustss }
853 1.1 augustss return (rv);
854 1.1 augustss }
855 1.1 augustss
856 1.5 augustss /*
857 1.5 augustss * Handle suspend/resume.
858 1.5 augustss *
859 1.5 augustss * We need to switch to polling mode here, because this routine is
860 1.5 augustss * called from an intterupt context. This is all right since we
861 1.5 augustss * are almost suspended anyway.
862 1.5 augustss */
863 1.5 augustss void
864 1.5 augustss ehci_power(int why, void *v)
865 1.5 augustss {
866 1.5 augustss ehci_softc_t *sc = v;
867 1.5 augustss //u_int32_t ctl;
868 1.5 augustss int s;
869 1.5 augustss
870 1.5 augustss #ifdef EHCI_DEBUG
871 1.5 augustss DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
872 1.18 augustss ehci_dump_regs(sc);
873 1.5 augustss #endif
874 1.5 augustss
875 1.5 augustss s = splhardusb();
876 1.5 augustss switch (why) {
877 1.5 augustss case PWR_SUSPEND:
878 1.5 augustss case PWR_STANDBY:
879 1.5 augustss sc->sc_bus.use_polling++;
880 1.5 augustss #if 0
881 1.5 augustss OOO
882 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
883 1.5 augustss if (sc->sc_control == 0) {
884 1.5 augustss /*
885 1.5 augustss * Preserve register values, in case that APM BIOS
886 1.5 augustss * does not recover them.
887 1.5 augustss */
888 1.5 augustss sc->sc_control = ctl;
889 1.5 augustss sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
890 1.5 augustss }
891 1.5 augustss ctl |= EHCI_HCFS_SUSPEND;
892 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
893 1.5 augustss #endif
894 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
895 1.5 augustss sc->sc_bus.use_polling--;
896 1.5 augustss break;
897 1.5 augustss case PWR_RESUME:
898 1.5 augustss sc->sc_bus.use_polling++;
899 1.5 augustss #if 0
900 1.5 augustss OOO
901 1.5 augustss /* Some broken BIOSes do not recover these values */
902 1.5 augustss OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
903 1.5 augustss OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
904 1.5 augustss OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
905 1.5 augustss if (sc->sc_intre)
906 1.5 augustss OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
907 1.5 augustss sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
908 1.5 augustss if (sc->sc_control)
909 1.5 augustss ctl = sc->sc_control;
910 1.5 augustss else
911 1.5 augustss ctl = OREAD4(sc, EHCI_CONTROL);
912 1.5 augustss ctl |= EHCI_HCFS_RESUME;
913 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
914 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
915 1.5 augustss ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
916 1.5 augustss OWRITE4(sc, EHCI_CONTROL, ctl);
917 1.5 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
918 1.5 augustss sc->sc_control = sc->sc_intre = 0;
919 1.5 augustss #endif
920 1.5 augustss sc->sc_bus.use_polling--;
921 1.5 augustss break;
922 1.5 augustss case PWR_SOFTSUSPEND:
923 1.5 augustss case PWR_SOFTSTANDBY:
924 1.5 augustss case PWR_SOFTRESUME:
925 1.5 augustss break;
926 1.5 augustss }
927 1.5 augustss splx(s);
928 1.5 augustss }
929 1.5 augustss
930 1.5 augustss /*
931 1.5 augustss * Shut down the controller when the system is going down.
932 1.5 augustss */
933 1.5 augustss void
934 1.5 augustss ehci_shutdown(void *v)
935 1.5 augustss {
936 1.8 augustss ehci_softc_t *sc = v;
937 1.5 augustss
938 1.5 augustss DPRINTF(("ehci_shutdown: stopping the HC\n"));
939 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
940 1.8 augustss EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
941 1.5 augustss }
942 1.5 augustss
943 1.5 augustss usbd_status
944 1.5 augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
945 1.5 augustss {
946 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
947 1.25 augustss usbd_status err;
948 1.5 augustss
949 1.25 augustss err = usb_allocmem(&sc->sc_bus, size, 0, dma);
950 1.25 augustss #ifdef EHCI_DEBUG
951 1.25 augustss if (err)
952 1.25 augustss printf("ehci_allocm: usb_allocmem()=%d\n", err);
953 1.25 augustss #endif
954 1.25 augustss return (err);
955 1.5 augustss }
956 1.5 augustss
957 1.5 augustss void
958 1.5 augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
959 1.5 augustss {
960 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
961 1.5 augustss
962 1.5 augustss usb_freemem(&sc->sc_bus, dma);
963 1.5 augustss }
964 1.5 augustss
965 1.5 augustss usbd_xfer_handle
966 1.5 augustss ehci_allocx(struct usbd_bus *bus)
967 1.5 augustss {
968 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
969 1.5 augustss usbd_xfer_handle xfer;
970 1.5 augustss
971 1.5 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
972 1.28 augustss if (xfer != NULL) {
973 1.5 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
974 1.28 augustss #ifdef DIAGNOSTIC
975 1.28 augustss if (xfer->busy_free != XFER_FREE) {
976 1.28 augustss printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
977 1.28 augustss xfer->busy_free);
978 1.28 augustss }
979 1.28 augustss #endif
980 1.28 augustss } else {
981 1.15 augustss xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
982 1.28 augustss }
983 1.18 augustss if (xfer != NULL) {
984 1.15 augustss memset(xfer, 0, sizeof (struct ehci_xfer));
985 1.18 augustss #ifdef DIAGNOSTIC
986 1.18 augustss EXFER(xfer)->isdone = 1;
987 1.18 augustss xfer->busy_free = XFER_BUSY;
988 1.18 augustss #endif
989 1.18 augustss }
990 1.5 augustss return (xfer);
991 1.5 augustss }
992 1.5 augustss
993 1.5 augustss void
994 1.5 augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
995 1.5 augustss {
996 1.5 augustss struct ehci_softc *sc = (struct ehci_softc *)bus;
997 1.5 augustss
998 1.18 augustss #ifdef DIAGNOSTIC
999 1.18 augustss if (xfer->busy_free != XFER_BUSY) {
1000 1.18 augustss printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1001 1.18 augustss xfer->busy_free);
1002 1.18 augustss return;
1003 1.18 augustss }
1004 1.18 augustss xfer->busy_free = XFER_FREE;
1005 1.18 augustss if (!EXFER(xfer)->isdone) {
1006 1.18 augustss printf("ehci_freex: !isdone\n");
1007 1.18 augustss return;
1008 1.18 augustss }
1009 1.18 augustss #endif
1010 1.5 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1011 1.5 augustss }
1012 1.5 augustss
1013 1.5 augustss Static void
1014 1.5 augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
1015 1.5 augustss {
1016 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1017 1.15 augustss
1018 1.23 augustss DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1019 1.23 augustss epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1020 1.22 augustss #ifdef USB_DEBUG
1021 1.22 augustss if (ehcidebug)
1022 1.22 augustss usbd_dump_pipe(pipe);
1023 1.5 augustss #endif
1024 1.22 augustss epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
1025 1.5 augustss }
1026 1.5 augustss
1027 1.5 augustss Static void
1028 1.5 augustss ehci_noop(usbd_pipe_handle pipe)
1029 1.5 augustss {
1030 1.5 augustss }
1031 1.5 augustss
1032 1.5 augustss #ifdef EHCI_DEBUG
1033 1.5 augustss void
1034 1.18 augustss ehci_dump_regs(ehci_softc_t *sc)
1035 1.5 augustss {
1036 1.6 augustss int i;
1037 1.6 augustss printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1038 1.6 augustss EOREAD4(sc, EHCI_USBCMD),
1039 1.6 augustss EOREAD4(sc, EHCI_USBSTS),
1040 1.6 augustss EOREAD4(sc, EHCI_USBINTR));
1041 1.29 augustss printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1042 1.15 augustss EOREAD4(sc, EHCI_FRINDEX),
1043 1.15 augustss EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1044 1.15 augustss EOREAD4(sc, EHCI_PERIODICLISTBASE),
1045 1.15 augustss EOREAD4(sc, EHCI_ASYNCLISTADDR));
1046 1.6 augustss for (i = 1; i <= sc->sc_noport; i++)
1047 1.6 augustss printf("port %d status=0x%08x\n", i,
1048 1.6 augustss EOREAD4(sc, EHCI_PORTSC(i)));
1049 1.6 augustss }
1050 1.6 augustss
1051 1.6 augustss void
1052 1.6 augustss ehci_dump()
1053 1.6 augustss {
1054 1.18 augustss ehci_dump_regs(theehci);
1055 1.5 augustss }
1056 1.9 augustss
1057 1.9 augustss void
1058 1.15 augustss ehci_dump_link(ehci_link_t link, int type)
1059 1.9 augustss {
1060 1.15 augustss link = le32toh(link);
1061 1.15 augustss printf("0x%08x", link);
1062 1.9 augustss if (link & EHCI_LINK_TERMINATE)
1063 1.15 augustss printf("<T>");
1064 1.15 augustss else {
1065 1.15 augustss printf("<");
1066 1.15 augustss if (type) {
1067 1.15 augustss switch (EHCI_LINK_TYPE(link)) {
1068 1.15 augustss case EHCI_LINK_ITD: printf("ITD"); break;
1069 1.15 augustss case EHCI_LINK_QH: printf("QH"); break;
1070 1.15 augustss case EHCI_LINK_SITD: printf("SITD"); break;
1071 1.15 augustss case EHCI_LINK_FSTN: printf("FSTN"); break;
1072 1.16 augustss }
1073 1.15 augustss }
1074 1.9 augustss printf(">");
1075 1.15 augustss }
1076 1.15 augustss }
1077 1.15 augustss
1078 1.15 augustss void
1079 1.15 augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1080 1.15 augustss {
1081 1.29 augustss int i;
1082 1.29 augustss u_int32_t stop;
1083 1.29 augustss
1084 1.29 augustss stop = 0;
1085 1.29 augustss for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1086 1.15 augustss ehci_dump_sqtd(sqtd);
1087 1.29 augustss stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE;
1088 1.29 augustss }
1089 1.29 augustss if (sqtd)
1090 1.29 augustss printf("dump aborted, too many TDs\n");
1091 1.9 augustss }
1092 1.9 augustss
1093 1.9 augustss void
1094 1.9 augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1095 1.9 augustss {
1096 1.9 augustss printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1097 1.9 augustss ehci_dump_qtd(&sqtd->qtd);
1098 1.9 augustss }
1099 1.9 augustss
1100 1.9 augustss void
1101 1.9 augustss ehci_dump_qtd(ehci_qtd_t *qtd)
1102 1.9 augustss {
1103 1.9 augustss u_int32_t s;
1104 1.15 augustss char sbuf[128];
1105 1.9 augustss
1106 1.15 augustss printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1107 1.15 augustss printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1108 1.9 augustss printf("\n");
1109 1.15 augustss s = le32toh(qtd->qtd_status);
1110 1.15 augustss bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1111 1.15 augustss "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1112 1.15 augustss "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1113 1.9 augustss printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1114 1.9 augustss s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1115 1.9 augustss EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1116 1.15 augustss printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1117 1.15 augustss EHCI_QTD_GET_PID(s), sbuf);
1118 1.9 augustss for (s = 0; s < 5; s++)
1119 1.15 augustss printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1120 1.9 augustss }
1121 1.9 augustss
1122 1.9 augustss void
1123 1.9 augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
1124 1.9 augustss {
1125 1.9 augustss ehci_qh_t *qh = &sqh->qh;
1126 1.15 augustss u_int32_t endp, endphub;
1127 1.9 augustss
1128 1.9 augustss printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1129 1.15 augustss printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1130 1.15 augustss endp = le32toh(qh->qh_endp);
1131 1.15 augustss printf(" endp=0x%08x\n", endp);
1132 1.15 augustss printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1133 1.15 augustss EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1134 1.15 augustss EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1135 1.15 augustss EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1136 1.15 augustss printf(" mpl=0x%x ctl=%d nrl=%d\n",
1137 1.15 augustss EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1138 1.15 augustss EHCI_QH_GET_NRL(endp));
1139 1.15 augustss endphub = le32toh(qh->qh_endphub);
1140 1.15 augustss printf(" endphub=0x%08x\n", endphub);
1141 1.15 augustss printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1142 1.15 augustss EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1143 1.15 augustss EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1144 1.15 augustss EHCI_QH_GET_MULT(endphub));
1145 1.15 augustss printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1146 1.12 augustss printf("Overlay qTD:\n");
1147 1.9 augustss ehci_dump_qtd(&qh->qh_qtd);
1148 1.9 augustss }
1149 1.9 augustss
1150 1.18 augustss Static void
1151 1.18 augustss ehci_dump_exfer(struct ehci_xfer *ex)
1152 1.18 augustss {
1153 1.18 augustss printf("ehci_dump_exfer: ex=%p\n", ex);
1154 1.18 augustss }
1155 1.5 augustss #endif
1156 1.5 augustss
1157 1.5 augustss usbd_status
1158 1.5 augustss ehci_open(usbd_pipe_handle pipe)
1159 1.5 augustss {
1160 1.5 augustss usbd_device_handle dev = pipe->device;
1161 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1162 1.5 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1163 1.5 augustss u_int8_t addr = dev->address;
1164 1.5 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1165 1.5 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1166 1.10 augustss ehci_soft_qh_t *sqh;
1167 1.10 augustss usbd_status err;
1168 1.10 augustss int s;
1169 1.10 augustss int speed, naks;
1170 1.5 augustss
1171 1.5 augustss DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1172 1.5 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1173 1.5 augustss
1174 1.17 augustss if (sc->sc_dying)
1175 1.17 augustss return (USBD_IOERROR);
1176 1.17 augustss
1177 1.5 augustss if (addr == sc->sc_addr) {
1178 1.5 augustss switch (ed->bEndpointAddress) {
1179 1.5 augustss case USB_CONTROL_ENDPOINT:
1180 1.5 augustss pipe->methods = &ehci_root_ctrl_methods;
1181 1.5 augustss break;
1182 1.5 augustss case UE_DIR_IN | EHCI_INTR_ENDPT:
1183 1.5 augustss pipe->methods = &ehci_root_intr_methods;
1184 1.5 augustss break;
1185 1.5 augustss default:
1186 1.5 augustss return (USBD_INVAL);
1187 1.5 augustss }
1188 1.10 augustss return (USBD_NORMAL_COMPLETION);
1189 1.10 augustss }
1190 1.10 augustss
1191 1.24 augustss /* XXX All this stuff is only valid for async. */
1192 1.11 augustss switch (dev->speed) {
1193 1.11 augustss case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1194 1.11 augustss case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1195 1.11 augustss case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1196 1.11 augustss default: panic("ehci_open: bad device speed %d\n", dev->speed);
1197 1.11 augustss }
1198 1.10 augustss naks = 8; /* XXX */
1199 1.10 augustss sqh = ehci_alloc_sqh(sc);
1200 1.10 augustss if (sqh == NULL)
1201 1.10 augustss goto bad0;
1202 1.10 augustss /* qh_link filled when the QH is added */
1203 1.10 augustss sqh->qh.qh_endp = htole32(
1204 1.10 augustss EHCI_QH_SET_ADDR(addr) |
1205 1.10 augustss EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
1206 1.10 augustss EHCI_QH_SET_EPS(speed) | /* XXX */
1207 1.10 augustss /* XXX EHCI_QH_DTC ? */
1208 1.10 augustss EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1209 1.10 augustss (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1210 1.10 augustss EHCI_QH_CTL : 0) |
1211 1.10 augustss EHCI_QH_SET_NRL(naks)
1212 1.10 augustss );
1213 1.10 augustss sqh->qh.qh_endphub = htole32(
1214 1.10 augustss EHCI_QH_SET_MULT(1)
1215 1.11 augustss /* XXX TT stuff */
1216 1.11 augustss /* XXX interrupt mask */
1217 1.10 augustss );
1218 1.11 augustss sqh->qh.qh_curqtd = EHCI_NULL;
1219 1.11 augustss /* Fill the overlay qTD */
1220 1.11 augustss sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1221 1.11 augustss sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1222 1.15 augustss sqh->qh.qh_qtd.qtd_status = htole32(0);
1223 1.10 augustss
1224 1.10 augustss epipe->sqh = sqh;
1225 1.5 augustss
1226 1.10 augustss switch (xfertype) {
1227 1.10 augustss case UE_CONTROL:
1228 1.11 augustss err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1229 1.10 augustss 0, &epipe->u.ctl.reqdma);
1230 1.25 augustss #ifdef EHCI_DEBUG
1231 1.25 augustss if (err)
1232 1.25 augustss printf("ehci_open: usb_allocmem()=%d\n", err);
1233 1.25 augustss #endif
1234 1.10 augustss if (err)
1235 1.11 augustss goto bad1;
1236 1.11 augustss pipe->methods = &ehci_device_ctrl_methods;
1237 1.10 augustss s = splusb();
1238 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1239 1.10 augustss splx(s);
1240 1.10 augustss break;
1241 1.10 augustss case UE_BULK:
1242 1.10 augustss pipe->methods = &ehci_device_bulk_methods;
1243 1.10 augustss s = splusb();
1244 1.11 augustss ehci_add_qh(sqh, sc->sc_async_head);
1245 1.10 augustss splx(s);
1246 1.10 augustss break;
1247 1.24 augustss case UE_INTERRUPT:
1248 1.24 augustss pipe->methods = &ehci_device_intr_methods;
1249 1.24 augustss return (USBD_INVAL);
1250 1.24 augustss case UE_ISOCHRONOUS:
1251 1.24 augustss pipe->methods = &ehci_device_isoc_methods;
1252 1.24 augustss return (USBD_INVAL);
1253 1.10 augustss default:
1254 1.10 augustss return (USBD_INVAL);
1255 1.5 augustss }
1256 1.5 augustss return (USBD_NORMAL_COMPLETION);
1257 1.5 augustss
1258 1.11 augustss bad1:
1259 1.11 augustss ehci_free_sqh(sc, sqh);
1260 1.5 augustss bad0:
1261 1.5 augustss return (USBD_NOMEM);
1262 1.10 augustss }
1263 1.10 augustss
1264 1.10 augustss /*
1265 1.10 augustss * Add an ED to the schedule. Called at splusb().
1266 1.10 augustss */
1267 1.10 augustss void
1268 1.10 augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1269 1.10 augustss {
1270 1.10 augustss SPLUSBCHECK;
1271 1.10 augustss
1272 1.10 augustss sqh->next = head->next;
1273 1.10 augustss sqh->qh.qh_link = head->qh.qh_link;
1274 1.10 augustss head->next = sqh;
1275 1.15 augustss head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1276 1.10 augustss
1277 1.10 augustss #ifdef EHCI_DEBUG
1278 1.22 augustss if (ehcidebug > 5) {
1279 1.10 augustss printf("ehci_add_qh:\n");
1280 1.10 augustss ehci_dump_sqh(sqh);
1281 1.10 augustss }
1282 1.5 augustss #endif
1283 1.5 augustss }
1284 1.5 augustss
1285 1.10 augustss /*
1286 1.10 augustss * Remove an ED from the schedule. Called at splusb().
1287 1.10 augustss */
1288 1.10 augustss void
1289 1.10 augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1290 1.10 augustss {
1291 1.10 augustss ehci_soft_qh_t *p;
1292 1.10 augustss
1293 1.10 augustss SPLUSBCHECK;
1294 1.10 augustss /* XXX */
1295 1.10 augustss for (p = head; p == NULL && p->next != sqh; p = p->next)
1296 1.10 augustss ;
1297 1.10 augustss if (p == NULL)
1298 1.10 augustss panic("ehci_rem_qh: ED not found\n");
1299 1.10 augustss p->next = sqh->next;
1300 1.10 augustss p->qh.qh_link = sqh->qh.qh_link;
1301 1.10 augustss
1302 1.11 augustss ehci_sync_hc(sc);
1303 1.11 augustss }
1304 1.11 augustss
1305 1.23 augustss void
1306 1.23 augustss ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1307 1.23 augustss {
1308 1.23 augustss /* Halt while we are messing. */
1309 1.23 augustss sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
1310 1.23 augustss sqh->qh.qh_curqtd = 0;
1311 1.23 augustss sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1312 1.23 augustss sqh->sqtd = sqtd;
1313 1.23 augustss /* Keep toggle, clear the rest, including length. */
1314 1.23 augustss sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE);
1315 1.23 augustss }
1316 1.23 augustss
1317 1.11 augustss /*
1318 1.11 augustss * Ensure that the HC has released all references to the QH. We do this
1319 1.11 augustss * by asking for a Async Advance Doorbell interrupt and then we wait for
1320 1.11 augustss * the interrupt.
1321 1.11 augustss * To make this easier we first obtain exclusive use of the doorbell.
1322 1.11 augustss */
1323 1.11 augustss void
1324 1.11 augustss ehci_sync_hc(ehci_softc_t *sc)
1325 1.11 augustss {
1326 1.15 augustss int s, error;
1327 1.11 augustss
1328 1.12 augustss if (sc->sc_dying) {
1329 1.12 augustss DPRINTFN(2,("ehci_sync_hc: dying\n"));
1330 1.12 augustss return;
1331 1.12 augustss }
1332 1.12 augustss DPRINTFN(2,("ehci_sync_hc: enter\n"));
1333 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
1334 1.10 augustss s = splhardusb();
1335 1.10 augustss /* ask for doorbell */
1336 1.10 augustss EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1337 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1338 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1339 1.15 augustss error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
1340 1.15 augustss DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1341 1.15 augustss EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1342 1.10 augustss splx(s);
1343 1.10 augustss lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
1344 1.15 augustss #ifdef DIAGNOSTIC
1345 1.15 augustss if (error)
1346 1.15 augustss printf("ehci_sync_hc: tsleep() = %d\n", error);
1347 1.15 augustss #endif
1348 1.12 augustss DPRINTFN(2,("ehci_sync_hc: exit\n"));
1349 1.10 augustss }
1350 1.10 augustss
1351 1.5 augustss /***********/
1352 1.5 augustss
1353 1.5 augustss /*
1354 1.5 augustss * Data structures and routines to emulate the root hub.
1355 1.5 augustss */
1356 1.5 augustss Static usb_device_descriptor_t ehci_devd = {
1357 1.5 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1358 1.5 augustss UDESC_DEVICE, /* type */
1359 1.5 augustss {0x00, 0x02}, /* USB version */
1360 1.5 augustss UDCLASS_HUB, /* class */
1361 1.5 augustss UDSUBCLASS_HUB, /* subclass */
1362 1.11 augustss UDPROTO_HSHUBSTT, /* protocol */
1363 1.5 augustss 64, /* max packet */
1364 1.5 augustss {0},{0},{0x00,0x01}, /* device id */
1365 1.5 augustss 1,2,0, /* string indicies */
1366 1.5 augustss 1 /* # of configurations */
1367 1.5 augustss };
1368 1.5 augustss
1369 1.11 augustss Static usb_device_qualifier_t ehci_odevd = {
1370 1.11 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1371 1.11 augustss UDESC_DEVICE_QUALIFIER, /* type */
1372 1.11 augustss {0x00, 0x02}, /* USB version */
1373 1.11 augustss UDCLASS_HUB, /* class */
1374 1.11 augustss UDSUBCLASS_HUB, /* subclass */
1375 1.11 augustss UDPROTO_FSHUB, /* protocol */
1376 1.11 augustss 64, /* max packet */
1377 1.11 augustss 1, /* # of configurations */
1378 1.11 augustss 0
1379 1.11 augustss };
1380 1.11 augustss
1381 1.5 augustss Static usb_config_descriptor_t ehci_confd = {
1382 1.5 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1383 1.5 augustss UDESC_CONFIG,
1384 1.5 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1385 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1386 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1387 1.5 augustss 1,
1388 1.5 augustss 1,
1389 1.5 augustss 0,
1390 1.5 augustss UC_SELF_POWERED,
1391 1.5 augustss 0 /* max power */
1392 1.5 augustss };
1393 1.5 augustss
1394 1.5 augustss Static usb_interface_descriptor_t ehci_ifcd = {
1395 1.5 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1396 1.5 augustss UDESC_INTERFACE,
1397 1.5 augustss 0,
1398 1.5 augustss 0,
1399 1.5 augustss 1,
1400 1.5 augustss UICLASS_HUB,
1401 1.5 augustss UISUBCLASS_HUB,
1402 1.11 augustss UIPROTO_HSHUBSTT,
1403 1.5 augustss 0
1404 1.5 augustss };
1405 1.5 augustss
1406 1.5 augustss Static usb_endpoint_descriptor_t ehci_endpd = {
1407 1.5 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1408 1.5 augustss UDESC_ENDPOINT,
1409 1.5 augustss UE_DIR_IN | EHCI_INTR_ENDPT,
1410 1.5 augustss UE_INTERRUPT,
1411 1.5 augustss {8, 0}, /* max packet */
1412 1.5 augustss 255
1413 1.5 augustss };
1414 1.5 augustss
1415 1.5 augustss Static usb_hub_descriptor_t ehci_hubd = {
1416 1.5 augustss USB_HUB_DESCRIPTOR_SIZE,
1417 1.5 augustss UDESC_HUB,
1418 1.5 augustss 0,
1419 1.5 augustss {0,0},
1420 1.5 augustss 0,
1421 1.5 augustss 0,
1422 1.5 augustss {0},
1423 1.5 augustss };
1424 1.5 augustss
1425 1.5 augustss Static int
1426 1.5 augustss ehci_str(p, l, s)
1427 1.5 augustss usb_string_descriptor_t *p;
1428 1.5 augustss int l;
1429 1.5 augustss char *s;
1430 1.5 augustss {
1431 1.5 augustss int i;
1432 1.5 augustss
1433 1.5 augustss if (l == 0)
1434 1.5 augustss return (0);
1435 1.5 augustss p->bLength = 2 * strlen(s) + 2;
1436 1.5 augustss if (l == 1)
1437 1.5 augustss return (1);
1438 1.5 augustss p->bDescriptorType = UDESC_STRING;
1439 1.5 augustss l -= 2;
1440 1.5 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1441 1.5 augustss USETW2(p->bString[i], 0, s[i]);
1442 1.5 augustss return (2*i+2);
1443 1.5 augustss }
1444 1.5 augustss
1445 1.5 augustss /*
1446 1.5 augustss * Simulate a hardware hub by handling all the necessary requests.
1447 1.5 augustss */
1448 1.5 augustss Static usbd_status
1449 1.5 augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1450 1.5 augustss {
1451 1.5 augustss usbd_status err;
1452 1.5 augustss
1453 1.5 augustss /* Insert last in queue. */
1454 1.5 augustss err = usb_insert_transfer(xfer);
1455 1.5 augustss if (err)
1456 1.5 augustss return (err);
1457 1.5 augustss
1458 1.5 augustss /* Pipe isn't running, start first */
1459 1.5 augustss return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1460 1.5 augustss }
1461 1.5 augustss
1462 1.5 augustss Static usbd_status
1463 1.5 augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
1464 1.5 augustss {
1465 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1466 1.5 augustss usb_device_request_t *req;
1467 1.5 augustss void *buf = NULL;
1468 1.5 augustss int port, i;
1469 1.5 augustss int s, len, value, index, l, totlen = 0;
1470 1.5 augustss usb_port_status_t ps;
1471 1.5 augustss usb_hub_descriptor_t hubd;
1472 1.5 augustss usbd_status err;
1473 1.5 augustss u_int32_t v;
1474 1.5 augustss
1475 1.5 augustss if (sc->sc_dying)
1476 1.5 augustss return (USBD_IOERROR);
1477 1.5 augustss
1478 1.5 augustss #ifdef DIAGNOSTIC
1479 1.5 augustss if (!(xfer->rqflags & URQ_REQUEST))
1480 1.5 augustss /* XXX panic */
1481 1.5 augustss return (USBD_INVAL);
1482 1.5 augustss #endif
1483 1.5 augustss req = &xfer->request;
1484 1.5 augustss
1485 1.5 augustss DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1486 1.5 augustss req->bmRequestType, req->bRequest));
1487 1.5 augustss
1488 1.5 augustss len = UGETW(req->wLength);
1489 1.5 augustss value = UGETW(req->wValue);
1490 1.5 augustss index = UGETW(req->wIndex);
1491 1.5 augustss
1492 1.5 augustss if (len != 0)
1493 1.30 augustss buf = KERNADDR(&xfer->dmabuf, 0);
1494 1.5 augustss
1495 1.5 augustss #define C(x,y) ((x) | ((y) << 8))
1496 1.5 augustss switch(C(req->bRequest, req->bmRequestType)) {
1497 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1498 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1499 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1500 1.5 augustss /*
1501 1.5 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1502 1.5 augustss * for the integrated root hub.
1503 1.5 augustss */
1504 1.5 augustss break;
1505 1.5 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1506 1.5 augustss if (len > 0) {
1507 1.5 augustss *(u_int8_t *)buf = sc->sc_conf;
1508 1.5 augustss totlen = 1;
1509 1.5 augustss }
1510 1.5 augustss break;
1511 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1512 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1513 1.5 augustss switch(value >> 8) {
1514 1.5 augustss case UDESC_DEVICE:
1515 1.5 augustss if ((value & 0xff) != 0) {
1516 1.5 augustss err = USBD_IOERROR;
1517 1.5 augustss goto ret;
1518 1.5 augustss }
1519 1.5 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1520 1.5 augustss USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1521 1.5 augustss memcpy(buf, &ehci_devd, l);
1522 1.5 augustss break;
1523 1.11 augustss /*
1524 1.11 augustss * We can't really operate at another speed, but the spec says
1525 1.11 augustss * we need this descriptor.
1526 1.11 augustss */
1527 1.11 augustss case UDESC_DEVICE_QUALIFIER:
1528 1.11 augustss if ((value & 0xff) != 0) {
1529 1.11 augustss err = USBD_IOERROR;
1530 1.11 augustss goto ret;
1531 1.11 augustss }
1532 1.11 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1533 1.11 augustss memcpy(buf, &ehci_odevd, l);
1534 1.11 augustss break;
1535 1.11 augustss /*
1536 1.11 augustss * We can't really operate at another speed, but the spec says
1537 1.11 augustss * we need this descriptor.
1538 1.11 augustss */
1539 1.11 augustss case UDESC_OTHER_SPEED_CONFIGURATION:
1540 1.5 augustss case UDESC_CONFIG:
1541 1.5 augustss if ((value & 0xff) != 0) {
1542 1.5 augustss err = USBD_IOERROR;
1543 1.5 augustss goto ret;
1544 1.5 augustss }
1545 1.5 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1546 1.5 augustss memcpy(buf, &ehci_confd, l);
1547 1.11 augustss ((usb_config_descriptor_t *)buf)->bDescriptorType =
1548 1.11 augustss value >> 8;
1549 1.5 augustss buf = (char *)buf + l;
1550 1.5 augustss len -= l;
1551 1.5 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1552 1.5 augustss totlen += l;
1553 1.5 augustss memcpy(buf, &ehci_ifcd, l);
1554 1.5 augustss buf = (char *)buf + l;
1555 1.5 augustss len -= l;
1556 1.5 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1557 1.5 augustss totlen += l;
1558 1.5 augustss memcpy(buf, &ehci_endpd, l);
1559 1.5 augustss break;
1560 1.5 augustss case UDESC_STRING:
1561 1.5 augustss if (len == 0)
1562 1.5 augustss break;
1563 1.5 augustss *(u_int8_t *)buf = 0;
1564 1.5 augustss totlen = 1;
1565 1.5 augustss switch (value & 0xff) {
1566 1.5 augustss case 1: /* Vendor */
1567 1.5 augustss totlen = ehci_str(buf, len, sc->sc_vendor);
1568 1.5 augustss break;
1569 1.5 augustss case 2: /* Product */
1570 1.5 augustss totlen = ehci_str(buf, len, "EHCI root hub");
1571 1.5 augustss break;
1572 1.5 augustss }
1573 1.5 augustss break;
1574 1.5 augustss default:
1575 1.5 augustss err = USBD_IOERROR;
1576 1.5 augustss goto ret;
1577 1.5 augustss }
1578 1.5 augustss break;
1579 1.5 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1580 1.5 augustss if (len > 0) {
1581 1.5 augustss *(u_int8_t *)buf = 0;
1582 1.5 augustss totlen = 1;
1583 1.5 augustss }
1584 1.5 augustss break;
1585 1.5 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1586 1.5 augustss if (len > 1) {
1587 1.5 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1588 1.5 augustss totlen = 2;
1589 1.5 augustss }
1590 1.5 augustss break;
1591 1.5 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1592 1.5 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1593 1.5 augustss if (len > 1) {
1594 1.5 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1595 1.5 augustss totlen = 2;
1596 1.5 augustss }
1597 1.5 augustss break;
1598 1.5 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1599 1.5 augustss if (value >= USB_MAX_DEVICES) {
1600 1.5 augustss err = USBD_IOERROR;
1601 1.5 augustss goto ret;
1602 1.5 augustss }
1603 1.5 augustss sc->sc_addr = value;
1604 1.5 augustss break;
1605 1.5 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1606 1.5 augustss if (value != 0 && value != 1) {
1607 1.5 augustss err = USBD_IOERROR;
1608 1.5 augustss goto ret;
1609 1.5 augustss }
1610 1.5 augustss sc->sc_conf = value;
1611 1.5 augustss break;
1612 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1613 1.5 augustss break;
1614 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1615 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1616 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1617 1.5 augustss err = USBD_IOERROR;
1618 1.5 augustss goto ret;
1619 1.5 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1620 1.5 augustss break;
1621 1.5 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1622 1.5 augustss break;
1623 1.5 augustss /* Hub requests */
1624 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1625 1.5 augustss break;
1626 1.5 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1627 1.5 augustss DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1628 1.5 augustss "port=%d feature=%d\n",
1629 1.5 augustss index, value));
1630 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1631 1.5 augustss err = USBD_IOERROR;
1632 1.5 augustss goto ret;
1633 1.5 augustss }
1634 1.5 augustss port = EHCI_PORTSC(index);
1635 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1636 1.5 augustss switch(value) {
1637 1.5 augustss case UHF_PORT_ENABLE:
1638 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1639 1.5 augustss break;
1640 1.5 augustss case UHF_PORT_SUSPEND:
1641 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1642 1.5 augustss break;
1643 1.5 augustss case UHF_PORT_POWER:
1644 1.5 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1645 1.5 augustss break;
1646 1.14 augustss case UHF_PORT_TEST:
1647 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1648 1.14 augustss "%d\n", index));
1649 1.14 augustss break;
1650 1.14 augustss case UHF_PORT_INDICATOR:
1651 1.14 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1652 1.14 augustss "%d\n", index));
1653 1.14 augustss EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1654 1.14 augustss break;
1655 1.5 augustss case UHF_C_PORT_CONNECTION:
1656 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_CSC);
1657 1.5 augustss break;
1658 1.5 augustss case UHF_C_PORT_ENABLE:
1659 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PEC);
1660 1.5 augustss break;
1661 1.5 augustss case UHF_C_PORT_SUSPEND:
1662 1.5 augustss /* how? */
1663 1.5 augustss break;
1664 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1665 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_OCC);
1666 1.5 augustss break;
1667 1.5 augustss case UHF_C_PORT_RESET:
1668 1.6 augustss sc->sc_isreset = 0;
1669 1.5 augustss break;
1670 1.5 augustss default:
1671 1.5 augustss err = USBD_IOERROR;
1672 1.5 augustss goto ret;
1673 1.5 augustss }
1674 1.5 augustss #if 0
1675 1.5 augustss switch(value) {
1676 1.5 augustss case UHF_C_PORT_CONNECTION:
1677 1.5 augustss case UHF_C_PORT_ENABLE:
1678 1.5 augustss case UHF_C_PORT_SUSPEND:
1679 1.5 augustss case UHF_C_PORT_OVER_CURRENT:
1680 1.5 augustss case UHF_C_PORT_RESET:
1681 1.5 augustss /* Enable RHSC interrupt if condition is cleared. */
1682 1.5 augustss if ((OREAD4(sc, port) >> 16) == 0)
1683 1.6 augustss ehci_pcd_able(sc, 1);
1684 1.5 augustss break;
1685 1.5 augustss default:
1686 1.5 augustss break;
1687 1.5 augustss }
1688 1.5 augustss #endif
1689 1.5 augustss break;
1690 1.5 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1691 1.5 augustss if (value != 0) {
1692 1.5 augustss err = USBD_IOERROR;
1693 1.5 augustss goto ret;
1694 1.5 augustss }
1695 1.5 augustss hubd = ehci_hubd;
1696 1.5 augustss hubd.bNbrPorts = sc->sc_noport;
1697 1.5 augustss v = EOREAD4(sc, EHCI_HCSPARAMS);
1698 1.5 augustss USETW(hubd.wHubCharacteristics,
1699 1.14 augustss EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1700 1.14 augustss EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1701 1.14 augustss ? UHD_PORT_IND : 0);
1702 1.5 augustss hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1703 1.5 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1704 1.5 augustss hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1705 1.5 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1706 1.5 augustss l = min(len, hubd.bDescLength);
1707 1.5 augustss totlen = l;
1708 1.5 augustss memcpy(buf, &hubd, l);
1709 1.5 augustss break;
1710 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1711 1.5 augustss if (len != 4) {
1712 1.5 augustss err = USBD_IOERROR;
1713 1.5 augustss goto ret;
1714 1.5 augustss }
1715 1.5 augustss memset(buf, 0, len); /* ? XXX */
1716 1.5 augustss totlen = len;
1717 1.5 augustss break;
1718 1.5 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1719 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1720 1.5 augustss index));
1721 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1722 1.5 augustss err = USBD_IOERROR;
1723 1.5 augustss goto ret;
1724 1.5 augustss }
1725 1.5 augustss if (len != 4) {
1726 1.5 augustss err = USBD_IOERROR;
1727 1.5 augustss goto ret;
1728 1.5 augustss }
1729 1.5 augustss v = EOREAD4(sc, EHCI_PORTSC(index));
1730 1.5 augustss DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1731 1.5 augustss v));
1732 1.11 augustss i = UPS_HIGH_SPEED;
1733 1.5 augustss if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1734 1.5 augustss if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1735 1.5 augustss if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1736 1.5 augustss if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1737 1.5 augustss if (v & EHCI_PS_PR) i |= UPS_RESET;
1738 1.5 augustss if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1739 1.5 augustss USETW(ps.wPortStatus, i);
1740 1.5 augustss i = 0;
1741 1.5 augustss if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1742 1.5 augustss if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1743 1.5 augustss if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1744 1.6 augustss if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1745 1.5 augustss USETW(ps.wPortChange, i);
1746 1.5 augustss l = min(len, sizeof ps);
1747 1.5 augustss memcpy(buf, &ps, l);
1748 1.5 augustss totlen = l;
1749 1.5 augustss break;
1750 1.5 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1751 1.5 augustss err = USBD_IOERROR;
1752 1.5 augustss goto ret;
1753 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1754 1.5 augustss break;
1755 1.5 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1756 1.5 augustss if (index < 1 || index > sc->sc_noport) {
1757 1.5 augustss err = USBD_IOERROR;
1758 1.5 augustss goto ret;
1759 1.5 augustss }
1760 1.5 augustss port = EHCI_PORTSC(index);
1761 1.5 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1762 1.5 augustss switch(value) {
1763 1.5 augustss case UHF_PORT_ENABLE:
1764 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PE);
1765 1.5 augustss break;
1766 1.5 augustss case UHF_PORT_SUSPEND:
1767 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1768 1.5 augustss break;
1769 1.5 augustss case UHF_PORT_RESET:
1770 1.5 augustss DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1771 1.5 augustss index));
1772 1.6 augustss if (EHCI_PS_IS_LOWSPEED(v)) {
1773 1.6 augustss /* Low speed device, give up ownership. */
1774 1.6 augustss ehci_disown(sc, index, 1);
1775 1.6 augustss break;
1776 1.6 augustss }
1777 1.8 augustss /* Start reset sequence. */
1778 1.8 augustss v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1779 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PR);
1780 1.8 augustss /* Wait for reset to complete. */
1781 1.13 augustss usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1782 1.17 augustss if (sc->sc_dying) {
1783 1.17 augustss err = USBD_IOERROR;
1784 1.17 augustss goto ret;
1785 1.17 augustss }
1786 1.8 augustss /* Terminate reset sequence. */
1787 1.8 augustss EOWRITE4(sc, port, v);
1788 1.8 augustss /* Wait for HC to complete reset. */
1789 1.13 augustss usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1790 1.17 augustss if (sc->sc_dying) {
1791 1.17 augustss err = USBD_IOERROR;
1792 1.17 augustss goto ret;
1793 1.17 augustss }
1794 1.8 augustss v = EOREAD4(sc, port);
1795 1.8 augustss DPRINTF(("ehci after reset, status=0x%08x\n", v));
1796 1.8 augustss if (v & EHCI_PS_PR) {
1797 1.8 augustss printf("%s: port reset timeout\n",
1798 1.8 augustss USBDEVNAME(sc->sc_bus.bdev));
1799 1.8 augustss return (USBD_TIMEOUT);
1800 1.5 augustss }
1801 1.8 augustss if (!(v & EHCI_PS_PE)) {
1802 1.6 augustss /* Not a high speed device, give up ownership.*/
1803 1.6 augustss ehci_disown(sc, index, 0);
1804 1.6 augustss break;
1805 1.6 augustss }
1806 1.6 augustss sc->sc_isreset = 1;
1807 1.8 augustss DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1808 1.6 augustss index, v));
1809 1.5 augustss break;
1810 1.5 augustss case UHF_PORT_POWER:
1811 1.5 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1812 1.5 augustss "%d\n", index));
1813 1.5 augustss EOWRITE4(sc, port, v | EHCI_PS_PP);
1814 1.5 augustss break;
1815 1.11 augustss case UHF_PORT_TEST:
1816 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1817 1.11 augustss "%d\n", index));
1818 1.11 augustss break;
1819 1.11 augustss case UHF_PORT_INDICATOR:
1820 1.11 augustss DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1821 1.11 augustss "%d\n", index));
1822 1.14 augustss EOWRITE4(sc, port, v | EHCI_PS_PIC);
1823 1.11 augustss break;
1824 1.5 augustss default:
1825 1.5 augustss err = USBD_IOERROR;
1826 1.5 augustss goto ret;
1827 1.5 augustss }
1828 1.5 augustss break;
1829 1.11 augustss case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1830 1.11 augustss case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1831 1.11 augustss case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1832 1.11 augustss case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1833 1.11 augustss break;
1834 1.5 augustss default:
1835 1.5 augustss err = USBD_IOERROR;
1836 1.5 augustss goto ret;
1837 1.5 augustss }
1838 1.5 augustss xfer->actlen = totlen;
1839 1.5 augustss err = USBD_NORMAL_COMPLETION;
1840 1.5 augustss ret:
1841 1.5 augustss xfer->status = err;
1842 1.5 augustss s = splusb();
1843 1.5 augustss usb_transfer_complete(xfer);
1844 1.5 augustss splx(s);
1845 1.5 augustss return (USBD_IN_PROGRESS);
1846 1.6 augustss }
1847 1.6 augustss
1848 1.6 augustss void
1849 1.6 augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1850 1.6 augustss {
1851 1.24 augustss int port;
1852 1.6 augustss u_int32_t v;
1853 1.6 augustss
1854 1.6 augustss DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1855 1.6 augustss #ifdef DIAGNOSTIC
1856 1.6 augustss if (sc->sc_npcomp != 0) {
1857 1.24 augustss int i = (index-1) / sc->sc_npcomp;
1858 1.6 augustss if (i >= sc->sc_ncomp)
1859 1.6 augustss printf("%s: strange port\n",
1860 1.6 augustss USBDEVNAME(sc->sc_bus.bdev));
1861 1.6 augustss else
1862 1.6 augustss printf("%s: handing over %s speed device on "
1863 1.6 augustss "port %d to %s\n",
1864 1.6 augustss USBDEVNAME(sc->sc_bus.bdev),
1865 1.6 augustss lowspeed ? "low" : "full",
1866 1.6 augustss index, USBDEVNAME(sc->sc_comps[i]->bdev));
1867 1.6 augustss } else {
1868 1.6 augustss printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1869 1.6 augustss }
1870 1.6 augustss #endif
1871 1.6 augustss port = EHCI_PORTSC(index);
1872 1.6 augustss v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1873 1.6 augustss EOWRITE4(sc, port, v | EHCI_PS_PO);
1874 1.5 augustss }
1875 1.5 augustss
1876 1.5 augustss /* Abort a root control request. */
1877 1.5 augustss Static void
1878 1.5 augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1879 1.5 augustss {
1880 1.5 augustss /* Nothing to do, all transfers are synchronous. */
1881 1.5 augustss }
1882 1.5 augustss
1883 1.5 augustss /* Close the root pipe. */
1884 1.5 augustss Static void
1885 1.5 augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
1886 1.5 augustss {
1887 1.5 augustss DPRINTF(("ehci_root_ctrl_close\n"));
1888 1.5 augustss /* Nothing to do. */
1889 1.5 augustss }
1890 1.5 augustss
1891 1.5 augustss void
1892 1.5 augustss ehci_root_intr_done(usbd_xfer_handle xfer)
1893 1.5 augustss {
1894 1.5 augustss xfer->hcpriv = NULL;
1895 1.5 augustss }
1896 1.5 augustss
1897 1.5 augustss Static usbd_status
1898 1.5 augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
1899 1.5 augustss {
1900 1.5 augustss usbd_status err;
1901 1.5 augustss
1902 1.5 augustss /* Insert last in queue. */
1903 1.5 augustss err = usb_insert_transfer(xfer);
1904 1.5 augustss if (err)
1905 1.5 augustss return (err);
1906 1.5 augustss
1907 1.5 augustss /* Pipe isn't running, start first */
1908 1.5 augustss return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1909 1.5 augustss }
1910 1.5 augustss
1911 1.5 augustss Static usbd_status
1912 1.5 augustss ehci_root_intr_start(usbd_xfer_handle xfer)
1913 1.5 augustss {
1914 1.5 augustss usbd_pipe_handle pipe = xfer->pipe;
1915 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1916 1.5 augustss
1917 1.5 augustss if (sc->sc_dying)
1918 1.5 augustss return (USBD_IOERROR);
1919 1.5 augustss
1920 1.5 augustss sc->sc_intrxfer = xfer;
1921 1.5 augustss
1922 1.5 augustss return (USBD_IN_PROGRESS);
1923 1.5 augustss }
1924 1.5 augustss
1925 1.5 augustss /* Abort a root interrupt request. */
1926 1.5 augustss Static void
1927 1.5 augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
1928 1.5 augustss {
1929 1.5 augustss int s;
1930 1.5 augustss
1931 1.5 augustss if (xfer->pipe->intrxfer == xfer) {
1932 1.5 augustss DPRINTF(("ehci_root_intr_abort: remove\n"));
1933 1.5 augustss xfer->pipe->intrxfer = NULL;
1934 1.5 augustss }
1935 1.5 augustss xfer->status = USBD_CANCELLED;
1936 1.5 augustss s = splusb();
1937 1.5 augustss usb_transfer_complete(xfer);
1938 1.5 augustss splx(s);
1939 1.5 augustss }
1940 1.5 augustss
1941 1.5 augustss /* Close the root pipe. */
1942 1.5 augustss Static void
1943 1.5 augustss ehci_root_intr_close(usbd_pipe_handle pipe)
1944 1.5 augustss {
1945 1.5 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1946 1.5 augustss
1947 1.5 augustss DPRINTF(("ehci_root_intr_close\n"));
1948 1.5 augustss
1949 1.5 augustss sc->sc_intrxfer = NULL;
1950 1.5 augustss }
1951 1.5 augustss
1952 1.5 augustss void
1953 1.5 augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
1954 1.5 augustss {
1955 1.5 augustss xfer->hcpriv = NULL;
1956 1.9 augustss }
1957 1.9 augustss
1958 1.9 augustss /************************/
1959 1.9 augustss
1960 1.9 augustss ehci_soft_qh_t *
1961 1.9 augustss ehci_alloc_sqh(ehci_softc_t *sc)
1962 1.9 augustss {
1963 1.9 augustss ehci_soft_qh_t *sqh;
1964 1.9 augustss usbd_status err;
1965 1.9 augustss int i, offs;
1966 1.9 augustss usb_dma_t dma;
1967 1.9 augustss
1968 1.9 augustss if (sc->sc_freeqhs == NULL) {
1969 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1970 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1971 1.9 augustss EHCI_PAGE_SIZE, &dma);
1972 1.25 augustss #ifdef EHCI_DEBUG
1973 1.25 augustss if (err)
1974 1.25 augustss printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
1975 1.25 augustss #endif
1976 1.9 augustss if (err)
1977 1.11 augustss return (NULL);
1978 1.9 augustss for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1979 1.9 augustss offs = i * EHCI_SQH_SIZE;
1980 1.30 augustss sqh = KERNADDR(&dma, offs);
1981 1.9 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1982 1.9 augustss sqh->next = sc->sc_freeqhs;
1983 1.9 augustss sc->sc_freeqhs = sqh;
1984 1.9 augustss }
1985 1.9 augustss }
1986 1.9 augustss sqh = sc->sc_freeqhs;
1987 1.9 augustss sc->sc_freeqhs = sqh->next;
1988 1.9 augustss memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1989 1.11 augustss sqh->next = NULL;
1990 1.9 augustss return (sqh);
1991 1.9 augustss }
1992 1.9 augustss
1993 1.9 augustss void
1994 1.9 augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1995 1.9 augustss {
1996 1.9 augustss sqh->next = sc->sc_freeqhs;
1997 1.9 augustss sc->sc_freeqhs = sqh;
1998 1.9 augustss }
1999 1.9 augustss
2000 1.9 augustss ehci_soft_qtd_t *
2001 1.9 augustss ehci_alloc_sqtd(ehci_softc_t *sc)
2002 1.9 augustss {
2003 1.9 augustss ehci_soft_qtd_t *sqtd;
2004 1.9 augustss usbd_status err;
2005 1.9 augustss int i, offs;
2006 1.9 augustss usb_dma_t dma;
2007 1.9 augustss int s;
2008 1.9 augustss
2009 1.9 augustss if (sc->sc_freeqtds == NULL) {
2010 1.9 augustss DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2011 1.9 augustss err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2012 1.9 augustss EHCI_PAGE_SIZE, &dma);
2013 1.25 augustss #ifdef EHCI_DEBUG
2014 1.25 augustss if (err)
2015 1.25 augustss printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2016 1.25 augustss #endif
2017 1.9 augustss if (err)
2018 1.9 augustss return (NULL);
2019 1.9 augustss s = splusb();
2020 1.9 augustss for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2021 1.9 augustss offs = i * EHCI_SQTD_SIZE;
2022 1.30 augustss sqtd = KERNADDR(&dma, offs);
2023 1.9 augustss sqtd->physaddr = DMAADDR(&dma) + offs;
2024 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
2025 1.9 augustss sc->sc_freeqtds = sqtd;
2026 1.9 augustss }
2027 1.9 augustss splx(s);
2028 1.9 augustss }
2029 1.9 augustss
2030 1.9 augustss s = splusb();
2031 1.9 augustss sqtd = sc->sc_freeqtds;
2032 1.9 augustss sc->sc_freeqtds = sqtd->nextqtd;
2033 1.9 augustss memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2034 1.9 augustss sqtd->nextqtd = NULL;
2035 1.9 augustss sqtd->xfer = NULL;
2036 1.9 augustss splx(s);
2037 1.9 augustss
2038 1.9 augustss return (sqtd);
2039 1.9 augustss }
2040 1.9 augustss
2041 1.9 augustss void
2042 1.9 augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2043 1.9 augustss {
2044 1.9 augustss int s;
2045 1.9 augustss
2046 1.9 augustss s = splusb();
2047 1.9 augustss sqtd->nextqtd = sc->sc_freeqtds;
2048 1.9 augustss sc->sc_freeqtds = sqtd;
2049 1.9 augustss splx(s);
2050 1.9 augustss }
2051 1.9 augustss
2052 1.15 augustss usbd_status
2053 1.25 augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2054 1.15 augustss int alen, int rd, usbd_xfer_handle xfer,
2055 1.15 augustss ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2056 1.15 augustss {
2057 1.15 augustss ehci_soft_qtd_t *next, *cur;
2058 1.22 augustss ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2059 1.15 augustss u_int32_t qtdstatus;
2060 1.15 augustss int len, curlen;
2061 1.15 augustss int i;
2062 1.15 augustss usb_dma_t *dma = &xfer->dmabuf;
2063 1.15 augustss
2064 1.25 augustss DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2065 1.15 augustss
2066 1.15 augustss len = alen;
2067 1.15 augustss dataphys = DMAADDR(dma);
2068 1.22 augustss dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
2069 1.15 augustss qtdstatus = htole32(
2070 1.26 augustss EHCI_QTD_ACTIVE |
2071 1.15 augustss EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2072 1.15 augustss EHCI_QTD_SET_CERR(3)
2073 1.15 augustss /* IOC set below */
2074 1.15 augustss /* BYTES set below */
2075 1.15 augustss /* XXX Data toggle */
2076 1.15 augustss );
2077 1.15 augustss
2078 1.15 augustss cur = ehci_alloc_sqtd(sc);
2079 1.25 augustss *sp = cur;
2080 1.15 augustss if (cur == NULL)
2081 1.15 augustss goto nomem;
2082 1.15 augustss for (;;) {
2083 1.22 augustss dataphyspage = EHCI_PAGE(dataphys);
2084 1.26 augustss /* The EHCI hardware can handle at most 5 pages. */
2085 1.25 augustss if (dataphyslastpage - dataphyspage <
2086 1.26 augustss EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
2087 1.15 augustss /* we can handle it in this QTD */
2088 1.15 augustss curlen = len;
2089 1.15 augustss } else {
2090 1.15 augustss /* must use multiple TDs, fill as much as possible. */
2091 1.22 augustss curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
2092 1.22 augustss EHCI_PAGE_OFFSET(dataphys);
2093 1.25 augustss #ifdef DIAGNOSTIC
2094 1.25 augustss if (curlen > len) {
2095 1.26 augustss printf("ehci_alloc_sqtd_chain: curlen=0x%x "
2096 1.26 augustss "len=0x%x offs=0x%x\n", curlen, len,
2097 1.26 augustss EHCI_PAGE_OFFSET(dataphys));
2098 1.26 augustss printf("lastpage=0x%x page=0x%x phys=0x%x\n",
2099 1.26 augustss dataphyslastpage, dataphyspage,
2100 1.26 augustss dataphys);
2101 1.25 augustss curlen = len;
2102 1.25 augustss }
2103 1.25 augustss #endif
2104 1.22 augustss
2105 1.22 augustss /* XXX true for EHCI? */
2106 1.15 augustss /* the length must be a multiple of the max size */
2107 1.15 augustss curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2108 1.25 augustss DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2109 1.25 augustss "curlen=%d\n", curlen));
2110 1.15 augustss #ifdef DIAGNOSTIC
2111 1.15 augustss if (curlen == 0)
2112 1.15 augustss panic("ehci_alloc_std: curlen == 0\n");
2113 1.15 augustss #endif
2114 1.15 augustss }
2115 1.25 augustss DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2116 1.22 augustss "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2117 1.22 augustss dataphys, dataphyslastpage,
2118 1.15 augustss len, curlen));
2119 1.15 augustss len -= curlen;
2120 1.15 augustss
2121 1.15 augustss if (len != 0) {
2122 1.15 augustss next = ehci_alloc_sqtd(sc);
2123 1.15 augustss if (next == NULL)
2124 1.15 augustss goto nomem;
2125 1.15 augustss nextphys = next->physaddr;
2126 1.15 augustss } else {
2127 1.15 augustss next = NULL;
2128 1.15 augustss nextphys = EHCI_NULL;
2129 1.15 augustss }
2130 1.15 augustss
2131 1.15 augustss for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2132 1.15 augustss ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2133 1.15 augustss if (i != 0) /* use offset only in first buffer */
2134 1.15 augustss a = EHCI_PAGE(a);
2135 1.15 augustss cur->qtd.qtd_buffer[i] = htole32(a);
2136 1.25 augustss #ifdef DIAGNOSTIC
2137 1.25 augustss if (i >= EHCI_QTD_NBUFFERS) {
2138 1.25 augustss printf("ehci_alloc_sqtd_chain: i=%d\n", i);
2139 1.25 augustss goto nomem;
2140 1.25 augustss }
2141 1.25 augustss #endif
2142 1.15 augustss }
2143 1.15 augustss cur->nextqtd = next;
2144 1.15 augustss cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
2145 1.15 augustss cur->qtd.qtd_status =
2146 1.15 augustss qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
2147 1.15 augustss cur->xfer = xfer;
2148 1.18 augustss cur->len = curlen;
2149 1.29 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2150 1.29 augustss dataphys, dataphys + curlen));
2151 1.15 augustss if (len == 0)
2152 1.15 augustss break;
2153 1.25 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2154 1.15 augustss dataphys += curlen;
2155 1.15 augustss cur = next;
2156 1.15 augustss }
2157 1.15 augustss cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2158 1.15 augustss *ep = cur;
2159 1.15 augustss
2160 1.29 augustss DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2161 1.29 augustss *sp, *ep));
2162 1.29 augustss
2163 1.15 augustss return (USBD_NORMAL_COMPLETION);
2164 1.15 augustss
2165 1.15 augustss nomem:
2166 1.15 augustss /* XXX free chain */
2167 1.25 augustss DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2168 1.15 augustss return (USBD_NOMEM);
2169 1.15 augustss }
2170 1.15 augustss
2171 1.18 augustss Static void
2172 1.25 augustss ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2173 1.18 augustss ehci_soft_qtd_t *sqtdend)
2174 1.18 augustss {
2175 1.18 augustss ehci_soft_qtd_t *p;
2176 1.25 augustss int i;
2177 1.18 augustss
2178 1.29 augustss DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2179 1.29 augustss sqtd, sqtdend));
2180 1.29 augustss
2181 1.25 augustss for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2182 1.18 augustss p = sqtd->nextqtd;
2183 1.18 augustss ehci_free_sqtd(sc, sqtd);
2184 1.18 augustss }
2185 1.18 augustss }
2186 1.18 augustss
2187 1.15 augustss /****************/
2188 1.15 augustss
2189 1.9 augustss /*
2190 1.10 augustss * Close a reqular pipe.
2191 1.10 augustss * Assumes that there are no pending transactions.
2192 1.10 augustss */
2193 1.10 augustss void
2194 1.10 augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2195 1.10 augustss {
2196 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2197 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2198 1.10 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2199 1.10 augustss int s;
2200 1.10 augustss
2201 1.10 augustss s = splusb();
2202 1.10 augustss ehci_rem_qh(sc, sqh, head);
2203 1.10 augustss splx(s);
2204 1.10 augustss ehci_free_sqh(sc, epipe->sqh);
2205 1.10 augustss }
2206 1.10 augustss
2207 1.10 augustss /*
2208 1.10 augustss * Abort a device request.
2209 1.10 augustss * If this routine is called at splusb() it guarantees that the request
2210 1.10 augustss * will be removed from the hardware scheduling and that the callback
2211 1.10 augustss * for it will be called with USBD_CANCELLED status.
2212 1.10 augustss * It's impossible to guarantee that the requested transfer will not
2213 1.10 augustss * have happened since the hardware runs concurrently.
2214 1.10 augustss * If the transaction has already happened we rely on the ordinary
2215 1.10 augustss * interrupt processing to process it.
2216 1.26 augustss * XXX This is most probably wrong.
2217 1.10 augustss */
2218 1.10 augustss void
2219 1.10 augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2220 1.10 augustss {
2221 1.26 augustss #define exfer EXFER(xfer)
2222 1.10 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2223 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2224 1.26 augustss ehci_soft_qh_t *sqh = epipe->sqh;
2225 1.26 augustss ehci_soft_qtd_t *sqtd;
2226 1.26 augustss ehci_physaddr_t cur;
2227 1.26 augustss u_int32_t qhstatus;
2228 1.11 augustss int s;
2229 1.26 augustss int hit;
2230 1.10 augustss
2231 1.24 augustss DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2232 1.10 augustss
2233 1.17 augustss if (sc->sc_dying) {
2234 1.17 augustss /* If we're dying, just do the software part. */
2235 1.17 augustss s = splusb();
2236 1.17 augustss xfer->status = status; /* make software ignore it */
2237 1.17 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2238 1.17 augustss usb_transfer_complete(xfer);
2239 1.17 augustss splx(s);
2240 1.17 augustss return;
2241 1.17 augustss }
2242 1.17 augustss
2243 1.10 augustss if (xfer->device->bus->intr_context || !curproc)
2244 1.10 augustss panic("ehci_abort_xfer: not in process context\n");
2245 1.10 augustss
2246 1.11 augustss /*
2247 1.11 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2248 1.11 augustss */
2249 1.11 augustss s = splusb();
2250 1.11 augustss xfer->status = status; /* make software ignore it */
2251 1.15 augustss usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2252 1.26 augustss qhstatus = sqh->qh.qh_qtd.qtd_status;
2253 1.26 augustss sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
2254 1.26 augustss for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2255 1.26 augustss sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
2256 1.26 augustss if (sqtd == exfer->sqtdend)
2257 1.26 augustss break;
2258 1.26 augustss }
2259 1.11 augustss splx(s);
2260 1.11 augustss
2261 1.11 augustss /*
2262 1.11 augustss * Step 2: Wait until we know hardware has finished any possible
2263 1.11 augustss * use of the xfer. Also make sure the soft interrupt routine
2264 1.11 augustss * has run.
2265 1.11 augustss */
2266 1.26 augustss ehci_sync_hc(sc);
2267 1.29 augustss s = splusb();
2268 1.29 augustss sc->sc_softwake = 1;
2269 1.29 augustss usb_schedsoftintr(&sc->sc_bus);
2270 1.29 augustss tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
2271 1.29 augustss splx(s);
2272 1.11 augustss
2273 1.11 augustss /*
2274 1.11 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2275 1.11 augustss * The complication here is that the hardware may have executed
2276 1.11 augustss * beyond the xfer we're trying to abort. So as we're scanning
2277 1.11 augustss * the TDs of this xfer we check if the hardware points to
2278 1.11 augustss * any of them.
2279 1.11 augustss */
2280 1.11 augustss s = splusb(); /* XXX why? */
2281 1.26 augustss cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2282 1.26 augustss hit = 0;
2283 1.26 augustss for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2284 1.26 augustss hit |= cur == sqtd->physaddr;
2285 1.26 augustss if (sqtd == exfer->sqtdend)
2286 1.26 augustss break;
2287 1.26 augustss }
2288 1.26 augustss sqtd = sqtd->nextqtd;
2289 1.26 augustss /* Zap curqtd register if hardware pointed inside the xfer. */
2290 1.26 augustss if (hit && sqtd != NULL) {
2291 1.26 augustss DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
2292 1.26 augustss sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
2293 1.26 augustss sqh->qh.qh_qtd.qtd_status = qhstatus;
2294 1.26 augustss } else {
2295 1.26 augustss DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2296 1.26 augustss }
2297 1.11 augustss
2298 1.11 augustss /*
2299 1.26 augustss * Step 4: Execute callback.
2300 1.11 augustss */
2301 1.18 augustss #ifdef DIAGNOSTIC
2302 1.26 augustss exfer->isdone = 1;
2303 1.18 augustss #endif
2304 1.11 augustss usb_transfer_complete(xfer);
2305 1.11 augustss
2306 1.11 augustss splx(s);
2307 1.26 augustss #undef exfer
2308 1.10 augustss }
2309 1.10 augustss
2310 1.15 augustss void
2311 1.15 augustss ehci_timeout(void *addr)
2312 1.15 augustss {
2313 1.15 augustss struct ehci_xfer *exfer = addr;
2314 1.17 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2315 1.17 augustss ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2316 1.15 augustss
2317 1.15 augustss DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2318 1.22 augustss #ifdef USB_DEBUG
2319 1.26 augustss if (ehcidebug > 1)
2320 1.22 augustss usbd_dump_pipe(exfer->xfer.pipe);
2321 1.22 augustss #endif
2322 1.15 augustss
2323 1.17 augustss if (sc->sc_dying) {
2324 1.17 augustss ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2325 1.17 augustss return;
2326 1.17 augustss }
2327 1.17 augustss
2328 1.15 augustss /* Execute the abort in a process context. */
2329 1.15 augustss usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2330 1.15 augustss usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2331 1.15 augustss }
2332 1.15 augustss
2333 1.15 augustss void
2334 1.15 augustss ehci_timeout_task(void *addr)
2335 1.15 augustss {
2336 1.15 augustss usbd_xfer_handle xfer = addr;
2337 1.15 augustss int s;
2338 1.15 augustss
2339 1.15 augustss DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2340 1.15 augustss
2341 1.15 augustss s = splusb();
2342 1.15 augustss ehci_abort_xfer(xfer, USBD_TIMEOUT);
2343 1.15 augustss splx(s);
2344 1.15 augustss }
2345 1.15 augustss
2346 1.5 augustss /************************/
2347 1.5 augustss
2348 1.10 augustss Static usbd_status
2349 1.10 augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2350 1.10 augustss {
2351 1.10 augustss usbd_status err;
2352 1.10 augustss
2353 1.10 augustss /* Insert last in queue. */
2354 1.10 augustss err = usb_insert_transfer(xfer);
2355 1.10 augustss if (err)
2356 1.10 augustss return (err);
2357 1.10 augustss
2358 1.10 augustss /* Pipe isn't running, start first */
2359 1.10 augustss return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2360 1.10 augustss }
2361 1.10 augustss
2362 1.12 augustss Static usbd_status
2363 1.12 augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
2364 1.12 augustss {
2365 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2366 1.15 augustss usbd_status err;
2367 1.15 augustss
2368 1.15 augustss if (sc->sc_dying)
2369 1.15 augustss return (USBD_IOERROR);
2370 1.15 augustss
2371 1.15 augustss #ifdef DIAGNOSTIC
2372 1.15 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2373 1.15 augustss /* XXX panic */
2374 1.15 augustss printf("ehci_device_ctrl_transfer: not a request\n");
2375 1.15 augustss return (USBD_INVAL);
2376 1.15 augustss }
2377 1.15 augustss #endif
2378 1.15 augustss
2379 1.15 augustss err = ehci_device_request(xfer);
2380 1.15 augustss if (err)
2381 1.15 augustss return (err);
2382 1.15 augustss
2383 1.15 augustss if (sc->sc_bus.use_polling)
2384 1.15 augustss ehci_waitintr(sc, xfer);
2385 1.15 augustss return (USBD_IN_PROGRESS);
2386 1.12 augustss }
2387 1.10 augustss
2388 1.10 augustss void
2389 1.10 augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
2390 1.10 augustss {
2391 1.18 augustss struct ehci_xfer *ex = EXFER(xfer);
2392 1.18 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2393 1.25 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2394 1.18 augustss
2395 1.10 augustss DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2396 1.10 augustss
2397 1.10 augustss #ifdef DIAGNOSTIC
2398 1.10 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2399 1.10 augustss panic("ehci_ctrl_done: not a request\n");
2400 1.10 augustss }
2401 1.10 augustss #endif
2402 1.18 augustss
2403 1.25 augustss if (xfer->status != USBD_NOMEM) {
2404 1.25 augustss ehci_del_intr_list(ex); /* remove from active list */
2405 1.25 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2406 1.25 augustss }
2407 1.18 augustss
2408 1.25 augustss DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2409 1.10 augustss }
2410 1.10 augustss
2411 1.10 augustss /* Abort a device control request. */
2412 1.10 augustss Static void
2413 1.10 augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2414 1.10 augustss {
2415 1.10 augustss DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2416 1.10 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
2417 1.10 augustss }
2418 1.10 augustss
2419 1.10 augustss /* Close a device control pipe. */
2420 1.10 augustss Static void
2421 1.10 augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
2422 1.10 augustss {
2423 1.10 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2424 1.10 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2425 1.10 augustss
2426 1.10 augustss DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2427 1.11 augustss ehci_close_pipe(pipe, sc->sc_async_head);
2428 1.15 augustss }
2429 1.15 augustss
2430 1.15 augustss usbd_status
2431 1.15 augustss ehci_device_request(usbd_xfer_handle xfer)
2432 1.15 augustss {
2433 1.18 augustss #define exfer EXFER(xfer)
2434 1.15 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2435 1.15 augustss usb_device_request_t *req = &xfer->request;
2436 1.15 augustss usbd_device_handle dev = epipe->pipe.device;
2437 1.15 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2438 1.15 augustss int addr = dev->address;
2439 1.15 augustss ehci_soft_qtd_t *setup, *stat, *next;
2440 1.15 augustss ehci_soft_qh_t *sqh;
2441 1.15 augustss int isread;
2442 1.15 augustss int len;
2443 1.15 augustss usbd_status err;
2444 1.15 augustss int s;
2445 1.15 augustss
2446 1.15 augustss isread = req->bmRequestType & UT_READ;
2447 1.15 augustss len = UGETW(req->wLength);
2448 1.15 augustss
2449 1.15 augustss DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2450 1.15 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2451 1.15 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2452 1.15 augustss UGETW(req->wIndex), len, addr,
2453 1.15 augustss epipe->pipe.endpoint->edesc->bEndpointAddress));
2454 1.15 augustss
2455 1.15 augustss setup = ehci_alloc_sqtd(sc);
2456 1.15 augustss if (setup == NULL) {
2457 1.15 augustss err = USBD_NOMEM;
2458 1.15 augustss goto bad1;
2459 1.15 augustss }
2460 1.15 augustss stat = ehci_alloc_sqtd(sc);
2461 1.15 augustss if (stat == NULL) {
2462 1.15 augustss err = USBD_NOMEM;
2463 1.15 augustss goto bad2;
2464 1.15 augustss }
2465 1.15 augustss
2466 1.15 augustss sqh = epipe->sqh;
2467 1.15 augustss epipe->u.ctl.length = len;
2468 1.15 augustss
2469 1.15 augustss /* XXX
2470 1.15 augustss * Since we're messing with the QH we must know the HC is in sync.
2471 1.15 augustss * This needs to go away since it slows down control transfers.
2472 1.15 augustss * Removing it entails:
2473 1.15 augustss * - fill the QH only once with addr & wMaxPacketSize
2474 1.15 augustss * - put the correct data toggles in the qtds and set DTC
2475 1.15 augustss */
2476 1.15 augustss /* ehci_sync_hc(sc); */
2477 1.15 augustss /* Update device address and length since they may have changed. */
2478 1.15 augustss /* XXX This only needs to be done once, but it's too early in open. */
2479 1.15 augustss /* XXXX Should not touch ED here! */
2480 1.15 augustss sqh->qh.qh_endp =
2481 1.15 augustss (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2482 1.15 augustss htole32(
2483 1.15 augustss EHCI_QH_SET_ADDR(addr) |
2484 1.15 augustss /* EHCI_QH_DTC | */
2485 1.15 augustss EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2486 1.15 augustss );
2487 1.15 augustss /* Clear toggle */
2488 1.15 augustss sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2489 1.15 augustss
2490 1.15 augustss /* Set up data transaction */
2491 1.15 augustss if (len != 0) {
2492 1.15 augustss ehci_soft_qtd_t *end;
2493 1.15 augustss
2494 1.25 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2495 1.15 augustss &next, &end);
2496 1.15 augustss if (err)
2497 1.15 augustss goto bad3;
2498 1.15 augustss end->nextqtd = stat;
2499 1.15 augustss end->qtd.qtd_next =
2500 1.15 augustss end->qtd.qtd_altnext = htole32(stat->physaddr);
2501 1.15 augustss /* Start toggle at 1. */
2502 1.15 augustss /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2503 1.15 augustss } else {
2504 1.15 augustss next = stat;
2505 1.15 augustss }
2506 1.15 augustss
2507 1.30 augustss memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2508 1.15 augustss
2509 1.15 augustss setup->qtd.qtd_status = htole32(
2510 1.26 augustss EHCI_QTD_ACTIVE |
2511 1.15 augustss EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2512 1.15 augustss EHCI_QTD_SET_CERR(3) |
2513 1.15 augustss EHCI_QTD_SET_BYTES(sizeof *req)
2514 1.15 augustss );
2515 1.15 augustss setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma));
2516 1.15 augustss setup->nextqtd = next;
2517 1.15 augustss setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2518 1.15 augustss setup->xfer = xfer;
2519 1.18 augustss setup->len = sizeof *req;
2520 1.15 augustss
2521 1.15 augustss stat->qtd.qtd_status = htole32(
2522 1.26 augustss EHCI_QTD_ACTIVE |
2523 1.15 augustss EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2524 1.15 augustss EHCI_QTD_SET_CERR(3) |
2525 1.15 augustss EHCI_QTD_IOC
2526 1.15 augustss );
2527 1.15 augustss stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2528 1.15 augustss stat->nextqtd = NULL;
2529 1.15 augustss stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2530 1.15 augustss stat->xfer = xfer;
2531 1.18 augustss stat->len = 0;
2532 1.15 augustss
2533 1.15 augustss #ifdef EHCI_DEBUG
2534 1.23 augustss if (ehcidebug > 5) {
2535 1.15 augustss DPRINTF(("ehci_device_request:\n"));
2536 1.15 augustss ehci_dump_sqh(sqh);
2537 1.15 augustss ehci_dump_sqtds(setup);
2538 1.15 augustss }
2539 1.15 augustss #endif
2540 1.15 augustss
2541 1.18 augustss exfer->sqtdstart = setup;
2542 1.18 augustss exfer->sqtdend = stat;
2543 1.18 augustss #ifdef DIAGNOSTIC
2544 1.18 augustss if (!exfer->isdone) {
2545 1.18 augustss printf("ehci_device_request: not done, exfer=%p\n", exfer);
2546 1.18 augustss }
2547 1.18 augustss exfer->isdone = 0;
2548 1.18 augustss #endif
2549 1.18 augustss
2550 1.15 augustss /* Insert qTD in QH list. */
2551 1.15 augustss s = splusb();
2552 1.23 augustss ehci_set_qh_qtd(sqh, setup);
2553 1.15 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2554 1.15 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2555 1.15 augustss ehci_timeout, xfer);
2556 1.15 augustss }
2557 1.18 augustss ehci_add_intr_list(sc, exfer);
2558 1.18 augustss xfer->status = USBD_IN_PROGRESS;
2559 1.15 augustss splx(s);
2560 1.15 augustss
2561 1.17 augustss #ifdef EHCI_DEBUG
2562 1.15 augustss if (ehcidebug > 10) {
2563 1.15 augustss DPRINTF(("ehci_device_request: status=%x\n",
2564 1.15 augustss EOREAD4(sc, EHCI_USBSTS)));
2565 1.23 augustss delay(10000);
2566 1.18 augustss ehci_dump_regs(sc);
2567 1.15 augustss ehci_dump_sqh(sc->sc_async_head);
2568 1.15 augustss ehci_dump_sqh(sqh);
2569 1.15 augustss ehci_dump_sqtds(setup);
2570 1.15 augustss }
2571 1.15 augustss #endif
2572 1.15 augustss
2573 1.15 augustss return (USBD_NORMAL_COMPLETION);
2574 1.15 augustss
2575 1.15 augustss bad3:
2576 1.15 augustss ehci_free_sqtd(sc, stat);
2577 1.15 augustss bad2:
2578 1.15 augustss ehci_free_sqtd(sc, setup);
2579 1.15 augustss bad1:
2580 1.25 augustss DPRINTFN(-1,("ehci_device_request: no memory\n"));
2581 1.25 augustss xfer->status = err;
2582 1.25 augustss usb_transfer_complete(xfer);
2583 1.15 augustss return (err);
2584 1.18 augustss #undef exfer
2585 1.10 augustss }
2586 1.10 augustss
2587 1.10 augustss /************************/
2588 1.5 augustss
2589 1.19 augustss Static usbd_status
2590 1.19 augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2591 1.19 augustss {
2592 1.19 augustss usbd_status err;
2593 1.19 augustss
2594 1.19 augustss /* Insert last in queue. */
2595 1.19 augustss err = usb_insert_transfer(xfer);
2596 1.19 augustss if (err)
2597 1.19 augustss return (err);
2598 1.19 augustss
2599 1.19 augustss /* Pipe isn't running, start first */
2600 1.19 augustss return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2601 1.19 augustss }
2602 1.19 augustss
2603 1.19 augustss usbd_status
2604 1.19 augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
2605 1.19 augustss {
2606 1.19 augustss #define exfer EXFER(xfer)
2607 1.19 augustss struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2608 1.19 augustss usbd_device_handle dev = epipe->pipe.device;
2609 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2610 1.19 augustss ehci_soft_qtd_t *data, *dataend;
2611 1.19 augustss ehci_soft_qh_t *sqh;
2612 1.19 augustss usbd_status err;
2613 1.19 augustss int len, isread, endpt;
2614 1.19 augustss int s;
2615 1.19 augustss
2616 1.22 augustss DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
2617 1.19 augustss xfer, xfer->length, xfer->flags));
2618 1.19 augustss
2619 1.19 augustss if (sc->sc_dying)
2620 1.19 augustss return (USBD_IOERROR);
2621 1.19 augustss
2622 1.19 augustss #ifdef DIAGNOSTIC
2623 1.19 augustss if (xfer->rqflags & URQ_REQUEST)
2624 1.19 augustss panic("ehci_device_bulk_transfer: a request\n");
2625 1.19 augustss #endif
2626 1.19 augustss
2627 1.19 augustss len = xfer->length;
2628 1.19 augustss endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2629 1.19 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2630 1.19 augustss sqh = epipe->sqh;
2631 1.19 augustss
2632 1.19 augustss epipe->u.bulk.length = len;
2633 1.19 augustss
2634 1.25 augustss err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2635 1.19 augustss &dataend);
2636 1.25 augustss if (err) {
2637 1.25 augustss DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
2638 1.25 augustss xfer->status = err;
2639 1.25 augustss usb_transfer_complete(xfer);
2640 1.19 augustss return (err);
2641 1.25 augustss }
2642 1.19 augustss
2643 1.19 augustss #ifdef EHCI_DEBUG
2644 1.23 augustss if (ehcidebug > 5) {
2645 1.19 augustss DPRINTF(("ehci_device_bulk_transfer: data(1)\n"));
2646 1.23 augustss ehci_dump_sqh(sqh);
2647 1.19 augustss ehci_dump_sqtds(data);
2648 1.19 augustss }
2649 1.19 augustss #endif
2650 1.19 augustss
2651 1.19 augustss /* Set up interrupt info. */
2652 1.19 augustss exfer->sqtdstart = data;
2653 1.19 augustss exfer->sqtdend = dataend;
2654 1.19 augustss #ifdef DIAGNOSTIC
2655 1.19 augustss if (!exfer->isdone) {
2656 1.19 augustss printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer);
2657 1.19 augustss }
2658 1.19 augustss exfer->isdone = 0;
2659 1.19 augustss #endif
2660 1.19 augustss
2661 1.19 augustss s = splusb();
2662 1.23 augustss ehci_set_qh_qtd(sqh, data);
2663 1.19 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2664 1.19 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2665 1.19 augustss ehci_timeout, xfer);
2666 1.19 augustss }
2667 1.19 augustss ehci_add_intr_list(sc, exfer);
2668 1.19 augustss xfer->status = USBD_IN_PROGRESS;
2669 1.19 augustss splx(s);
2670 1.19 augustss
2671 1.19 augustss #ifdef EHCI_DEBUG
2672 1.19 augustss if (ehcidebug > 10) {
2673 1.19 augustss DPRINTF(("ehci_device_bulk_transfer: data(2)\n"));
2674 1.23 augustss delay(10000);
2675 1.29 augustss DPRINTF(("ehci_device_bulk_transfer: data(3)\n"));
2676 1.23 augustss ehci_dump_regs(sc);
2677 1.29 augustss #if 0
2678 1.29 augustss printf("async_head:\n");
2679 1.23 augustss ehci_dump_sqh(sc->sc_async_head);
2680 1.29 augustss #endif
2681 1.29 augustss printf("sqh:\n");
2682 1.23 augustss ehci_dump_sqh(sqh);
2683 1.19 augustss ehci_dump_sqtds(data);
2684 1.19 augustss }
2685 1.19 augustss #endif
2686 1.19 augustss
2687 1.19 augustss if (sc->sc_bus.use_polling)
2688 1.19 augustss ehci_waitintr(sc, xfer);
2689 1.19 augustss
2690 1.19 augustss return (USBD_IN_PROGRESS);
2691 1.19 augustss #undef exfer
2692 1.19 augustss }
2693 1.19 augustss
2694 1.19 augustss Static void
2695 1.19 augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
2696 1.19 augustss {
2697 1.19 augustss DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2698 1.19 augustss ehci_abort_xfer(xfer, USBD_CANCELLED);
2699 1.19 augustss }
2700 1.19 augustss
2701 1.19 augustss /*
2702 1.19 augustss * Close a device bulk pipe.
2703 1.19 augustss */
2704 1.19 augustss Static void
2705 1.19 augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
2706 1.19 augustss {
2707 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2708 1.19 augustss
2709 1.19 augustss DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2710 1.19 augustss ehci_close_pipe(pipe, sc->sc_async_head);
2711 1.19 augustss }
2712 1.19 augustss
2713 1.19 augustss void
2714 1.19 augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
2715 1.19 augustss {
2716 1.19 augustss struct ehci_xfer *ex = EXFER(xfer);
2717 1.19 augustss ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2718 1.19 augustss /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2719 1.19 augustss
2720 1.19 augustss DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2721 1.19 augustss xfer, xfer->actlen));
2722 1.19 augustss
2723 1.25 augustss if (xfer->status != USBD_NOMEM) {
2724 1.25 augustss ehci_del_intr_list(ex); /* remove from active list */
2725 1.25 augustss ehci_free_sqtd_chain(sc, ex->sqtdstart, 0);
2726 1.25 augustss }
2727 1.19 augustss
2728 1.19 augustss DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2729 1.19 augustss }
2730 1.5 augustss
2731 1.10 augustss /************************/
2732 1.10 augustss
2733 1.5 augustss Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2734 1.5 augustss Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2735 1.5 augustss Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2736 1.5 augustss Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2737 1.5 augustss Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2738 1.10 augustss
2739 1.10 augustss /************************/
2740 1.5 augustss
2741 1.5 augustss Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2742 1.5 augustss Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2743 1.5 augustss Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2744 1.5 augustss Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2745 1.5 augustss Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
2746