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ehci.c revision 1.47.2.6
      1  1.47.2.6     skrll /*	$NetBSD: ehci.c,v 1.47.2.6 2005/01/17 19:31:52 skrll Exp $	*/
      2      1.29  augustss 
      3      1.29  augustss /*
      4  1.47.2.1     skrll  * Copyright (c) 2004 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8  1.47.2.1     skrll  * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum.
      9       1.1  augustss  *
     10       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11       1.1  augustss  * modification, are permitted provided that the following conditions
     12       1.1  augustss  * are met:
     13       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18       1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     19       1.1  augustss  *    must display the following acknowledgement:
     20       1.1  augustss  *        This product includes software developed by the NetBSD
     21       1.1  augustss  *        Foundation, Inc. and its contributors.
     22       1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1  augustss  *    contributors may be used to endorse or promote products derived
     24       1.1  augustss  *    from this software without specific prior written permission.
     25       1.1  augustss  *
     26       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1  augustss  */
     38       1.1  augustss 
     39       1.1  augustss /*
     40       1.3  augustss  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
     41       1.1  augustss  *
     42      1.35     enami  * The EHCI 1.0 spec can be found at
     43      1.34  augustss  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
     44       1.7  augustss  * and the USB 2.0 spec at
     45      1.43    ichiro  * http://www.usb.org/developers/docs/usb_20.zip
     46       1.1  augustss  *
     47       1.1  augustss  */
     48       1.4     lukem 
     49  1.47.2.1     skrll /*
     50  1.47.2.1     skrll  * TODO:
     51  1.47.2.1     skrll  * 1) hold off explorations by companion controllers until ehci has started.
     52  1.47.2.1     skrll  *
     53  1.47.2.1     skrll  * 2) The EHCI driver lacks support for interrupt isochronous transfers, so
     54  1.47.2.1     skrll  *    devices using them don't work.
     55  1.47.2.1     skrll  *    Interrupt transfers are not difficult, it's just not done.
     56  1.47.2.1     skrll  *
     57  1.47.2.1     skrll  * 3) The meaty part to implement is the support for USB 2.0 hubs.
     58  1.47.2.4     skrll  *    They are quite complicated since the need to be able to do
     59  1.47.2.1     skrll  *    "transaction translation", i.e., converting to/from USB 2 and USB 1.
     60  1.47.2.1     skrll  *    So the hub driver needs to handle and schedule these things, to
     61  1.47.2.1     skrll  *    assign place in frame where different devices get to go. See chapter
     62  1.47.2.1     skrll  *    on hubs in USB 2.0 for details.
     63  1.47.2.1     skrll  *
     64  1.47.2.1     skrll  * 4) command failures are not recovered correctly
     65  1.47.2.1     skrll */
     66  1.47.2.1     skrll 
     67       1.4     lukem #include <sys/cdefs.h>
     68  1.47.2.6     skrll __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.47.2.6 2005/01/17 19:31:52 skrll Exp $");
     69      1.47  augustss 
     70      1.47  augustss #include "ohci.h"
     71      1.47  augustss #include "uhci.h"
     72       1.1  augustss 
     73       1.1  augustss #include <sys/param.h>
     74       1.1  augustss #include <sys/systm.h>
     75       1.1  augustss #include <sys/kernel.h>
     76       1.1  augustss #include <sys/malloc.h>
     77       1.1  augustss #include <sys/device.h>
     78       1.1  augustss #include <sys/select.h>
     79       1.1  augustss #include <sys/proc.h>
     80       1.1  augustss #include <sys/queue.h>
     81       1.1  augustss 
     82       1.1  augustss #include <machine/bus.h>
     83       1.1  augustss #include <machine/endian.h>
     84       1.1  augustss 
     85       1.1  augustss #include <dev/usb/usb.h>
     86       1.1  augustss #include <dev/usb/usbdi.h>
     87       1.1  augustss #include <dev/usb/usbdivar.h>
     88       1.1  augustss #include <dev/usb/usb_mem.h>
     89       1.1  augustss #include <dev/usb/usb_quirks.h>
     90       1.1  augustss 
     91       1.1  augustss #include <dev/usb/ehcireg.h>
     92       1.1  augustss #include <dev/usb/ehcivar.h>
     93       1.1  augustss 
     94       1.1  augustss #ifdef EHCI_DEBUG
     95  1.47.2.4     skrll #define DPRINTF(x)	do { if (ehcidebug) printf x; } while(0)
     96  1.47.2.4     skrll #define DPRINTFN(n,x)	do { if (ehcidebug>(n)) printf x; } while (0)
     97       1.6  augustss int ehcidebug = 0;
     98      1.15  augustss #ifndef __NetBSD__
     99       1.1  augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    100      1.15  augustss #endif
    101       1.1  augustss #else
    102       1.1  augustss #define DPRINTF(x)
    103       1.1  augustss #define DPRINTFN(n,x)
    104       1.1  augustss #endif
    105       1.1  augustss 
    106       1.5  augustss struct ehci_pipe {
    107       1.5  augustss 	struct usbd_pipe pipe;
    108  1.47.2.1     skrll 	int nexttoggle;
    109  1.47.2.1     skrll 
    110      1.10  augustss 	ehci_soft_qh_t *sqh;
    111      1.10  augustss 	union {
    112      1.10  augustss 		ehci_soft_qtd_t *qtd;
    113      1.10  augustss 		/* ehci_soft_itd_t *itd; */
    114      1.10  augustss 	} tail;
    115      1.10  augustss 	union {
    116      1.10  augustss 		/* Control pipe */
    117      1.10  augustss 		struct {
    118      1.10  augustss 			usb_dma_t reqdma;
    119      1.10  augustss 			u_int length;
    120      1.19  augustss 			/*ehci_soft_qtd_t *setup, *data, *stat;*/
    121      1.10  augustss 		} ctl;
    122      1.10  augustss 		/* Interrupt pipe */
    123  1.47.2.4     skrll 		struct {
    124  1.47.2.4     skrll 			u_int length;
    125  1.47.2.4     skrll 		} intr;
    126      1.10  augustss 		/* Bulk pipe */
    127      1.10  augustss 		struct {
    128      1.10  augustss 			u_int length;
    129      1.10  augustss 		} bulk;
    130      1.10  augustss 		/* Iso pipe */
    131      1.15  augustss 		/* XXX */
    132      1.10  augustss 	} u;
    133       1.5  augustss };
    134       1.5  augustss 
    135       1.5  augustss Static void		ehci_shutdown(void *);
    136       1.5  augustss Static void		ehci_power(int, void *);
    137       1.5  augustss 
    138       1.5  augustss Static usbd_status	ehci_open(usbd_pipe_handle);
    139       1.5  augustss Static void		ehci_poll(struct usbd_bus *);
    140       1.5  augustss Static void		ehci_softintr(void *);
    141      1.11  augustss Static int		ehci_intr1(ehci_softc_t *);
    142      1.15  augustss Static void		ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
    143      1.18  augustss Static void		ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
    144      1.18  augustss Static void		ehci_idone(struct ehci_xfer *);
    145      1.15  augustss Static void		ehci_timeout(void *);
    146      1.15  augustss Static void		ehci_timeout_task(void *);
    147       1.5  augustss 
    148       1.5  augustss Static usbd_status	ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    149       1.5  augustss Static void		ehci_freem(struct usbd_bus *, usb_dma_t *);
    150       1.5  augustss 
    151       1.5  augustss Static usbd_xfer_handle	ehci_allocx(struct usbd_bus *);
    152       1.5  augustss Static void		ehci_freex(struct usbd_bus *, usbd_xfer_handle);
    153       1.5  augustss 
    154       1.5  augustss Static usbd_status	ehci_root_ctrl_transfer(usbd_xfer_handle);
    155       1.5  augustss Static usbd_status	ehci_root_ctrl_start(usbd_xfer_handle);
    156       1.5  augustss Static void		ehci_root_ctrl_abort(usbd_xfer_handle);
    157       1.5  augustss Static void		ehci_root_ctrl_close(usbd_pipe_handle);
    158       1.5  augustss Static void		ehci_root_ctrl_done(usbd_xfer_handle);
    159       1.5  augustss 
    160       1.5  augustss Static usbd_status	ehci_root_intr_transfer(usbd_xfer_handle);
    161       1.5  augustss Static usbd_status	ehci_root_intr_start(usbd_xfer_handle);
    162       1.5  augustss Static void		ehci_root_intr_abort(usbd_xfer_handle);
    163       1.5  augustss Static void		ehci_root_intr_close(usbd_pipe_handle);
    164       1.5  augustss Static void		ehci_root_intr_done(usbd_xfer_handle);
    165       1.5  augustss 
    166       1.5  augustss Static usbd_status	ehci_device_ctrl_transfer(usbd_xfer_handle);
    167       1.5  augustss Static usbd_status	ehci_device_ctrl_start(usbd_xfer_handle);
    168       1.5  augustss Static void		ehci_device_ctrl_abort(usbd_xfer_handle);
    169       1.5  augustss Static void		ehci_device_ctrl_close(usbd_pipe_handle);
    170       1.5  augustss Static void		ehci_device_ctrl_done(usbd_xfer_handle);
    171       1.5  augustss 
    172       1.5  augustss Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle);
    173       1.5  augustss Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle);
    174       1.5  augustss Static void		ehci_device_bulk_abort(usbd_xfer_handle);
    175       1.5  augustss Static void		ehci_device_bulk_close(usbd_pipe_handle);
    176       1.5  augustss Static void		ehci_device_bulk_done(usbd_xfer_handle);
    177       1.5  augustss 
    178       1.5  augustss Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle);
    179       1.5  augustss Static usbd_status	ehci_device_intr_start(usbd_xfer_handle);
    180       1.5  augustss Static void		ehci_device_intr_abort(usbd_xfer_handle);
    181       1.5  augustss Static void		ehci_device_intr_close(usbd_pipe_handle);
    182       1.5  augustss Static void		ehci_device_intr_done(usbd_xfer_handle);
    183       1.5  augustss 
    184       1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle);
    185       1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle);
    186       1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle);
    187       1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle);
    188       1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle);
    189       1.5  augustss 
    190       1.5  augustss Static void		ehci_device_clear_toggle(usbd_pipe_handle pipe);
    191       1.5  augustss Static void		ehci_noop(usbd_pipe_handle pipe);
    192       1.5  augustss 
    193       1.5  augustss Static int		ehci_str(usb_string_descriptor_t *, int, char *);
    194       1.6  augustss Static void		ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
    195       1.6  augustss Static void		ehci_pcd_able(ehci_softc_t *, int);
    196       1.6  augustss Static void		ehci_pcd_enable(void *);
    197       1.6  augustss Static void		ehci_disown(ehci_softc_t *, int, int);
    198       1.5  augustss 
    199       1.9  augustss Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
    200       1.9  augustss Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
    201       1.9  augustss 
    202       1.9  augustss Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
    203       1.9  augustss Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
    204      1.25  augustss Static usbd_status	ehci_alloc_sqtd_chain(struct ehci_pipe *,
    205      1.15  augustss 			    ehci_softc_t *, int, int, usbd_xfer_handle,
    206      1.15  augustss 			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
    207      1.25  augustss Static void		ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
    208      1.18  augustss 					    ehci_soft_qtd_t *);
    209      1.15  augustss 
    210      1.15  augustss Static usbd_status	ehci_device_request(usbd_xfer_handle xfer);
    211       1.9  augustss 
    212  1.47.2.4     skrll Static usbd_status	ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
    213  1.47.2.4     skrll 			    int ival);
    214  1.47.2.4     skrll 
    215      1.10  augustss Static void		ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
    216      1.10  augustss Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
    217      1.10  augustss 				    ehci_soft_qh_t *);
    218      1.23  augustss Static void		ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
    219      1.11  augustss Static void		ehci_sync_hc(ehci_softc_t *);
    220      1.10  augustss 
    221      1.10  augustss Static void		ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
    222      1.10  augustss Static void		ehci_abort_xfer(usbd_xfer_handle, usbd_status);
    223       1.9  augustss 
    224       1.5  augustss #ifdef EHCI_DEBUG
    225      1.18  augustss Static void		ehci_dump_regs(ehci_softc_t *);
    226      1.39    martin Static void		ehci_dump(void);
    227       1.6  augustss Static ehci_softc_t 	*theehci;
    228      1.15  augustss Static void		ehci_dump_link(ehci_link_t, int);
    229      1.15  augustss Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
    230       1.9  augustss Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
    231       1.9  augustss Static void		ehci_dump_qtd(ehci_qtd_t *);
    232       1.9  augustss Static void		ehci_dump_sqh(ehci_soft_qh_t *);
    233      1.38    martin #ifdef DIAGNOSTIC
    234      1.18  augustss Static void		ehci_dump_exfer(struct ehci_xfer *);
    235       1.5  augustss #endif
    236      1.38    martin #endif
    237       1.5  augustss 
    238      1.11  augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
    239      1.11  augustss 
    240       1.5  augustss #define EHCI_INTR_ENDPT 1
    241       1.5  augustss 
    242      1.18  augustss #define ehci_add_intr_list(sc, ex) \
    243      1.18  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
    244      1.18  augustss #define ehci_del_intr_list(ex) \
    245      1.44  augustss 	do { \
    246      1.44  augustss 		LIST_REMOVE((ex), inext); \
    247      1.44  augustss 		(ex)->inext.le_prev = NULL; \
    248      1.44  augustss 	} while (0)
    249      1.44  augustss #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
    250      1.18  augustss 
    251       1.5  augustss Static struct usbd_bus_methods ehci_bus_methods = {
    252       1.5  augustss 	ehci_open,
    253       1.5  augustss 	ehci_softintr,
    254       1.5  augustss 	ehci_poll,
    255       1.5  augustss 	ehci_allocm,
    256       1.5  augustss 	ehci_freem,
    257       1.5  augustss 	ehci_allocx,
    258       1.5  augustss 	ehci_freex,
    259       1.5  augustss };
    260       1.5  augustss 
    261      1.33  augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
    262       1.5  augustss 	ehci_root_ctrl_transfer,
    263       1.5  augustss 	ehci_root_ctrl_start,
    264       1.5  augustss 	ehci_root_ctrl_abort,
    265       1.5  augustss 	ehci_root_ctrl_close,
    266       1.5  augustss 	ehci_noop,
    267       1.5  augustss 	ehci_root_ctrl_done,
    268       1.5  augustss };
    269       1.5  augustss 
    270      1.33  augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
    271       1.5  augustss 	ehci_root_intr_transfer,
    272       1.5  augustss 	ehci_root_intr_start,
    273       1.5  augustss 	ehci_root_intr_abort,
    274       1.5  augustss 	ehci_root_intr_close,
    275       1.5  augustss 	ehci_noop,
    276       1.5  augustss 	ehci_root_intr_done,
    277       1.5  augustss };
    278       1.5  augustss 
    279      1.33  augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
    280       1.5  augustss 	ehci_device_ctrl_transfer,
    281       1.5  augustss 	ehci_device_ctrl_start,
    282       1.5  augustss 	ehci_device_ctrl_abort,
    283       1.5  augustss 	ehci_device_ctrl_close,
    284       1.5  augustss 	ehci_noop,
    285       1.5  augustss 	ehci_device_ctrl_done,
    286       1.5  augustss };
    287       1.5  augustss 
    288      1.33  augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
    289       1.5  augustss 	ehci_device_intr_transfer,
    290       1.5  augustss 	ehci_device_intr_start,
    291       1.5  augustss 	ehci_device_intr_abort,
    292       1.5  augustss 	ehci_device_intr_close,
    293       1.5  augustss 	ehci_device_clear_toggle,
    294       1.5  augustss 	ehci_device_intr_done,
    295       1.5  augustss };
    296       1.5  augustss 
    297      1.33  augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
    298       1.5  augustss 	ehci_device_bulk_transfer,
    299       1.5  augustss 	ehci_device_bulk_start,
    300       1.5  augustss 	ehci_device_bulk_abort,
    301       1.5  augustss 	ehci_device_bulk_close,
    302       1.5  augustss 	ehci_device_clear_toggle,
    303       1.5  augustss 	ehci_device_bulk_done,
    304       1.5  augustss };
    305       1.5  augustss 
    306       1.5  augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
    307       1.5  augustss 	ehci_device_isoc_transfer,
    308       1.5  augustss 	ehci_device_isoc_start,
    309       1.5  augustss 	ehci_device_isoc_abort,
    310       1.5  augustss 	ehci_device_isoc_close,
    311       1.5  augustss 	ehci_noop,
    312       1.5  augustss 	ehci_device_isoc_done,
    313       1.5  augustss };
    314       1.5  augustss 
    315       1.1  augustss usbd_status
    316       1.1  augustss ehci_init(ehci_softc_t *sc)
    317       1.1  augustss {
    318       1.3  augustss 	u_int32_t version, sparams, cparams, hcr;
    319       1.3  augustss 	u_int i;
    320       1.3  augustss 	usbd_status err;
    321      1.11  augustss 	ehci_soft_qh_t *sqh;
    322  1.47.2.5     skrll 	u_int ncomp;
    323       1.3  augustss 
    324       1.3  augustss 	DPRINTF(("ehci_init: start\n"));
    325       1.6  augustss #ifdef EHCI_DEBUG
    326       1.6  augustss 	theehci = sc;
    327       1.6  augustss #endif
    328       1.3  augustss 
    329       1.3  augustss 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
    330       1.3  augustss 
    331       1.3  augustss 	version = EREAD2(sc, EHCI_HCIVERSION);
    332      1.41   thorpej 	aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
    333       1.3  augustss 	       version >> 8, version & 0xff);
    334       1.3  augustss 
    335       1.3  augustss 	sparams = EREAD4(sc, EHCI_HCSPARAMS);
    336       1.3  augustss 	DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
    337       1.6  augustss 	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
    338  1.47.2.5     skrll 	ncomp = EHCI_HCS_N_CC(sparams);
    339  1.47.2.5     skrll 	if (ncomp != sc->sc_ncomp) {
    340      1.41   thorpej 		aprint_error("%s: wrong number of companions (%d != %d)\n",
    341       1.3  augustss 		       USBDEVNAME(sc->sc_bus.bdev),
    342  1.47.2.5     skrll 		       ncomp, sc->sc_ncomp);
    343      1.47  augustss #if NOHCI == 0 || NUHCI == 0
    344      1.47  augustss 		aprint_error("%s: ohci or uhci probably not configured\n",
    345      1.47  augustss 			     USBDEVNAME(sc->sc_bus.bdev));
    346      1.47  augustss #endif
    347  1.47.2.5     skrll 		if (ncomp < sc->sc_ncomp)
    348  1.47.2.5     skrll 			sc->sc_ncomp = ncomp;
    349       1.3  augustss 	}
    350       1.3  augustss 	if (sc->sc_ncomp > 0) {
    351      1.41   thorpej 		aprint_normal("%s: companion controller%s, %d port%s each:",
    352       1.3  augustss 		    USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
    353       1.3  augustss 		    EHCI_HCS_N_PCC(sparams),
    354       1.3  augustss 		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
    355       1.3  augustss 		for (i = 0; i < sc->sc_ncomp; i++)
    356      1.41   thorpej 			aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
    357      1.41   thorpej 		aprint_normal("\n");
    358       1.3  augustss 	}
    359       1.5  augustss 	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
    360       1.3  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    361       1.3  augustss 	DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
    362      1.36  augustss 
    363      1.36  augustss 	if (EHCI_HCC_64BIT(cparams)) {
    364      1.36  augustss 		/* MUST clear segment register if 64 bit capable. */
    365      1.36  augustss 		EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
    366      1.36  augustss 	}
    367      1.33  augustss 
    368       1.3  augustss 	sc->sc_bus.usbrev = USBREV_2_0;
    369       1.3  augustss 
    370  1.47.2.6     skrll 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    371  1.47.2.6     skrll 	    USB_MEM_RESERVE);
    372  1.47.2.6     skrll 
    373       1.3  augustss 	/* Reset the controller */
    374       1.3  augustss 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    375       1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
    376       1.3  augustss 	usb_delay_ms(&sc->sc_bus, 1);
    377       1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
    378       1.3  augustss 	for (i = 0; i < 100; i++) {
    379      1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    380       1.3  augustss 		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
    381       1.3  augustss 		if (!hcr)
    382       1.3  augustss 			break;
    383       1.3  augustss 	}
    384       1.3  augustss 	if (hcr) {
    385      1.41   thorpej 		aprint_error("%s: reset timeout\n",
    386      1.41   thorpej 		    USBDEVNAME(sc->sc_bus.bdev));
    387       1.3  augustss 		return (USBD_IOERROR);
    388       1.3  augustss 	}
    389       1.3  augustss 
    390  1.47.2.4     skrll 	/* XXX need proper intr scheduling */
    391  1.47.2.4     skrll 	sc->sc_rand = 96;
    392  1.47.2.4     skrll 
    393       1.3  augustss 	/* frame list size at default, read back what we got and use that */
    394       1.3  augustss 	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
    395  1.47.2.4     skrll 	case 0: sc->sc_flsize = 1024; break;
    396  1.47.2.4     skrll 	case 1: sc->sc_flsize = 512; break;
    397  1.47.2.4     skrll 	case 2: sc->sc_flsize = 256; break;
    398       1.3  augustss 	case 3: return (USBD_IOERROR);
    399       1.3  augustss 	}
    400  1.47.2.4     skrll 	err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
    401  1.47.2.4     skrll 	    EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
    402       1.3  augustss 	if (err)
    403       1.3  augustss 		return (err);
    404       1.3  augustss 	DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
    405  1.47.2.4     skrll 	sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
    406  1.47.2.4     skrll 	EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
    407       1.3  augustss 
    408       1.5  augustss 	/* Set up the bus struct. */
    409       1.5  augustss 	sc->sc_bus.methods = &ehci_bus_methods;
    410       1.5  augustss 	sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
    411       1.5  augustss 
    412       1.5  augustss 	sc->sc_powerhook = powerhook_establish(ehci_power, sc);
    413       1.5  augustss 	sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
    414       1.5  augustss 
    415       1.6  augustss 	sc->sc_eintrs = EHCI_NORMAL_INTRS;
    416       1.6  augustss 
    417  1.47.2.4     skrll 	/*
    418  1.47.2.4     skrll 	 * Allocate the interrupt dummy QHs. These are arranged to give poll
    419  1.47.2.4     skrll 	 * intervals that are powers of 2 times 1ms.
    420  1.47.2.4     skrll 	 */
    421  1.47.2.4     skrll 	for (i = 0; i < EHCI_INTRQHS; i++) {
    422  1.47.2.4     skrll 		sqh = ehci_alloc_sqh(sc);
    423  1.47.2.4     skrll 		if (sqh == NULL) {
    424  1.47.2.4     skrll 			err = USBD_NOMEM;
    425  1.47.2.4     skrll 			goto bad1;
    426  1.47.2.4     skrll 		}
    427  1.47.2.4     skrll 		sc->sc_islots[i].sqh = sqh;
    428  1.47.2.4     skrll 	}
    429  1.47.2.4     skrll 	for (i = 0; i < EHCI_INTRQHS; i++) {
    430  1.47.2.4     skrll 		sqh = sc->sc_islots[i].sqh;
    431  1.47.2.4     skrll 		if (i == 0) {
    432  1.47.2.4     skrll 			/* The last (1ms) QH terminates. */
    433  1.47.2.4     skrll 			sqh->qh.qh_link = EHCI_NULL;
    434  1.47.2.4     skrll 			sqh->next = NULL;
    435  1.47.2.4     skrll 		} else {
    436  1.47.2.4     skrll 			/* Otherwise the next QH has half the poll interval */
    437  1.47.2.4     skrll 			sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
    438  1.47.2.4     skrll 			sqh->qh.qh_link = htole32(sqh->next->physaddr |
    439  1.47.2.4     skrll 			    EHCI_LINK_QH);
    440  1.47.2.4     skrll 		}
    441  1.47.2.4     skrll 		sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
    442  1.47.2.4     skrll 		sqh->qh.qh_link = EHCI_NULL;
    443  1.47.2.4     skrll 		sqh->qh.qh_curqtd = EHCI_NULL;
    444  1.47.2.4     skrll 		sqh->next = NULL;
    445  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    446  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    447  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    448  1.47.2.4     skrll 		sqh->sqtd = NULL;
    449  1.47.2.4     skrll 	}
    450  1.47.2.4     skrll 	/* Point the frame list at the last level (128ms). */
    451  1.47.2.4     skrll 	for (i = 0; i < sc->sc_flsize; i++) {
    452  1.47.2.4     skrll 		sc->sc_flist[i] = htole32(EHCI_LINK_QH |
    453  1.47.2.4     skrll 		    sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
    454  1.47.2.4     skrll 		    i)].sqh->physaddr);
    455  1.47.2.4     skrll 	}
    456  1.47.2.4     skrll 
    457      1.11  augustss 	/* Allocate dummy QH that starts the async list. */
    458      1.11  augustss 	sqh = ehci_alloc_sqh(sc);
    459      1.11  augustss 	if (sqh == NULL) {
    460       1.9  augustss 		err = USBD_NOMEM;
    461       1.9  augustss 		goto bad1;
    462       1.9  augustss 	}
    463      1.11  augustss 	/* Fill the QH */
    464      1.11  augustss 	sqh->qh.qh_endp =
    465      1.11  augustss 	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
    466      1.11  augustss 	sqh->qh.qh_link =
    467      1.11  augustss 	    htole32(sqh->physaddr | EHCI_LINK_QH);
    468      1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
    469      1.11  augustss 	sqh->next = NULL;
    470      1.11  augustss 	/* Fill the overlay qTD */
    471      1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    472      1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    473      1.26  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    474      1.11  augustss 	sqh->sqtd = NULL;
    475       1.9  augustss #ifdef EHCI_DEBUG
    476       1.9  augustss 	if (ehcidebug) {
    477      1.27     enami 		ehci_dump_sqh(sqh);
    478       1.9  augustss 	}
    479       1.9  augustss #endif
    480       1.9  augustss 
    481       1.9  augustss 	/* Point to async list */
    482      1.11  augustss 	sc->sc_async_head = sqh;
    483      1.11  augustss 	EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
    484       1.9  augustss 
    485       1.9  augustss 	usb_callout_init(sc->sc_tmo_pcd);
    486       1.9  augustss 
    487      1.10  augustss 	lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
    488      1.10  augustss 
    489       1.6  augustss 	/* Enable interrupts */
    490       1.6  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    491       1.6  augustss 
    492       1.6  augustss 	/* Turn on controller */
    493       1.6  augustss 	EOWRITE4(sc, EHCI_USBCMD,
    494  1.47.2.4     skrll 		 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
    495       1.6  augustss 		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
    496      1.10  augustss 		 EHCI_CMD_ASE |
    497  1.47.2.4     skrll 		 EHCI_CMD_PSE |
    498       1.6  augustss 		 EHCI_CMD_RS);
    499       1.6  augustss 
    500       1.6  augustss 	/* Take over port ownership */
    501       1.6  augustss 	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
    502       1.6  augustss 
    503       1.8  augustss 	for (i = 0; i < 100; i++) {
    504      1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    505       1.8  augustss 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
    506       1.8  augustss 		if (!hcr)
    507       1.8  augustss 			break;
    508       1.8  augustss 	}
    509       1.8  augustss 	if (hcr) {
    510      1.41   thorpej 		aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    511       1.8  augustss 		return (USBD_IOERROR);
    512       1.8  augustss 	}
    513       1.8  augustss 
    514       1.5  augustss 	return (USBD_NORMAL_COMPLETION);
    515       1.9  augustss 
    516       1.9  augustss #if 0
    517      1.11  augustss  bad2:
    518      1.15  augustss 	ehci_free_sqh(sc, sc->sc_async_head);
    519       1.9  augustss #endif
    520       1.9  augustss  bad1:
    521       1.9  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_fldma);
    522       1.9  augustss 	return (err);
    523       1.1  augustss }
    524       1.1  augustss 
    525       1.1  augustss int
    526       1.1  augustss ehci_intr(void *v)
    527       1.1  augustss {
    528       1.6  augustss 	ehci_softc_t *sc = v;
    529       1.6  augustss 
    530      1.17  augustss 	if (sc == NULL || sc->sc_dying)
    531      1.15  augustss 		return (0);
    532      1.15  augustss 
    533       1.6  augustss 	/* If we get an interrupt while polling, then just ignore it. */
    534       1.6  augustss 	if (sc->sc_bus.use_polling) {
    535  1.47.2.4     skrll 		u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    536  1.47.2.4     skrll 
    537  1.47.2.4     skrll 		if (intrs)
    538  1.47.2.4     skrll 			EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    539       1.6  augustss #ifdef DIAGNOSTIC
    540  1.47.2.1     skrll 		DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
    541       1.6  augustss #endif
    542       1.6  augustss 		return (0);
    543       1.6  augustss 	}
    544       1.6  augustss 
    545      1.33  augustss 	return (ehci_intr1(sc));
    546       1.6  augustss }
    547       1.6  augustss 
    548       1.6  augustss Static int
    549       1.6  augustss ehci_intr1(ehci_softc_t *sc)
    550       1.6  augustss {
    551       1.6  augustss 	u_int32_t intrs, eintrs;
    552       1.6  augustss 
    553       1.6  augustss 	DPRINTFN(20,("ehci_intr1: enter\n"));
    554       1.6  augustss 
    555       1.6  augustss 	/* In case the interrupt occurs before initialization has completed. */
    556       1.6  augustss 	if (sc == NULL) {
    557       1.6  augustss #ifdef DIAGNOSTIC
    558  1.47.2.4     skrll 		printf("ehci_intr1: sc == NULL\n");
    559       1.6  augustss #endif
    560       1.6  augustss 		return (0);
    561       1.6  augustss 	}
    562       1.6  augustss 
    563       1.6  augustss 	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    564       1.6  augustss 	if (!intrs)
    565       1.6  augustss 		return (0);
    566       1.6  augustss 
    567       1.6  augustss 	eintrs = intrs & sc->sc_eintrs;
    568  1.47.2.4     skrll 	DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
    569       1.6  augustss 		     sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
    570       1.6  augustss 		     (u_int)eintrs));
    571       1.6  augustss 	if (!eintrs)
    572       1.6  augustss 		return (0);
    573       1.6  augustss 
    574  1.47.2.1     skrll 	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    575       1.6  augustss 	sc->sc_bus.intr_context++;
    576       1.6  augustss 	sc->sc_bus.no_intrs++;
    577      1.10  augustss 	if (eintrs & EHCI_STS_IAA) {
    578      1.10  augustss 		DPRINTF(("ehci_intr1: door bell\n"));
    579      1.11  augustss 		wakeup(&sc->sc_async_head);
    580      1.20  augustss 		eintrs &= ~EHCI_STS_IAA;
    581      1.10  augustss 	}
    582      1.18  augustss 	if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
    583      1.46  augustss 		DPRINTFN(5,("ehci_intr1: %s %s\n",
    584      1.46  augustss 			    eintrs & EHCI_STS_INT ? "INT" : "",
    585      1.46  augustss 			    eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
    586      1.18  augustss 		usb_schedsoftintr(&sc->sc_bus);
    587      1.21  augustss 		eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
    588       1.6  augustss 	}
    589       1.6  augustss 	if (eintrs & EHCI_STS_HSE) {
    590       1.6  augustss 		printf("%s: unrecoverable error, controller halted\n",
    591       1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
    592       1.6  augustss 		/* XXX what else */
    593       1.6  augustss 	}
    594       1.6  augustss 	if (eintrs & EHCI_STS_PCD) {
    595       1.6  augustss 		ehci_pcd(sc, sc->sc_intrxfer);
    596      1.33  augustss 		/*
    597       1.6  augustss 		 * Disable PCD interrupt for now, because it will be
    598       1.6  augustss 		 * on until the port has been reset.
    599       1.6  augustss 		 */
    600       1.6  augustss 		ehci_pcd_able(sc, 0);
    601       1.6  augustss 		/* Do not allow RHSC interrupts > 1 per second */
    602       1.6  augustss                 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
    603       1.6  augustss 		eintrs &= ~EHCI_STS_PCD;
    604       1.6  augustss 	}
    605       1.6  augustss 
    606       1.6  augustss 	sc->sc_bus.intr_context--;
    607       1.6  augustss 
    608       1.6  augustss 	if (eintrs != 0) {
    609       1.6  augustss 		/* Block unprocessed interrupts. */
    610       1.6  augustss 		sc->sc_eintrs &= ~eintrs;
    611       1.6  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    612       1.6  augustss 		printf("%s: blocking intrs 0x%x\n",
    613       1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev), eintrs);
    614       1.6  augustss 	}
    615       1.6  augustss 
    616       1.6  augustss 	return (1);
    617       1.6  augustss }
    618       1.6  augustss 
    619       1.6  augustss void
    620       1.6  augustss ehci_pcd_able(ehci_softc_t *sc, int on)
    621       1.6  augustss {
    622       1.6  augustss 	DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
    623       1.6  augustss 	if (on)
    624       1.6  augustss 		sc->sc_eintrs |= EHCI_STS_PCD;
    625       1.6  augustss 	else
    626       1.6  augustss 		sc->sc_eintrs &= ~EHCI_STS_PCD;
    627       1.6  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    628       1.6  augustss }
    629       1.6  augustss 
    630       1.6  augustss void
    631       1.6  augustss ehci_pcd_enable(void *v_sc)
    632       1.6  augustss {
    633       1.6  augustss 	ehci_softc_t *sc = v_sc;
    634       1.6  augustss 
    635       1.6  augustss 	ehci_pcd_able(sc, 1);
    636       1.6  augustss }
    637       1.6  augustss 
    638       1.6  augustss void
    639       1.6  augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
    640       1.6  augustss {
    641       1.6  augustss 	usbd_pipe_handle pipe;
    642       1.6  augustss 	u_char *p;
    643       1.6  augustss 	int i, m;
    644       1.6  augustss 
    645       1.6  augustss 	if (xfer == NULL) {
    646       1.6  augustss 		/* Just ignore the change. */
    647       1.6  augustss 		return;
    648       1.6  augustss 	}
    649       1.6  augustss 
    650       1.6  augustss 	pipe = xfer->pipe;
    651       1.6  augustss 
    652      1.30  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
    653       1.6  augustss 	m = min(sc->sc_noport, xfer->length * 8 - 1);
    654       1.6  augustss 	memset(p, 0, xfer->length);
    655       1.6  augustss 	for (i = 1; i <= m; i++) {
    656       1.6  augustss 		/* Pick out CHANGE bits from the status reg. */
    657       1.6  augustss 		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
    658       1.6  augustss 			p[i/8] |= 1 << (i%8);
    659       1.6  augustss 	}
    660       1.6  augustss 	DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
    661       1.6  augustss 	xfer->actlen = xfer->length;
    662       1.6  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    663       1.6  augustss 
    664       1.6  augustss 	usb_transfer_complete(xfer);
    665       1.1  augustss }
    666       1.1  augustss 
    667       1.5  augustss void
    668       1.5  augustss ehci_softintr(void *v)
    669       1.5  augustss {
    670      1.18  augustss 	ehci_softc_t *sc = v;
    671  1.47.2.1     skrll 	struct ehci_xfer *ex, *nextex;
    672      1.18  augustss 
    673      1.18  augustss 	DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
    674      1.18  augustss 		     sc->sc_bus.intr_context));
    675      1.18  augustss 
    676      1.18  augustss 	sc->sc_bus.intr_context++;
    677      1.18  augustss 
    678      1.18  augustss 	/*
    679      1.18  augustss 	 * The only explanation I can think of for why EHCI is as brain dead
    680      1.18  augustss 	 * as UHCI interrupt-wise is that Intel was involved in both.
    681      1.18  augustss 	 * An interrupt just tells us that something is done, we have no
    682      1.18  augustss 	 * clue what, so we need to scan through all active transfers. :-(
    683      1.18  augustss 	 */
    684  1.47.2.1     skrll 	for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
    685  1.47.2.1     skrll 		nextex = LIST_NEXT(ex, inext);
    686      1.18  augustss 		ehci_check_intr(sc, ex);
    687  1.47.2.1     skrll 	}
    688      1.18  augustss 
    689  1.47.2.4     skrll #ifdef USB_USE_SOFTINTR
    690      1.29  augustss 	if (sc->sc_softwake) {
    691      1.29  augustss 		sc->sc_softwake = 0;
    692      1.29  augustss 		wakeup(&sc->sc_softwake);
    693      1.29  augustss 	}
    694  1.47.2.4     skrll #endif /* USB_USE_SOFTINTR */
    695      1.29  augustss 
    696      1.18  augustss 	sc->sc_bus.intr_context--;
    697      1.18  augustss }
    698      1.18  augustss 
    699      1.18  augustss /* Check for an interrupt. */
    700      1.18  augustss void
    701      1.18  augustss ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
    702      1.18  augustss {
    703      1.18  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    704      1.18  augustss 	u_int32_t status;
    705      1.18  augustss 
    706      1.22  augustss 	DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
    707      1.18  augustss 
    708      1.18  augustss 	if (ex->sqtdstart == NULL) {
    709      1.18  augustss 		printf("ehci_check_intr: sqtdstart=NULL\n");
    710      1.18  augustss 		return;
    711      1.18  augustss 	}
    712      1.18  augustss 	lsqtd = ex->sqtdend;
    713      1.18  augustss #ifdef DIAGNOSTIC
    714      1.18  augustss 	if (lsqtd == NULL) {
    715  1.47.2.4     skrll 		printf("ehci_check_intr: lsqtd==0\n");
    716      1.18  augustss 		return;
    717      1.18  augustss 	}
    718      1.18  augustss #endif
    719      1.33  augustss 	/*
    720      1.18  augustss 	 * If the last TD is still active we need to check whether there
    721      1.18  augustss 	 * is a an error somewhere in the middle, or whether there was a
    722      1.18  augustss 	 * short packet (SPD and not ACTIVE).
    723      1.18  augustss 	 */
    724      1.18  augustss 	if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
    725      1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
    726      1.18  augustss 		for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
    727      1.18  augustss 			status = le32toh(sqtd->qtd.qtd_status);
    728      1.18  augustss 			/* If there's an active QTD the xfer isn't done. */
    729      1.18  augustss 			if (status & EHCI_QTD_ACTIVE)
    730      1.18  augustss 				break;
    731      1.18  augustss 			/* Any kind of error makes the xfer done. */
    732      1.18  augustss 			if (status & EHCI_QTD_HALTED)
    733      1.18  augustss 				goto done;
    734      1.18  augustss 			/* We want short packets, and it is short: it's done */
    735  1.47.2.1     skrll 			if (EHCI_QTD_GET_BYTES(status) != 0)
    736      1.18  augustss 				goto done;
    737      1.18  augustss 		}
    738      1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
    739      1.18  augustss 			      ex, ex->sqtdstart));
    740      1.18  augustss 		return;
    741      1.18  augustss 	}
    742      1.18  augustss  done:
    743      1.18  augustss 	DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
    744      1.18  augustss 	usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
    745      1.18  augustss 	ehci_idone(ex);
    746      1.18  augustss }
    747      1.18  augustss 
    748      1.18  augustss void
    749      1.18  augustss ehci_idone(struct ehci_xfer *ex)
    750      1.18  augustss {
    751      1.18  augustss 	usbd_xfer_handle xfer = &ex->xfer;
    752      1.18  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
    753  1.47.2.4     skrll 	ehci_soft_qtd_t *sqtd, *lsqtd;
    754  1.47.2.4     skrll 	u_int32_t status = 0, nstatus = 0;
    755      1.18  augustss 	int actlen;
    756  1.47.2.4     skrll 	uint pkts_left;
    757      1.18  augustss 
    758      1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
    759      1.18  augustss #ifdef DIAGNOSTIC
    760      1.18  augustss 	{
    761      1.18  augustss 		int s = splhigh();
    762      1.18  augustss 		if (ex->isdone) {
    763      1.18  augustss 			splx(s);
    764      1.18  augustss #ifdef EHCI_DEBUG
    765      1.18  augustss 			printf("ehci_idone: ex is done!\n   ");
    766      1.18  augustss 			ehci_dump_exfer(ex);
    767      1.18  augustss #else
    768      1.18  augustss 			printf("ehci_idone: ex=%p is done!\n", ex);
    769      1.18  augustss #endif
    770      1.18  augustss 			return;
    771      1.18  augustss 		}
    772      1.18  augustss 		ex->isdone = 1;
    773      1.18  augustss 		splx(s);
    774      1.18  augustss 	}
    775      1.18  augustss #endif
    776      1.18  augustss 
    777      1.18  augustss 	if (xfer->status == USBD_CANCELLED ||
    778      1.18  augustss 	    xfer->status == USBD_TIMEOUT) {
    779      1.18  augustss 		DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
    780      1.18  augustss 		return;
    781      1.18  augustss 	}
    782      1.18  augustss 
    783      1.18  augustss #ifdef EHCI_DEBUG
    784      1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
    785      1.18  augustss 	if (ehcidebug > 10)
    786      1.18  augustss 		ehci_dump_sqtds(ex->sqtdstart);
    787      1.18  augustss #endif
    788      1.18  augustss 
    789      1.18  augustss 	/* The transfer is done, compute actual length and status. */
    790  1.47.2.4     skrll 	lsqtd = ex->sqtdend;
    791      1.18  augustss 	actlen = 0;
    792  1.47.2.4     skrll 	for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
    793      1.18  augustss 		nstatus = le32toh(sqtd->qtd.qtd_status);
    794      1.18  augustss 		if (nstatus & EHCI_QTD_ACTIVE)
    795      1.18  augustss 			break;
    796      1.18  augustss 
    797      1.18  augustss 		status = nstatus;
    798  1.47.2.1     skrll 		/* halt is ok if descriptor is last, and complete */
    799  1.47.2.1     skrll 		if (sqtd->qtd.qtd_next == EHCI_NULL &&
    800  1.47.2.1     skrll 		    EHCI_QTD_GET_BYTES(status) == 0)
    801  1.47.2.1     skrll 			status &= ~EHCI_QTD_HALTED;
    802      1.18  augustss 		if (EHCI_QTD_GET_PID(status) !=	EHCI_QTD_PID_SETUP)
    803      1.18  augustss 			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
    804      1.18  augustss 	}
    805      1.22  augustss 
    806  1.47.2.4     skrll 	/*
    807  1.47.2.4     skrll 	 * If there are left over TDs we need to update the toggle.
    808  1.47.2.4     skrll 	 * The default pipe doesn't need it since control transfers
    809  1.47.2.4     skrll 	 * start the toggle at 0 every time.
    810  1.47.2.4     skrll 	 */
    811  1.47.2.4     skrll 	if (sqtd != lsqtd->nextqtd &&
    812  1.47.2.4     skrll 	    xfer->pipe->device->default_pipe != xfer->pipe) {
    813  1.47.2.1     skrll 		printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus);
    814      1.18  augustss #if 0
    815  1.47.2.1     skrll 		ehci_dump_sqh(epipe->sqh);
    816  1.47.2.1     skrll 		ehci_dump_sqtds(ex->sqtdstart);
    817      1.18  augustss #endif
    818  1.47.2.1     skrll 		epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
    819      1.22  augustss 	}
    820      1.18  augustss 
    821  1.47.2.4     skrll 	/*
    822  1.47.2.4     skrll 	 * For a short transfer we need to update the toggle for the missing
    823  1.47.2.4     skrll 	 * packets within the qTD.
    824  1.47.2.4     skrll 	 */
    825  1.47.2.4     skrll 	pkts_left = EHCI_QTD_GET_BYTES(status) /
    826  1.47.2.4     skrll 	    UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize);
    827  1.47.2.4     skrll 	epipe->nexttoggle ^= pkts_left % 2;
    828  1.47.2.4     skrll 
    829      1.18  augustss 	status &= EHCI_QTD_STATERRS;
    830      1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
    831      1.22  augustss 			   xfer->length, actlen, status));
    832      1.18  augustss 	xfer->actlen = actlen;
    833      1.18  augustss 	if (status != 0) {
    834      1.18  augustss #ifdef EHCI_DEBUG
    835      1.18  augustss 		char sbuf[128];
    836      1.18  augustss 
    837      1.18  augustss 		bitmask_snprintf((u_int32_t)status,
    838  1.47.2.1     skrll 				 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
    839  1.47.2.1     skrll 				 "\3MISSED", sbuf, sizeof(sbuf));
    840      1.18  augustss 
    841  1.47.2.4     skrll 		DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0,
    842      1.18  augustss 			 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
    843      1.18  augustss 			  "status 0x%s\n",
    844      1.18  augustss 			  xfer->pipe->device->address,
    845      1.18  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
    846      1.18  augustss 			  sbuf));
    847      1.23  augustss 		if (ehcidebug > 2) {
    848      1.23  augustss 			ehci_dump_sqh(epipe->sqh);
    849      1.23  augustss 			ehci_dump_sqtds(ex->sqtdstart);
    850      1.23  augustss 		}
    851      1.18  augustss #endif
    852      1.18  augustss 		if (status == EHCI_QTD_HALTED)
    853      1.18  augustss 			xfer->status = USBD_STALLED;
    854      1.18  augustss 		else
    855      1.18  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
    856      1.18  augustss 	} else {
    857      1.18  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
    858      1.18  augustss 	}
    859      1.18  augustss 
    860      1.18  augustss 	usb_transfer_complete(xfer);
    861      1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
    862       1.5  augustss }
    863       1.5  augustss 
    864      1.15  augustss /*
    865      1.15  augustss  * Wait here until controller claims to have an interrupt.
    866      1.18  augustss  * Then call ehci_intr and return.  Use timeout to avoid waiting
    867      1.15  augustss  * too long.
    868      1.15  augustss  */
    869      1.15  augustss void
    870      1.15  augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
    871      1.15  augustss {
    872      1.15  augustss 	int timo = xfer->timeout;
    873      1.15  augustss 	int usecs;
    874      1.15  augustss 	u_int32_t intrs;
    875      1.15  augustss 
    876      1.15  augustss 	xfer->status = USBD_IN_PROGRESS;
    877      1.15  augustss 	for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
    878      1.15  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    879      1.17  augustss 		if (sc->sc_dying)
    880      1.17  augustss 			break;
    881      1.15  augustss 		intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
    882      1.15  augustss 			sc->sc_eintrs;
    883      1.15  augustss 		DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
    884  1.47.2.2     skrll #ifdef EHCI_DEBUG
    885      1.15  augustss 		if (ehcidebug > 15)
    886      1.18  augustss 			ehci_dump_regs(sc);
    887      1.15  augustss #endif
    888      1.15  augustss 		if (intrs) {
    889      1.15  augustss 			ehci_intr1(sc);
    890      1.15  augustss 			if (xfer->status != USBD_IN_PROGRESS)
    891      1.15  augustss 				return;
    892      1.15  augustss 		}
    893      1.15  augustss 	}
    894      1.15  augustss 
    895      1.15  augustss 	/* Timeout */
    896      1.15  augustss 	DPRINTF(("ehci_waitintr: timeout\n"));
    897      1.15  augustss 	xfer->status = USBD_TIMEOUT;
    898      1.15  augustss 	usb_transfer_complete(xfer);
    899      1.15  augustss 	/* XXX should free TD */
    900      1.15  augustss }
    901      1.15  augustss 
    902       1.5  augustss void
    903       1.5  augustss ehci_poll(struct usbd_bus *bus)
    904       1.5  augustss {
    905       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)bus;
    906       1.5  augustss #ifdef EHCI_DEBUG
    907       1.5  augustss 	static int last;
    908       1.5  augustss 	int new;
    909       1.6  augustss 	new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    910       1.5  augustss 	if (new != last) {
    911       1.5  augustss 		DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
    912       1.5  augustss 		last = new;
    913       1.5  augustss 	}
    914       1.5  augustss #endif
    915       1.5  augustss 
    916       1.6  augustss 	if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
    917       1.5  augustss 		ehci_intr1(sc);
    918       1.5  augustss }
    919       1.5  augustss 
    920       1.1  augustss int
    921       1.1  augustss ehci_detach(struct ehci_softc *sc, int flags)
    922       1.1  augustss {
    923       1.1  augustss 	int rv = 0;
    924       1.1  augustss 
    925       1.1  augustss 	if (sc->sc_child != NULL)
    926       1.1  augustss 		rv = config_detach(sc->sc_child, flags);
    927      1.33  augustss 
    928       1.1  augustss 	if (rv != 0)
    929       1.1  augustss 		return (rv);
    930       1.1  augustss 
    931       1.6  augustss 	usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
    932       1.6  augustss 
    933       1.1  augustss 	if (sc->sc_powerhook != NULL)
    934       1.1  augustss 		powerhook_disestablish(sc->sc_powerhook);
    935       1.1  augustss 	if (sc->sc_shutdownhook != NULL)
    936       1.1  augustss 		shutdownhook_disestablish(sc->sc_shutdownhook);
    937       1.1  augustss 
    938      1.17  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    939      1.15  augustss 
    940       1.1  augustss 	/* XXX free other data structures XXX */
    941       1.1  augustss 
    942       1.1  augustss 	return (rv);
    943       1.1  augustss }
    944       1.1  augustss 
    945       1.1  augustss 
    946       1.1  augustss int
    947       1.1  augustss ehci_activate(device_ptr_t self, enum devact act)
    948       1.1  augustss {
    949       1.1  augustss 	struct ehci_softc *sc = (struct ehci_softc *)self;
    950       1.1  augustss 	int rv = 0;
    951       1.1  augustss 
    952       1.1  augustss 	switch (act) {
    953       1.1  augustss 	case DVACT_ACTIVATE:
    954       1.1  augustss 		return (EOPNOTSUPP);
    955       1.1  augustss 
    956       1.1  augustss 	case DVACT_DEACTIVATE:
    957       1.1  augustss 		if (sc->sc_child != NULL)
    958       1.1  augustss 			rv = config_deactivate(sc->sc_child);
    959       1.5  augustss 		sc->sc_dying = 1;
    960       1.1  augustss 		break;
    961       1.1  augustss 	}
    962       1.1  augustss 	return (rv);
    963       1.1  augustss }
    964       1.1  augustss 
    965       1.5  augustss /*
    966       1.5  augustss  * Handle suspend/resume.
    967       1.5  augustss  *
    968       1.5  augustss  * We need to switch to polling mode here, because this routine is
    969  1.47.2.4     skrll  * called from an interrupt context.  This is all right since we
    970       1.5  augustss  * are almost suspended anyway.
    971       1.5  augustss  */
    972       1.5  augustss void
    973       1.5  augustss ehci_power(int why, void *v)
    974       1.5  augustss {
    975       1.5  augustss 	ehci_softc_t *sc = v;
    976  1.47.2.4     skrll 	u_int32_t cmd, hcr;
    977  1.47.2.4     skrll 	int s, i;
    978       1.5  augustss 
    979       1.5  augustss #ifdef EHCI_DEBUG
    980       1.5  augustss 	DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
    981  1.47.2.4     skrll 	if (ehcidebug > 0)
    982  1.47.2.4     skrll 		ehci_dump_regs(sc);
    983       1.5  augustss #endif
    984       1.5  augustss 
    985       1.5  augustss 	s = splhardusb();
    986       1.5  augustss 	switch (why) {
    987       1.5  augustss 	case PWR_SUSPEND:
    988       1.5  augustss 	case PWR_STANDBY:
    989       1.5  augustss 		sc->sc_bus.use_polling++;
    990  1.47.2.4     skrll 
    991  1.47.2.4     skrll 		sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
    992  1.47.2.4     skrll 
    993  1.47.2.4     skrll 		cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
    994  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBCMD, cmd);
    995  1.47.2.4     skrll 
    996  1.47.2.4     skrll 		for (i = 0; i < 100; i++) {
    997  1.47.2.4     skrll 			hcr = EOREAD4(sc, EHCI_USBSTS) &
    998  1.47.2.4     skrll 			    (EHCI_STS_ASS | EHCI_STS_PSS);
    999  1.47.2.4     skrll 			if (hcr == 0)
   1000  1.47.2.4     skrll 				break;
   1001  1.47.2.4     skrll 
   1002  1.47.2.4     skrll 			usb_delay_ms(&sc->sc_bus, 1);
   1003       1.5  augustss 		}
   1004  1.47.2.4     skrll 		if (hcr != 0) {
   1005  1.47.2.4     skrll 			printf("%s: reset timeout\n",
   1006  1.47.2.4     skrll 			    USBDEVNAME(sc->sc_bus.bdev));
   1007  1.47.2.4     skrll 		}
   1008  1.47.2.4     skrll 
   1009  1.47.2.4     skrll 		cmd &= ~EHCI_CMD_RS;
   1010  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBCMD, cmd);
   1011  1.47.2.4     skrll 
   1012  1.47.2.4     skrll 		for (i = 0; i < 100; i++) {
   1013  1.47.2.4     skrll 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1014  1.47.2.4     skrll 			if (hcr == EHCI_STS_HCH)
   1015  1.47.2.4     skrll 				break;
   1016  1.47.2.4     skrll 
   1017  1.47.2.4     skrll 			usb_delay_ms(&sc->sc_bus, 1);
   1018  1.47.2.4     skrll 		}
   1019  1.47.2.4     skrll 		if (hcr != EHCI_STS_HCH) {
   1020  1.47.2.4     skrll 			printf("%s: config timeout\n",
   1021  1.47.2.4     skrll 			    USBDEVNAME(sc->sc_bus.bdev));
   1022  1.47.2.4     skrll 		}
   1023  1.47.2.4     skrll 
   1024       1.5  augustss 		sc->sc_bus.use_polling--;
   1025       1.5  augustss 		break;
   1026  1.47.2.4     skrll 
   1027       1.5  augustss 	case PWR_RESUME:
   1028       1.5  augustss 		sc->sc_bus.use_polling++;
   1029  1.47.2.4     skrll 
   1030  1.47.2.4     skrll 		/* restore things in case the bios sucks */
   1031  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
   1032  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
   1033  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_ASYNCLISTADDR,
   1034  1.47.2.4     skrll 		    sc->sc_async_head->physaddr | EHCI_LINK_QH);
   1035  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
   1036  1.47.2.4     skrll 
   1037  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
   1038  1.47.2.4     skrll 
   1039  1.47.2.4     skrll 		for (i = 0; i < 100; i++) {
   1040  1.47.2.4     skrll 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1041  1.47.2.4     skrll 			if (hcr != EHCI_STS_HCH)
   1042  1.47.2.4     skrll 				break;
   1043  1.47.2.4     skrll 
   1044  1.47.2.4     skrll 			usb_delay_ms(&sc->sc_bus, 1);
   1045  1.47.2.4     skrll 		}
   1046  1.47.2.4     skrll 		if (hcr == EHCI_STS_HCH) {
   1047  1.47.2.4     skrll 			printf("%s: config timeout\n",
   1048  1.47.2.4     skrll 			    USBDEVNAME(sc->sc_bus.bdev));
   1049  1.47.2.4     skrll 		}
   1050  1.47.2.4     skrll 
   1051  1.47.2.4     skrll 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1052  1.47.2.4     skrll 
   1053       1.5  augustss 		sc->sc_bus.use_polling--;
   1054       1.5  augustss 		break;
   1055       1.5  augustss 	case PWR_SOFTSUSPEND:
   1056       1.5  augustss 	case PWR_SOFTSTANDBY:
   1057       1.5  augustss 	case PWR_SOFTRESUME:
   1058       1.5  augustss 		break;
   1059       1.5  augustss 	}
   1060       1.5  augustss 	splx(s);
   1061  1.47.2.4     skrll 
   1062  1.47.2.4     skrll #ifdef EHCI_DEBUG
   1063  1.47.2.4     skrll 	DPRINTF(("ehci_power: sc=%p\n", sc));
   1064  1.47.2.4     skrll 	if (ehcidebug > 0)
   1065  1.47.2.4     skrll 		ehci_dump_regs(sc);
   1066  1.47.2.4     skrll #endif
   1067       1.5  augustss }
   1068       1.5  augustss 
   1069       1.5  augustss /*
   1070       1.5  augustss  * Shut down the controller when the system is going down.
   1071       1.5  augustss  */
   1072       1.5  augustss void
   1073       1.5  augustss ehci_shutdown(void *v)
   1074       1.5  augustss {
   1075       1.8  augustss 	ehci_softc_t *sc = v;
   1076       1.5  augustss 
   1077       1.5  augustss 	DPRINTF(("ehci_shutdown: stopping the HC\n"));
   1078       1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
   1079       1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
   1080       1.5  augustss }
   1081       1.5  augustss 
   1082       1.5  augustss usbd_status
   1083       1.5  augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
   1084       1.5  augustss {
   1085       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1086      1.25  augustss 	usbd_status err;
   1087       1.5  augustss 
   1088      1.25  augustss 	err = usb_allocmem(&sc->sc_bus, size, 0, dma);
   1089  1.47.2.6     skrll 	if (err == USBD_NOMEM)
   1090  1.47.2.6     skrll 		err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
   1091      1.25  augustss #ifdef EHCI_DEBUG
   1092      1.25  augustss 	if (err)
   1093      1.25  augustss 		printf("ehci_allocm: usb_allocmem()=%d\n", err);
   1094      1.25  augustss #endif
   1095      1.25  augustss 	return (err);
   1096       1.5  augustss }
   1097       1.5  augustss 
   1098       1.5  augustss void
   1099       1.5  augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
   1100       1.5  augustss {
   1101       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1102       1.5  augustss 
   1103  1.47.2.6     skrll 	if (dma->block->flags & USB_DMA_RESERVE) {
   1104  1.47.2.6     skrll 		usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve,
   1105  1.47.2.6     skrll 		    dma);
   1106  1.47.2.6     skrll 		return;
   1107  1.47.2.6     skrll 	}
   1108       1.5  augustss 	usb_freemem(&sc->sc_bus, dma);
   1109       1.5  augustss }
   1110       1.5  augustss 
   1111       1.5  augustss usbd_xfer_handle
   1112       1.5  augustss ehci_allocx(struct usbd_bus *bus)
   1113       1.5  augustss {
   1114       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1115       1.5  augustss 	usbd_xfer_handle xfer;
   1116       1.5  augustss 
   1117       1.5  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
   1118      1.28  augustss 	if (xfer != NULL) {
   1119      1.32     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
   1120      1.28  augustss #ifdef DIAGNOSTIC
   1121      1.28  augustss 		if (xfer->busy_free != XFER_FREE) {
   1122  1.47.2.4     skrll 			printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
   1123      1.28  augustss 			       xfer->busy_free);
   1124      1.28  augustss 		}
   1125      1.28  augustss #endif
   1126      1.28  augustss 	} else {
   1127      1.15  augustss 		xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
   1128      1.28  augustss 	}
   1129      1.18  augustss 	if (xfer != NULL) {
   1130  1.47.2.4     skrll 		memset(xfer, 0, sizeof(struct ehci_xfer));
   1131      1.18  augustss #ifdef DIAGNOSTIC
   1132      1.18  augustss 		EXFER(xfer)->isdone = 1;
   1133      1.18  augustss 		xfer->busy_free = XFER_BUSY;
   1134      1.18  augustss #endif
   1135      1.18  augustss 	}
   1136       1.5  augustss 	return (xfer);
   1137       1.5  augustss }
   1138       1.5  augustss 
   1139       1.5  augustss void
   1140       1.5  augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
   1141       1.5  augustss {
   1142       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1143       1.5  augustss 
   1144      1.18  augustss #ifdef DIAGNOSTIC
   1145      1.18  augustss 	if (xfer->busy_free != XFER_BUSY) {
   1146      1.18  augustss 		printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
   1147      1.18  augustss 		       xfer->busy_free);
   1148      1.18  augustss 		return;
   1149      1.18  augustss 	}
   1150      1.18  augustss 	xfer->busy_free = XFER_FREE;
   1151      1.18  augustss 	if (!EXFER(xfer)->isdone) {
   1152      1.18  augustss 		printf("ehci_freex: !isdone\n");
   1153      1.18  augustss 		return;
   1154      1.18  augustss 	}
   1155      1.18  augustss #endif
   1156       1.5  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
   1157       1.5  augustss }
   1158       1.5  augustss 
   1159       1.5  augustss Static void
   1160       1.5  augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
   1161       1.5  augustss {
   1162      1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1163      1.15  augustss 
   1164      1.23  augustss 	DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
   1165      1.23  augustss 		 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
   1166      1.22  augustss #ifdef USB_DEBUG
   1167      1.22  augustss 	if (ehcidebug)
   1168      1.22  augustss 		usbd_dump_pipe(pipe);
   1169       1.5  augustss #endif
   1170  1.47.2.1     skrll 	epipe->nexttoggle = 0;
   1171       1.5  augustss }
   1172       1.5  augustss 
   1173       1.5  augustss Static void
   1174       1.5  augustss ehci_noop(usbd_pipe_handle pipe)
   1175       1.5  augustss {
   1176       1.5  augustss }
   1177       1.5  augustss 
   1178       1.5  augustss #ifdef EHCI_DEBUG
   1179       1.5  augustss void
   1180      1.18  augustss ehci_dump_regs(ehci_softc_t *sc)
   1181       1.5  augustss {
   1182       1.6  augustss 	int i;
   1183       1.6  augustss 	printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
   1184       1.6  augustss 	       EOREAD4(sc, EHCI_USBCMD),
   1185       1.6  augustss 	       EOREAD4(sc, EHCI_USBSTS),
   1186       1.6  augustss 	       EOREAD4(sc, EHCI_USBINTR));
   1187      1.29  augustss 	printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
   1188      1.15  augustss 	       EOREAD4(sc, EHCI_FRINDEX),
   1189      1.15  augustss 	       EOREAD4(sc, EHCI_CTRLDSSEGMENT),
   1190      1.15  augustss 	       EOREAD4(sc, EHCI_PERIODICLISTBASE),
   1191      1.15  augustss 	       EOREAD4(sc, EHCI_ASYNCLISTADDR));
   1192       1.6  augustss 	for (i = 1; i <= sc->sc_noport; i++)
   1193      1.33  augustss 		printf("port %d status=0x%08x\n", i,
   1194       1.6  augustss 		       EOREAD4(sc, EHCI_PORTSC(i)));
   1195      1.39    martin }
   1196      1.39    martin 
   1197      1.40    martin /*
   1198      1.40    martin  * Unused function - this is meant to be called from a kernel
   1199      1.40    martin  * debugger.
   1200      1.40    martin  */
   1201      1.39    martin void
   1202      1.39    martin ehci_dump()
   1203      1.39    martin {
   1204      1.39    martin 	ehci_dump_regs(theehci);
   1205       1.6  augustss }
   1206       1.6  augustss 
   1207       1.6  augustss void
   1208      1.15  augustss ehci_dump_link(ehci_link_t link, int type)
   1209       1.9  augustss {
   1210      1.15  augustss 	link = le32toh(link);
   1211      1.15  augustss 	printf("0x%08x", link);
   1212       1.9  augustss 	if (link & EHCI_LINK_TERMINATE)
   1213      1.15  augustss 		printf("<T>");
   1214      1.15  augustss 	else {
   1215      1.15  augustss 		printf("<");
   1216      1.15  augustss 		if (type) {
   1217      1.15  augustss 			switch (EHCI_LINK_TYPE(link)) {
   1218      1.15  augustss 			case EHCI_LINK_ITD: printf("ITD"); break;
   1219      1.15  augustss 			case EHCI_LINK_QH: printf("QH"); break;
   1220      1.15  augustss 			case EHCI_LINK_SITD: printf("SITD"); break;
   1221      1.15  augustss 			case EHCI_LINK_FSTN: printf("FSTN"); break;
   1222      1.16  augustss 			}
   1223      1.15  augustss 		}
   1224       1.9  augustss 		printf(">");
   1225      1.15  augustss 	}
   1226      1.15  augustss }
   1227      1.15  augustss 
   1228      1.15  augustss void
   1229      1.15  augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
   1230      1.15  augustss {
   1231      1.29  augustss 	int i;
   1232      1.29  augustss 	u_int32_t stop;
   1233      1.29  augustss 
   1234      1.29  augustss 	stop = 0;
   1235      1.29  augustss 	for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
   1236      1.15  augustss 		ehci_dump_sqtd(sqtd);
   1237  1.47.2.4     skrll 		stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
   1238      1.29  augustss 	}
   1239      1.29  augustss 	if (sqtd)
   1240      1.29  augustss 		printf("dump aborted, too many TDs\n");
   1241       1.9  augustss }
   1242       1.9  augustss 
   1243       1.9  augustss void
   1244       1.9  augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
   1245       1.9  augustss {
   1246       1.9  augustss 	printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
   1247       1.9  augustss 	ehci_dump_qtd(&sqtd->qtd);
   1248       1.9  augustss }
   1249       1.9  augustss 
   1250       1.9  augustss void
   1251       1.9  augustss ehci_dump_qtd(ehci_qtd_t *qtd)
   1252       1.9  augustss {
   1253       1.9  augustss 	u_int32_t s;
   1254      1.15  augustss 	char sbuf[128];
   1255       1.9  augustss 
   1256      1.15  augustss 	printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
   1257      1.15  augustss 	printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
   1258       1.9  augustss 	printf("\n");
   1259      1.15  augustss 	s = le32toh(qtd->qtd_status);
   1260      1.15  augustss 	bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
   1261      1.15  augustss 			 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
   1262      1.15  augustss 			 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
   1263       1.9  augustss 	printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
   1264       1.9  augustss 	       s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
   1265       1.9  augustss 	       EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
   1266      1.15  augustss 	printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
   1267      1.15  augustss 	       EHCI_QTD_GET_PID(s), sbuf);
   1268       1.9  augustss 	for (s = 0; s < 5; s++)
   1269      1.15  augustss 		printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
   1270       1.9  augustss }
   1271       1.9  augustss 
   1272       1.9  augustss void
   1273       1.9  augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
   1274       1.9  augustss {
   1275       1.9  augustss 	ehci_qh_t *qh = &sqh->qh;
   1276      1.15  augustss 	u_int32_t endp, endphub;
   1277       1.9  augustss 
   1278       1.9  augustss 	printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
   1279      1.15  augustss 	printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
   1280      1.15  augustss 	endp = le32toh(qh->qh_endp);
   1281      1.15  augustss 	printf("  endp=0x%08x\n", endp);
   1282      1.15  augustss 	printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
   1283      1.15  augustss 	       EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
   1284      1.15  augustss 	       EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
   1285      1.15  augustss 	       EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
   1286      1.15  augustss 	printf("    mpl=0x%x ctl=%d nrl=%d\n",
   1287      1.15  augustss 	       EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
   1288      1.15  augustss 	       EHCI_QH_GET_NRL(endp));
   1289      1.15  augustss 	endphub = le32toh(qh->qh_endphub);
   1290      1.15  augustss 	printf("  endphub=0x%08x\n", endphub);
   1291      1.15  augustss 	printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
   1292      1.15  augustss 	       EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
   1293      1.15  augustss 	       EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
   1294      1.15  augustss 	       EHCI_QH_GET_MULT(endphub));
   1295      1.15  augustss 	printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
   1296      1.12  augustss 	printf("Overlay qTD:\n");
   1297       1.9  augustss 	ehci_dump_qtd(&qh->qh_qtd);
   1298       1.9  augustss }
   1299       1.9  augustss 
   1300      1.38    martin #ifdef DIAGNOSTIC
   1301      1.18  augustss Static void
   1302      1.18  augustss ehci_dump_exfer(struct ehci_xfer *ex)
   1303      1.18  augustss {
   1304      1.18  augustss 	printf("ehci_dump_exfer: ex=%p\n", ex);
   1305      1.18  augustss }
   1306      1.38    martin #endif
   1307       1.5  augustss #endif
   1308       1.5  augustss 
   1309       1.5  augustss usbd_status
   1310       1.5  augustss ehci_open(usbd_pipe_handle pipe)
   1311       1.5  augustss {
   1312       1.5  augustss 	usbd_device_handle dev = pipe->device;
   1313       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   1314       1.5  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1315       1.5  augustss 	u_int8_t addr = dev->address;
   1316       1.5  augustss 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   1317       1.5  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1318      1.10  augustss 	ehci_soft_qh_t *sqh;
   1319      1.10  augustss 	usbd_status err;
   1320      1.10  augustss 	int s;
   1321  1.47.2.4     skrll 	int ival, speed, naks;
   1322  1.47.2.4     skrll 	int hshubaddr, hshubport;
   1323       1.5  augustss 
   1324       1.5  augustss 	DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1325       1.5  augustss 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1326       1.5  augustss 
   1327  1.47.2.4     skrll 	if (dev->myhsport) {
   1328  1.47.2.4     skrll 		hshubaddr = dev->myhsport->parent->address;
   1329  1.47.2.4     skrll 		hshubport = dev->myhsport->portno;
   1330  1.47.2.4     skrll 	} else {
   1331  1.47.2.4     skrll 		hshubaddr = 0;
   1332  1.47.2.4     skrll 		hshubport = 0;
   1333  1.47.2.4     skrll 	}
   1334  1.47.2.4     skrll 
   1335      1.17  augustss 	if (sc->sc_dying)
   1336      1.17  augustss 		return (USBD_IOERROR);
   1337      1.17  augustss 
   1338  1.47.2.1     skrll 	epipe->nexttoggle = 0;
   1339  1.47.2.1     skrll 
   1340       1.5  augustss 	if (addr == sc->sc_addr) {
   1341       1.5  augustss 		switch (ed->bEndpointAddress) {
   1342       1.5  augustss 		case USB_CONTROL_ENDPOINT:
   1343       1.5  augustss 			pipe->methods = &ehci_root_ctrl_methods;
   1344       1.5  augustss 			break;
   1345       1.5  augustss 		case UE_DIR_IN | EHCI_INTR_ENDPT:
   1346       1.5  augustss 			pipe->methods = &ehci_root_intr_methods;
   1347       1.5  augustss 			break;
   1348       1.5  augustss 		default:
   1349       1.5  augustss 			return (USBD_INVAL);
   1350       1.5  augustss 		}
   1351      1.10  augustss 		return (USBD_NORMAL_COMPLETION);
   1352      1.10  augustss 	}
   1353      1.10  augustss 
   1354      1.24  augustss 	/* XXX All this stuff is only valid for async. */
   1355      1.11  augustss 	switch (dev->speed) {
   1356      1.11  augustss 	case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
   1357      1.11  augustss 	case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
   1358      1.11  augustss 	case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
   1359      1.37    provos 	default: panic("ehci_open: bad device speed %d", dev->speed);
   1360      1.11  augustss 	}
   1361  1.47.2.4     skrll 	if (speed != EHCI_QH_SPEED_HIGH) {
   1362  1.47.2.4     skrll 		printf("%s: *** WARNING: opening low/full speed device, this "
   1363  1.47.2.4     skrll 		       "does not work yet.\n",
   1364  1.47.2.4     skrll 		       USBDEVNAME(sc->sc_bus.bdev));
   1365  1.47.2.4     skrll 		DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
   1366  1.47.2.4     skrll 			    hshubaddr, hshubport));
   1367  1.47.2.4     skrll 		if (xfertype != UE_CONTROL)
   1368  1.47.2.4     skrll 			return USBD_INVAL;
   1369  1.47.2.4     skrll 	}
   1370  1.47.2.4     skrll 
   1371      1.10  augustss 	naks = 8;		/* XXX */
   1372      1.10  augustss 	sqh = ehci_alloc_sqh(sc);
   1373      1.10  augustss 	if (sqh == NULL)
   1374      1.10  augustss 		goto bad0;
   1375      1.10  augustss 	/* qh_link filled when the QH is added */
   1376      1.10  augustss 	sqh->qh.qh_endp = htole32(
   1377      1.10  augustss 		EHCI_QH_SET_ADDR(addr) |
   1378  1.47.2.1     skrll 		EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
   1379  1.47.2.1     skrll 		EHCI_QH_SET_EPS(speed) |
   1380  1.47.2.1     skrll 		EHCI_QH_DTC |
   1381      1.10  augustss 		EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
   1382      1.10  augustss 		(speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
   1383      1.10  augustss 		 EHCI_QH_CTL : 0) |
   1384      1.10  augustss 		EHCI_QH_SET_NRL(naks)
   1385      1.10  augustss 		);
   1386      1.10  augustss 	sqh->qh.qh_endphub = htole32(
   1387  1.47.2.4     skrll 		EHCI_QH_SET_MULT(1) |
   1388  1.47.2.4     skrll 		EHCI_QH_SET_HUBA(hshubaddr) |
   1389  1.47.2.4     skrll 		EHCI_QH_SET_PORT(hshubport) |
   1390  1.47.2.4     skrll 		EHCI_QH_SET_CMASK(0xf0) | /* XXX */
   1391  1.47.2.4     skrll 		EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
   1392      1.10  augustss 		);
   1393      1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
   1394      1.11  augustss 	/* Fill the overlay qTD */
   1395      1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
   1396      1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   1397      1.15  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(0);
   1398      1.10  augustss 
   1399      1.10  augustss 	epipe->sqh = sqh;
   1400       1.5  augustss 
   1401      1.10  augustss 	switch (xfertype) {
   1402      1.10  augustss 	case UE_CONTROL:
   1403      1.33  augustss 		err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
   1404      1.10  augustss 				   0, &epipe->u.ctl.reqdma);
   1405      1.25  augustss #ifdef EHCI_DEBUG
   1406      1.25  augustss 		if (err)
   1407      1.25  augustss 			printf("ehci_open: usb_allocmem()=%d\n", err);
   1408      1.25  augustss #endif
   1409      1.10  augustss 		if (err)
   1410      1.11  augustss 			goto bad1;
   1411      1.11  augustss 		pipe->methods = &ehci_device_ctrl_methods;
   1412      1.10  augustss 		s = splusb();
   1413      1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1414      1.10  augustss 		splx(s);
   1415      1.10  augustss 		break;
   1416      1.10  augustss 	case UE_BULK:
   1417      1.10  augustss 		pipe->methods = &ehci_device_bulk_methods;
   1418      1.10  augustss 		s = splusb();
   1419      1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1420      1.10  augustss 		splx(s);
   1421      1.10  augustss 		break;
   1422      1.24  augustss 	case UE_INTERRUPT:
   1423      1.24  augustss 		pipe->methods = &ehci_device_intr_methods;
   1424  1.47.2.4     skrll 		ival = pipe->interval;
   1425  1.47.2.4     skrll 		if (ival == USBD_DEFAULT_INTERVAL)
   1426  1.47.2.4     skrll 			ival = ed->bInterval;
   1427  1.47.2.4     skrll 		return (ehci_device_setintr(sc, sqh, ival));
   1428      1.24  augustss 	case UE_ISOCHRONOUS:
   1429      1.24  augustss 		pipe->methods = &ehci_device_isoc_methods;
   1430      1.24  augustss 		return (USBD_INVAL);
   1431      1.10  augustss 	default:
   1432      1.10  augustss 		return (USBD_INVAL);
   1433       1.5  augustss 	}
   1434       1.5  augustss 	return (USBD_NORMAL_COMPLETION);
   1435       1.5  augustss 
   1436      1.11  augustss  bad1:
   1437      1.11  augustss 	ehci_free_sqh(sc, sqh);
   1438       1.5  augustss  bad0:
   1439       1.5  augustss 	return (USBD_NOMEM);
   1440      1.10  augustss }
   1441      1.10  augustss 
   1442      1.10  augustss /*
   1443      1.10  augustss  * Add an ED to the schedule.  Called at splusb().
   1444      1.10  augustss  */
   1445      1.10  augustss void
   1446      1.10  augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1447      1.10  augustss {
   1448      1.10  augustss 	SPLUSBCHECK;
   1449      1.10  augustss 
   1450      1.10  augustss 	sqh->next = head->next;
   1451      1.10  augustss 	sqh->qh.qh_link = head->qh.qh_link;
   1452      1.10  augustss 	head->next = sqh;
   1453      1.15  augustss 	head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
   1454      1.10  augustss 
   1455      1.10  augustss #ifdef EHCI_DEBUG
   1456      1.22  augustss 	if (ehcidebug > 5) {
   1457      1.10  augustss 		printf("ehci_add_qh:\n");
   1458      1.10  augustss 		ehci_dump_sqh(sqh);
   1459      1.10  augustss 	}
   1460       1.5  augustss #endif
   1461       1.5  augustss }
   1462       1.5  augustss 
   1463      1.10  augustss /*
   1464      1.10  augustss  * Remove an ED from the schedule.  Called at splusb().
   1465      1.10  augustss  */
   1466      1.10  augustss void
   1467      1.10  augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1468      1.10  augustss {
   1469      1.33  augustss 	ehci_soft_qh_t *p;
   1470      1.10  augustss 
   1471      1.10  augustss 	SPLUSBCHECK;
   1472      1.10  augustss 	/* XXX */
   1473      1.42  augustss 	for (p = head; p != NULL && p->next != sqh; p = p->next)
   1474      1.10  augustss 		;
   1475      1.10  augustss 	if (p == NULL)
   1476      1.37    provos 		panic("ehci_rem_qh: ED not found");
   1477      1.10  augustss 	p->next = sqh->next;
   1478      1.10  augustss 	p->qh.qh_link = sqh->qh.qh_link;
   1479      1.10  augustss 
   1480      1.11  augustss 	ehci_sync_hc(sc);
   1481      1.11  augustss }
   1482      1.11  augustss 
   1483      1.23  augustss void
   1484      1.23  augustss ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
   1485      1.23  augustss {
   1486  1.47.2.4     skrll 	int i;
   1487  1.47.2.4     skrll 	u_int32_t status;
   1488  1.47.2.4     skrll 
   1489  1.47.2.4     skrll 	/* Save toggle bit and ping status. */
   1490  1.47.2.4     skrll 	status = sqh->qh.qh_qtd.qtd_status &
   1491  1.47.2.4     skrll 	    htole32(EHCI_QTD_TOGGLE_MASK |
   1492  1.47.2.4     skrll 		    EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
   1493  1.47.2.4     skrll 	/* Set HALTED to make hw leave it alone. */
   1494  1.47.2.4     skrll 	sqh->qh.qh_qtd.qtd_status =
   1495  1.47.2.4     skrll 	    htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
   1496      1.23  augustss 	sqh->qh.qh_curqtd = 0;
   1497      1.23  augustss 	sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
   1498  1.47.2.4     skrll 	sqh->qh.qh_qtd.qtd_altnext = 0;
   1499  1.47.2.4     skrll 	for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
   1500  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_buffer[i] = 0;
   1501      1.23  augustss 	sqh->sqtd = sqtd;
   1502  1.47.2.4     skrll 	/* Set !HALTED && !ACTIVE to start execution, preserve some fields */
   1503  1.47.2.4     skrll 	sqh->qh.qh_qtd.qtd_status = status;
   1504      1.23  augustss }
   1505      1.23  augustss 
   1506      1.11  augustss /*
   1507      1.11  augustss  * Ensure that the HC has released all references to the QH.  We do this
   1508      1.11  augustss  * by asking for a Async Advance Doorbell interrupt and then we wait for
   1509      1.11  augustss  * the interrupt.
   1510      1.11  augustss  * To make this easier we first obtain exclusive use of the doorbell.
   1511      1.11  augustss  */
   1512      1.11  augustss void
   1513      1.11  augustss ehci_sync_hc(ehci_softc_t *sc)
   1514      1.11  augustss {
   1515      1.15  augustss 	int s, error;
   1516      1.11  augustss 
   1517      1.12  augustss 	if (sc->sc_dying) {
   1518      1.12  augustss 		DPRINTFN(2,("ehci_sync_hc: dying\n"));
   1519      1.12  augustss 		return;
   1520      1.12  augustss 	}
   1521      1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: enter\n"));
   1522  1.47.2.4     skrll 	usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
   1523      1.10  augustss 	s = splhardusb();
   1524      1.10  augustss 	/* ask for doorbell */
   1525      1.10  augustss 	EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
   1526      1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1527      1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1528      1.15  augustss 	error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
   1529      1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1530      1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1531      1.10  augustss 	splx(s);
   1532  1.47.2.4     skrll 	usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
   1533      1.15  augustss #ifdef DIAGNOSTIC
   1534      1.15  augustss 	if (error)
   1535      1.15  augustss 		printf("ehci_sync_hc: tsleep() = %d\n", error);
   1536      1.15  augustss #endif
   1537      1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: exit\n"));
   1538      1.10  augustss }
   1539      1.10  augustss 
   1540       1.5  augustss /***********/
   1541       1.5  augustss 
   1542       1.5  augustss /*
   1543       1.5  augustss  * Data structures and routines to emulate the root hub.
   1544       1.5  augustss  */
   1545       1.5  augustss Static usb_device_descriptor_t ehci_devd = {
   1546       1.5  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1547       1.5  augustss 	UDESC_DEVICE,		/* type */
   1548       1.5  augustss 	{0x00, 0x02},		/* USB version */
   1549       1.5  augustss 	UDCLASS_HUB,		/* class */
   1550       1.5  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1551      1.11  augustss 	UDPROTO_HSHUBSTT,	/* protocol */
   1552       1.5  augustss 	64,			/* max packet */
   1553       1.5  augustss 	{0},{0},{0x00,0x01},	/* device id */
   1554       1.5  augustss 	1,2,0,			/* string indicies */
   1555       1.5  augustss 	1			/* # of configurations */
   1556       1.5  augustss };
   1557       1.5  augustss 
   1558      1.11  augustss Static usb_device_qualifier_t ehci_odevd = {
   1559      1.11  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1560      1.11  augustss 	UDESC_DEVICE_QUALIFIER,	/* type */
   1561      1.11  augustss 	{0x00, 0x02},		/* USB version */
   1562      1.11  augustss 	UDCLASS_HUB,		/* class */
   1563      1.11  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1564      1.11  augustss 	UDPROTO_FSHUB,		/* protocol */
   1565      1.11  augustss 	64,			/* max packet */
   1566      1.11  augustss 	1,			/* # of configurations */
   1567      1.11  augustss 	0
   1568      1.11  augustss };
   1569      1.11  augustss 
   1570       1.5  augustss Static usb_config_descriptor_t ehci_confd = {
   1571       1.5  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   1572       1.5  augustss 	UDESC_CONFIG,
   1573       1.5  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1574       1.5  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1575       1.5  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1576       1.5  augustss 	1,
   1577       1.5  augustss 	1,
   1578       1.5  augustss 	0,
   1579       1.5  augustss 	UC_SELF_POWERED,
   1580       1.5  augustss 	0			/* max power */
   1581       1.5  augustss };
   1582       1.5  augustss 
   1583       1.5  augustss Static usb_interface_descriptor_t ehci_ifcd = {
   1584       1.5  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1585       1.5  augustss 	UDESC_INTERFACE,
   1586       1.5  augustss 	0,
   1587       1.5  augustss 	0,
   1588       1.5  augustss 	1,
   1589       1.5  augustss 	UICLASS_HUB,
   1590       1.5  augustss 	UISUBCLASS_HUB,
   1591      1.11  augustss 	UIPROTO_HSHUBSTT,
   1592       1.5  augustss 	0
   1593       1.5  augustss };
   1594       1.5  augustss 
   1595       1.5  augustss Static usb_endpoint_descriptor_t ehci_endpd = {
   1596       1.5  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1597       1.5  augustss 	UDESC_ENDPOINT,
   1598       1.5  augustss 	UE_DIR_IN | EHCI_INTR_ENDPT,
   1599       1.5  augustss 	UE_INTERRUPT,
   1600       1.5  augustss 	{8, 0},			/* max packet */
   1601       1.5  augustss 	255
   1602       1.5  augustss };
   1603       1.5  augustss 
   1604       1.5  augustss Static usb_hub_descriptor_t ehci_hubd = {
   1605       1.5  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   1606       1.5  augustss 	UDESC_HUB,
   1607       1.5  augustss 	0,
   1608       1.5  augustss 	{0,0},
   1609       1.5  augustss 	0,
   1610       1.5  augustss 	0,
   1611       1.5  augustss 	{0},
   1612       1.5  augustss };
   1613       1.5  augustss 
   1614       1.5  augustss Static int
   1615  1.47.2.4     skrll ehci_str(usb_string_descriptor_t *p, int l, char *s)
   1616       1.5  augustss {
   1617       1.5  augustss 	int i;
   1618       1.5  augustss 
   1619       1.5  augustss 	if (l == 0)
   1620       1.5  augustss 		return (0);
   1621       1.5  augustss 	p->bLength = 2 * strlen(s) + 2;
   1622       1.5  augustss 	if (l == 1)
   1623       1.5  augustss 		return (1);
   1624       1.5  augustss 	p->bDescriptorType = UDESC_STRING;
   1625       1.5  augustss 	l -= 2;
   1626       1.5  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1627       1.5  augustss 		USETW2(p->bString[i], 0, s[i]);
   1628       1.5  augustss 	return (2*i+2);
   1629       1.5  augustss }
   1630       1.5  augustss 
   1631       1.5  augustss /*
   1632       1.5  augustss  * Simulate a hardware hub by handling all the necessary requests.
   1633       1.5  augustss  */
   1634       1.5  augustss Static usbd_status
   1635       1.5  augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
   1636       1.5  augustss {
   1637       1.5  augustss 	usbd_status err;
   1638       1.5  augustss 
   1639       1.5  augustss 	/* Insert last in queue. */
   1640       1.5  augustss 	err = usb_insert_transfer(xfer);
   1641       1.5  augustss 	if (err)
   1642       1.5  augustss 		return (err);
   1643       1.5  augustss 
   1644       1.5  augustss 	/* Pipe isn't running, start first */
   1645       1.5  augustss 	return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1646       1.5  augustss }
   1647       1.5  augustss 
   1648       1.5  augustss Static usbd_status
   1649       1.5  augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
   1650       1.5  augustss {
   1651       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   1652       1.5  augustss 	usb_device_request_t *req;
   1653       1.5  augustss 	void *buf = NULL;
   1654       1.5  augustss 	int port, i;
   1655       1.5  augustss 	int s, len, value, index, l, totlen = 0;
   1656       1.5  augustss 	usb_port_status_t ps;
   1657       1.5  augustss 	usb_hub_descriptor_t hubd;
   1658       1.5  augustss 	usbd_status err;
   1659       1.5  augustss 	u_int32_t v;
   1660       1.5  augustss 
   1661       1.5  augustss 	if (sc->sc_dying)
   1662       1.5  augustss 		return (USBD_IOERROR);
   1663       1.5  augustss 
   1664       1.5  augustss #ifdef DIAGNOSTIC
   1665       1.5  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   1666       1.5  augustss 		/* XXX panic */
   1667       1.5  augustss 		return (USBD_INVAL);
   1668       1.5  augustss #endif
   1669       1.5  augustss 	req = &xfer->request;
   1670       1.5  augustss 
   1671  1.47.2.4     skrll 	DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
   1672       1.5  augustss 		    req->bmRequestType, req->bRequest));
   1673       1.5  augustss 
   1674       1.5  augustss 	len = UGETW(req->wLength);
   1675       1.5  augustss 	value = UGETW(req->wValue);
   1676       1.5  augustss 	index = UGETW(req->wIndex);
   1677       1.5  augustss 
   1678       1.5  augustss 	if (len != 0)
   1679      1.30  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   1680       1.5  augustss 
   1681       1.5  augustss #define C(x,y) ((x) | ((y) << 8))
   1682       1.5  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   1683       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1684       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1685       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1686      1.33  augustss 		/*
   1687       1.5  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1688       1.5  augustss 		 * for the integrated root hub.
   1689       1.5  augustss 		 */
   1690       1.5  augustss 		break;
   1691       1.5  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1692       1.5  augustss 		if (len > 0) {
   1693       1.5  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   1694       1.5  augustss 			totlen = 1;
   1695       1.5  augustss 		}
   1696       1.5  augustss 		break;
   1697       1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1698  1.47.2.4     skrll 		DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
   1699       1.5  augustss 		switch(value >> 8) {
   1700       1.5  augustss 		case UDESC_DEVICE:
   1701       1.5  augustss 			if ((value & 0xff) != 0) {
   1702       1.5  augustss 				err = USBD_IOERROR;
   1703       1.5  augustss 				goto ret;
   1704       1.5  augustss 			}
   1705       1.5  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1706       1.5  augustss 			USETW(ehci_devd.idVendor, sc->sc_id_vendor);
   1707       1.5  augustss 			memcpy(buf, &ehci_devd, l);
   1708       1.5  augustss 			break;
   1709      1.33  augustss 		/*
   1710      1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1711      1.11  augustss 		 * we need this descriptor.
   1712      1.11  augustss 		 */
   1713      1.11  augustss 		case UDESC_DEVICE_QUALIFIER:
   1714      1.11  augustss 			if ((value & 0xff) != 0) {
   1715      1.11  augustss 				err = USBD_IOERROR;
   1716      1.11  augustss 				goto ret;
   1717      1.11  augustss 			}
   1718      1.11  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1719      1.11  augustss 			memcpy(buf, &ehci_odevd, l);
   1720      1.11  augustss 			break;
   1721      1.33  augustss 		/*
   1722      1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1723      1.11  augustss 		 * we need this descriptor.
   1724      1.11  augustss 		 */
   1725      1.11  augustss 		case UDESC_OTHER_SPEED_CONFIGURATION:
   1726       1.5  augustss 		case UDESC_CONFIG:
   1727       1.5  augustss 			if ((value & 0xff) != 0) {
   1728       1.5  augustss 				err = USBD_IOERROR;
   1729       1.5  augustss 				goto ret;
   1730       1.5  augustss 			}
   1731       1.5  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1732       1.5  augustss 			memcpy(buf, &ehci_confd, l);
   1733      1.11  augustss 			((usb_config_descriptor_t *)buf)->bDescriptorType =
   1734      1.11  augustss 				value >> 8;
   1735       1.5  augustss 			buf = (char *)buf + l;
   1736       1.5  augustss 			len -= l;
   1737       1.5  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1738       1.5  augustss 			totlen += l;
   1739       1.5  augustss 			memcpy(buf, &ehci_ifcd, l);
   1740       1.5  augustss 			buf = (char *)buf + l;
   1741       1.5  augustss 			len -= l;
   1742       1.5  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1743       1.5  augustss 			totlen += l;
   1744       1.5  augustss 			memcpy(buf, &ehci_endpd, l);
   1745       1.5  augustss 			break;
   1746       1.5  augustss 		case UDESC_STRING:
   1747       1.5  augustss 			if (len == 0)
   1748       1.5  augustss 				break;
   1749       1.5  augustss 			*(u_int8_t *)buf = 0;
   1750       1.5  augustss 			totlen = 1;
   1751       1.5  augustss 			switch (value & 0xff) {
   1752  1.47.2.4     skrll 			case 0: /* Language table */
   1753  1.47.2.4     skrll 				totlen = ehci_str(buf, len, "\001");
   1754  1.47.2.4     skrll 				break;
   1755       1.5  augustss 			case 1: /* Vendor */
   1756       1.5  augustss 				totlen = ehci_str(buf, len, sc->sc_vendor);
   1757       1.5  augustss 				break;
   1758       1.5  augustss 			case 2: /* Product */
   1759       1.5  augustss 				totlen = ehci_str(buf, len, "EHCI root hub");
   1760       1.5  augustss 				break;
   1761       1.5  augustss 			}
   1762       1.5  augustss 			break;
   1763       1.5  augustss 		default:
   1764       1.5  augustss 			err = USBD_IOERROR;
   1765       1.5  augustss 			goto ret;
   1766       1.5  augustss 		}
   1767       1.5  augustss 		break;
   1768       1.5  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1769       1.5  augustss 		if (len > 0) {
   1770       1.5  augustss 			*(u_int8_t *)buf = 0;
   1771       1.5  augustss 			totlen = 1;
   1772       1.5  augustss 		}
   1773       1.5  augustss 		break;
   1774       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1775       1.5  augustss 		if (len > 1) {
   1776       1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1777       1.5  augustss 			totlen = 2;
   1778       1.5  augustss 		}
   1779       1.5  augustss 		break;
   1780       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1781       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1782       1.5  augustss 		if (len > 1) {
   1783       1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1784       1.5  augustss 			totlen = 2;
   1785       1.5  augustss 		}
   1786       1.5  augustss 		break;
   1787       1.5  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1788       1.5  augustss 		if (value >= USB_MAX_DEVICES) {
   1789       1.5  augustss 			err = USBD_IOERROR;
   1790       1.5  augustss 			goto ret;
   1791       1.5  augustss 		}
   1792       1.5  augustss 		sc->sc_addr = value;
   1793       1.5  augustss 		break;
   1794       1.5  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1795       1.5  augustss 		if (value != 0 && value != 1) {
   1796       1.5  augustss 			err = USBD_IOERROR;
   1797       1.5  augustss 			goto ret;
   1798       1.5  augustss 		}
   1799       1.5  augustss 		sc->sc_conf = value;
   1800       1.5  augustss 		break;
   1801       1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1802       1.5  augustss 		break;
   1803       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1804       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1805       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1806       1.5  augustss 		err = USBD_IOERROR;
   1807       1.5  augustss 		goto ret;
   1808       1.5  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1809       1.5  augustss 		break;
   1810       1.5  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1811       1.5  augustss 		break;
   1812       1.5  augustss 	/* Hub requests */
   1813       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1814       1.5  augustss 		break;
   1815       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1816  1.47.2.4     skrll 		DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
   1817       1.5  augustss 			     "port=%d feature=%d\n",
   1818       1.5  augustss 			     index, value));
   1819       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1820       1.5  augustss 			err = USBD_IOERROR;
   1821       1.5  augustss 			goto ret;
   1822       1.5  augustss 		}
   1823       1.5  augustss 		port = EHCI_PORTSC(index);
   1824       1.5  augustss 		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   1825       1.5  augustss 		switch(value) {
   1826       1.5  augustss 		case UHF_PORT_ENABLE:
   1827       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PE);
   1828       1.5  augustss 			break;
   1829       1.5  augustss 		case UHF_PORT_SUSPEND:
   1830       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
   1831       1.5  augustss 			break;
   1832       1.5  augustss 		case UHF_PORT_POWER:
   1833       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PP);
   1834       1.5  augustss 			break;
   1835      1.14  augustss 		case UHF_PORT_TEST:
   1836  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
   1837      1.14  augustss 				    "%d\n", index));
   1838      1.14  augustss 			break;
   1839      1.14  augustss 		case UHF_PORT_INDICATOR:
   1840  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
   1841      1.14  augustss 				    "%d\n", index));
   1842      1.14  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
   1843      1.14  augustss 			break;
   1844       1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1845       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_CSC);
   1846       1.5  augustss 			break;
   1847       1.5  augustss 		case UHF_C_PORT_ENABLE:
   1848       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PEC);
   1849       1.5  augustss 			break;
   1850       1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1851       1.5  augustss 			/* how? */
   1852       1.5  augustss 			break;
   1853       1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1854       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_OCC);
   1855       1.5  augustss 			break;
   1856       1.5  augustss 		case UHF_C_PORT_RESET:
   1857       1.6  augustss 			sc->sc_isreset = 0;
   1858       1.5  augustss 			break;
   1859       1.5  augustss 		default:
   1860       1.5  augustss 			err = USBD_IOERROR;
   1861       1.5  augustss 			goto ret;
   1862       1.5  augustss 		}
   1863       1.5  augustss #if 0
   1864       1.5  augustss 		switch(value) {
   1865       1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1866       1.5  augustss 		case UHF_C_PORT_ENABLE:
   1867       1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1868       1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1869       1.5  augustss 		case UHF_C_PORT_RESET:
   1870       1.5  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   1871       1.5  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   1872       1.6  augustss 				ehci_pcd_able(sc, 1);
   1873       1.5  augustss 			break;
   1874       1.5  augustss 		default:
   1875       1.5  augustss 			break;
   1876       1.5  augustss 		}
   1877       1.5  augustss #endif
   1878       1.5  augustss 		break;
   1879       1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1880  1.47.2.1     skrll 		if ((value & 0xff) != 0) {
   1881       1.5  augustss 			err = USBD_IOERROR;
   1882       1.5  augustss 			goto ret;
   1883       1.5  augustss 		}
   1884       1.5  augustss 		hubd = ehci_hubd;
   1885       1.5  augustss 		hubd.bNbrPorts = sc->sc_noport;
   1886       1.5  augustss 		v = EOREAD4(sc, EHCI_HCSPARAMS);
   1887       1.5  augustss 		USETW(hubd.wHubCharacteristics,
   1888      1.14  augustss 		    EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
   1889  1.47.2.4     skrll 		    EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
   1890      1.14  augustss 		        ? UHD_PORT_IND : 0);
   1891       1.5  augustss 		hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
   1892      1.33  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1893       1.5  augustss 			hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
   1894       1.5  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1895       1.5  augustss 		l = min(len, hubd.bDescLength);
   1896       1.5  augustss 		totlen = l;
   1897       1.5  augustss 		memcpy(buf, &hubd, l);
   1898       1.5  augustss 		break;
   1899       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1900       1.5  augustss 		if (len != 4) {
   1901       1.5  augustss 			err = USBD_IOERROR;
   1902       1.5  augustss 			goto ret;
   1903       1.5  augustss 		}
   1904       1.5  augustss 		memset(buf, 0, len); /* ? XXX */
   1905       1.5  augustss 		totlen = len;
   1906       1.5  augustss 		break;
   1907       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1908  1.47.2.4     skrll 		DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
   1909       1.5  augustss 			    index));
   1910       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1911       1.5  augustss 			err = USBD_IOERROR;
   1912       1.5  augustss 			goto ret;
   1913       1.5  augustss 		}
   1914       1.5  augustss 		if (len != 4) {
   1915       1.5  augustss 			err = USBD_IOERROR;
   1916       1.5  augustss 			goto ret;
   1917       1.5  augustss 		}
   1918       1.5  augustss 		v = EOREAD4(sc, EHCI_PORTSC(index));
   1919  1.47.2.4     skrll 		DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
   1920       1.5  augustss 			    v));
   1921      1.11  augustss 		i = UPS_HIGH_SPEED;
   1922       1.5  augustss 		if (v & EHCI_PS_CS)	i |= UPS_CURRENT_CONNECT_STATUS;
   1923       1.5  augustss 		if (v & EHCI_PS_PE)	i |= UPS_PORT_ENABLED;
   1924       1.5  augustss 		if (v & EHCI_PS_SUSP)	i |= UPS_SUSPEND;
   1925       1.5  augustss 		if (v & EHCI_PS_OCA)	i |= UPS_OVERCURRENT_INDICATOR;
   1926       1.5  augustss 		if (v & EHCI_PS_PR)	i |= UPS_RESET;
   1927       1.5  augustss 		if (v & EHCI_PS_PP)	i |= UPS_PORT_POWER;
   1928       1.5  augustss 		USETW(ps.wPortStatus, i);
   1929       1.5  augustss 		i = 0;
   1930       1.5  augustss 		if (v & EHCI_PS_CSC)	i |= UPS_C_CONNECT_STATUS;
   1931       1.5  augustss 		if (v & EHCI_PS_PEC)	i |= UPS_C_PORT_ENABLED;
   1932       1.5  augustss 		if (v & EHCI_PS_OCC)	i |= UPS_C_OVERCURRENT_INDICATOR;
   1933       1.6  augustss 		if (sc->sc_isreset)	i |= UPS_C_PORT_RESET;
   1934       1.5  augustss 		USETW(ps.wPortChange, i);
   1935       1.5  augustss 		l = min(len, sizeof ps);
   1936       1.5  augustss 		memcpy(buf, &ps, l);
   1937       1.5  augustss 		totlen = l;
   1938       1.5  augustss 		break;
   1939       1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1940       1.5  augustss 		err = USBD_IOERROR;
   1941       1.5  augustss 		goto ret;
   1942       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1943       1.5  augustss 		break;
   1944       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1945       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1946       1.5  augustss 			err = USBD_IOERROR;
   1947       1.5  augustss 			goto ret;
   1948       1.5  augustss 		}
   1949       1.5  augustss 		port = EHCI_PORTSC(index);
   1950       1.5  augustss 		v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   1951       1.5  augustss 		switch(value) {
   1952       1.5  augustss 		case UHF_PORT_ENABLE:
   1953       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PE);
   1954       1.5  augustss 			break;
   1955       1.5  augustss 		case UHF_PORT_SUSPEND:
   1956       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_SUSP);
   1957       1.5  augustss 			break;
   1958       1.5  augustss 		case UHF_PORT_RESET:
   1959  1.47.2.4     skrll 			DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
   1960       1.5  augustss 				    index));
   1961       1.6  augustss 			if (EHCI_PS_IS_LOWSPEED(v)) {
   1962       1.6  augustss 				/* Low speed device, give up ownership. */
   1963       1.6  augustss 				ehci_disown(sc, index, 1);
   1964       1.6  augustss 				break;
   1965       1.6  augustss 			}
   1966       1.8  augustss 			/* Start reset sequence. */
   1967       1.8  augustss 			v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
   1968       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PR);
   1969       1.8  augustss 			/* Wait for reset to complete. */
   1970      1.13  augustss 			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   1971      1.17  augustss 			if (sc->sc_dying) {
   1972      1.17  augustss 				err = USBD_IOERROR;
   1973      1.17  augustss 				goto ret;
   1974      1.17  augustss 			}
   1975       1.8  augustss 			/* Terminate reset sequence. */
   1976       1.8  augustss 			EOWRITE4(sc, port, v);
   1977       1.8  augustss 			/* Wait for HC to complete reset. */
   1978      1.13  augustss 			usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
   1979      1.17  augustss 			if (sc->sc_dying) {
   1980      1.17  augustss 				err = USBD_IOERROR;
   1981      1.17  augustss 				goto ret;
   1982      1.17  augustss 			}
   1983       1.8  augustss 			v = EOREAD4(sc, port);
   1984       1.8  augustss 			DPRINTF(("ehci after reset, status=0x%08x\n", v));
   1985       1.8  augustss 			if (v & EHCI_PS_PR) {
   1986       1.8  augustss 				printf("%s: port reset timeout\n",
   1987       1.8  augustss 				       USBDEVNAME(sc->sc_bus.bdev));
   1988       1.8  augustss 				return (USBD_TIMEOUT);
   1989       1.5  augustss 			}
   1990       1.8  augustss 			if (!(v & EHCI_PS_PE)) {
   1991       1.6  augustss 				/* Not a high speed device, give up ownership.*/
   1992       1.6  augustss 				ehci_disown(sc, index, 0);
   1993       1.6  augustss 				break;
   1994       1.6  augustss 			}
   1995       1.6  augustss 			sc->sc_isreset = 1;
   1996       1.8  augustss 			DPRINTF(("ehci port %d reset, status = 0x%08x\n",
   1997       1.6  augustss 				 index, v));
   1998       1.5  augustss 			break;
   1999       1.5  augustss 		case UHF_PORT_POWER:
   2000  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: set port power "
   2001       1.5  augustss 				    "%d\n", index));
   2002       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PP);
   2003       1.5  augustss 			break;
   2004      1.11  augustss 		case UHF_PORT_TEST:
   2005  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: set port test "
   2006      1.11  augustss 				    "%d\n", index));
   2007      1.11  augustss 			break;
   2008      1.11  augustss 		case UHF_PORT_INDICATOR:
   2009  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
   2010      1.11  augustss 				    "%d\n", index));
   2011      1.14  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PIC);
   2012      1.11  augustss 			break;
   2013       1.5  augustss 		default:
   2014       1.5  augustss 			err = USBD_IOERROR;
   2015       1.5  augustss 			goto ret;
   2016       1.5  augustss 		}
   2017       1.5  augustss 		break;
   2018      1.11  augustss 	case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
   2019      1.11  augustss 	case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
   2020      1.11  augustss 	case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
   2021      1.11  augustss 	case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
   2022      1.11  augustss 		break;
   2023       1.5  augustss 	default:
   2024       1.5  augustss 		err = USBD_IOERROR;
   2025       1.5  augustss 		goto ret;
   2026       1.5  augustss 	}
   2027       1.5  augustss 	xfer->actlen = totlen;
   2028       1.5  augustss 	err = USBD_NORMAL_COMPLETION;
   2029       1.5  augustss  ret:
   2030       1.5  augustss 	xfer->status = err;
   2031       1.5  augustss 	s = splusb();
   2032       1.5  augustss 	usb_transfer_complete(xfer);
   2033       1.5  augustss 	splx(s);
   2034       1.5  augustss 	return (USBD_IN_PROGRESS);
   2035       1.6  augustss }
   2036       1.6  augustss 
   2037       1.6  augustss void
   2038       1.6  augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
   2039       1.6  augustss {
   2040      1.24  augustss 	int port;
   2041       1.6  augustss 	u_int32_t v;
   2042       1.6  augustss 
   2043       1.6  augustss 	DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
   2044       1.6  augustss #ifdef DIAGNOSTIC
   2045       1.6  augustss 	if (sc->sc_npcomp != 0) {
   2046      1.24  augustss 		int i = (index-1) / sc->sc_npcomp;
   2047       1.6  augustss 		if (i >= sc->sc_ncomp)
   2048       1.6  augustss 			printf("%s: strange port\n",
   2049       1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev));
   2050       1.6  augustss 		else
   2051       1.6  augustss 			printf("%s: handing over %s speed device on "
   2052       1.6  augustss 			       "port %d to %s\n",
   2053       1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev),
   2054       1.6  augustss 			       lowspeed ? "low" : "full",
   2055       1.6  augustss 			       index, USBDEVNAME(sc->sc_comps[i]->bdev));
   2056       1.6  augustss 	} else {
   2057       1.6  augustss 		printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
   2058       1.6  augustss 	}
   2059       1.6  augustss #endif
   2060       1.6  augustss 	port = EHCI_PORTSC(index);
   2061       1.6  augustss 	v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   2062       1.6  augustss 	EOWRITE4(sc, port, v | EHCI_PS_PO);
   2063       1.5  augustss }
   2064       1.5  augustss 
   2065       1.5  augustss /* Abort a root control request. */
   2066       1.5  augustss Static void
   2067       1.5  augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
   2068       1.5  augustss {
   2069       1.5  augustss 	/* Nothing to do, all transfers are synchronous. */
   2070       1.5  augustss }
   2071       1.5  augustss 
   2072       1.5  augustss /* Close the root pipe. */
   2073       1.5  augustss Static void
   2074       1.5  augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
   2075       1.5  augustss {
   2076       1.5  augustss 	DPRINTF(("ehci_root_ctrl_close\n"));
   2077       1.5  augustss 	/* Nothing to do. */
   2078       1.5  augustss }
   2079       1.5  augustss 
   2080       1.5  augustss void
   2081       1.5  augustss ehci_root_intr_done(usbd_xfer_handle xfer)
   2082       1.5  augustss {
   2083  1.47.2.4     skrll 	xfer->hcpriv = NULL;
   2084       1.5  augustss }
   2085       1.5  augustss 
   2086       1.5  augustss Static usbd_status
   2087       1.5  augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
   2088       1.5  augustss {
   2089       1.5  augustss 	usbd_status err;
   2090       1.5  augustss 
   2091       1.5  augustss 	/* Insert last in queue. */
   2092       1.5  augustss 	err = usb_insert_transfer(xfer);
   2093       1.5  augustss 	if (err)
   2094       1.5  augustss 		return (err);
   2095       1.5  augustss 
   2096       1.5  augustss 	/* Pipe isn't running, start first */
   2097       1.5  augustss 	return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2098       1.5  augustss }
   2099       1.5  augustss 
   2100       1.5  augustss Static usbd_status
   2101       1.5  augustss ehci_root_intr_start(usbd_xfer_handle xfer)
   2102       1.5  augustss {
   2103       1.5  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   2104       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2105       1.5  augustss 
   2106       1.5  augustss 	if (sc->sc_dying)
   2107       1.5  augustss 		return (USBD_IOERROR);
   2108       1.5  augustss 
   2109       1.5  augustss 	sc->sc_intrxfer = xfer;
   2110       1.5  augustss 
   2111       1.5  augustss 	return (USBD_IN_PROGRESS);
   2112       1.5  augustss }
   2113       1.5  augustss 
   2114       1.5  augustss /* Abort a root interrupt request. */
   2115       1.5  augustss Static void
   2116       1.5  augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
   2117       1.5  augustss {
   2118       1.5  augustss 	int s;
   2119       1.5  augustss 
   2120       1.5  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2121       1.5  augustss 		DPRINTF(("ehci_root_intr_abort: remove\n"));
   2122       1.5  augustss 		xfer->pipe->intrxfer = NULL;
   2123       1.5  augustss 	}
   2124       1.5  augustss 	xfer->status = USBD_CANCELLED;
   2125       1.5  augustss 	s = splusb();
   2126       1.5  augustss 	usb_transfer_complete(xfer);
   2127       1.5  augustss 	splx(s);
   2128       1.5  augustss }
   2129       1.5  augustss 
   2130       1.5  augustss /* Close the root pipe. */
   2131       1.5  augustss Static void
   2132       1.5  augustss ehci_root_intr_close(usbd_pipe_handle pipe)
   2133       1.5  augustss {
   2134       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2135      1.33  augustss 
   2136       1.5  augustss 	DPRINTF(("ehci_root_intr_close\n"));
   2137       1.5  augustss 
   2138       1.5  augustss 	sc->sc_intrxfer = NULL;
   2139       1.5  augustss }
   2140       1.5  augustss 
   2141       1.5  augustss void
   2142       1.5  augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
   2143       1.5  augustss {
   2144  1.47.2.4     skrll 	xfer->hcpriv = NULL;
   2145       1.9  augustss }
   2146       1.9  augustss 
   2147       1.9  augustss /************************/
   2148       1.9  augustss 
   2149       1.9  augustss ehci_soft_qh_t *
   2150       1.9  augustss ehci_alloc_sqh(ehci_softc_t *sc)
   2151       1.9  augustss {
   2152       1.9  augustss 	ehci_soft_qh_t *sqh;
   2153       1.9  augustss 	usbd_status err;
   2154       1.9  augustss 	int i, offs;
   2155       1.9  augustss 	usb_dma_t dma;
   2156       1.9  augustss 
   2157       1.9  augustss 	if (sc->sc_freeqhs == NULL) {
   2158       1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
   2159       1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
   2160       1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2161      1.25  augustss #ifdef EHCI_DEBUG
   2162      1.25  augustss 		if (err)
   2163      1.25  augustss 			printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
   2164      1.25  augustss #endif
   2165       1.9  augustss 		if (err)
   2166      1.11  augustss 			return (NULL);
   2167       1.9  augustss 		for(i = 0; i < EHCI_SQH_CHUNK; i++) {
   2168       1.9  augustss 			offs = i * EHCI_SQH_SIZE;
   2169      1.30  augustss 			sqh = KERNADDR(&dma, offs);
   2170      1.31  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   2171       1.9  augustss 			sqh->next = sc->sc_freeqhs;
   2172       1.9  augustss 			sc->sc_freeqhs = sqh;
   2173       1.9  augustss 		}
   2174       1.9  augustss 	}
   2175       1.9  augustss 	sqh = sc->sc_freeqhs;
   2176       1.9  augustss 	sc->sc_freeqhs = sqh->next;
   2177       1.9  augustss 	memset(&sqh->qh, 0, sizeof(ehci_qh_t));
   2178      1.11  augustss 	sqh->next = NULL;
   2179       1.9  augustss 	return (sqh);
   2180       1.9  augustss }
   2181       1.9  augustss 
   2182       1.9  augustss void
   2183       1.9  augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
   2184       1.9  augustss {
   2185       1.9  augustss 	sqh->next = sc->sc_freeqhs;
   2186       1.9  augustss 	sc->sc_freeqhs = sqh;
   2187       1.9  augustss }
   2188       1.9  augustss 
   2189       1.9  augustss ehci_soft_qtd_t *
   2190       1.9  augustss ehci_alloc_sqtd(ehci_softc_t *sc)
   2191       1.9  augustss {
   2192       1.9  augustss 	ehci_soft_qtd_t *sqtd;
   2193       1.9  augustss 	usbd_status err;
   2194       1.9  augustss 	int i, offs;
   2195       1.9  augustss 	usb_dma_t dma;
   2196       1.9  augustss 	int s;
   2197       1.9  augustss 
   2198       1.9  augustss 	if (sc->sc_freeqtds == NULL) {
   2199       1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
   2200       1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
   2201       1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2202      1.25  augustss #ifdef EHCI_DEBUG
   2203      1.25  augustss 		if (err)
   2204      1.25  augustss 			printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
   2205      1.25  augustss #endif
   2206       1.9  augustss 		if (err)
   2207       1.9  augustss 			return (NULL);
   2208       1.9  augustss 		s = splusb();
   2209       1.9  augustss 		for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
   2210       1.9  augustss 			offs = i * EHCI_SQTD_SIZE;
   2211      1.30  augustss 			sqtd = KERNADDR(&dma, offs);
   2212      1.31  augustss 			sqtd->physaddr = DMAADDR(&dma, offs);
   2213       1.9  augustss 			sqtd->nextqtd = sc->sc_freeqtds;
   2214       1.9  augustss 			sc->sc_freeqtds = sqtd;
   2215       1.9  augustss 		}
   2216       1.9  augustss 		splx(s);
   2217       1.9  augustss 	}
   2218       1.9  augustss 
   2219       1.9  augustss 	s = splusb();
   2220       1.9  augustss 	sqtd = sc->sc_freeqtds;
   2221       1.9  augustss 	sc->sc_freeqtds = sqtd->nextqtd;
   2222       1.9  augustss 	memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
   2223       1.9  augustss 	sqtd->nextqtd = NULL;
   2224       1.9  augustss 	sqtd->xfer = NULL;
   2225       1.9  augustss 	splx(s);
   2226       1.9  augustss 
   2227       1.9  augustss 	return (sqtd);
   2228       1.9  augustss }
   2229       1.9  augustss 
   2230       1.9  augustss void
   2231       1.9  augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
   2232       1.9  augustss {
   2233       1.9  augustss 	int s;
   2234       1.9  augustss 
   2235       1.9  augustss 	s = splusb();
   2236       1.9  augustss 	sqtd->nextqtd = sc->sc_freeqtds;
   2237       1.9  augustss 	sc->sc_freeqtds = sqtd;
   2238       1.9  augustss 	splx(s);
   2239       1.9  augustss }
   2240       1.9  augustss 
   2241      1.15  augustss usbd_status
   2242      1.25  augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
   2243      1.15  augustss 		     int alen, int rd, usbd_xfer_handle xfer,
   2244      1.15  augustss 		     ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
   2245      1.15  augustss {
   2246      1.15  augustss 	ehci_soft_qtd_t *next, *cur;
   2247      1.22  augustss 	ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
   2248      1.15  augustss 	u_int32_t qtdstatus;
   2249  1.47.2.1     skrll 	int len, curlen, mps;
   2250  1.47.2.1     skrll 	int i, tog;
   2251      1.15  augustss 	usb_dma_t *dma = &xfer->dmabuf;
   2252      1.15  augustss 
   2253      1.25  augustss 	DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
   2254      1.15  augustss 
   2255      1.15  augustss 	len = alen;
   2256      1.31  augustss 	dataphys = DMAADDR(dma, 0);
   2257      1.22  augustss 	dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
   2258  1.47.2.1     skrll #if 0
   2259  1.47.2.1     skrll printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status,
   2260  1.47.2.1     skrll     epipe->nexttoggle);
   2261  1.47.2.1     skrll #endif
   2262  1.47.2.1     skrll 	qtdstatus = EHCI_QTD_ACTIVE |
   2263      1.15  augustss 	    EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
   2264      1.15  augustss 	    EHCI_QTD_SET_CERR(3)
   2265      1.15  augustss 	    /* IOC set below */
   2266      1.15  augustss 	    /* BYTES set below */
   2267  1.47.2.1     skrll 	    ;
   2268  1.47.2.1     skrll 	mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
   2269  1.47.2.1     skrll 	tog = epipe->nexttoggle;
   2270  1.47.2.1     skrll 	qtdstatus |= EHCI_QTD_SET_TOGGLE(tog);
   2271      1.15  augustss 
   2272      1.15  augustss 	cur = ehci_alloc_sqtd(sc);
   2273      1.25  augustss 	*sp = cur;
   2274      1.15  augustss 	if (cur == NULL)
   2275      1.15  augustss 		goto nomem;
   2276      1.15  augustss 	for (;;) {
   2277      1.22  augustss 		dataphyspage = EHCI_PAGE(dataphys);
   2278      1.26  augustss 		/* The EHCI hardware can handle at most 5 pages. */
   2279      1.33  augustss 		if (dataphyslastpage - dataphyspage <
   2280      1.26  augustss 		    EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
   2281      1.15  augustss 			/* we can handle it in this QTD */
   2282      1.15  augustss 			curlen = len;
   2283      1.15  augustss 		} else {
   2284      1.15  augustss 			/* must use multiple TDs, fill as much as possible. */
   2285      1.33  augustss 			curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
   2286      1.22  augustss 				 EHCI_PAGE_OFFSET(dataphys);
   2287      1.25  augustss #ifdef DIAGNOSTIC
   2288      1.25  augustss 			if (curlen > len) {
   2289      1.26  augustss 				printf("ehci_alloc_sqtd_chain: curlen=0x%x "
   2290      1.26  augustss 				       "len=0x%x offs=0x%x\n", curlen, len,
   2291      1.26  augustss 				       EHCI_PAGE_OFFSET(dataphys));
   2292      1.26  augustss 				printf("lastpage=0x%x page=0x%x phys=0x%x\n",
   2293      1.26  augustss 				       dataphyslastpage, dataphyspage,
   2294      1.26  augustss 				       dataphys);
   2295      1.25  augustss 				curlen = len;
   2296      1.25  augustss 			}
   2297      1.25  augustss #endif
   2298      1.15  augustss 			/* the length must be a multiple of the max size */
   2299  1.47.2.1     skrll 			curlen -= curlen % mps;
   2300      1.25  augustss 			DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
   2301      1.25  augustss 				    "curlen=%d\n", curlen));
   2302      1.15  augustss #ifdef DIAGNOSTIC
   2303      1.15  augustss 			if (curlen == 0)
   2304      1.37    provos 				panic("ehci_alloc_std: curlen == 0");
   2305      1.15  augustss #endif
   2306      1.15  augustss 		}
   2307      1.25  augustss 		DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
   2308      1.22  augustss 			    "dataphyslastpage=0x%08x len=%d curlen=%d\n",
   2309      1.22  augustss 			    dataphys, dataphyslastpage,
   2310      1.15  augustss 			    len, curlen));
   2311      1.15  augustss 		len -= curlen;
   2312      1.15  augustss 
   2313      1.15  augustss 		if (len != 0) {
   2314      1.15  augustss 			next = ehci_alloc_sqtd(sc);
   2315      1.15  augustss 			if (next == NULL)
   2316      1.15  augustss 				goto nomem;
   2317  1.47.2.1     skrll 			nextphys = htole32(next->physaddr);
   2318      1.15  augustss 		} else {
   2319      1.15  augustss 			next = NULL;
   2320      1.15  augustss 			nextphys = EHCI_NULL;
   2321      1.15  augustss 		}
   2322      1.15  augustss 
   2323      1.15  augustss 		for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
   2324      1.15  augustss 			ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
   2325      1.15  augustss 			if (i != 0) /* use offset only in first buffer */
   2326      1.15  augustss 				a = EHCI_PAGE(a);
   2327      1.15  augustss 			cur->qtd.qtd_buffer[i] = htole32(a);
   2328  1.47.2.1     skrll 			cur->qtd.qtd_buffer_hi[i] = 0;
   2329      1.25  augustss #ifdef DIAGNOSTIC
   2330      1.25  augustss 			if (i >= EHCI_QTD_NBUFFERS) {
   2331      1.25  augustss 				printf("ehci_alloc_sqtd_chain: i=%d\n", i);
   2332      1.25  augustss 				goto nomem;
   2333      1.25  augustss 			}
   2334      1.25  augustss #endif
   2335      1.15  augustss 		}
   2336      1.15  augustss 		cur->nextqtd = next;
   2337  1.47.2.1     skrll 		cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
   2338      1.15  augustss 		cur->qtd.qtd_status =
   2339  1.47.2.1     skrll 		    htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
   2340      1.15  augustss 		cur->xfer = xfer;
   2341      1.18  augustss 		cur->len = curlen;
   2342      1.29  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
   2343      1.29  augustss 			    dataphys, dataphys + curlen));
   2344  1.47.2.1     skrll 		/* adjust the toggle based on the number of packets in this
   2345  1.47.2.1     skrll 		   qtd */
   2346  1.47.2.1     skrll 		if (((curlen + mps - 1) / mps) & 1) {
   2347  1.47.2.1     skrll 			tog ^= 1;
   2348  1.47.2.1     skrll 			qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
   2349  1.47.2.1     skrll 		}
   2350      1.15  augustss 		if (len == 0)
   2351      1.15  augustss 			break;
   2352      1.25  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
   2353      1.15  augustss 		dataphys += curlen;
   2354      1.15  augustss 		cur = next;
   2355      1.15  augustss 	}
   2356      1.15  augustss 	cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
   2357      1.15  augustss 	*ep = cur;
   2358  1.47.2.1     skrll 	epipe->nexttoggle = tog;
   2359      1.15  augustss 
   2360      1.29  augustss 	DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
   2361      1.29  augustss 		     *sp, *ep));
   2362      1.29  augustss 
   2363      1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2364      1.15  augustss 
   2365      1.15  augustss  nomem:
   2366      1.15  augustss 	/* XXX free chain */
   2367      1.25  augustss 	DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
   2368      1.15  augustss 	return (USBD_NOMEM);
   2369      1.15  augustss }
   2370      1.15  augustss 
   2371      1.18  augustss Static void
   2372      1.25  augustss ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
   2373      1.18  augustss 		    ehci_soft_qtd_t *sqtdend)
   2374      1.18  augustss {
   2375      1.18  augustss 	ehci_soft_qtd_t *p;
   2376      1.25  augustss 	int i;
   2377      1.18  augustss 
   2378      1.29  augustss 	DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
   2379      1.29  augustss 		     sqtd, sqtdend));
   2380      1.29  augustss 
   2381      1.25  augustss 	for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
   2382      1.18  augustss 		p = sqtd->nextqtd;
   2383      1.18  augustss 		ehci_free_sqtd(sc, sqtd);
   2384      1.18  augustss 	}
   2385      1.18  augustss }
   2386      1.18  augustss 
   2387      1.15  augustss /****************/
   2388      1.15  augustss 
   2389       1.9  augustss /*
   2390      1.10  augustss  * Close a reqular pipe.
   2391      1.10  augustss  * Assumes that there are no pending transactions.
   2392      1.10  augustss  */
   2393      1.10  augustss void
   2394      1.10  augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
   2395      1.10  augustss {
   2396      1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   2397      1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2398      1.10  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2399      1.10  augustss 	int s;
   2400      1.10  augustss 
   2401      1.10  augustss 	s = splusb();
   2402      1.10  augustss 	ehci_rem_qh(sc, sqh, head);
   2403      1.10  augustss 	splx(s);
   2404      1.10  augustss 	ehci_free_sqh(sc, epipe->sqh);
   2405      1.10  augustss }
   2406      1.10  augustss 
   2407      1.33  augustss /*
   2408      1.10  augustss  * Abort a device request.
   2409      1.10  augustss  * If this routine is called at splusb() it guarantees that the request
   2410      1.10  augustss  * will be removed from the hardware scheduling and that the callback
   2411      1.10  augustss  * for it will be called with USBD_CANCELLED status.
   2412      1.10  augustss  * It's impossible to guarantee that the requested transfer will not
   2413      1.10  augustss  * have happened since the hardware runs concurrently.
   2414      1.10  augustss  * If the transaction has already happened we rely on the ordinary
   2415      1.10  augustss  * interrupt processing to process it.
   2416      1.26  augustss  * XXX This is most probably wrong.
   2417      1.10  augustss  */
   2418      1.10  augustss void
   2419      1.10  augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2420      1.10  augustss {
   2421      1.26  augustss #define exfer EXFER(xfer)
   2422      1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2423      1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2424      1.26  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2425      1.26  augustss 	ehci_soft_qtd_t *sqtd;
   2426      1.26  augustss 	ehci_physaddr_t cur;
   2427      1.26  augustss 	u_int32_t qhstatus;
   2428      1.11  augustss 	int s;
   2429      1.26  augustss 	int hit;
   2430      1.10  augustss 
   2431      1.24  augustss 	DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
   2432      1.10  augustss 
   2433      1.17  augustss 	if (sc->sc_dying) {
   2434      1.17  augustss 		/* If we're dying, just do the software part. */
   2435      1.17  augustss 		s = splusb();
   2436      1.17  augustss 		xfer->status = status;	/* make software ignore it */
   2437      1.17  augustss 		usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2438      1.17  augustss 		usb_transfer_complete(xfer);
   2439      1.17  augustss 		splx(s);
   2440      1.17  augustss 		return;
   2441      1.17  augustss 	}
   2442      1.17  augustss 
   2443      1.10  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2444      1.37    provos 		panic("ehci_abort_xfer: not in process context");
   2445      1.10  augustss 
   2446      1.11  augustss 	/*
   2447      1.11  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2448      1.11  augustss 	 */
   2449      1.11  augustss 	s = splusb();
   2450      1.11  augustss 	xfer->status = status;	/* make software ignore it */
   2451      1.15  augustss 	usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2452      1.26  augustss 	qhstatus = sqh->qh.qh_qtd.qtd_status;
   2453      1.26  augustss 	sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
   2454      1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2455      1.26  augustss 		sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
   2456      1.26  augustss 		if (sqtd == exfer->sqtdend)
   2457      1.26  augustss 			break;
   2458      1.26  augustss 	}
   2459      1.11  augustss 	splx(s);
   2460      1.11  augustss 
   2461      1.33  augustss 	/*
   2462      1.11  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2463      1.11  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2464      1.11  augustss 	 * has run.
   2465      1.11  augustss 	 */
   2466      1.26  augustss 	ehci_sync_hc(sc);
   2467      1.29  augustss 	s = splusb();
   2468  1.47.2.4     skrll #ifdef USB_USE_SOFTINTR
   2469      1.29  augustss 	sc->sc_softwake = 1;
   2470  1.47.2.4     skrll #endif /* USB_USE_SOFTINTR */
   2471      1.29  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2472  1.47.2.4     skrll #ifdef USB_USE_SOFTINTR
   2473      1.29  augustss 	tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
   2474  1.47.2.4     skrll #endif /* USB_USE_SOFTINTR */
   2475      1.29  augustss 	splx(s);
   2476      1.33  augustss 
   2477      1.33  augustss 	/*
   2478      1.11  augustss 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2479      1.11  augustss 	 * The complication here is that the hardware may have executed
   2480      1.11  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2481      1.11  augustss 	 * the TDs of this xfer we check if the hardware points to
   2482      1.11  augustss 	 * any of them.
   2483      1.11  augustss 	 */
   2484      1.11  augustss 	s = splusb();		/* XXX why? */
   2485      1.26  augustss 	cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
   2486      1.26  augustss 	hit = 0;
   2487      1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2488      1.26  augustss 		hit |= cur == sqtd->physaddr;
   2489      1.26  augustss 		if (sqtd == exfer->sqtdend)
   2490      1.26  augustss 			break;
   2491      1.26  augustss 	}
   2492      1.26  augustss 	sqtd = sqtd->nextqtd;
   2493      1.26  augustss 	/* Zap curqtd register if hardware pointed inside the xfer. */
   2494      1.26  augustss 	if (hit && sqtd != NULL) {
   2495      1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
   2496      1.26  augustss 		sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
   2497      1.26  augustss 		sqh->qh.qh_qtd.qtd_status = qhstatus;
   2498      1.26  augustss 	} else {
   2499      1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
   2500      1.26  augustss 	}
   2501      1.11  augustss 
   2502      1.11  augustss 	/*
   2503      1.26  augustss 	 * Step 4: Execute callback.
   2504      1.11  augustss 	 */
   2505      1.18  augustss #ifdef DIAGNOSTIC
   2506      1.26  augustss 	exfer->isdone = 1;
   2507      1.18  augustss #endif
   2508      1.11  augustss 	usb_transfer_complete(xfer);
   2509      1.11  augustss 
   2510      1.11  augustss 	splx(s);
   2511      1.26  augustss #undef exfer
   2512      1.10  augustss }
   2513      1.10  augustss 
   2514      1.15  augustss void
   2515      1.15  augustss ehci_timeout(void *addr)
   2516      1.15  augustss {
   2517      1.15  augustss 	struct ehci_xfer *exfer = addr;
   2518      1.17  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
   2519      1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2520      1.15  augustss 
   2521      1.15  augustss 	DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
   2522      1.22  augustss #ifdef USB_DEBUG
   2523      1.26  augustss 	if (ehcidebug > 1)
   2524      1.22  augustss 		usbd_dump_pipe(exfer->xfer.pipe);
   2525      1.22  augustss #endif
   2526      1.15  augustss 
   2527      1.17  augustss 	if (sc->sc_dying) {
   2528      1.17  augustss 		ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
   2529      1.17  augustss 		return;
   2530      1.17  augustss 	}
   2531      1.17  augustss 
   2532      1.15  augustss 	/* Execute the abort in a process context. */
   2533      1.15  augustss 	usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
   2534      1.15  augustss 	usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
   2535      1.15  augustss }
   2536      1.15  augustss 
   2537      1.15  augustss void
   2538      1.15  augustss ehci_timeout_task(void *addr)
   2539      1.15  augustss {
   2540      1.15  augustss 	usbd_xfer_handle xfer = addr;
   2541      1.15  augustss 	int s;
   2542      1.15  augustss 
   2543      1.15  augustss 	DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
   2544      1.15  augustss 
   2545      1.15  augustss 	s = splusb();
   2546      1.15  augustss 	ehci_abort_xfer(xfer, USBD_TIMEOUT);
   2547      1.15  augustss 	splx(s);
   2548      1.15  augustss }
   2549      1.15  augustss 
   2550       1.5  augustss /************************/
   2551       1.5  augustss 
   2552      1.10  augustss Static usbd_status
   2553      1.10  augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2554      1.10  augustss {
   2555      1.10  augustss 	usbd_status err;
   2556      1.10  augustss 
   2557      1.10  augustss 	/* Insert last in queue. */
   2558      1.10  augustss 	err = usb_insert_transfer(xfer);
   2559      1.10  augustss 	if (err)
   2560      1.10  augustss 		return (err);
   2561      1.10  augustss 
   2562      1.10  augustss 	/* Pipe isn't running, start first */
   2563      1.10  augustss 	return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2564      1.10  augustss }
   2565      1.10  augustss 
   2566      1.12  augustss Static usbd_status
   2567      1.12  augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
   2568      1.12  augustss {
   2569      1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2570      1.15  augustss 	usbd_status err;
   2571      1.15  augustss 
   2572      1.15  augustss 	if (sc->sc_dying)
   2573      1.15  augustss 		return (USBD_IOERROR);
   2574      1.15  augustss 
   2575      1.15  augustss #ifdef DIAGNOSTIC
   2576      1.15  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2577      1.15  augustss 		/* XXX panic */
   2578      1.15  augustss 		printf("ehci_device_ctrl_transfer: not a request\n");
   2579      1.15  augustss 		return (USBD_INVAL);
   2580      1.15  augustss 	}
   2581      1.15  augustss #endif
   2582      1.15  augustss 
   2583      1.15  augustss 	err = ehci_device_request(xfer);
   2584      1.15  augustss 	if (err)
   2585      1.15  augustss 		return (err);
   2586      1.15  augustss 
   2587      1.15  augustss 	if (sc->sc_bus.use_polling)
   2588      1.15  augustss 		ehci_waitintr(sc, xfer);
   2589      1.15  augustss 	return (USBD_IN_PROGRESS);
   2590      1.12  augustss }
   2591      1.10  augustss 
   2592      1.10  augustss void
   2593      1.10  augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
   2594      1.10  augustss {
   2595      1.18  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   2596      1.18  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2597      1.25  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   2598      1.18  augustss 
   2599      1.10  augustss 	DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
   2600      1.10  augustss 
   2601      1.10  augustss #ifdef DIAGNOSTIC
   2602      1.10  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2603      1.37    provos 		panic("ehci_ctrl_done: not a request");
   2604      1.10  augustss 	}
   2605      1.10  augustss #endif
   2606      1.18  augustss 
   2607      1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   2608      1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   2609      1.25  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   2610      1.25  augustss 	}
   2611      1.18  augustss 
   2612      1.25  augustss 	DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
   2613      1.10  augustss }
   2614      1.10  augustss 
   2615      1.10  augustss /* Abort a device control request. */
   2616      1.10  augustss Static void
   2617      1.10  augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
   2618      1.10  augustss {
   2619      1.10  augustss 	DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
   2620      1.10  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2621      1.10  augustss }
   2622      1.10  augustss 
   2623      1.10  augustss /* Close a device control pipe. */
   2624      1.10  augustss Static void
   2625      1.10  augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
   2626      1.10  augustss {
   2627      1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2628      1.10  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
   2629      1.10  augustss 
   2630      1.10  augustss 	DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
   2631      1.11  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2632      1.15  augustss }
   2633      1.15  augustss 
   2634      1.15  augustss usbd_status
   2635      1.15  augustss ehci_device_request(usbd_xfer_handle xfer)
   2636      1.15  augustss {
   2637      1.18  augustss #define exfer EXFER(xfer)
   2638      1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2639      1.15  augustss 	usb_device_request_t *req = &xfer->request;
   2640      1.15  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2641      1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2642      1.15  augustss 	int addr = dev->address;
   2643      1.15  augustss 	ehci_soft_qtd_t *setup, *stat, *next;
   2644      1.15  augustss 	ehci_soft_qh_t *sqh;
   2645      1.15  augustss 	int isread;
   2646      1.15  augustss 	int len;
   2647      1.15  augustss 	usbd_status err;
   2648      1.15  augustss 	int s;
   2649      1.15  augustss 
   2650      1.15  augustss 	isread = req->bmRequestType & UT_READ;
   2651      1.15  augustss 	len = UGETW(req->wLength);
   2652      1.15  augustss 
   2653  1.47.2.4     skrll 	DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
   2654      1.15  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2655      1.15  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2656      1.33  augustss 		    UGETW(req->wIndex), len, addr,
   2657      1.15  augustss 		    epipe->pipe.endpoint->edesc->bEndpointAddress));
   2658      1.15  augustss 
   2659      1.15  augustss 	setup = ehci_alloc_sqtd(sc);
   2660      1.15  augustss 	if (setup == NULL) {
   2661      1.15  augustss 		err = USBD_NOMEM;
   2662      1.15  augustss 		goto bad1;
   2663      1.15  augustss 	}
   2664      1.15  augustss 	stat = ehci_alloc_sqtd(sc);
   2665      1.15  augustss 	if (stat == NULL) {
   2666      1.15  augustss 		err = USBD_NOMEM;
   2667      1.15  augustss 		goto bad2;
   2668      1.15  augustss 	}
   2669      1.15  augustss 
   2670      1.15  augustss 	sqh = epipe->sqh;
   2671      1.15  augustss 	epipe->u.ctl.length = len;
   2672      1.15  augustss 
   2673  1.47.2.1     skrll 	/* Update device address and length since they may have changed
   2674  1.47.2.1     skrll 	   during the setup of the control pipe in usbd_new_device(). */
   2675      1.15  augustss 	/* XXX This only needs to be done once, but it's too early in open. */
   2676      1.15  augustss 	/* XXXX Should not touch ED here! */
   2677      1.33  augustss 	sqh->qh.qh_endp =
   2678  1.47.2.1     skrll 	    (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
   2679      1.15  augustss 	    htole32(
   2680      1.15  augustss 	     EHCI_QH_SET_ADDR(addr) |
   2681      1.15  augustss 	     EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
   2682      1.15  augustss 	    );
   2683      1.15  augustss 
   2684      1.15  augustss 	/* Set up data transaction */
   2685      1.15  augustss 	if (len != 0) {
   2686      1.15  augustss 		ehci_soft_qtd_t *end;
   2687      1.15  augustss 
   2688  1.47.2.1     skrll 		/* Start toggle at 1. */
   2689  1.47.2.1     skrll 		epipe->nexttoggle = 1;
   2690      1.25  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   2691      1.15  augustss 			  &next, &end);
   2692      1.15  augustss 		if (err)
   2693      1.15  augustss 			goto bad3;
   2694  1.47.2.4     skrll 		end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
   2695      1.15  augustss 		end->nextqtd = stat;
   2696      1.33  augustss 		end->qtd.qtd_next =
   2697      1.15  augustss 		end->qtd.qtd_altnext = htole32(stat->physaddr);
   2698      1.15  augustss 	} else {
   2699      1.15  augustss 		next = stat;
   2700      1.15  augustss 	}
   2701      1.15  augustss 
   2702      1.30  augustss 	memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
   2703      1.15  augustss 
   2704  1.47.2.1     skrll 	/* Clear toggle */
   2705      1.15  augustss 	setup->qtd.qtd_status = htole32(
   2706      1.26  augustss 	    EHCI_QTD_ACTIVE |
   2707      1.15  augustss 	    EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
   2708      1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2709  1.47.2.1     skrll 	    EHCI_QTD_SET_TOGGLE(0) |
   2710      1.15  augustss 	    EHCI_QTD_SET_BYTES(sizeof *req)
   2711      1.15  augustss 	    );
   2712      1.31  augustss 	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
   2713  1.47.2.1     skrll 	setup->qtd.qtd_buffer_hi[0] = 0;
   2714      1.15  augustss 	setup->nextqtd = next;
   2715      1.15  augustss 	setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
   2716      1.15  augustss 	setup->xfer = xfer;
   2717      1.18  augustss 	setup->len = sizeof *req;
   2718      1.15  augustss 
   2719      1.15  augustss 	stat->qtd.qtd_status = htole32(
   2720      1.26  augustss 	    EHCI_QTD_ACTIVE |
   2721      1.15  augustss 	    EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
   2722      1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2723  1.47.2.1     skrll 	    EHCI_QTD_SET_TOGGLE(1) |
   2724      1.15  augustss 	    EHCI_QTD_IOC
   2725      1.15  augustss 	    );
   2726      1.15  augustss 	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
   2727  1.47.2.1     skrll 	stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
   2728      1.15  augustss 	stat->nextqtd = NULL;
   2729      1.15  augustss 	stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
   2730      1.15  augustss 	stat->xfer = xfer;
   2731      1.18  augustss 	stat->len = 0;
   2732      1.15  augustss 
   2733      1.15  augustss #ifdef EHCI_DEBUG
   2734      1.23  augustss 	if (ehcidebug > 5) {
   2735      1.15  augustss 		DPRINTF(("ehci_device_request:\n"));
   2736      1.15  augustss 		ehci_dump_sqh(sqh);
   2737      1.15  augustss 		ehci_dump_sqtds(setup);
   2738      1.15  augustss 	}
   2739      1.15  augustss #endif
   2740      1.15  augustss 
   2741      1.18  augustss 	exfer->sqtdstart = setup;
   2742      1.18  augustss 	exfer->sqtdend = stat;
   2743      1.18  augustss #ifdef DIAGNOSTIC
   2744      1.18  augustss 	if (!exfer->isdone) {
   2745      1.18  augustss 		printf("ehci_device_request: not done, exfer=%p\n", exfer);
   2746      1.18  augustss 	}
   2747      1.18  augustss 	exfer->isdone = 0;
   2748      1.18  augustss #endif
   2749      1.18  augustss 
   2750      1.15  augustss 	/* Insert qTD in QH list. */
   2751      1.15  augustss 	s = splusb();
   2752      1.23  augustss 	ehci_set_qh_qtd(sqh, setup);
   2753      1.15  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2754      1.45   tsutsui                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2755      1.15  augustss 			    ehci_timeout, xfer);
   2756      1.15  augustss 	}
   2757      1.18  augustss 	ehci_add_intr_list(sc, exfer);
   2758      1.18  augustss 	xfer->status = USBD_IN_PROGRESS;
   2759      1.15  augustss 	splx(s);
   2760      1.15  augustss 
   2761      1.17  augustss #ifdef EHCI_DEBUG
   2762      1.15  augustss 	if (ehcidebug > 10) {
   2763      1.15  augustss 		DPRINTF(("ehci_device_request: status=%x\n",
   2764      1.15  augustss 			 EOREAD4(sc, EHCI_USBSTS)));
   2765      1.23  augustss 		delay(10000);
   2766      1.18  augustss 		ehci_dump_regs(sc);
   2767      1.15  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2768      1.15  augustss 		ehci_dump_sqh(sqh);
   2769      1.15  augustss 		ehci_dump_sqtds(setup);
   2770      1.15  augustss 	}
   2771      1.15  augustss #endif
   2772      1.15  augustss 
   2773      1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2774      1.15  augustss 
   2775      1.15  augustss  bad3:
   2776      1.15  augustss 	ehci_free_sqtd(sc, stat);
   2777      1.15  augustss  bad2:
   2778      1.15  augustss 	ehci_free_sqtd(sc, setup);
   2779      1.15  augustss  bad1:
   2780      1.25  augustss 	DPRINTFN(-1,("ehci_device_request: no memory\n"));
   2781      1.25  augustss 	xfer->status = err;
   2782      1.25  augustss 	usb_transfer_complete(xfer);
   2783      1.15  augustss 	return (err);
   2784      1.18  augustss #undef exfer
   2785      1.10  augustss }
   2786      1.10  augustss 
   2787      1.10  augustss /************************/
   2788       1.5  augustss 
   2789      1.19  augustss Static usbd_status
   2790      1.19  augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
   2791      1.19  augustss {
   2792      1.19  augustss 	usbd_status err;
   2793      1.19  augustss 
   2794      1.19  augustss 	/* Insert last in queue. */
   2795      1.19  augustss 	err = usb_insert_transfer(xfer);
   2796      1.19  augustss 	if (err)
   2797      1.19  augustss 		return (err);
   2798      1.19  augustss 
   2799      1.19  augustss 	/* Pipe isn't running, start first */
   2800      1.19  augustss 	return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2801      1.19  augustss }
   2802      1.19  augustss 
   2803      1.19  augustss usbd_status
   2804      1.19  augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
   2805      1.19  augustss {
   2806      1.19  augustss #define exfer EXFER(xfer)
   2807      1.19  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2808      1.19  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2809      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2810      1.19  augustss 	ehci_soft_qtd_t *data, *dataend;
   2811      1.19  augustss 	ehci_soft_qh_t *sqh;
   2812      1.19  augustss 	usbd_status err;
   2813      1.19  augustss 	int len, isread, endpt;
   2814      1.19  augustss 	int s;
   2815      1.19  augustss 
   2816  1.47.2.4     skrll 	DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
   2817      1.19  augustss 		     xfer, xfer->length, xfer->flags));
   2818      1.19  augustss 
   2819      1.19  augustss 	if (sc->sc_dying)
   2820      1.19  augustss 		return (USBD_IOERROR);
   2821      1.19  augustss 
   2822      1.19  augustss #ifdef DIAGNOSTIC
   2823      1.19  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2824  1.47.2.4     skrll 		panic("ehci_device_bulk_start: a request");
   2825      1.19  augustss #endif
   2826      1.19  augustss 
   2827      1.19  augustss 	len = xfer->length;
   2828      1.19  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   2829      1.19  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2830      1.19  augustss 	sqh = epipe->sqh;
   2831      1.19  augustss 
   2832      1.19  augustss 	epipe->u.bulk.length = len;
   2833      1.19  augustss 
   2834      1.25  augustss 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   2835      1.19  augustss 				   &dataend);
   2836      1.25  augustss 	if (err) {
   2837      1.25  augustss 		DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
   2838      1.25  augustss 		xfer->status = err;
   2839      1.25  augustss 		usb_transfer_complete(xfer);
   2840      1.19  augustss 		return (err);
   2841      1.25  augustss 	}
   2842      1.19  augustss 
   2843      1.19  augustss #ifdef EHCI_DEBUG
   2844      1.23  augustss 	if (ehcidebug > 5) {
   2845  1.47.2.4     skrll 		DPRINTF(("ehci_device_bulk_start: data(1)\n"));
   2846      1.23  augustss 		ehci_dump_sqh(sqh);
   2847      1.19  augustss 		ehci_dump_sqtds(data);
   2848      1.19  augustss 	}
   2849      1.19  augustss #endif
   2850      1.19  augustss 
   2851      1.19  augustss 	/* Set up interrupt info. */
   2852      1.19  augustss 	exfer->sqtdstart = data;
   2853      1.19  augustss 	exfer->sqtdend = dataend;
   2854      1.19  augustss #ifdef DIAGNOSTIC
   2855      1.19  augustss 	if (!exfer->isdone) {
   2856  1.47.2.4     skrll 		printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
   2857      1.19  augustss 	}
   2858      1.19  augustss 	exfer->isdone = 0;
   2859      1.19  augustss #endif
   2860      1.19  augustss 
   2861      1.19  augustss 	s = splusb();
   2862      1.23  augustss 	ehci_set_qh_qtd(sqh, data);
   2863      1.19  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2864      1.45   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2865      1.19  augustss 			    ehci_timeout, xfer);
   2866      1.19  augustss 	}
   2867      1.19  augustss 	ehci_add_intr_list(sc, exfer);
   2868      1.19  augustss 	xfer->status = USBD_IN_PROGRESS;
   2869      1.19  augustss 	splx(s);
   2870      1.19  augustss 
   2871      1.19  augustss #ifdef EHCI_DEBUG
   2872      1.19  augustss 	if (ehcidebug > 10) {
   2873  1.47.2.4     skrll 		DPRINTF(("ehci_device_bulk_start: data(2)\n"));
   2874      1.23  augustss 		delay(10000);
   2875  1.47.2.4     skrll 		DPRINTF(("ehci_device_bulk_start: data(3)\n"));
   2876      1.23  augustss 		ehci_dump_regs(sc);
   2877      1.29  augustss #if 0
   2878      1.29  augustss 		printf("async_head:\n");
   2879      1.23  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2880      1.29  augustss #endif
   2881      1.29  augustss 		printf("sqh:\n");
   2882      1.23  augustss 		ehci_dump_sqh(sqh);
   2883      1.19  augustss 		ehci_dump_sqtds(data);
   2884      1.19  augustss 	}
   2885      1.19  augustss #endif
   2886      1.19  augustss 
   2887      1.19  augustss 	if (sc->sc_bus.use_polling)
   2888      1.19  augustss 		ehci_waitintr(sc, xfer);
   2889      1.19  augustss 
   2890      1.19  augustss 	return (USBD_IN_PROGRESS);
   2891      1.19  augustss #undef exfer
   2892      1.19  augustss }
   2893      1.19  augustss 
   2894      1.19  augustss Static void
   2895      1.19  augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
   2896      1.19  augustss {
   2897      1.19  augustss 	DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
   2898      1.19  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2899      1.19  augustss }
   2900      1.19  augustss 
   2901      1.33  augustss /*
   2902      1.19  augustss  * Close a device bulk pipe.
   2903      1.19  augustss  */
   2904      1.19  augustss Static void
   2905      1.19  augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
   2906      1.19  augustss {
   2907      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2908      1.19  augustss 
   2909      1.19  augustss 	DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
   2910      1.19  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2911      1.19  augustss }
   2912      1.19  augustss 
   2913      1.19  augustss void
   2914      1.19  augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
   2915      1.19  augustss {
   2916      1.19  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   2917      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2918      1.19  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   2919      1.19  augustss 
   2920      1.33  augustss 	DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
   2921      1.19  augustss 		     xfer, xfer->actlen));
   2922      1.19  augustss 
   2923      1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   2924      1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   2925      1.44  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   2926      1.25  augustss 	}
   2927      1.19  augustss 
   2928      1.19  augustss 	DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
   2929      1.19  augustss }
   2930       1.5  augustss 
   2931      1.10  augustss /************************/
   2932      1.10  augustss 
   2933  1.47.2.4     skrll Static usbd_status
   2934  1.47.2.4     skrll ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
   2935  1.47.2.4     skrll {
   2936  1.47.2.4     skrll 	struct ehci_soft_islot *isp;
   2937  1.47.2.4     skrll 	int islot, lev;
   2938  1.47.2.4     skrll 
   2939  1.47.2.4     skrll 	/* Find a poll rate that is large enough. */
   2940  1.47.2.4     skrll 	for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
   2941  1.47.2.4     skrll 		if (EHCI_ILEV_IVAL(lev) <= ival)
   2942  1.47.2.4     skrll 			break;
   2943  1.47.2.4     skrll 
   2944  1.47.2.4     skrll 	/* Pick an interrupt slot at the right level. */
   2945  1.47.2.4     skrll 	/* XXX could do better than picking at random */
   2946  1.47.2.4     skrll 	sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
   2947  1.47.2.4     skrll 	islot = EHCI_IQHIDX(lev, sc->sc_rand);
   2948  1.47.2.4     skrll 
   2949  1.47.2.4     skrll 	sqh->islot = islot;
   2950  1.47.2.4     skrll 	isp = &sc->sc_islots[islot];
   2951  1.47.2.4     skrll 	ehci_add_qh(sqh, isp->sqh);
   2952  1.47.2.4     skrll 
   2953  1.47.2.4     skrll 	return (USBD_NORMAL_COMPLETION);
   2954  1.47.2.4     skrll }
   2955  1.47.2.4     skrll 
   2956  1.47.2.4     skrll Static usbd_status
   2957  1.47.2.4     skrll ehci_device_intr_transfer(usbd_xfer_handle xfer)
   2958  1.47.2.4     skrll {
   2959  1.47.2.4     skrll 	usbd_status err;
   2960  1.47.2.4     skrll 
   2961  1.47.2.4     skrll 	/* Insert last in queue. */
   2962  1.47.2.4     skrll 	err = usb_insert_transfer(xfer);
   2963  1.47.2.4     skrll 	if (err)
   2964  1.47.2.4     skrll 		return (err);
   2965  1.47.2.4     skrll 
   2966  1.47.2.4     skrll 	/*
   2967  1.47.2.4     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2968  1.47.2.4     skrll 	 * so start it first.
   2969  1.47.2.4     skrll 	 */
   2970  1.47.2.4     skrll 	return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2971  1.47.2.4     skrll }
   2972  1.47.2.4     skrll 
   2973  1.47.2.4     skrll Static usbd_status
   2974  1.47.2.4     skrll ehci_device_intr_start(usbd_xfer_handle xfer)
   2975  1.47.2.4     skrll {
   2976  1.47.2.4     skrll #define exfer EXFER(xfer)
   2977  1.47.2.4     skrll 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2978  1.47.2.4     skrll 	usbd_device_handle dev = xfer->pipe->device;
   2979  1.47.2.4     skrll 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2980  1.47.2.4     skrll 	ehci_soft_qtd_t *data, *dataend;
   2981  1.47.2.4     skrll 	ehci_soft_qh_t *sqh;
   2982  1.47.2.4     skrll 	usbd_status err;
   2983  1.47.2.4     skrll 	int len, isread, endpt;
   2984  1.47.2.4     skrll 	int s;
   2985  1.47.2.4     skrll 
   2986  1.47.2.4     skrll 	DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
   2987  1.47.2.4     skrll 	    xfer, xfer->length, xfer->flags));
   2988  1.47.2.4     skrll 
   2989  1.47.2.4     skrll 	if (sc->sc_dying)
   2990  1.47.2.4     skrll 		return (USBD_IOERROR);
   2991  1.47.2.4     skrll 
   2992  1.47.2.4     skrll #ifdef DIAGNOSTIC
   2993  1.47.2.4     skrll 	if (xfer->rqflags & URQ_REQUEST)
   2994  1.47.2.4     skrll 		panic("ehci_device_intr_start: a request");
   2995  1.47.2.4     skrll #endif
   2996  1.47.2.4     skrll 
   2997  1.47.2.4     skrll 	len = xfer->length;
   2998  1.47.2.4     skrll 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   2999  1.47.2.4     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3000  1.47.2.4     skrll 	sqh = epipe->sqh;
   3001  1.47.2.4     skrll 
   3002  1.47.2.4     skrll 	epipe->u.intr.length = len;
   3003  1.47.2.4     skrll 
   3004  1.47.2.4     skrll 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   3005  1.47.2.4     skrll 	    &dataend);
   3006  1.47.2.4     skrll 	if (err) {
   3007  1.47.2.4     skrll 		DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
   3008  1.47.2.4     skrll 		xfer->status = err;
   3009  1.47.2.4     skrll 		usb_transfer_complete(xfer);
   3010  1.47.2.4     skrll 		return (err);
   3011  1.47.2.4     skrll 	}
   3012  1.47.2.4     skrll 
   3013  1.47.2.4     skrll #ifdef EHCI_DEBUG
   3014  1.47.2.4     skrll 	if (ehcidebug > 5) {
   3015  1.47.2.4     skrll 		DPRINTF(("ehci_device_intr_start: data(1)\n"));
   3016  1.47.2.4     skrll 		ehci_dump_sqh(sqh);
   3017  1.47.2.4     skrll 		ehci_dump_sqtds(data);
   3018  1.47.2.4     skrll 	}
   3019  1.47.2.4     skrll #endif
   3020  1.47.2.4     skrll 
   3021  1.47.2.4     skrll 	/* Set up interrupt info. */
   3022  1.47.2.4     skrll 	exfer->sqtdstart = data;
   3023  1.47.2.4     skrll 	exfer->sqtdend = dataend;
   3024  1.47.2.4     skrll #ifdef DIAGNOSTIC
   3025  1.47.2.4     skrll 	if (!exfer->isdone) {
   3026  1.47.2.4     skrll 		printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
   3027  1.47.2.4     skrll 	}
   3028  1.47.2.4     skrll 	exfer->isdone = 0;
   3029  1.47.2.4     skrll #endif
   3030  1.47.2.4     skrll 
   3031  1.47.2.4     skrll 	s = splusb();
   3032  1.47.2.4     skrll 	ehci_set_qh_qtd(sqh, data);
   3033  1.47.2.4     skrll 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3034  1.47.2.4     skrll 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   3035  1.47.2.4     skrll 		    ehci_timeout, xfer);
   3036  1.47.2.4     skrll 	}
   3037  1.47.2.4     skrll 	ehci_add_intr_list(sc, exfer);
   3038  1.47.2.4     skrll 	xfer->status = USBD_IN_PROGRESS;
   3039  1.47.2.4     skrll 	splx(s);
   3040  1.47.2.4     skrll 
   3041  1.47.2.4     skrll #ifdef EHCI_DEBUG
   3042  1.47.2.4     skrll 	if (ehcidebug > 10) {
   3043  1.47.2.4     skrll 		DPRINTF(("ehci_device_intr_start: data(2)\n"));
   3044  1.47.2.4     skrll 		delay(10000);
   3045  1.47.2.4     skrll 		DPRINTF(("ehci_device_intr_start: data(3)\n"));
   3046  1.47.2.4     skrll 		ehci_dump_regs(sc);
   3047  1.47.2.4     skrll 		printf("sqh:\n");
   3048  1.47.2.4     skrll 		ehci_dump_sqh(sqh);
   3049  1.47.2.4     skrll 		ehci_dump_sqtds(data);
   3050  1.47.2.4     skrll 	}
   3051  1.47.2.4     skrll #endif
   3052  1.47.2.4     skrll 
   3053  1.47.2.4     skrll 	if (sc->sc_bus.use_polling)
   3054  1.47.2.4     skrll 		ehci_waitintr(sc, xfer);
   3055  1.47.2.4     skrll 
   3056  1.47.2.4     skrll 	return (USBD_IN_PROGRESS);
   3057  1.47.2.4     skrll #undef exfer
   3058  1.47.2.4     skrll }
   3059  1.47.2.4     skrll 
   3060  1.47.2.4     skrll Static void
   3061  1.47.2.4     skrll ehci_device_intr_abort(usbd_xfer_handle xfer)
   3062  1.47.2.4     skrll {
   3063  1.47.2.4     skrll 	DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
   3064  1.47.2.4     skrll 	if (xfer->pipe->intrxfer == xfer) {
   3065  1.47.2.4     skrll 		DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
   3066  1.47.2.4     skrll 		xfer->pipe->intrxfer = NULL;
   3067  1.47.2.4     skrll 	}
   3068  1.47.2.4     skrll 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   3069  1.47.2.4     skrll }
   3070  1.47.2.4     skrll 
   3071  1.47.2.4     skrll Static void
   3072  1.47.2.4     skrll ehci_device_intr_close(usbd_pipe_handle pipe)
   3073  1.47.2.4     skrll {
   3074  1.47.2.4     skrll 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   3075  1.47.2.4     skrll 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   3076  1.47.2.4     skrll 	struct ehci_soft_islot *isp;
   3077  1.47.2.4     skrll 
   3078  1.47.2.4     skrll 	isp = &sc->sc_islots[epipe->sqh->islot];
   3079  1.47.2.4     skrll 	ehci_close_pipe(pipe, isp->sqh);
   3080  1.47.2.4     skrll }
   3081  1.47.2.4     skrll 
   3082  1.47.2.4     skrll Static void
   3083  1.47.2.4     skrll ehci_device_intr_done(usbd_xfer_handle xfer)
   3084  1.47.2.4     skrll {
   3085  1.47.2.4     skrll #define exfer EXFER(xfer)
   3086  1.47.2.4     skrll 	struct ehci_xfer *ex = EXFER(xfer);
   3087  1.47.2.4     skrll 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3088  1.47.2.4     skrll 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3089  1.47.2.4     skrll 	ehci_soft_qtd_t *data, *dataend;
   3090  1.47.2.4     skrll 	ehci_soft_qh_t *sqh;
   3091  1.47.2.4     skrll 	usbd_status err;
   3092  1.47.2.4     skrll 	int len, isread, endpt, s;
   3093  1.47.2.4     skrll 
   3094  1.47.2.4     skrll 	DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
   3095  1.47.2.4     skrll 	    xfer, xfer->actlen));
   3096  1.47.2.4     skrll 
   3097  1.47.2.4     skrll 	if (xfer->pipe->repeat) {
   3098  1.47.2.4     skrll 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3099  1.47.2.4     skrll 
   3100  1.47.2.4     skrll 		len = epipe->u.intr.length;
   3101  1.47.2.4     skrll 		xfer->length = len;
   3102  1.47.2.4     skrll 		endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3103  1.47.2.4     skrll 		isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3104  1.47.2.4     skrll 		sqh = epipe->sqh;
   3105  1.47.2.4     skrll 
   3106  1.47.2.4     skrll 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3107  1.47.2.4     skrll 		    &data, &dataend);
   3108  1.47.2.4     skrll 		if (err) {
   3109  1.47.2.4     skrll 			DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
   3110  1.47.2.4     skrll 			xfer->status = err;
   3111  1.47.2.4     skrll 			return;
   3112  1.47.2.4     skrll 		}
   3113  1.47.2.4     skrll 
   3114  1.47.2.4     skrll 		/* Set up interrupt info. */
   3115  1.47.2.4     skrll 		exfer->sqtdstart = data;
   3116  1.47.2.4     skrll 		exfer->sqtdend = dataend;
   3117  1.47.2.4     skrll #ifdef DIAGNOSTIC
   3118  1.47.2.4     skrll 		if (!exfer->isdone) {
   3119  1.47.2.4     skrll 			printf("ehci_device_intr_done: not done, ex=%p\n",
   3120  1.47.2.4     skrll 			    exfer);
   3121  1.47.2.4     skrll 		}
   3122  1.47.2.4     skrll 		exfer->isdone = 0;
   3123  1.47.2.4     skrll #endif
   3124  1.47.2.4     skrll 
   3125  1.47.2.4     skrll 		s = splusb();
   3126  1.47.2.4     skrll 		ehci_set_qh_qtd(sqh, data);
   3127  1.47.2.4     skrll 		if (xfer->timeout && !sc->sc_bus.use_polling) {
   3128  1.47.2.4     skrll 			usb_callout(xfer->timeout_handle,
   3129  1.47.2.4     skrll 			    mstohz(xfer->timeout), ehci_timeout, xfer);
   3130  1.47.2.4     skrll 		}
   3131  1.47.2.4     skrll 		splx(s);
   3132  1.47.2.4     skrll 
   3133  1.47.2.4     skrll 		xfer->status = USBD_IN_PROGRESS;
   3134  1.47.2.4     skrll 	} else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3135  1.47.2.4     skrll 		ehci_del_intr_list(ex); /* remove from active list */
   3136  1.47.2.4     skrll 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3137  1.47.2.4     skrll 	}
   3138  1.47.2.4     skrll #undef exfer
   3139  1.47.2.4     skrll }
   3140      1.10  augustss 
   3141      1.10  augustss /************************/
   3142       1.5  augustss 
   3143       1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   3144       1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   3145       1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
   3146       1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle pipe) { }
   3147       1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle xfer) { }
   3148