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ehci.c revision 1.47.2.9
      1  1.47.2.9  christos /*	$NetBSD: ehci.c,v 1.47.2.9 2005/12/11 10:29:05 christos Exp $ */
      2      1.29  augustss 
      3      1.29  augustss /*
      4  1.47.2.8     skrll  * Copyright (c) 2004,2005 The NetBSD Foundation, Inc.
      5       1.1  augustss  * All rights reserved.
      6       1.1  augustss  *
      7       1.1  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8  1.47.2.1     skrll  * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum.
      9       1.1  augustss  *
     10       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     11       1.1  augustss  * modification, are permitted provided that the following conditions
     12       1.1  augustss  * are met:
     13       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     14       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     15       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     17       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     18       1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     19       1.1  augustss  *    must display the following acknowledgement:
     20       1.1  augustss  *        This product includes software developed by the NetBSD
     21       1.1  augustss  *        Foundation, Inc. and its contributors.
     22       1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1  augustss  *    contributors may be used to endorse or promote products derived
     24       1.1  augustss  *    from this software without specific prior written permission.
     25       1.1  augustss  *
     26       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1  augustss  */
     38       1.1  augustss 
     39       1.1  augustss /*
     40       1.3  augustss  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
     41       1.1  augustss  *
     42      1.35     enami  * The EHCI 1.0 spec can be found at
     43      1.34  augustss  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
     44       1.7  augustss  * and the USB 2.0 spec at
     45      1.43    ichiro  * http://www.usb.org/developers/docs/usb_20.zip
     46       1.1  augustss  *
     47       1.1  augustss  */
     48       1.4     lukem 
     49  1.47.2.1     skrll /*
     50  1.47.2.1     skrll  * TODO:
     51  1.47.2.1     skrll  * 1) hold off explorations by companion controllers until ehci has started.
     52  1.47.2.1     skrll  *
     53  1.47.2.8     skrll  * 2) The EHCI driver lacks support for isochronous transfers, so
     54  1.47.2.1     skrll  *    devices using them don't work.
     55  1.47.2.1     skrll  *
     56  1.47.2.8     skrll  * 3) The hub driver needs to handle and schedule the transaction translator,
     57  1.47.2.8     skrll  *    to assign place in frame where different devices get to go. See chapter
     58  1.47.2.7     skrll  *    on hubs in USB 2.0 for details.
     59  1.47.2.1     skrll  *
     60  1.47.2.1     skrll  * 4) command failures are not recovered correctly
     61  1.47.2.1     skrll */
     62  1.47.2.1     skrll 
     63       1.4     lukem #include <sys/cdefs.h>
     64  1.47.2.9  christos __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.47.2.9 2005/12/11 10:29:05 christos Exp $");
     65      1.47  augustss 
     66      1.47  augustss #include "ohci.h"
     67      1.47  augustss #include "uhci.h"
     68       1.1  augustss 
     69       1.1  augustss #include <sys/param.h>
     70       1.1  augustss #include <sys/systm.h>
     71       1.1  augustss #include <sys/kernel.h>
     72       1.1  augustss #include <sys/malloc.h>
     73       1.1  augustss #include <sys/device.h>
     74       1.1  augustss #include <sys/select.h>
     75       1.1  augustss #include <sys/proc.h>
     76       1.1  augustss #include <sys/queue.h>
     77       1.1  augustss 
     78       1.1  augustss #include <machine/bus.h>
     79       1.1  augustss #include <machine/endian.h>
     80       1.1  augustss 
     81       1.1  augustss #include <dev/usb/usb.h>
     82       1.1  augustss #include <dev/usb/usbdi.h>
     83       1.1  augustss #include <dev/usb/usbdivar.h>
     84       1.1  augustss #include <dev/usb/usb_mem.h>
     85       1.1  augustss #include <dev/usb/usb_quirks.h>
     86       1.1  augustss 
     87       1.1  augustss #include <dev/usb/ehcireg.h>
     88       1.1  augustss #include <dev/usb/ehcivar.h>
     89       1.1  augustss 
     90       1.1  augustss #ifdef EHCI_DEBUG
     91  1.47.2.4     skrll #define DPRINTF(x)	do { if (ehcidebug) printf x; } while(0)
     92  1.47.2.4     skrll #define DPRINTFN(n,x)	do { if (ehcidebug>(n)) printf x; } while (0)
     93       1.6  augustss int ehcidebug = 0;
     94      1.15  augustss #ifndef __NetBSD__
     95       1.1  augustss #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
     96      1.15  augustss #endif
     97       1.1  augustss #else
     98       1.1  augustss #define DPRINTF(x)
     99       1.1  augustss #define DPRINTFN(n,x)
    100       1.1  augustss #endif
    101       1.1  augustss 
    102       1.5  augustss struct ehci_pipe {
    103       1.5  augustss 	struct usbd_pipe pipe;
    104  1.47.2.1     skrll 	int nexttoggle;
    105  1.47.2.1     skrll 
    106      1.10  augustss 	ehci_soft_qh_t *sqh;
    107      1.10  augustss 	union {
    108      1.10  augustss 		ehci_soft_qtd_t *qtd;
    109      1.10  augustss 		/* ehci_soft_itd_t *itd; */
    110      1.10  augustss 	} tail;
    111      1.10  augustss 	union {
    112      1.10  augustss 		/* Control pipe */
    113      1.10  augustss 		struct {
    114      1.10  augustss 			usb_dma_t reqdma;
    115      1.10  augustss 			u_int length;
    116      1.10  augustss 		} ctl;
    117      1.10  augustss 		/* Interrupt pipe */
    118  1.47.2.4     skrll 		struct {
    119  1.47.2.4     skrll 			u_int length;
    120  1.47.2.4     skrll 		} intr;
    121      1.10  augustss 		/* Bulk pipe */
    122      1.10  augustss 		struct {
    123      1.10  augustss 			u_int length;
    124      1.10  augustss 		} bulk;
    125      1.10  augustss 		/* Iso pipe */
    126      1.15  augustss 		/* XXX */
    127      1.10  augustss 	} u;
    128       1.5  augustss };
    129       1.5  augustss 
    130       1.5  augustss Static void		ehci_shutdown(void *);
    131       1.5  augustss Static void		ehci_power(int, void *);
    132       1.5  augustss 
    133       1.5  augustss Static usbd_status	ehci_open(usbd_pipe_handle);
    134       1.5  augustss Static void		ehci_poll(struct usbd_bus *);
    135       1.5  augustss Static void		ehci_softintr(void *);
    136      1.11  augustss Static int		ehci_intr1(ehci_softc_t *);
    137      1.15  augustss Static void		ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
    138      1.18  augustss Static void		ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
    139      1.18  augustss Static void		ehci_idone(struct ehci_xfer *);
    140      1.15  augustss Static void		ehci_timeout(void *);
    141      1.15  augustss Static void		ehci_timeout_task(void *);
    142       1.5  augustss 
    143       1.5  augustss Static usbd_status	ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    144       1.5  augustss Static void		ehci_freem(struct usbd_bus *, usb_dma_t *);
    145       1.5  augustss 
    146       1.5  augustss Static usbd_xfer_handle	ehci_allocx(struct usbd_bus *);
    147       1.5  augustss Static void		ehci_freex(struct usbd_bus *, usbd_xfer_handle);
    148       1.5  augustss 
    149       1.5  augustss Static usbd_status	ehci_root_ctrl_transfer(usbd_xfer_handle);
    150       1.5  augustss Static usbd_status	ehci_root_ctrl_start(usbd_xfer_handle);
    151       1.5  augustss Static void		ehci_root_ctrl_abort(usbd_xfer_handle);
    152       1.5  augustss Static void		ehci_root_ctrl_close(usbd_pipe_handle);
    153       1.5  augustss Static void		ehci_root_ctrl_done(usbd_xfer_handle);
    154       1.5  augustss 
    155       1.5  augustss Static usbd_status	ehci_root_intr_transfer(usbd_xfer_handle);
    156       1.5  augustss Static usbd_status	ehci_root_intr_start(usbd_xfer_handle);
    157       1.5  augustss Static void		ehci_root_intr_abort(usbd_xfer_handle);
    158       1.5  augustss Static void		ehci_root_intr_close(usbd_pipe_handle);
    159       1.5  augustss Static void		ehci_root_intr_done(usbd_xfer_handle);
    160       1.5  augustss 
    161       1.5  augustss Static usbd_status	ehci_device_ctrl_transfer(usbd_xfer_handle);
    162       1.5  augustss Static usbd_status	ehci_device_ctrl_start(usbd_xfer_handle);
    163       1.5  augustss Static void		ehci_device_ctrl_abort(usbd_xfer_handle);
    164       1.5  augustss Static void		ehci_device_ctrl_close(usbd_pipe_handle);
    165       1.5  augustss Static void		ehci_device_ctrl_done(usbd_xfer_handle);
    166       1.5  augustss 
    167       1.5  augustss Static usbd_status	ehci_device_bulk_transfer(usbd_xfer_handle);
    168       1.5  augustss Static usbd_status	ehci_device_bulk_start(usbd_xfer_handle);
    169       1.5  augustss Static void		ehci_device_bulk_abort(usbd_xfer_handle);
    170       1.5  augustss Static void		ehci_device_bulk_close(usbd_pipe_handle);
    171       1.5  augustss Static void		ehci_device_bulk_done(usbd_xfer_handle);
    172       1.5  augustss 
    173       1.5  augustss Static usbd_status	ehci_device_intr_transfer(usbd_xfer_handle);
    174       1.5  augustss Static usbd_status	ehci_device_intr_start(usbd_xfer_handle);
    175       1.5  augustss Static void		ehci_device_intr_abort(usbd_xfer_handle);
    176       1.5  augustss Static void		ehci_device_intr_close(usbd_pipe_handle);
    177       1.5  augustss Static void		ehci_device_intr_done(usbd_xfer_handle);
    178       1.5  augustss 
    179       1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle);
    180       1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle);
    181       1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle);
    182       1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle);
    183       1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle);
    184       1.5  augustss 
    185       1.5  augustss Static void		ehci_device_clear_toggle(usbd_pipe_handle pipe);
    186       1.5  augustss Static void		ehci_noop(usbd_pipe_handle pipe);
    187       1.5  augustss 
    188  1.47.2.8     skrll Static int		ehci_str(usb_string_descriptor_t *, int, const char *);
    189       1.6  augustss Static void		ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
    190       1.6  augustss Static void		ehci_pcd_able(ehci_softc_t *, int);
    191       1.6  augustss Static void		ehci_pcd_enable(void *);
    192       1.6  augustss Static void		ehci_disown(ehci_softc_t *, int, int);
    193       1.5  augustss 
    194       1.9  augustss Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
    195       1.9  augustss Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
    196       1.9  augustss 
    197       1.9  augustss Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
    198       1.9  augustss Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
    199      1.25  augustss Static usbd_status	ehci_alloc_sqtd_chain(struct ehci_pipe *,
    200      1.15  augustss 			    ehci_softc_t *, int, int, usbd_xfer_handle,
    201      1.15  augustss 			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
    202      1.25  augustss Static void		ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
    203      1.18  augustss 					    ehci_soft_qtd_t *);
    204      1.15  augustss 
    205      1.15  augustss Static usbd_status	ehci_device_request(usbd_xfer_handle xfer);
    206       1.9  augustss 
    207  1.47.2.4     skrll Static usbd_status	ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
    208  1.47.2.4     skrll 			    int ival);
    209  1.47.2.4     skrll 
    210      1.10  augustss Static void		ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
    211      1.10  augustss Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
    212      1.10  augustss 				    ehci_soft_qh_t *);
    213      1.23  augustss Static void		ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
    214      1.11  augustss Static void		ehci_sync_hc(ehci_softc_t *);
    215      1.10  augustss 
    216      1.10  augustss Static void		ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
    217      1.10  augustss Static void		ehci_abort_xfer(usbd_xfer_handle, usbd_status);
    218       1.9  augustss 
    219       1.5  augustss #ifdef EHCI_DEBUG
    220      1.18  augustss Static void		ehci_dump_regs(ehci_softc_t *);
    221  1.47.2.9  christos void			ehci_dump(void);
    222       1.6  augustss Static ehci_softc_t 	*theehci;
    223      1.15  augustss Static void		ehci_dump_link(ehci_link_t, int);
    224      1.15  augustss Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
    225       1.9  augustss Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
    226       1.9  augustss Static void		ehci_dump_qtd(ehci_qtd_t *);
    227       1.9  augustss Static void		ehci_dump_sqh(ehci_soft_qh_t *);
    228      1.38    martin #ifdef DIAGNOSTIC
    229      1.18  augustss Static void		ehci_dump_exfer(struct ehci_xfer *);
    230       1.5  augustss #endif
    231      1.38    martin #endif
    232       1.5  augustss 
    233      1.11  augustss #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
    234      1.11  augustss 
    235       1.5  augustss #define EHCI_INTR_ENDPT 1
    236       1.5  augustss 
    237      1.18  augustss #define ehci_add_intr_list(sc, ex) \
    238      1.18  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
    239      1.18  augustss #define ehci_del_intr_list(ex) \
    240      1.44  augustss 	do { \
    241      1.44  augustss 		LIST_REMOVE((ex), inext); \
    242      1.44  augustss 		(ex)->inext.le_prev = NULL; \
    243      1.44  augustss 	} while (0)
    244      1.44  augustss #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
    245      1.18  augustss 
    246       1.5  augustss Static struct usbd_bus_methods ehci_bus_methods = {
    247       1.5  augustss 	ehci_open,
    248       1.5  augustss 	ehci_softintr,
    249       1.5  augustss 	ehci_poll,
    250       1.5  augustss 	ehci_allocm,
    251       1.5  augustss 	ehci_freem,
    252       1.5  augustss 	ehci_allocx,
    253       1.5  augustss 	ehci_freex,
    254       1.5  augustss };
    255       1.5  augustss 
    256      1.33  augustss Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
    257       1.5  augustss 	ehci_root_ctrl_transfer,
    258       1.5  augustss 	ehci_root_ctrl_start,
    259       1.5  augustss 	ehci_root_ctrl_abort,
    260       1.5  augustss 	ehci_root_ctrl_close,
    261       1.5  augustss 	ehci_noop,
    262       1.5  augustss 	ehci_root_ctrl_done,
    263       1.5  augustss };
    264       1.5  augustss 
    265      1.33  augustss Static struct usbd_pipe_methods ehci_root_intr_methods = {
    266       1.5  augustss 	ehci_root_intr_transfer,
    267       1.5  augustss 	ehci_root_intr_start,
    268       1.5  augustss 	ehci_root_intr_abort,
    269       1.5  augustss 	ehci_root_intr_close,
    270       1.5  augustss 	ehci_noop,
    271       1.5  augustss 	ehci_root_intr_done,
    272       1.5  augustss };
    273       1.5  augustss 
    274      1.33  augustss Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
    275       1.5  augustss 	ehci_device_ctrl_transfer,
    276       1.5  augustss 	ehci_device_ctrl_start,
    277       1.5  augustss 	ehci_device_ctrl_abort,
    278       1.5  augustss 	ehci_device_ctrl_close,
    279       1.5  augustss 	ehci_noop,
    280       1.5  augustss 	ehci_device_ctrl_done,
    281       1.5  augustss };
    282       1.5  augustss 
    283      1.33  augustss Static struct usbd_pipe_methods ehci_device_intr_methods = {
    284       1.5  augustss 	ehci_device_intr_transfer,
    285       1.5  augustss 	ehci_device_intr_start,
    286       1.5  augustss 	ehci_device_intr_abort,
    287       1.5  augustss 	ehci_device_intr_close,
    288       1.5  augustss 	ehci_device_clear_toggle,
    289       1.5  augustss 	ehci_device_intr_done,
    290       1.5  augustss };
    291       1.5  augustss 
    292      1.33  augustss Static struct usbd_pipe_methods ehci_device_bulk_methods = {
    293       1.5  augustss 	ehci_device_bulk_transfer,
    294       1.5  augustss 	ehci_device_bulk_start,
    295       1.5  augustss 	ehci_device_bulk_abort,
    296       1.5  augustss 	ehci_device_bulk_close,
    297       1.5  augustss 	ehci_device_clear_toggle,
    298       1.5  augustss 	ehci_device_bulk_done,
    299       1.5  augustss };
    300       1.5  augustss 
    301       1.5  augustss Static struct usbd_pipe_methods ehci_device_isoc_methods = {
    302       1.5  augustss 	ehci_device_isoc_transfer,
    303       1.5  augustss 	ehci_device_isoc_start,
    304       1.5  augustss 	ehci_device_isoc_abort,
    305       1.5  augustss 	ehci_device_isoc_close,
    306       1.5  augustss 	ehci_noop,
    307       1.5  augustss 	ehci_device_isoc_done,
    308       1.5  augustss };
    309       1.5  augustss 
    310  1.47.2.8     skrll static uint8_t revbits[EHCI_MAX_POLLRATE] = {
    311  1.47.2.8     skrll 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78,
    312  1.47.2.8     skrll 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c,
    313  1.47.2.8     skrll 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a,
    314  1.47.2.8     skrll 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e,
    315  1.47.2.8     skrll 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79,
    316  1.47.2.8     skrll 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d,
    317  1.47.2.8     skrll 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b,
    318  1.47.2.8     skrll 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f,
    319  1.47.2.8     skrll };
    320  1.47.2.8     skrll 
    321       1.1  augustss usbd_status
    322       1.1  augustss ehci_init(ehci_softc_t *sc)
    323       1.1  augustss {
    324  1.47.2.8     skrll 	u_int32_t vers, sparams, cparams, hcr;
    325       1.3  augustss 	u_int i;
    326       1.3  augustss 	usbd_status err;
    327      1.11  augustss 	ehci_soft_qh_t *sqh;
    328  1.47.2.5     skrll 	u_int ncomp;
    329       1.3  augustss 
    330       1.3  augustss 	DPRINTF(("ehci_init: start\n"));
    331       1.6  augustss #ifdef EHCI_DEBUG
    332       1.6  augustss 	theehci = sc;
    333       1.6  augustss #endif
    334       1.3  augustss 
    335       1.3  augustss 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
    336       1.3  augustss 
    337  1.47.2.8     skrll 	vers = EREAD2(sc, EHCI_HCIVERSION);
    338      1.41   thorpej 	aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
    339  1.47.2.8     skrll 	       vers >> 8, vers & 0xff);
    340       1.3  augustss 
    341       1.3  augustss 	sparams = EREAD4(sc, EHCI_HCSPARAMS);
    342       1.3  augustss 	DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
    343       1.6  augustss 	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
    344  1.47.2.5     skrll 	ncomp = EHCI_HCS_N_CC(sparams);
    345  1.47.2.5     skrll 	if (ncomp != sc->sc_ncomp) {
    346      1.41   thorpej 		aprint_error("%s: wrong number of companions (%d != %d)\n",
    347       1.3  augustss 		       USBDEVNAME(sc->sc_bus.bdev),
    348  1.47.2.5     skrll 		       ncomp, sc->sc_ncomp);
    349      1.47  augustss #if NOHCI == 0 || NUHCI == 0
    350      1.47  augustss 		aprint_error("%s: ohci or uhci probably not configured\n",
    351      1.47  augustss 			     USBDEVNAME(sc->sc_bus.bdev));
    352      1.47  augustss #endif
    353  1.47.2.5     skrll 		if (ncomp < sc->sc_ncomp)
    354  1.47.2.5     skrll 			sc->sc_ncomp = ncomp;
    355       1.3  augustss 	}
    356       1.3  augustss 	if (sc->sc_ncomp > 0) {
    357      1.41   thorpej 		aprint_normal("%s: companion controller%s, %d port%s each:",
    358       1.3  augustss 		    USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
    359       1.3  augustss 		    EHCI_HCS_N_PCC(sparams),
    360       1.3  augustss 		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
    361       1.3  augustss 		for (i = 0; i < sc->sc_ncomp; i++)
    362      1.41   thorpej 			aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
    363      1.41   thorpej 		aprint_normal("\n");
    364       1.3  augustss 	}
    365       1.5  augustss 	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
    366       1.3  augustss 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
    367       1.3  augustss 	DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
    368  1.47.2.9  christos 	sc->sc_hasppc = EHCI_HCS_PPC(sparams);
    369      1.36  augustss 
    370      1.36  augustss 	if (EHCI_HCC_64BIT(cparams)) {
    371      1.36  augustss 		/* MUST clear segment register if 64 bit capable. */
    372      1.36  augustss 		EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
    373      1.36  augustss 	}
    374      1.33  augustss 
    375       1.3  augustss 	sc->sc_bus.usbrev = USBREV_2_0;
    376       1.3  augustss 
    377  1.47.2.6     skrll 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    378  1.47.2.6     skrll 	    USB_MEM_RESERVE);
    379  1.47.2.6     skrll 
    380       1.3  augustss 	/* Reset the controller */
    381       1.3  augustss 	DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
    382       1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
    383       1.3  augustss 	usb_delay_ms(&sc->sc_bus, 1);
    384       1.3  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
    385       1.3  augustss 	for (i = 0; i < 100; i++) {
    386      1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    387       1.3  augustss 		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
    388       1.3  augustss 		if (!hcr)
    389       1.3  augustss 			break;
    390       1.3  augustss 	}
    391       1.3  augustss 	if (hcr) {
    392      1.41   thorpej 		aprint_error("%s: reset timeout\n",
    393      1.41   thorpej 		    USBDEVNAME(sc->sc_bus.bdev));
    394       1.3  augustss 		return (USBD_IOERROR);
    395       1.3  augustss 	}
    396       1.3  augustss 
    397  1.47.2.4     skrll 	/* XXX need proper intr scheduling */
    398  1.47.2.4     skrll 	sc->sc_rand = 96;
    399  1.47.2.4     skrll 
    400       1.3  augustss 	/* frame list size at default, read back what we got and use that */
    401       1.3  augustss 	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
    402  1.47.2.4     skrll 	case 0: sc->sc_flsize = 1024; break;
    403  1.47.2.4     skrll 	case 1: sc->sc_flsize = 512; break;
    404  1.47.2.4     skrll 	case 2: sc->sc_flsize = 256; break;
    405       1.3  augustss 	case 3: return (USBD_IOERROR);
    406       1.3  augustss 	}
    407  1.47.2.4     skrll 	err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
    408  1.47.2.4     skrll 	    EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
    409       1.3  augustss 	if (err)
    410       1.3  augustss 		return (err);
    411       1.3  augustss 	DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
    412  1.47.2.4     skrll 	sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
    413  1.47.2.4     skrll 	EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
    414       1.3  augustss 
    415       1.5  augustss 	/* Set up the bus struct. */
    416       1.5  augustss 	sc->sc_bus.methods = &ehci_bus_methods;
    417       1.5  augustss 	sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
    418       1.5  augustss 
    419       1.5  augustss 	sc->sc_powerhook = powerhook_establish(ehci_power, sc);
    420       1.5  augustss 	sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
    421       1.5  augustss 
    422       1.6  augustss 	sc->sc_eintrs = EHCI_NORMAL_INTRS;
    423       1.6  augustss 
    424  1.47.2.4     skrll 	/*
    425  1.47.2.4     skrll 	 * Allocate the interrupt dummy QHs. These are arranged to give poll
    426  1.47.2.4     skrll 	 * intervals that are powers of 2 times 1ms.
    427  1.47.2.4     skrll 	 */
    428  1.47.2.4     skrll 	for (i = 0; i < EHCI_INTRQHS; i++) {
    429  1.47.2.4     skrll 		sqh = ehci_alloc_sqh(sc);
    430  1.47.2.4     skrll 		if (sqh == NULL) {
    431  1.47.2.4     skrll 			err = USBD_NOMEM;
    432  1.47.2.4     skrll 			goto bad1;
    433  1.47.2.4     skrll 		}
    434  1.47.2.4     skrll 		sc->sc_islots[i].sqh = sqh;
    435  1.47.2.4     skrll 	}
    436  1.47.2.4     skrll 	for (i = 0; i < EHCI_INTRQHS; i++) {
    437  1.47.2.4     skrll 		sqh = sc->sc_islots[i].sqh;
    438  1.47.2.4     skrll 		if (i == 0) {
    439  1.47.2.4     skrll 			/* The last (1ms) QH terminates. */
    440  1.47.2.4     skrll 			sqh->qh.qh_link = EHCI_NULL;
    441  1.47.2.4     skrll 			sqh->next = NULL;
    442  1.47.2.4     skrll 		} else {
    443  1.47.2.4     skrll 			/* Otherwise the next QH has half the poll interval */
    444  1.47.2.4     skrll 			sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
    445  1.47.2.4     skrll 			sqh->qh.qh_link = htole32(sqh->next->physaddr |
    446  1.47.2.4     skrll 			    EHCI_LINK_QH);
    447  1.47.2.4     skrll 		}
    448  1.47.2.4     skrll 		sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
    449  1.47.2.4     skrll 		sqh->qh.qh_curqtd = EHCI_NULL;
    450  1.47.2.4     skrll 		sqh->next = NULL;
    451  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    452  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    453  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    454  1.47.2.4     skrll 		sqh->sqtd = NULL;
    455  1.47.2.4     skrll 	}
    456  1.47.2.4     skrll 	/* Point the frame list at the last level (128ms). */
    457  1.47.2.4     skrll 	for (i = 0; i < sc->sc_flsize; i++) {
    458  1.47.2.8     skrll 		int j;
    459  1.47.2.8     skrll 
    460  1.47.2.8     skrll 		j = (i & ~(EHCI_MAX_POLLRATE-1)) |
    461  1.47.2.8     skrll 		    revbits[i & (EHCI_MAX_POLLRATE-1)];
    462  1.47.2.8     skrll 		sc->sc_flist[j] = htole32(EHCI_LINK_QH |
    463  1.47.2.4     skrll 		    sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
    464  1.47.2.4     skrll 		    i)].sqh->physaddr);
    465  1.47.2.4     skrll 	}
    466  1.47.2.4     skrll 
    467      1.11  augustss 	/* Allocate dummy QH that starts the async list. */
    468      1.11  augustss 	sqh = ehci_alloc_sqh(sc);
    469      1.11  augustss 	if (sqh == NULL) {
    470       1.9  augustss 		err = USBD_NOMEM;
    471       1.9  augustss 		goto bad1;
    472       1.9  augustss 	}
    473      1.11  augustss 	/* Fill the QH */
    474      1.11  augustss 	sqh->qh.qh_endp =
    475      1.11  augustss 	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
    476      1.11  augustss 	sqh->qh.qh_link =
    477      1.11  augustss 	    htole32(sqh->physaddr | EHCI_LINK_QH);
    478      1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
    479      1.11  augustss 	sqh->next = NULL;
    480      1.11  augustss 	/* Fill the overlay qTD */
    481      1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
    482      1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
    483      1.26  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
    484      1.11  augustss 	sqh->sqtd = NULL;
    485       1.9  augustss #ifdef EHCI_DEBUG
    486       1.9  augustss 	if (ehcidebug) {
    487      1.27     enami 		ehci_dump_sqh(sqh);
    488       1.9  augustss 	}
    489       1.9  augustss #endif
    490       1.9  augustss 
    491       1.9  augustss 	/* Point to async list */
    492      1.11  augustss 	sc->sc_async_head = sqh;
    493      1.11  augustss 	EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
    494       1.9  augustss 
    495       1.9  augustss 	usb_callout_init(sc->sc_tmo_pcd);
    496       1.9  augustss 
    497      1.10  augustss 	lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0);
    498      1.10  augustss 
    499       1.6  augustss 	/* Turn on controller */
    500       1.6  augustss 	EOWRITE4(sc, EHCI_USBCMD,
    501  1.47.2.4     skrll 		 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
    502       1.6  augustss 		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
    503      1.10  augustss 		 EHCI_CMD_ASE |
    504  1.47.2.4     skrll 		 EHCI_CMD_PSE |
    505       1.6  augustss 		 EHCI_CMD_RS);
    506       1.6  augustss 
    507       1.6  augustss 	/* Take over port ownership */
    508       1.6  augustss 	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
    509       1.6  augustss 
    510       1.8  augustss 	for (i = 0; i < 100; i++) {
    511      1.34  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    512       1.8  augustss 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
    513       1.8  augustss 		if (!hcr)
    514       1.8  augustss 			break;
    515       1.8  augustss 	}
    516       1.8  augustss 	if (hcr) {
    517      1.41   thorpej 		aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
    518       1.8  augustss 		return (USBD_IOERROR);
    519       1.8  augustss 	}
    520       1.8  augustss 
    521  1.47.2.8     skrll 	/* Enable interrupts */
    522  1.47.2.8     skrll 	DPRINTFN(1,("ehci_init: enabling\n"));
    523  1.47.2.8     skrll 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    524  1.47.2.8     skrll 
    525       1.5  augustss 	return (USBD_NORMAL_COMPLETION);
    526       1.9  augustss 
    527       1.9  augustss #if 0
    528      1.11  augustss  bad2:
    529      1.15  augustss 	ehci_free_sqh(sc, sc->sc_async_head);
    530       1.9  augustss #endif
    531       1.9  augustss  bad1:
    532       1.9  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_fldma);
    533       1.9  augustss 	return (err);
    534       1.1  augustss }
    535       1.1  augustss 
    536       1.1  augustss int
    537       1.1  augustss ehci_intr(void *v)
    538       1.1  augustss {
    539       1.6  augustss 	ehci_softc_t *sc = v;
    540       1.6  augustss 
    541      1.17  augustss 	if (sc == NULL || sc->sc_dying)
    542      1.15  augustss 		return (0);
    543      1.15  augustss 
    544       1.6  augustss 	/* If we get an interrupt while polling, then just ignore it. */
    545       1.6  augustss 	if (sc->sc_bus.use_polling) {
    546  1.47.2.4     skrll 		u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    547  1.47.2.4     skrll 
    548  1.47.2.4     skrll 		if (intrs)
    549  1.47.2.4     skrll 			EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    550       1.6  augustss #ifdef DIAGNOSTIC
    551  1.47.2.1     skrll 		DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
    552       1.6  augustss #endif
    553       1.6  augustss 		return (0);
    554       1.6  augustss 	}
    555       1.6  augustss 
    556      1.33  augustss 	return (ehci_intr1(sc));
    557       1.6  augustss }
    558       1.6  augustss 
    559       1.6  augustss Static int
    560       1.6  augustss ehci_intr1(ehci_softc_t *sc)
    561       1.6  augustss {
    562       1.6  augustss 	u_int32_t intrs, eintrs;
    563       1.6  augustss 
    564       1.6  augustss 	DPRINTFN(20,("ehci_intr1: enter\n"));
    565       1.6  augustss 
    566       1.6  augustss 	/* In case the interrupt occurs before initialization has completed. */
    567       1.6  augustss 	if (sc == NULL) {
    568       1.6  augustss #ifdef DIAGNOSTIC
    569  1.47.2.4     skrll 		printf("ehci_intr1: sc == NULL\n");
    570       1.6  augustss #endif
    571       1.6  augustss 		return (0);
    572       1.6  augustss 	}
    573       1.6  augustss 
    574       1.6  augustss 	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    575       1.6  augustss 	if (!intrs)
    576       1.6  augustss 		return (0);
    577       1.6  augustss 
    578       1.6  augustss 	eintrs = intrs & sc->sc_eintrs;
    579  1.47.2.4     skrll 	DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
    580       1.6  augustss 		     sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
    581       1.6  augustss 		     (u_int)eintrs));
    582       1.6  augustss 	if (!eintrs)
    583       1.6  augustss 		return (0);
    584       1.6  augustss 
    585  1.47.2.1     skrll 	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
    586       1.6  augustss 	sc->sc_bus.intr_context++;
    587       1.6  augustss 	sc->sc_bus.no_intrs++;
    588      1.10  augustss 	if (eintrs & EHCI_STS_IAA) {
    589      1.10  augustss 		DPRINTF(("ehci_intr1: door bell\n"));
    590      1.11  augustss 		wakeup(&sc->sc_async_head);
    591      1.20  augustss 		eintrs &= ~EHCI_STS_IAA;
    592      1.10  augustss 	}
    593      1.18  augustss 	if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
    594      1.46  augustss 		DPRINTFN(5,("ehci_intr1: %s %s\n",
    595      1.46  augustss 			    eintrs & EHCI_STS_INT ? "INT" : "",
    596      1.46  augustss 			    eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
    597      1.18  augustss 		usb_schedsoftintr(&sc->sc_bus);
    598      1.21  augustss 		eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
    599       1.6  augustss 	}
    600       1.6  augustss 	if (eintrs & EHCI_STS_HSE) {
    601       1.6  augustss 		printf("%s: unrecoverable error, controller halted\n",
    602       1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
    603       1.6  augustss 		/* XXX what else */
    604       1.6  augustss 	}
    605       1.6  augustss 	if (eintrs & EHCI_STS_PCD) {
    606       1.6  augustss 		ehci_pcd(sc, sc->sc_intrxfer);
    607      1.33  augustss 		/*
    608       1.6  augustss 		 * Disable PCD interrupt for now, because it will be
    609       1.6  augustss 		 * on until the port has been reset.
    610       1.6  augustss 		 */
    611       1.6  augustss 		ehci_pcd_able(sc, 0);
    612       1.6  augustss 		/* Do not allow RHSC interrupts > 1 per second */
    613       1.6  augustss                 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
    614       1.6  augustss 		eintrs &= ~EHCI_STS_PCD;
    615       1.6  augustss 	}
    616       1.6  augustss 
    617       1.6  augustss 	sc->sc_bus.intr_context--;
    618       1.6  augustss 
    619       1.6  augustss 	if (eintrs != 0) {
    620       1.6  augustss 		/* Block unprocessed interrupts. */
    621       1.6  augustss 		sc->sc_eintrs &= ~eintrs;
    622       1.6  augustss 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    623       1.6  augustss 		printf("%s: blocking intrs 0x%x\n",
    624       1.6  augustss 		       USBDEVNAME(sc->sc_bus.bdev), eintrs);
    625       1.6  augustss 	}
    626       1.6  augustss 
    627       1.6  augustss 	return (1);
    628       1.6  augustss }
    629       1.6  augustss 
    630       1.6  augustss void
    631       1.6  augustss ehci_pcd_able(ehci_softc_t *sc, int on)
    632       1.6  augustss {
    633       1.6  augustss 	DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
    634       1.6  augustss 	if (on)
    635       1.6  augustss 		sc->sc_eintrs |= EHCI_STS_PCD;
    636       1.6  augustss 	else
    637       1.6  augustss 		sc->sc_eintrs &= ~EHCI_STS_PCD;
    638       1.6  augustss 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
    639       1.6  augustss }
    640       1.6  augustss 
    641       1.6  augustss void
    642       1.6  augustss ehci_pcd_enable(void *v_sc)
    643       1.6  augustss {
    644       1.6  augustss 	ehci_softc_t *sc = v_sc;
    645       1.6  augustss 
    646       1.6  augustss 	ehci_pcd_able(sc, 1);
    647       1.6  augustss }
    648       1.6  augustss 
    649       1.6  augustss void
    650       1.6  augustss ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
    651       1.6  augustss {
    652       1.6  augustss 	usbd_pipe_handle pipe;
    653       1.6  augustss 	u_char *p;
    654       1.6  augustss 	int i, m;
    655       1.6  augustss 
    656       1.6  augustss 	if (xfer == NULL) {
    657       1.6  augustss 		/* Just ignore the change. */
    658       1.6  augustss 		return;
    659       1.6  augustss 	}
    660       1.6  augustss 
    661       1.6  augustss 	pipe = xfer->pipe;
    662       1.6  augustss 
    663      1.30  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
    664       1.6  augustss 	m = min(sc->sc_noport, xfer->length * 8 - 1);
    665       1.6  augustss 	memset(p, 0, xfer->length);
    666       1.6  augustss 	for (i = 1; i <= m; i++) {
    667       1.6  augustss 		/* Pick out CHANGE bits from the status reg. */
    668       1.6  augustss 		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
    669       1.6  augustss 			p[i/8] |= 1 << (i%8);
    670       1.6  augustss 	}
    671       1.6  augustss 	DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
    672       1.6  augustss 	xfer->actlen = xfer->length;
    673       1.6  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    674       1.6  augustss 
    675       1.6  augustss 	usb_transfer_complete(xfer);
    676       1.1  augustss }
    677       1.1  augustss 
    678       1.5  augustss void
    679       1.5  augustss ehci_softintr(void *v)
    680       1.5  augustss {
    681      1.18  augustss 	ehci_softc_t *sc = v;
    682  1.47.2.1     skrll 	struct ehci_xfer *ex, *nextex;
    683      1.18  augustss 
    684      1.18  augustss 	DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
    685      1.18  augustss 		     sc->sc_bus.intr_context));
    686      1.18  augustss 
    687      1.18  augustss 	sc->sc_bus.intr_context++;
    688      1.18  augustss 
    689      1.18  augustss 	/*
    690      1.18  augustss 	 * The only explanation I can think of for why EHCI is as brain dead
    691      1.18  augustss 	 * as UHCI interrupt-wise is that Intel was involved in both.
    692      1.18  augustss 	 * An interrupt just tells us that something is done, we have no
    693      1.18  augustss 	 * clue what, so we need to scan through all active transfers. :-(
    694      1.18  augustss 	 */
    695  1.47.2.1     skrll 	for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
    696  1.47.2.1     skrll 		nextex = LIST_NEXT(ex, inext);
    697      1.18  augustss 		ehci_check_intr(sc, ex);
    698  1.47.2.1     skrll 	}
    699      1.18  augustss 
    700  1.47.2.4     skrll #ifdef USB_USE_SOFTINTR
    701      1.29  augustss 	if (sc->sc_softwake) {
    702      1.29  augustss 		sc->sc_softwake = 0;
    703      1.29  augustss 		wakeup(&sc->sc_softwake);
    704      1.29  augustss 	}
    705  1.47.2.4     skrll #endif /* USB_USE_SOFTINTR */
    706      1.29  augustss 
    707      1.18  augustss 	sc->sc_bus.intr_context--;
    708      1.18  augustss }
    709      1.18  augustss 
    710      1.18  augustss /* Check for an interrupt. */
    711      1.18  augustss void
    712      1.18  augustss ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
    713      1.18  augustss {
    714      1.18  augustss 	ehci_soft_qtd_t *sqtd, *lsqtd;
    715      1.18  augustss 	u_int32_t status;
    716      1.18  augustss 
    717      1.22  augustss 	DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
    718      1.18  augustss 
    719      1.18  augustss 	if (ex->sqtdstart == NULL) {
    720      1.18  augustss 		printf("ehci_check_intr: sqtdstart=NULL\n");
    721      1.18  augustss 		return;
    722      1.18  augustss 	}
    723      1.18  augustss 	lsqtd = ex->sqtdend;
    724      1.18  augustss #ifdef DIAGNOSTIC
    725      1.18  augustss 	if (lsqtd == NULL) {
    726  1.47.2.4     skrll 		printf("ehci_check_intr: lsqtd==0\n");
    727      1.18  augustss 		return;
    728      1.18  augustss 	}
    729      1.18  augustss #endif
    730      1.33  augustss 	/*
    731      1.18  augustss 	 * If the last TD is still active we need to check whether there
    732      1.18  augustss 	 * is a an error somewhere in the middle, or whether there was a
    733      1.18  augustss 	 * short packet (SPD and not ACTIVE).
    734      1.18  augustss 	 */
    735      1.18  augustss 	if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
    736      1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
    737      1.18  augustss 		for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
    738      1.18  augustss 			status = le32toh(sqtd->qtd.qtd_status);
    739      1.18  augustss 			/* If there's an active QTD the xfer isn't done. */
    740      1.18  augustss 			if (status & EHCI_QTD_ACTIVE)
    741      1.18  augustss 				break;
    742      1.18  augustss 			/* Any kind of error makes the xfer done. */
    743      1.18  augustss 			if (status & EHCI_QTD_HALTED)
    744      1.18  augustss 				goto done;
    745      1.18  augustss 			/* We want short packets, and it is short: it's done */
    746  1.47.2.1     skrll 			if (EHCI_QTD_GET_BYTES(status) != 0)
    747      1.18  augustss 				goto done;
    748      1.18  augustss 		}
    749      1.18  augustss 		DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
    750      1.18  augustss 			      ex, ex->sqtdstart));
    751      1.18  augustss 		return;
    752      1.18  augustss 	}
    753      1.18  augustss  done:
    754      1.18  augustss 	DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
    755      1.18  augustss 	usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
    756      1.18  augustss 	ehci_idone(ex);
    757      1.18  augustss }
    758      1.18  augustss 
    759      1.18  augustss void
    760      1.18  augustss ehci_idone(struct ehci_xfer *ex)
    761      1.18  augustss {
    762      1.18  augustss 	usbd_xfer_handle xfer = &ex->xfer;
    763      1.18  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
    764  1.47.2.4     skrll 	ehci_soft_qtd_t *sqtd, *lsqtd;
    765  1.47.2.4     skrll 	u_int32_t status = 0, nstatus = 0;
    766      1.18  augustss 	int actlen;
    767  1.47.2.4     skrll 	uint pkts_left;
    768      1.18  augustss 
    769      1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
    770      1.18  augustss #ifdef DIAGNOSTIC
    771      1.18  augustss 	{
    772      1.18  augustss 		int s = splhigh();
    773      1.18  augustss 		if (ex->isdone) {
    774      1.18  augustss 			splx(s);
    775      1.18  augustss #ifdef EHCI_DEBUG
    776      1.18  augustss 			printf("ehci_idone: ex is done!\n   ");
    777      1.18  augustss 			ehci_dump_exfer(ex);
    778      1.18  augustss #else
    779      1.18  augustss 			printf("ehci_idone: ex=%p is done!\n", ex);
    780      1.18  augustss #endif
    781      1.18  augustss 			return;
    782      1.18  augustss 		}
    783      1.18  augustss 		ex->isdone = 1;
    784      1.18  augustss 		splx(s);
    785      1.18  augustss 	}
    786      1.18  augustss #endif
    787      1.18  augustss 
    788      1.18  augustss 	if (xfer->status == USBD_CANCELLED ||
    789      1.18  augustss 	    xfer->status == USBD_TIMEOUT) {
    790      1.18  augustss 		DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
    791      1.18  augustss 		return;
    792      1.18  augustss 	}
    793      1.18  augustss 
    794      1.18  augustss #ifdef EHCI_DEBUG
    795      1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
    796      1.18  augustss 	if (ehcidebug > 10)
    797      1.18  augustss 		ehci_dump_sqtds(ex->sqtdstart);
    798      1.18  augustss #endif
    799      1.18  augustss 
    800      1.18  augustss 	/* The transfer is done, compute actual length and status. */
    801  1.47.2.4     skrll 	lsqtd = ex->sqtdend;
    802      1.18  augustss 	actlen = 0;
    803  1.47.2.4     skrll 	for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
    804      1.18  augustss 		nstatus = le32toh(sqtd->qtd.qtd_status);
    805      1.18  augustss 		if (nstatus & EHCI_QTD_ACTIVE)
    806      1.18  augustss 			break;
    807      1.18  augustss 
    808      1.18  augustss 		status = nstatus;
    809      1.18  augustss 		if (EHCI_QTD_GET_PID(status) !=	EHCI_QTD_PID_SETUP)
    810      1.18  augustss 			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
    811      1.18  augustss 	}
    812      1.22  augustss 
    813  1.47.2.7     skrll 	/*
    814  1.47.2.4     skrll 	 * If there are left over TDs we need to update the toggle.
    815  1.47.2.4     skrll 	 * The default pipe doesn't need it since control transfers
    816  1.47.2.4     skrll 	 * start the toggle at 0 every time.
    817  1.47.2.4     skrll 	 */
    818  1.47.2.7     skrll 	if (sqtd != lsqtd->nextqtd &&
    819  1.47.2.4     skrll 	    xfer->pipe->device->default_pipe != xfer->pipe) {
    820  1.47.2.1     skrll 		printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus);
    821      1.18  augustss #if 0
    822  1.47.2.1     skrll 		ehci_dump_sqh(epipe->sqh);
    823  1.47.2.1     skrll 		ehci_dump_sqtds(ex->sqtdstart);
    824      1.18  augustss #endif
    825  1.47.2.1     skrll 		epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
    826      1.22  augustss 	}
    827      1.18  augustss 
    828  1.47.2.7     skrll 	/*
    829  1.47.2.4     skrll 	 * For a short transfer we need to update the toggle for the missing
    830  1.47.2.4     skrll 	 * packets within the qTD.
    831  1.47.2.4     skrll 	 */
    832  1.47.2.4     skrll 	pkts_left = EHCI_QTD_GET_BYTES(status) /
    833  1.47.2.4     skrll 	    UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize);
    834  1.47.2.4     skrll 	epipe->nexttoggle ^= pkts_left % 2;
    835  1.47.2.4     skrll 
    836      1.23  augustss 	DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
    837      1.22  augustss 			   xfer->length, actlen, status));
    838      1.18  augustss 	xfer->actlen = actlen;
    839  1.47.2.8     skrll 	if (status & EHCI_QTD_HALTED) {
    840      1.18  augustss #ifdef EHCI_DEBUG
    841      1.18  augustss 		char sbuf[128];
    842      1.18  augustss 
    843      1.18  augustss 		bitmask_snprintf((u_int32_t)status,
    844  1.47.2.1     skrll 				 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
    845  1.47.2.8     skrll 				 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf));
    846      1.18  augustss 
    847  1.47.2.8     skrll 		DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, "
    848      1.18  augustss 			  "status 0x%s\n",
    849      1.18  augustss 			  xfer->pipe->device->address,
    850      1.18  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
    851      1.18  augustss 			  sbuf));
    852      1.23  augustss 		if (ehcidebug > 2) {
    853      1.23  augustss 			ehci_dump_sqh(epipe->sqh);
    854      1.23  augustss 			ehci_dump_sqtds(ex->sqtdstart);
    855      1.23  augustss 		}
    856      1.18  augustss #endif
    857  1.47.2.8     skrll 		/* low&full speed has an extra error flag */
    858  1.47.2.8     skrll 		if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) !=
    859  1.47.2.8     skrll 		    EHCI_QH_SPEED_HIGH)
    860  1.47.2.8     skrll 			status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE;
    861  1.47.2.8     skrll 		else
    862  1.47.2.8     skrll 			status &= EHCI_QTD_STATERRS;
    863  1.47.2.8     skrll 		if (status == 0) /* no other errors means a stall */
    864      1.18  augustss 			xfer->status = USBD_STALLED;
    865      1.18  augustss 		else
    866      1.18  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
    867  1.47.2.8     skrll 		/* XXX need to reset TT on missed microframe */
    868  1.47.2.8     skrll 		if (status & EHCI_QTD_MISSEDMICRO) {
    869  1.47.2.8     skrll 			ehci_softc_t *sc = (ehci_softc_t *)
    870  1.47.2.8     skrll 			    xfer->pipe->device->bus;
    871  1.47.2.8     skrll 
    872  1.47.2.8     skrll 			printf("%s: missed microframe, TT reset not "
    873  1.47.2.8     skrll 			    "implemented, hub might be inoperational\n",
    874  1.47.2.8     skrll 			    USBDEVNAME(sc->sc_bus.bdev));
    875  1.47.2.8     skrll 		}
    876      1.18  augustss 	} else {
    877      1.18  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
    878      1.18  augustss 	}
    879      1.18  augustss 
    880      1.18  augustss 	usb_transfer_complete(xfer);
    881      1.22  augustss 	DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
    882       1.5  augustss }
    883       1.5  augustss 
    884      1.15  augustss /*
    885      1.15  augustss  * Wait here until controller claims to have an interrupt.
    886      1.18  augustss  * Then call ehci_intr and return.  Use timeout to avoid waiting
    887      1.15  augustss  * too long.
    888      1.15  augustss  */
    889      1.15  augustss void
    890      1.15  augustss ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
    891      1.15  augustss {
    892  1.47.2.8     skrll 	int timo;
    893      1.15  augustss 	u_int32_t intrs;
    894      1.15  augustss 
    895      1.15  augustss 	xfer->status = USBD_IN_PROGRESS;
    896  1.47.2.8     skrll 	for (timo = xfer->timeout; timo >= 0; timo--) {
    897      1.15  augustss 		usb_delay_ms(&sc->sc_bus, 1);
    898      1.17  augustss 		if (sc->sc_dying)
    899      1.17  augustss 			break;
    900      1.15  augustss 		intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
    901      1.15  augustss 			sc->sc_eintrs;
    902      1.15  augustss 		DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
    903  1.47.2.2     skrll #ifdef EHCI_DEBUG
    904      1.15  augustss 		if (ehcidebug > 15)
    905      1.18  augustss 			ehci_dump_regs(sc);
    906      1.15  augustss #endif
    907      1.15  augustss 		if (intrs) {
    908      1.15  augustss 			ehci_intr1(sc);
    909      1.15  augustss 			if (xfer->status != USBD_IN_PROGRESS)
    910      1.15  augustss 				return;
    911      1.15  augustss 		}
    912      1.15  augustss 	}
    913      1.15  augustss 
    914      1.15  augustss 	/* Timeout */
    915      1.15  augustss 	DPRINTF(("ehci_waitintr: timeout\n"));
    916      1.15  augustss 	xfer->status = USBD_TIMEOUT;
    917      1.15  augustss 	usb_transfer_complete(xfer);
    918      1.15  augustss 	/* XXX should free TD */
    919      1.15  augustss }
    920      1.15  augustss 
    921       1.5  augustss void
    922       1.5  augustss ehci_poll(struct usbd_bus *bus)
    923       1.5  augustss {
    924       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)bus;
    925       1.5  augustss #ifdef EHCI_DEBUG
    926       1.5  augustss 	static int last;
    927       1.5  augustss 	int new;
    928       1.6  augustss 	new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
    929       1.5  augustss 	if (new != last) {
    930       1.5  augustss 		DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
    931       1.5  augustss 		last = new;
    932       1.5  augustss 	}
    933       1.5  augustss #endif
    934       1.5  augustss 
    935       1.6  augustss 	if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
    936       1.5  augustss 		ehci_intr1(sc);
    937       1.5  augustss }
    938       1.5  augustss 
    939       1.1  augustss int
    940       1.1  augustss ehci_detach(struct ehci_softc *sc, int flags)
    941       1.1  augustss {
    942       1.1  augustss 	int rv = 0;
    943       1.1  augustss 
    944       1.1  augustss 	if (sc->sc_child != NULL)
    945       1.1  augustss 		rv = config_detach(sc->sc_child, flags);
    946      1.33  augustss 
    947       1.1  augustss 	if (rv != 0)
    948       1.1  augustss 		return (rv);
    949       1.1  augustss 
    950       1.6  augustss 	usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
    951       1.6  augustss 
    952       1.1  augustss 	if (sc->sc_powerhook != NULL)
    953       1.1  augustss 		powerhook_disestablish(sc->sc_powerhook);
    954       1.1  augustss 	if (sc->sc_shutdownhook != NULL)
    955       1.1  augustss 		shutdownhook_disestablish(sc->sc_shutdownhook);
    956       1.1  augustss 
    957      1.17  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    958      1.15  augustss 
    959       1.1  augustss 	/* XXX free other data structures XXX */
    960       1.1  augustss 
    961       1.1  augustss 	return (rv);
    962       1.1  augustss }
    963       1.1  augustss 
    964       1.1  augustss 
    965       1.1  augustss int
    966       1.1  augustss ehci_activate(device_ptr_t self, enum devact act)
    967       1.1  augustss {
    968       1.1  augustss 	struct ehci_softc *sc = (struct ehci_softc *)self;
    969       1.1  augustss 	int rv = 0;
    970       1.1  augustss 
    971       1.1  augustss 	switch (act) {
    972       1.1  augustss 	case DVACT_ACTIVATE:
    973       1.1  augustss 		return (EOPNOTSUPP);
    974       1.1  augustss 
    975       1.1  augustss 	case DVACT_DEACTIVATE:
    976       1.1  augustss 		if (sc->sc_child != NULL)
    977       1.1  augustss 			rv = config_deactivate(sc->sc_child);
    978       1.5  augustss 		sc->sc_dying = 1;
    979       1.1  augustss 		break;
    980       1.1  augustss 	}
    981       1.1  augustss 	return (rv);
    982       1.1  augustss }
    983       1.1  augustss 
    984       1.5  augustss /*
    985       1.5  augustss  * Handle suspend/resume.
    986       1.5  augustss  *
    987       1.5  augustss  * We need to switch to polling mode here, because this routine is
    988  1.47.2.4     skrll  * called from an interrupt context.  This is all right since we
    989       1.5  augustss  * are almost suspended anyway.
    990       1.5  augustss  */
    991       1.5  augustss void
    992       1.5  augustss ehci_power(int why, void *v)
    993       1.5  augustss {
    994       1.5  augustss 	ehci_softc_t *sc = v;
    995  1.47.2.4     skrll 	u_int32_t cmd, hcr;
    996  1.47.2.4     skrll 	int s, i;
    997       1.5  augustss 
    998       1.5  augustss #ifdef EHCI_DEBUG
    999       1.5  augustss 	DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
   1000  1.47.2.4     skrll 	if (ehcidebug > 0)
   1001  1.47.2.4     skrll 		ehci_dump_regs(sc);
   1002       1.5  augustss #endif
   1003       1.5  augustss 
   1004       1.5  augustss 	s = splhardusb();
   1005       1.5  augustss 	switch (why) {
   1006       1.5  augustss 	case PWR_SUSPEND:
   1007       1.5  augustss 	case PWR_STANDBY:
   1008       1.5  augustss 		sc->sc_bus.use_polling++;
   1009  1.47.2.4     skrll 
   1010  1.47.2.4     skrll 		sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
   1011  1.47.2.4     skrll 
   1012  1.47.2.4     skrll 		cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
   1013  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBCMD, cmd);
   1014  1.47.2.4     skrll 
   1015  1.47.2.4     skrll 		for (i = 0; i < 100; i++) {
   1016  1.47.2.4     skrll 			hcr = EOREAD4(sc, EHCI_USBSTS) &
   1017  1.47.2.4     skrll 			    (EHCI_STS_ASS | EHCI_STS_PSS);
   1018  1.47.2.4     skrll 			if (hcr == 0)
   1019  1.47.2.4     skrll 				break;
   1020  1.47.2.4     skrll 
   1021  1.47.2.4     skrll 			usb_delay_ms(&sc->sc_bus, 1);
   1022       1.5  augustss 		}
   1023  1.47.2.4     skrll 		if (hcr != 0) {
   1024  1.47.2.4     skrll 			printf("%s: reset timeout\n",
   1025  1.47.2.4     skrll 			    USBDEVNAME(sc->sc_bus.bdev));
   1026  1.47.2.4     skrll 		}
   1027  1.47.2.4     skrll 
   1028  1.47.2.4     skrll 		cmd &= ~EHCI_CMD_RS;
   1029  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBCMD, cmd);
   1030  1.47.2.4     skrll 
   1031  1.47.2.4     skrll 		for (i = 0; i < 100; i++) {
   1032  1.47.2.4     skrll 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1033  1.47.2.4     skrll 			if (hcr == EHCI_STS_HCH)
   1034  1.47.2.4     skrll 				break;
   1035  1.47.2.4     skrll 
   1036  1.47.2.4     skrll 			usb_delay_ms(&sc->sc_bus, 1);
   1037  1.47.2.4     skrll 		}
   1038  1.47.2.4     skrll 		if (hcr != EHCI_STS_HCH) {
   1039  1.47.2.4     skrll 			printf("%s: config timeout\n",
   1040  1.47.2.4     skrll 			    USBDEVNAME(sc->sc_bus.bdev));
   1041  1.47.2.4     skrll 		}
   1042  1.47.2.4     skrll 
   1043       1.5  augustss 		sc->sc_bus.use_polling--;
   1044       1.5  augustss 		break;
   1045  1.47.2.4     skrll 
   1046       1.5  augustss 	case PWR_RESUME:
   1047       1.5  augustss 		sc->sc_bus.use_polling++;
   1048  1.47.2.4     skrll 
   1049  1.47.2.4     skrll 		/* restore things in case the bios sucks */
   1050  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
   1051  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
   1052  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_ASYNCLISTADDR,
   1053  1.47.2.4     skrll 		    sc->sc_async_head->physaddr | EHCI_LINK_QH);
   1054  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
   1055  1.47.2.4     skrll 
   1056  1.47.2.4     skrll 		EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
   1057  1.47.2.4     skrll 
   1058  1.47.2.4     skrll 		for (i = 0; i < 100; i++) {
   1059  1.47.2.4     skrll 			hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
   1060  1.47.2.4     skrll 			if (hcr != EHCI_STS_HCH)
   1061  1.47.2.4     skrll 				break;
   1062  1.47.2.4     skrll 
   1063  1.47.2.4     skrll 			usb_delay_ms(&sc->sc_bus, 1);
   1064  1.47.2.4     skrll 		}
   1065  1.47.2.4     skrll 		if (hcr == EHCI_STS_HCH) {
   1066  1.47.2.4     skrll 			printf("%s: config timeout\n",
   1067  1.47.2.4     skrll 			    USBDEVNAME(sc->sc_bus.bdev));
   1068  1.47.2.4     skrll 		}
   1069  1.47.2.4     skrll 
   1070  1.47.2.4     skrll 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1071  1.47.2.4     skrll 
   1072       1.5  augustss 		sc->sc_bus.use_polling--;
   1073       1.5  augustss 		break;
   1074       1.5  augustss 	case PWR_SOFTSUSPEND:
   1075       1.5  augustss 	case PWR_SOFTSTANDBY:
   1076       1.5  augustss 	case PWR_SOFTRESUME:
   1077       1.5  augustss 		break;
   1078       1.5  augustss 	}
   1079       1.5  augustss 	splx(s);
   1080  1.47.2.4     skrll 
   1081  1.47.2.4     skrll #ifdef EHCI_DEBUG
   1082  1.47.2.4     skrll 	DPRINTF(("ehci_power: sc=%p\n", sc));
   1083  1.47.2.4     skrll 	if (ehcidebug > 0)
   1084  1.47.2.4     skrll 		ehci_dump_regs(sc);
   1085  1.47.2.4     skrll #endif
   1086       1.5  augustss }
   1087       1.5  augustss 
   1088       1.5  augustss /*
   1089       1.5  augustss  * Shut down the controller when the system is going down.
   1090       1.5  augustss  */
   1091       1.5  augustss void
   1092       1.5  augustss ehci_shutdown(void *v)
   1093       1.5  augustss {
   1094       1.8  augustss 	ehci_softc_t *sc = v;
   1095       1.5  augustss 
   1096       1.5  augustss 	DPRINTF(("ehci_shutdown: stopping the HC\n"));
   1097       1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
   1098       1.8  augustss 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
   1099       1.5  augustss }
   1100       1.5  augustss 
   1101       1.5  augustss usbd_status
   1102       1.5  augustss ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
   1103       1.5  augustss {
   1104       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1105      1.25  augustss 	usbd_status err;
   1106       1.5  augustss 
   1107      1.25  augustss 	err = usb_allocmem(&sc->sc_bus, size, 0, dma);
   1108  1.47.2.6     skrll 	if (err == USBD_NOMEM)
   1109  1.47.2.6     skrll 		err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
   1110      1.25  augustss #ifdef EHCI_DEBUG
   1111      1.25  augustss 	if (err)
   1112      1.25  augustss 		printf("ehci_allocm: usb_allocmem()=%d\n", err);
   1113      1.25  augustss #endif
   1114      1.25  augustss 	return (err);
   1115       1.5  augustss }
   1116       1.5  augustss 
   1117       1.5  augustss void
   1118       1.5  augustss ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
   1119       1.5  augustss {
   1120       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1121       1.5  augustss 
   1122  1.47.2.6     skrll 	if (dma->block->flags & USB_DMA_RESERVE) {
   1123  1.47.2.6     skrll 		usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve,
   1124  1.47.2.6     skrll 		    dma);
   1125  1.47.2.6     skrll 		return;
   1126  1.47.2.6     skrll 	}
   1127       1.5  augustss 	usb_freemem(&sc->sc_bus, dma);
   1128       1.5  augustss }
   1129       1.5  augustss 
   1130       1.5  augustss usbd_xfer_handle
   1131       1.5  augustss ehci_allocx(struct usbd_bus *bus)
   1132       1.5  augustss {
   1133       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1134       1.5  augustss 	usbd_xfer_handle xfer;
   1135       1.5  augustss 
   1136       1.5  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
   1137      1.28  augustss 	if (xfer != NULL) {
   1138      1.32     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
   1139      1.28  augustss #ifdef DIAGNOSTIC
   1140      1.28  augustss 		if (xfer->busy_free != XFER_FREE) {
   1141  1.47.2.4     skrll 			printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
   1142      1.28  augustss 			       xfer->busy_free);
   1143      1.28  augustss 		}
   1144      1.28  augustss #endif
   1145      1.28  augustss 	} else {
   1146      1.15  augustss 		xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
   1147      1.28  augustss 	}
   1148      1.18  augustss 	if (xfer != NULL) {
   1149  1.47.2.4     skrll 		memset(xfer, 0, sizeof(struct ehci_xfer));
   1150      1.18  augustss #ifdef DIAGNOSTIC
   1151      1.18  augustss 		EXFER(xfer)->isdone = 1;
   1152      1.18  augustss 		xfer->busy_free = XFER_BUSY;
   1153      1.18  augustss #endif
   1154      1.18  augustss 	}
   1155       1.5  augustss 	return (xfer);
   1156       1.5  augustss }
   1157       1.5  augustss 
   1158       1.5  augustss void
   1159       1.5  augustss ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
   1160       1.5  augustss {
   1161       1.5  augustss 	struct ehci_softc *sc = (struct ehci_softc *)bus;
   1162       1.5  augustss 
   1163      1.18  augustss #ifdef DIAGNOSTIC
   1164      1.18  augustss 	if (xfer->busy_free != XFER_BUSY) {
   1165      1.18  augustss 		printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
   1166      1.18  augustss 		       xfer->busy_free);
   1167      1.18  augustss 		return;
   1168      1.18  augustss 	}
   1169      1.18  augustss 	xfer->busy_free = XFER_FREE;
   1170      1.18  augustss 	if (!EXFER(xfer)->isdone) {
   1171      1.18  augustss 		printf("ehci_freex: !isdone\n");
   1172      1.18  augustss 		return;
   1173      1.18  augustss 	}
   1174      1.18  augustss #endif
   1175       1.5  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
   1176       1.5  augustss }
   1177       1.5  augustss 
   1178       1.5  augustss Static void
   1179       1.5  augustss ehci_device_clear_toggle(usbd_pipe_handle pipe)
   1180       1.5  augustss {
   1181      1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1182      1.15  augustss 
   1183      1.23  augustss 	DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
   1184      1.23  augustss 		 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
   1185      1.22  augustss #ifdef USB_DEBUG
   1186      1.22  augustss 	if (ehcidebug)
   1187      1.22  augustss 		usbd_dump_pipe(pipe);
   1188       1.5  augustss #endif
   1189  1.47.2.1     skrll 	epipe->nexttoggle = 0;
   1190       1.5  augustss }
   1191       1.5  augustss 
   1192       1.5  augustss Static void
   1193       1.5  augustss ehci_noop(usbd_pipe_handle pipe)
   1194       1.5  augustss {
   1195       1.5  augustss }
   1196       1.5  augustss 
   1197       1.5  augustss #ifdef EHCI_DEBUG
   1198       1.5  augustss void
   1199      1.18  augustss ehci_dump_regs(ehci_softc_t *sc)
   1200       1.5  augustss {
   1201       1.6  augustss 	int i;
   1202       1.6  augustss 	printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
   1203       1.6  augustss 	       EOREAD4(sc, EHCI_USBCMD),
   1204       1.6  augustss 	       EOREAD4(sc, EHCI_USBSTS),
   1205       1.6  augustss 	       EOREAD4(sc, EHCI_USBINTR));
   1206      1.29  augustss 	printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
   1207      1.15  augustss 	       EOREAD4(sc, EHCI_FRINDEX),
   1208      1.15  augustss 	       EOREAD4(sc, EHCI_CTRLDSSEGMENT),
   1209      1.15  augustss 	       EOREAD4(sc, EHCI_PERIODICLISTBASE),
   1210      1.15  augustss 	       EOREAD4(sc, EHCI_ASYNCLISTADDR));
   1211       1.6  augustss 	for (i = 1; i <= sc->sc_noport; i++)
   1212      1.33  augustss 		printf("port %d status=0x%08x\n", i,
   1213       1.6  augustss 		       EOREAD4(sc, EHCI_PORTSC(i)));
   1214      1.39    martin }
   1215      1.39    martin 
   1216      1.40    martin /*
   1217      1.40    martin  * Unused function - this is meant to be called from a kernel
   1218      1.40    martin  * debugger.
   1219      1.40    martin  */
   1220      1.39    martin void
   1221      1.39    martin ehci_dump()
   1222      1.39    martin {
   1223      1.39    martin 	ehci_dump_regs(theehci);
   1224       1.6  augustss }
   1225       1.6  augustss 
   1226       1.6  augustss void
   1227      1.15  augustss ehci_dump_link(ehci_link_t link, int type)
   1228       1.9  augustss {
   1229      1.15  augustss 	link = le32toh(link);
   1230      1.15  augustss 	printf("0x%08x", link);
   1231       1.9  augustss 	if (link & EHCI_LINK_TERMINATE)
   1232      1.15  augustss 		printf("<T>");
   1233      1.15  augustss 	else {
   1234      1.15  augustss 		printf("<");
   1235      1.15  augustss 		if (type) {
   1236      1.15  augustss 			switch (EHCI_LINK_TYPE(link)) {
   1237      1.15  augustss 			case EHCI_LINK_ITD: printf("ITD"); break;
   1238      1.15  augustss 			case EHCI_LINK_QH: printf("QH"); break;
   1239      1.15  augustss 			case EHCI_LINK_SITD: printf("SITD"); break;
   1240      1.15  augustss 			case EHCI_LINK_FSTN: printf("FSTN"); break;
   1241      1.16  augustss 			}
   1242      1.15  augustss 		}
   1243       1.9  augustss 		printf(">");
   1244      1.15  augustss 	}
   1245      1.15  augustss }
   1246      1.15  augustss 
   1247      1.15  augustss void
   1248      1.15  augustss ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
   1249      1.15  augustss {
   1250      1.29  augustss 	int i;
   1251      1.29  augustss 	u_int32_t stop;
   1252      1.29  augustss 
   1253      1.29  augustss 	stop = 0;
   1254      1.29  augustss 	for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
   1255      1.15  augustss 		ehci_dump_sqtd(sqtd);
   1256  1.47.2.4     skrll 		stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
   1257      1.29  augustss 	}
   1258      1.29  augustss 	if (sqtd)
   1259      1.29  augustss 		printf("dump aborted, too many TDs\n");
   1260       1.9  augustss }
   1261       1.9  augustss 
   1262       1.9  augustss void
   1263       1.9  augustss ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
   1264       1.9  augustss {
   1265       1.9  augustss 	printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
   1266       1.9  augustss 	ehci_dump_qtd(&sqtd->qtd);
   1267       1.9  augustss }
   1268       1.9  augustss 
   1269       1.9  augustss void
   1270       1.9  augustss ehci_dump_qtd(ehci_qtd_t *qtd)
   1271       1.9  augustss {
   1272       1.9  augustss 	u_int32_t s;
   1273      1.15  augustss 	char sbuf[128];
   1274       1.9  augustss 
   1275      1.15  augustss 	printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
   1276      1.15  augustss 	printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
   1277       1.9  augustss 	printf("\n");
   1278      1.15  augustss 	s = le32toh(qtd->qtd_status);
   1279      1.15  augustss 	bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
   1280      1.15  augustss 			 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
   1281      1.15  augustss 			 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
   1282       1.9  augustss 	printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
   1283       1.9  augustss 	       s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
   1284       1.9  augustss 	       EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
   1285      1.15  augustss 	printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
   1286      1.15  augustss 	       EHCI_QTD_GET_PID(s), sbuf);
   1287       1.9  augustss 	for (s = 0; s < 5; s++)
   1288      1.15  augustss 		printf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
   1289       1.9  augustss }
   1290       1.9  augustss 
   1291       1.9  augustss void
   1292       1.9  augustss ehci_dump_sqh(ehci_soft_qh_t *sqh)
   1293       1.9  augustss {
   1294       1.9  augustss 	ehci_qh_t *qh = &sqh->qh;
   1295      1.15  augustss 	u_int32_t endp, endphub;
   1296       1.9  augustss 
   1297       1.9  augustss 	printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
   1298      1.15  augustss 	printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
   1299      1.15  augustss 	endp = le32toh(qh->qh_endp);
   1300      1.15  augustss 	printf("  endp=0x%08x\n", endp);
   1301      1.15  augustss 	printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
   1302      1.15  augustss 	       EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
   1303      1.15  augustss 	       EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
   1304      1.15  augustss 	       EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
   1305      1.15  augustss 	printf("    mpl=0x%x ctl=%d nrl=%d\n",
   1306      1.15  augustss 	       EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
   1307      1.15  augustss 	       EHCI_QH_GET_NRL(endp));
   1308      1.15  augustss 	endphub = le32toh(qh->qh_endphub);
   1309      1.15  augustss 	printf("  endphub=0x%08x\n", endphub);
   1310      1.15  augustss 	printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
   1311      1.15  augustss 	       EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
   1312      1.15  augustss 	       EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
   1313      1.15  augustss 	       EHCI_QH_GET_MULT(endphub));
   1314      1.15  augustss 	printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
   1315      1.12  augustss 	printf("Overlay qTD:\n");
   1316       1.9  augustss 	ehci_dump_qtd(&qh->qh_qtd);
   1317       1.9  augustss }
   1318       1.9  augustss 
   1319      1.38    martin #ifdef DIAGNOSTIC
   1320      1.18  augustss Static void
   1321      1.18  augustss ehci_dump_exfer(struct ehci_xfer *ex)
   1322      1.18  augustss {
   1323      1.18  augustss 	printf("ehci_dump_exfer: ex=%p\n", ex);
   1324      1.18  augustss }
   1325      1.38    martin #endif
   1326       1.5  augustss #endif
   1327       1.5  augustss 
   1328       1.5  augustss usbd_status
   1329       1.5  augustss ehci_open(usbd_pipe_handle pipe)
   1330       1.5  augustss {
   1331       1.5  augustss 	usbd_device_handle dev = pipe->device;
   1332       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   1333       1.5  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   1334       1.5  augustss 	u_int8_t addr = dev->address;
   1335       1.5  augustss 	u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   1336       1.5  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   1337      1.10  augustss 	ehci_soft_qh_t *sqh;
   1338      1.10  augustss 	usbd_status err;
   1339      1.10  augustss 	int s;
   1340  1.47.2.4     skrll 	int ival, speed, naks;
   1341  1.47.2.4     skrll 	int hshubaddr, hshubport;
   1342       1.5  augustss 
   1343       1.5  augustss 	DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   1344       1.5  augustss 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   1345       1.5  augustss 
   1346  1.47.2.4     skrll 	if (dev->myhsport) {
   1347  1.47.2.4     skrll 		hshubaddr = dev->myhsport->parent->address;
   1348  1.47.2.4     skrll 		hshubport = dev->myhsport->portno;
   1349  1.47.2.4     skrll 	} else {
   1350  1.47.2.4     skrll 		hshubaddr = 0;
   1351  1.47.2.4     skrll 		hshubport = 0;
   1352  1.47.2.4     skrll 	}
   1353  1.47.2.4     skrll 
   1354      1.17  augustss 	if (sc->sc_dying)
   1355      1.17  augustss 		return (USBD_IOERROR);
   1356      1.17  augustss 
   1357  1.47.2.1     skrll 	epipe->nexttoggle = 0;
   1358  1.47.2.1     skrll 
   1359       1.5  augustss 	if (addr == sc->sc_addr) {
   1360       1.5  augustss 		switch (ed->bEndpointAddress) {
   1361       1.5  augustss 		case USB_CONTROL_ENDPOINT:
   1362       1.5  augustss 			pipe->methods = &ehci_root_ctrl_methods;
   1363       1.5  augustss 			break;
   1364       1.5  augustss 		case UE_DIR_IN | EHCI_INTR_ENDPT:
   1365       1.5  augustss 			pipe->methods = &ehci_root_intr_methods;
   1366       1.5  augustss 			break;
   1367       1.5  augustss 		default:
   1368       1.5  augustss 			return (USBD_INVAL);
   1369       1.5  augustss 		}
   1370      1.10  augustss 		return (USBD_NORMAL_COMPLETION);
   1371      1.10  augustss 	}
   1372      1.10  augustss 
   1373      1.24  augustss 	/* XXX All this stuff is only valid for async. */
   1374      1.11  augustss 	switch (dev->speed) {
   1375      1.11  augustss 	case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
   1376      1.11  augustss 	case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
   1377      1.11  augustss 	case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
   1378      1.37    provos 	default: panic("ehci_open: bad device speed %d", dev->speed);
   1379      1.11  augustss 	}
   1380  1.47.2.8     skrll 	if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
   1381  1.47.2.8     skrll 		printf("%s: *** WARNING: opening low/full speed isoc device, "
   1382  1.47.2.8     skrll 		       "this does not work yet.\n",
   1383  1.47.2.4     skrll 		       USBDEVNAME(sc->sc_bus.bdev));
   1384  1.47.2.4     skrll 		DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
   1385  1.47.2.4     skrll 			    hshubaddr, hshubport));
   1386  1.47.2.8     skrll 		return USBD_INVAL;
   1387  1.47.2.4     skrll 	}
   1388  1.47.2.4     skrll 
   1389      1.10  augustss 	naks = 8;		/* XXX */
   1390      1.10  augustss 	sqh = ehci_alloc_sqh(sc);
   1391      1.10  augustss 	if (sqh == NULL)
   1392      1.10  augustss 		goto bad0;
   1393      1.10  augustss 	/* qh_link filled when the QH is added */
   1394      1.10  augustss 	sqh->qh.qh_endp = htole32(
   1395      1.10  augustss 		EHCI_QH_SET_ADDR(addr) |
   1396  1.47.2.1     skrll 		EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
   1397  1.47.2.1     skrll 		EHCI_QH_SET_EPS(speed) |
   1398  1.47.2.1     skrll 		EHCI_QH_DTC |
   1399      1.10  augustss 		EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
   1400      1.10  augustss 		(speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
   1401      1.10  augustss 		 EHCI_QH_CTL : 0) |
   1402      1.10  augustss 		EHCI_QH_SET_NRL(naks)
   1403      1.10  augustss 		);
   1404      1.10  augustss 	sqh->qh.qh_endphub = htole32(
   1405  1.47.2.4     skrll 		EHCI_QH_SET_MULT(1) |
   1406  1.47.2.4     skrll 		EHCI_QH_SET_HUBA(hshubaddr) |
   1407  1.47.2.4     skrll 		EHCI_QH_SET_PORT(hshubport) |
   1408  1.47.2.8     skrll 		EHCI_QH_SET_CMASK(0x08) | /* XXX */
   1409  1.47.2.8     skrll 		EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0)
   1410      1.10  augustss 		);
   1411      1.11  augustss 	sqh->qh.qh_curqtd = EHCI_NULL;
   1412      1.11  augustss 	/* Fill the overlay qTD */
   1413      1.11  augustss 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
   1414      1.11  augustss 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
   1415      1.15  augustss 	sqh->qh.qh_qtd.qtd_status = htole32(0);
   1416      1.10  augustss 
   1417      1.10  augustss 	epipe->sqh = sqh;
   1418       1.5  augustss 
   1419      1.10  augustss 	switch (xfertype) {
   1420      1.10  augustss 	case UE_CONTROL:
   1421      1.33  augustss 		err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
   1422      1.10  augustss 				   0, &epipe->u.ctl.reqdma);
   1423      1.25  augustss #ifdef EHCI_DEBUG
   1424      1.25  augustss 		if (err)
   1425      1.25  augustss 			printf("ehci_open: usb_allocmem()=%d\n", err);
   1426      1.25  augustss #endif
   1427      1.10  augustss 		if (err)
   1428      1.11  augustss 			goto bad1;
   1429      1.11  augustss 		pipe->methods = &ehci_device_ctrl_methods;
   1430      1.10  augustss 		s = splusb();
   1431      1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1432      1.10  augustss 		splx(s);
   1433      1.10  augustss 		break;
   1434      1.10  augustss 	case UE_BULK:
   1435      1.10  augustss 		pipe->methods = &ehci_device_bulk_methods;
   1436      1.10  augustss 		s = splusb();
   1437      1.11  augustss 		ehci_add_qh(sqh, sc->sc_async_head);
   1438      1.10  augustss 		splx(s);
   1439      1.10  augustss 		break;
   1440      1.24  augustss 	case UE_INTERRUPT:
   1441      1.24  augustss 		pipe->methods = &ehci_device_intr_methods;
   1442  1.47.2.4     skrll 		ival = pipe->interval;
   1443  1.47.2.4     skrll 		if (ival == USBD_DEFAULT_INTERVAL)
   1444  1.47.2.4     skrll 			ival = ed->bInterval;
   1445  1.47.2.4     skrll 		return (ehci_device_setintr(sc, sqh, ival));
   1446      1.24  augustss 	case UE_ISOCHRONOUS:
   1447      1.24  augustss 		pipe->methods = &ehci_device_isoc_methods;
   1448      1.24  augustss 		return (USBD_INVAL);
   1449      1.10  augustss 	default:
   1450      1.10  augustss 		return (USBD_INVAL);
   1451       1.5  augustss 	}
   1452       1.5  augustss 	return (USBD_NORMAL_COMPLETION);
   1453       1.5  augustss 
   1454      1.11  augustss  bad1:
   1455      1.11  augustss 	ehci_free_sqh(sc, sqh);
   1456       1.5  augustss  bad0:
   1457       1.5  augustss 	return (USBD_NOMEM);
   1458      1.10  augustss }
   1459      1.10  augustss 
   1460      1.10  augustss /*
   1461      1.10  augustss  * Add an ED to the schedule.  Called at splusb().
   1462      1.10  augustss  */
   1463      1.10  augustss void
   1464      1.10  augustss ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1465      1.10  augustss {
   1466      1.10  augustss 	SPLUSBCHECK;
   1467      1.10  augustss 
   1468      1.10  augustss 	sqh->next = head->next;
   1469      1.10  augustss 	sqh->qh.qh_link = head->qh.qh_link;
   1470      1.10  augustss 	head->next = sqh;
   1471      1.15  augustss 	head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
   1472      1.10  augustss 
   1473      1.10  augustss #ifdef EHCI_DEBUG
   1474      1.22  augustss 	if (ehcidebug > 5) {
   1475      1.10  augustss 		printf("ehci_add_qh:\n");
   1476      1.10  augustss 		ehci_dump_sqh(sqh);
   1477      1.10  augustss 	}
   1478       1.5  augustss #endif
   1479       1.5  augustss }
   1480       1.5  augustss 
   1481      1.10  augustss /*
   1482      1.10  augustss  * Remove an ED from the schedule.  Called at splusb().
   1483      1.10  augustss  */
   1484      1.10  augustss void
   1485      1.10  augustss ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
   1486      1.10  augustss {
   1487      1.33  augustss 	ehci_soft_qh_t *p;
   1488      1.10  augustss 
   1489      1.10  augustss 	SPLUSBCHECK;
   1490      1.10  augustss 	/* XXX */
   1491      1.42  augustss 	for (p = head; p != NULL && p->next != sqh; p = p->next)
   1492      1.10  augustss 		;
   1493      1.10  augustss 	if (p == NULL)
   1494      1.37    provos 		panic("ehci_rem_qh: ED not found");
   1495      1.10  augustss 	p->next = sqh->next;
   1496      1.10  augustss 	p->qh.qh_link = sqh->qh.qh_link;
   1497      1.10  augustss 
   1498      1.11  augustss 	ehci_sync_hc(sc);
   1499      1.11  augustss }
   1500      1.11  augustss 
   1501      1.23  augustss void
   1502      1.23  augustss ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
   1503      1.23  augustss {
   1504  1.47.2.4     skrll 	int i;
   1505  1.47.2.4     skrll 	u_int32_t status;
   1506  1.47.2.4     skrll 
   1507  1.47.2.4     skrll 	/* Save toggle bit and ping status. */
   1508  1.47.2.4     skrll 	status = sqh->qh.qh_qtd.qtd_status &
   1509  1.47.2.4     skrll 	    htole32(EHCI_QTD_TOGGLE_MASK |
   1510  1.47.2.4     skrll 		    EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
   1511  1.47.2.4     skrll 	/* Set HALTED to make hw leave it alone. */
   1512  1.47.2.4     skrll 	sqh->qh.qh_qtd.qtd_status =
   1513  1.47.2.4     skrll 	    htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
   1514      1.23  augustss 	sqh->qh.qh_curqtd = 0;
   1515      1.23  augustss 	sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
   1516  1.47.2.4     skrll 	sqh->qh.qh_qtd.qtd_altnext = 0;
   1517  1.47.2.4     skrll 	for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
   1518  1.47.2.4     skrll 		sqh->qh.qh_qtd.qtd_buffer[i] = 0;
   1519      1.23  augustss 	sqh->sqtd = sqtd;
   1520  1.47.2.4     skrll 	/* Set !HALTED && !ACTIVE to start execution, preserve some fields */
   1521  1.47.2.4     skrll 	sqh->qh.qh_qtd.qtd_status = status;
   1522      1.23  augustss }
   1523      1.23  augustss 
   1524      1.11  augustss /*
   1525      1.11  augustss  * Ensure that the HC has released all references to the QH.  We do this
   1526      1.11  augustss  * by asking for a Async Advance Doorbell interrupt and then we wait for
   1527      1.11  augustss  * the interrupt.
   1528      1.11  augustss  * To make this easier we first obtain exclusive use of the doorbell.
   1529      1.11  augustss  */
   1530      1.11  augustss void
   1531      1.11  augustss ehci_sync_hc(ehci_softc_t *sc)
   1532      1.11  augustss {
   1533      1.15  augustss 	int s, error;
   1534      1.11  augustss 
   1535      1.12  augustss 	if (sc->sc_dying) {
   1536      1.12  augustss 		DPRINTFN(2,("ehci_sync_hc: dying\n"));
   1537      1.12  augustss 		return;
   1538      1.12  augustss 	}
   1539      1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: enter\n"));
   1540  1.47.2.4     skrll 	usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */
   1541      1.10  augustss 	s = splhardusb();
   1542      1.10  augustss 	/* ask for doorbell */
   1543      1.10  augustss 	EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
   1544      1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1545      1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1546      1.15  augustss 	error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */
   1547      1.15  augustss 	DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
   1548      1.15  augustss 		    EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
   1549      1.10  augustss 	splx(s);
   1550  1.47.2.4     skrll 	usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */
   1551      1.15  augustss #ifdef DIAGNOSTIC
   1552      1.15  augustss 	if (error)
   1553      1.15  augustss 		printf("ehci_sync_hc: tsleep() = %d\n", error);
   1554      1.15  augustss #endif
   1555      1.12  augustss 	DPRINTFN(2,("ehci_sync_hc: exit\n"));
   1556      1.10  augustss }
   1557      1.10  augustss 
   1558       1.5  augustss /***********/
   1559       1.5  augustss 
   1560       1.5  augustss /*
   1561       1.5  augustss  * Data structures and routines to emulate the root hub.
   1562       1.5  augustss  */
   1563       1.5  augustss Static usb_device_descriptor_t ehci_devd = {
   1564       1.5  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1565       1.5  augustss 	UDESC_DEVICE,		/* type */
   1566       1.5  augustss 	{0x00, 0x02},		/* USB version */
   1567       1.5  augustss 	UDCLASS_HUB,		/* class */
   1568       1.5  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1569      1.11  augustss 	UDPROTO_HSHUBSTT,	/* protocol */
   1570       1.5  augustss 	64,			/* max packet */
   1571       1.5  augustss 	{0},{0},{0x00,0x01},	/* device id */
   1572       1.5  augustss 	1,2,0,			/* string indicies */
   1573       1.5  augustss 	1			/* # of configurations */
   1574       1.5  augustss };
   1575       1.5  augustss 
   1576      1.11  augustss Static usb_device_qualifier_t ehci_odevd = {
   1577      1.11  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   1578      1.11  augustss 	UDESC_DEVICE_QUALIFIER,	/* type */
   1579      1.11  augustss 	{0x00, 0x02},		/* USB version */
   1580      1.11  augustss 	UDCLASS_HUB,		/* class */
   1581      1.11  augustss 	UDSUBCLASS_HUB,		/* subclass */
   1582      1.11  augustss 	UDPROTO_FSHUB,		/* protocol */
   1583      1.11  augustss 	64,			/* max packet */
   1584      1.11  augustss 	1,			/* # of configurations */
   1585      1.11  augustss 	0
   1586      1.11  augustss };
   1587      1.11  augustss 
   1588       1.5  augustss Static usb_config_descriptor_t ehci_confd = {
   1589       1.5  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   1590       1.5  augustss 	UDESC_CONFIG,
   1591       1.5  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   1592       1.5  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   1593       1.5  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   1594       1.5  augustss 	1,
   1595       1.5  augustss 	1,
   1596       1.5  augustss 	0,
   1597       1.5  augustss 	UC_SELF_POWERED,
   1598       1.5  augustss 	0			/* max power */
   1599       1.5  augustss };
   1600       1.5  augustss 
   1601       1.5  augustss Static usb_interface_descriptor_t ehci_ifcd = {
   1602       1.5  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   1603       1.5  augustss 	UDESC_INTERFACE,
   1604       1.5  augustss 	0,
   1605       1.5  augustss 	0,
   1606       1.5  augustss 	1,
   1607       1.5  augustss 	UICLASS_HUB,
   1608       1.5  augustss 	UISUBCLASS_HUB,
   1609      1.11  augustss 	UIPROTO_HSHUBSTT,
   1610       1.5  augustss 	0
   1611       1.5  augustss };
   1612       1.5  augustss 
   1613       1.5  augustss Static usb_endpoint_descriptor_t ehci_endpd = {
   1614       1.5  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   1615       1.5  augustss 	UDESC_ENDPOINT,
   1616       1.5  augustss 	UE_DIR_IN | EHCI_INTR_ENDPT,
   1617       1.5  augustss 	UE_INTERRUPT,
   1618       1.5  augustss 	{8, 0},			/* max packet */
   1619       1.5  augustss 	255
   1620       1.5  augustss };
   1621       1.5  augustss 
   1622       1.5  augustss Static usb_hub_descriptor_t ehci_hubd = {
   1623       1.5  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   1624       1.5  augustss 	UDESC_HUB,
   1625       1.5  augustss 	0,
   1626       1.5  augustss 	{0,0},
   1627       1.5  augustss 	0,
   1628       1.5  augustss 	0,
   1629       1.5  augustss 	{0},
   1630       1.5  augustss };
   1631       1.5  augustss 
   1632       1.5  augustss Static int
   1633  1.47.2.8     skrll ehci_str(usb_string_descriptor_t *p, int l, const char *s)
   1634       1.5  augustss {
   1635       1.5  augustss 	int i;
   1636       1.5  augustss 
   1637       1.5  augustss 	if (l == 0)
   1638       1.5  augustss 		return (0);
   1639       1.5  augustss 	p->bLength = 2 * strlen(s) + 2;
   1640       1.5  augustss 	if (l == 1)
   1641       1.5  augustss 		return (1);
   1642       1.5  augustss 	p->bDescriptorType = UDESC_STRING;
   1643       1.5  augustss 	l -= 2;
   1644       1.5  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   1645       1.5  augustss 		USETW2(p->bString[i], 0, s[i]);
   1646       1.5  augustss 	return (2*i+2);
   1647       1.5  augustss }
   1648       1.5  augustss 
   1649       1.5  augustss /*
   1650       1.5  augustss  * Simulate a hardware hub by handling all the necessary requests.
   1651       1.5  augustss  */
   1652       1.5  augustss Static usbd_status
   1653       1.5  augustss ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
   1654       1.5  augustss {
   1655       1.5  augustss 	usbd_status err;
   1656       1.5  augustss 
   1657       1.5  augustss 	/* Insert last in queue. */
   1658       1.5  augustss 	err = usb_insert_transfer(xfer);
   1659       1.5  augustss 	if (err)
   1660       1.5  augustss 		return (err);
   1661       1.5  augustss 
   1662       1.5  augustss 	/* Pipe isn't running, start first */
   1663       1.5  augustss 	return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1664       1.5  augustss }
   1665       1.5  augustss 
   1666       1.5  augustss Static usbd_status
   1667       1.5  augustss ehci_root_ctrl_start(usbd_xfer_handle xfer)
   1668       1.5  augustss {
   1669       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   1670       1.5  augustss 	usb_device_request_t *req;
   1671       1.5  augustss 	void *buf = NULL;
   1672       1.5  augustss 	int port, i;
   1673       1.5  augustss 	int s, len, value, index, l, totlen = 0;
   1674       1.5  augustss 	usb_port_status_t ps;
   1675       1.5  augustss 	usb_hub_descriptor_t hubd;
   1676       1.5  augustss 	usbd_status err;
   1677       1.5  augustss 	u_int32_t v;
   1678       1.5  augustss 
   1679       1.5  augustss 	if (sc->sc_dying)
   1680       1.5  augustss 		return (USBD_IOERROR);
   1681       1.5  augustss 
   1682       1.5  augustss #ifdef DIAGNOSTIC
   1683       1.5  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   1684       1.5  augustss 		/* XXX panic */
   1685       1.5  augustss 		return (USBD_INVAL);
   1686       1.5  augustss #endif
   1687       1.5  augustss 	req = &xfer->request;
   1688       1.5  augustss 
   1689  1.47.2.4     skrll 	DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
   1690       1.5  augustss 		    req->bmRequestType, req->bRequest));
   1691       1.5  augustss 
   1692       1.5  augustss 	len = UGETW(req->wLength);
   1693       1.5  augustss 	value = UGETW(req->wValue);
   1694       1.5  augustss 	index = UGETW(req->wIndex);
   1695       1.5  augustss 
   1696       1.5  augustss 	if (len != 0)
   1697      1.30  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   1698       1.5  augustss 
   1699       1.5  augustss #define C(x,y) ((x) | ((y) << 8))
   1700       1.5  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   1701       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   1702       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   1703       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   1704      1.33  augustss 		/*
   1705       1.5  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   1706       1.5  augustss 		 * for the integrated root hub.
   1707       1.5  augustss 		 */
   1708       1.5  augustss 		break;
   1709       1.5  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   1710       1.5  augustss 		if (len > 0) {
   1711       1.5  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   1712       1.5  augustss 			totlen = 1;
   1713       1.5  augustss 		}
   1714       1.5  augustss 		break;
   1715       1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   1716  1.47.2.4     skrll 		DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
   1717       1.5  augustss 		switch(value >> 8) {
   1718       1.5  augustss 		case UDESC_DEVICE:
   1719       1.5  augustss 			if ((value & 0xff) != 0) {
   1720       1.5  augustss 				err = USBD_IOERROR;
   1721       1.5  augustss 				goto ret;
   1722       1.5  augustss 			}
   1723       1.5  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1724       1.5  augustss 			USETW(ehci_devd.idVendor, sc->sc_id_vendor);
   1725       1.5  augustss 			memcpy(buf, &ehci_devd, l);
   1726       1.5  augustss 			break;
   1727      1.33  augustss 		/*
   1728      1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1729      1.11  augustss 		 * we need this descriptor.
   1730      1.11  augustss 		 */
   1731      1.11  augustss 		case UDESC_DEVICE_QUALIFIER:
   1732      1.11  augustss 			if ((value & 0xff) != 0) {
   1733      1.11  augustss 				err = USBD_IOERROR;
   1734      1.11  augustss 				goto ret;
   1735      1.11  augustss 			}
   1736      1.11  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   1737      1.11  augustss 			memcpy(buf, &ehci_odevd, l);
   1738      1.11  augustss 			break;
   1739      1.33  augustss 		/*
   1740      1.11  augustss 		 * We can't really operate at another speed, but the spec says
   1741      1.11  augustss 		 * we need this descriptor.
   1742      1.11  augustss 		 */
   1743      1.11  augustss 		case UDESC_OTHER_SPEED_CONFIGURATION:
   1744       1.5  augustss 		case UDESC_CONFIG:
   1745       1.5  augustss 			if ((value & 0xff) != 0) {
   1746       1.5  augustss 				err = USBD_IOERROR;
   1747       1.5  augustss 				goto ret;
   1748       1.5  augustss 			}
   1749       1.5  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   1750       1.5  augustss 			memcpy(buf, &ehci_confd, l);
   1751      1.11  augustss 			((usb_config_descriptor_t *)buf)->bDescriptorType =
   1752      1.11  augustss 				value >> 8;
   1753       1.5  augustss 			buf = (char *)buf + l;
   1754       1.5  augustss 			len -= l;
   1755       1.5  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   1756       1.5  augustss 			totlen += l;
   1757       1.5  augustss 			memcpy(buf, &ehci_ifcd, l);
   1758       1.5  augustss 			buf = (char *)buf + l;
   1759       1.5  augustss 			len -= l;
   1760       1.5  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   1761       1.5  augustss 			totlen += l;
   1762       1.5  augustss 			memcpy(buf, &ehci_endpd, l);
   1763       1.5  augustss 			break;
   1764       1.5  augustss 		case UDESC_STRING:
   1765       1.5  augustss 			if (len == 0)
   1766       1.5  augustss 				break;
   1767       1.5  augustss 			*(u_int8_t *)buf = 0;
   1768       1.5  augustss 			totlen = 1;
   1769       1.5  augustss 			switch (value & 0xff) {
   1770  1.47.2.4     skrll 			case 0: /* Language table */
   1771  1.47.2.4     skrll 				totlen = ehci_str(buf, len, "\001");
   1772  1.47.2.4     skrll 				break;
   1773       1.5  augustss 			case 1: /* Vendor */
   1774       1.5  augustss 				totlen = ehci_str(buf, len, sc->sc_vendor);
   1775       1.5  augustss 				break;
   1776       1.5  augustss 			case 2: /* Product */
   1777       1.5  augustss 				totlen = ehci_str(buf, len, "EHCI root hub");
   1778       1.5  augustss 				break;
   1779       1.5  augustss 			}
   1780       1.5  augustss 			break;
   1781       1.5  augustss 		default:
   1782       1.5  augustss 			err = USBD_IOERROR;
   1783       1.5  augustss 			goto ret;
   1784       1.5  augustss 		}
   1785       1.5  augustss 		break;
   1786       1.5  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   1787       1.5  augustss 		if (len > 0) {
   1788       1.5  augustss 			*(u_int8_t *)buf = 0;
   1789       1.5  augustss 			totlen = 1;
   1790       1.5  augustss 		}
   1791       1.5  augustss 		break;
   1792       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   1793       1.5  augustss 		if (len > 1) {
   1794       1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   1795       1.5  augustss 			totlen = 2;
   1796       1.5  augustss 		}
   1797       1.5  augustss 		break;
   1798       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   1799       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   1800       1.5  augustss 		if (len > 1) {
   1801       1.5  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   1802       1.5  augustss 			totlen = 2;
   1803       1.5  augustss 		}
   1804       1.5  augustss 		break;
   1805       1.5  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   1806       1.5  augustss 		if (value >= USB_MAX_DEVICES) {
   1807       1.5  augustss 			err = USBD_IOERROR;
   1808       1.5  augustss 			goto ret;
   1809       1.5  augustss 		}
   1810       1.5  augustss 		sc->sc_addr = value;
   1811       1.5  augustss 		break;
   1812       1.5  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   1813       1.5  augustss 		if (value != 0 && value != 1) {
   1814       1.5  augustss 			err = USBD_IOERROR;
   1815       1.5  augustss 			goto ret;
   1816       1.5  augustss 		}
   1817       1.5  augustss 		sc->sc_conf = value;
   1818       1.5  augustss 		break;
   1819       1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   1820       1.5  augustss 		break;
   1821       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   1822       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   1823       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   1824       1.5  augustss 		err = USBD_IOERROR;
   1825       1.5  augustss 		goto ret;
   1826       1.5  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   1827       1.5  augustss 		break;
   1828       1.5  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   1829       1.5  augustss 		break;
   1830       1.5  augustss 	/* Hub requests */
   1831       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   1832       1.5  augustss 		break;
   1833       1.5  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   1834  1.47.2.9  christos 		DPRINTFN(4, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
   1835       1.5  augustss 			     "port=%d feature=%d\n",
   1836       1.5  augustss 			     index, value));
   1837       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1838       1.5  augustss 			err = USBD_IOERROR;
   1839       1.5  augustss 			goto ret;
   1840       1.5  augustss 		}
   1841       1.5  augustss 		port = EHCI_PORTSC(index);
   1842  1.47.2.9  christos 		v = EOREAD4(sc, port);
   1843  1.47.2.9  christos 		DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
   1844  1.47.2.9  christos 		v &= ~EHCI_PS_CLEAR;
   1845       1.5  augustss 		switch(value) {
   1846       1.5  augustss 		case UHF_PORT_ENABLE:
   1847       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PE);
   1848       1.5  augustss 			break;
   1849       1.5  augustss 		case UHF_PORT_SUSPEND:
   1850       1.5  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
   1851       1.5  augustss 			break;
   1852       1.5  augustss 		case UHF_PORT_POWER:
   1853  1.47.2.9  christos 			if (sc->sc_hasppc)
   1854  1.47.2.9  christos 				EOWRITE4(sc, port, v &~ EHCI_PS_PP);
   1855       1.5  augustss 			break;
   1856      1.14  augustss 		case UHF_PORT_TEST:
   1857  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
   1858      1.14  augustss 				    "%d\n", index));
   1859      1.14  augustss 			break;
   1860      1.14  augustss 		case UHF_PORT_INDICATOR:
   1861  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
   1862      1.14  augustss 				    "%d\n", index));
   1863      1.14  augustss 			EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
   1864      1.14  augustss 			break;
   1865       1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1866       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_CSC);
   1867       1.5  augustss 			break;
   1868       1.5  augustss 		case UHF_C_PORT_ENABLE:
   1869       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PEC);
   1870       1.5  augustss 			break;
   1871       1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1872       1.5  augustss 			/* how? */
   1873       1.5  augustss 			break;
   1874       1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1875       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_OCC);
   1876       1.5  augustss 			break;
   1877       1.5  augustss 		case UHF_C_PORT_RESET:
   1878  1.47.2.9  christos 			sc->sc_isreset[index] = 0;
   1879       1.5  augustss 			break;
   1880       1.5  augustss 		default:
   1881       1.5  augustss 			err = USBD_IOERROR;
   1882       1.5  augustss 			goto ret;
   1883       1.5  augustss 		}
   1884       1.5  augustss #if 0
   1885       1.5  augustss 		switch(value) {
   1886       1.5  augustss 		case UHF_C_PORT_CONNECTION:
   1887       1.5  augustss 		case UHF_C_PORT_ENABLE:
   1888       1.5  augustss 		case UHF_C_PORT_SUSPEND:
   1889       1.5  augustss 		case UHF_C_PORT_OVER_CURRENT:
   1890       1.5  augustss 		case UHF_C_PORT_RESET:
   1891       1.5  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   1892       1.5  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   1893       1.6  augustss 				ehci_pcd_able(sc, 1);
   1894       1.5  augustss 			break;
   1895       1.5  augustss 		default:
   1896       1.5  augustss 			break;
   1897       1.5  augustss 		}
   1898       1.5  augustss #endif
   1899       1.5  augustss 		break;
   1900       1.5  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   1901  1.47.2.1     skrll 		if ((value & 0xff) != 0) {
   1902       1.5  augustss 			err = USBD_IOERROR;
   1903       1.5  augustss 			goto ret;
   1904       1.5  augustss 		}
   1905       1.5  augustss 		hubd = ehci_hubd;
   1906       1.5  augustss 		hubd.bNbrPorts = sc->sc_noport;
   1907       1.5  augustss 		v = EOREAD4(sc, EHCI_HCSPARAMS);
   1908       1.5  augustss 		USETW(hubd.wHubCharacteristics,
   1909      1.14  augustss 		    EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
   1910  1.47.2.4     skrll 		    EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
   1911      1.14  augustss 		        ? UHD_PORT_IND : 0);
   1912       1.5  augustss 		hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
   1913      1.33  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   1914       1.5  augustss 			hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
   1915       1.5  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   1916       1.5  augustss 		l = min(len, hubd.bDescLength);
   1917       1.5  augustss 		totlen = l;
   1918       1.5  augustss 		memcpy(buf, &hubd, l);
   1919       1.5  augustss 		break;
   1920       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   1921       1.5  augustss 		if (len != 4) {
   1922       1.5  augustss 			err = USBD_IOERROR;
   1923       1.5  augustss 			goto ret;
   1924       1.5  augustss 		}
   1925       1.5  augustss 		memset(buf, 0, len); /* ? XXX */
   1926       1.5  augustss 		totlen = len;
   1927       1.5  augustss 		break;
   1928       1.5  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   1929  1.47.2.4     skrll 		DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
   1930       1.5  augustss 			    index));
   1931       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1932       1.5  augustss 			err = USBD_IOERROR;
   1933       1.5  augustss 			goto ret;
   1934       1.5  augustss 		}
   1935       1.5  augustss 		if (len != 4) {
   1936       1.5  augustss 			err = USBD_IOERROR;
   1937       1.5  augustss 			goto ret;
   1938       1.5  augustss 		}
   1939       1.5  augustss 		v = EOREAD4(sc, EHCI_PORTSC(index));
   1940  1.47.2.4     skrll 		DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n",
   1941       1.5  augustss 			    v));
   1942      1.11  augustss 		i = UPS_HIGH_SPEED;
   1943       1.5  augustss 		if (v & EHCI_PS_CS)	i |= UPS_CURRENT_CONNECT_STATUS;
   1944       1.5  augustss 		if (v & EHCI_PS_PE)	i |= UPS_PORT_ENABLED;
   1945       1.5  augustss 		if (v & EHCI_PS_SUSP)	i |= UPS_SUSPEND;
   1946       1.5  augustss 		if (v & EHCI_PS_OCA)	i |= UPS_OVERCURRENT_INDICATOR;
   1947       1.5  augustss 		if (v & EHCI_PS_PR)	i |= UPS_RESET;
   1948       1.5  augustss 		if (v & EHCI_PS_PP)	i |= UPS_PORT_POWER;
   1949       1.5  augustss 		USETW(ps.wPortStatus, i);
   1950       1.5  augustss 		i = 0;
   1951       1.5  augustss 		if (v & EHCI_PS_CSC)	i |= UPS_C_CONNECT_STATUS;
   1952       1.5  augustss 		if (v & EHCI_PS_PEC)	i |= UPS_C_PORT_ENABLED;
   1953       1.5  augustss 		if (v & EHCI_PS_OCC)	i |= UPS_C_OVERCURRENT_INDICATOR;
   1954  1.47.2.9  christos 		if (sc->sc_isreset[index]) i |= UPS_C_PORT_RESET;
   1955       1.5  augustss 		USETW(ps.wPortChange, i);
   1956       1.5  augustss 		l = min(len, sizeof ps);
   1957       1.5  augustss 		memcpy(buf, &ps, l);
   1958       1.5  augustss 		totlen = l;
   1959       1.5  augustss 		break;
   1960       1.5  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   1961       1.5  augustss 		err = USBD_IOERROR;
   1962       1.5  augustss 		goto ret;
   1963       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   1964       1.5  augustss 		break;
   1965       1.5  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   1966       1.5  augustss 		if (index < 1 || index > sc->sc_noport) {
   1967       1.5  augustss 			err = USBD_IOERROR;
   1968       1.5  augustss 			goto ret;
   1969       1.5  augustss 		}
   1970       1.5  augustss 		port = EHCI_PORTSC(index);
   1971  1.47.2.9  christos 		v = EOREAD4(sc, port);
   1972  1.47.2.9  christos 		DPRINTFN(4, ("ehci_root_ctrl_start: portsc=0x%08x\n", v));
   1973  1.47.2.9  christos 		v &= ~EHCI_PS_CLEAR;
   1974       1.5  augustss 		switch(value) {
   1975       1.5  augustss 		case UHF_PORT_ENABLE:
   1976       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PE);
   1977       1.5  augustss 			break;
   1978       1.5  augustss 		case UHF_PORT_SUSPEND:
   1979       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_SUSP);
   1980       1.5  augustss 			break;
   1981       1.5  augustss 		case UHF_PORT_RESET:
   1982  1.47.2.4     skrll 			DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
   1983       1.5  augustss 				    index));
   1984       1.6  augustss 			if (EHCI_PS_IS_LOWSPEED(v)) {
   1985       1.6  augustss 				/* Low speed device, give up ownership. */
   1986       1.6  augustss 				ehci_disown(sc, index, 1);
   1987       1.6  augustss 				break;
   1988       1.6  augustss 			}
   1989       1.8  augustss 			/* Start reset sequence. */
   1990       1.8  augustss 			v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
   1991       1.5  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PR);
   1992       1.8  augustss 			/* Wait for reset to complete. */
   1993      1.13  augustss 			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   1994      1.17  augustss 			if (sc->sc_dying) {
   1995      1.17  augustss 				err = USBD_IOERROR;
   1996      1.17  augustss 				goto ret;
   1997      1.17  augustss 			}
   1998       1.8  augustss 			/* Terminate reset sequence. */
   1999       1.8  augustss 			EOWRITE4(sc, port, v);
   2000       1.8  augustss 			/* Wait for HC to complete reset. */
   2001      1.13  augustss 			usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
   2002      1.17  augustss 			if (sc->sc_dying) {
   2003      1.17  augustss 				err = USBD_IOERROR;
   2004      1.17  augustss 				goto ret;
   2005      1.17  augustss 			}
   2006       1.8  augustss 			v = EOREAD4(sc, port);
   2007       1.8  augustss 			DPRINTF(("ehci after reset, status=0x%08x\n", v));
   2008       1.8  augustss 			if (v & EHCI_PS_PR) {
   2009       1.8  augustss 				printf("%s: port reset timeout\n",
   2010       1.8  augustss 				       USBDEVNAME(sc->sc_bus.bdev));
   2011       1.8  augustss 				return (USBD_TIMEOUT);
   2012       1.5  augustss 			}
   2013       1.8  augustss 			if (!(v & EHCI_PS_PE)) {
   2014       1.6  augustss 				/* Not a high speed device, give up ownership.*/
   2015       1.6  augustss 				ehci_disown(sc, index, 0);
   2016       1.6  augustss 				break;
   2017       1.6  augustss 			}
   2018  1.47.2.9  christos 			sc->sc_isreset[index] = 1;
   2019       1.8  augustss 			DPRINTF(("ehci port %d reset, status = 0x%08x\n",
   2020       1.6  augustss 				 index, v));
   2021       1.5  augustss 			break;
   2022       1.5  augustss 		case UHF_PORT_POWER:
   2023  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: set port power "
   2024  1.47.2.9  christos 				    "%d (has PPC = %d)\n", index,
   2025  1.47.2.9  christos 				    sc->sc_hasppc));
   2026  1.47.2.9  christos 			if (sc->sc_hasppc)
   2027  1.47.2.9  christos 				EOWRITE4(sc, port, v | EHCI_PS_PP);
   2028       1.5  augustss 			break;
   2029      1.11  augustss 		case UHF_PORT_TEST:
   2030  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: set port test "
   2031      1.11  augustss 				    "%d\n", index));
   2032      1.11  augustss 			break;
   2033      1.11  augustss 		case UHF_PORT_INDICATOR:
   2034  1.47.2.4     skrll 			DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
   2035      1.11  augustss 				    "%d\n", index));
   2036      1.14  augustss 			EOWRITE4(sc, port, v | EHCI_PS_PIC);
   2037      1.11  augustss 			break;
   2038       1.5  augustss 		default:
   2039       1.5  augustss 			err = USBD_IOERROR;
   2040       1.5  augustss 			goto ret;
   2041       1.5  augustss 		}
   2042       1.5  augustss 		break;
   2043      1.11  augustss 	case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
   2044      1.11  augustss 	case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
   2045      1.11  augustss 	case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
   2046      1.11  augustss 	case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
   2047      1.11  augustss 		break;
   2048       1.5  augustss 	default:
   2049       1.5  augustss 		err = USBD_IOERROR;
   2050       1.5  augustss 		goto ret;
   2051       1.5  augustss 	}
   2052       1.5  augustss 	xfer->actlen = totlen;
   2053       1.5  augustss 	err = USBD_NORMAL_COMPLETION;
   2054       1.5  augustss  ret:
   2055       1.5  augustss 	xfer->status = err;
   2056       1.5  augustss 	s = splusb();
   2057       1.5  augustss 	usb_transfer_complete(xfer);
   2058       1.5  augustss 	splx(s);
   2059       1.5  augustss 	return (USBD_IN_PROGRESS);
   2060       1.6  augustss }
   2061       1.6  augustss 
   2062       1.6  augustss void
   2063       1.6  augustss ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
   2064       1.6  augustss {
   2065      1.24  augustss 	int port;
   2066       1.6  augustss 	u_int32_t v;
   2067       1.6  augustss 
   2068       1.6  augustss 	DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
   2069       1.6  augustss #ifdef DIAGNOSTIC
   2070       1.6  augustss 	if (sc->sc_npcomp != 0) {
   2071      1.24  augustss 		int i = (index-1) / sc->sc_npcomp;
   2072       1.6  augustss 		if (i >= sc->sc_ncomp)
   2073       1.6  augustss 			printf("%s: strange port\n",
   2074       1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev));
   2075       1.6  augustss 		else
   2076       1.6  augustss 			printf("%s: handing over %s speed device on "
   2077       1.6  augustss 			       "port %d to %s\n",
   2078       1.6  augustss 			       USBDEVNAME(sc->sc_bus.bdev),
   2079       1.6  augustss 			       lowspeed ? "low" : "full",
   2080       1.6  augustss 			       index, USBDEVNAME(sc->sc_comps[i]->bdev));
   2081       1.6  augustss 	} else {
   2082       1.6  augustss 		printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
   2083       1.6  augustss 	}
   2084       1.6  augustss #endif
   2085       1.6  augustss 	port = EHCI_PORTSC(index);
   2086       1.6  augustss 	v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
   2087       1.6  augustss 	EOWRITE4(sc, port, v | EHCI_PS_PO);
   2088       1.5  augustss }
   2089       1.5  augustss 
   2090       1.5  augustss /* Abort a root control request. */
   2091       1.5  augustss Static void
   2092       1.5  augustss ehci_root_ctrl_abort(usbd_xfer_handle xfer)
   2093       1.5  augustss {
   2094       1.5  augustss 	/* Nothing to do, all transfers are synchronous. */
   2095       1.5  augustss }
   2096       1.5  augustss 
   2097       1.5  augustss /* Close the root pipe. */
   2098       1.5  augustss Static void
   2099       1.5  augustss ehci_root_ctrl_close(usbd_pipe_handle pipe)
   2100       1.5  augustss {
   2101       1.5  augustss 	DPRINTF(("ehci_root_ctrl_close\n"));
   2102       1.5  augustss 	/* Nothing to do. */
   2103       1.5  augustss }
   2104       1.5  augustss 
   2105       1.5  augustss void
   2106       1.5  augustss ehci_root_intr_done(usbd_xfer_handle xfer)
   2107       1.5  augustss {
   2108  1.47.2.4     skrll 	xfer->hcpriv = NULL;
   2109       1.5  augustss }
   2110       1.5  augustss 
   2111       1.5  augustss Static usbd_status
   2112       1.5  augustss ehci_root_intr_transfer(usbd_xfer_handle xfer)
   2113       1.5  augustss {
   2114       1.5  augustss 	usbd_status err;
   2115       1.5  augustss 
   2116       1.5  augustss 	/* Insert last in queue. */
   2117       1.5  augustss 	err = usb_insert_transfer(xfer);
   2118       1.5  augustss 	if (err)
   2119       1.5  augustss 		return (err);
   2120       1.5  augustss 
   2121       1.5  augustss 	/* Pipe isn't running, start first */
   2122       1.5  augustss 	return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2123       1.5  augustss }
   2124       1.5  augustss 
   2125       1.5  augustss Static usbd_status
   2126       1.5  augustss ehci_root_intr_start(usbd_xfer_handle xfer)
   2127       1.5  augustss {
   2128       1.5  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   2129       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2130       1.5  augustss 
   2131       1.5  augustss 	if (sc->sc_dying)
   2132       1.5  augustss 		return (USBD_IOERROR);
   2133       1.5  augustss 
   2134       1.5  augustss 	sc->sc_intrxfer = xfer;
   2135       1.5  augustss 
   2136       1.5  augustss 	return (USBD_IN_PROGRESS);
   2137       1.5  augustss }
   2138       1.5  augustss 
   2139       1.5  augustss /* Abort a root interrupt request. */
   2140       1.5  augustss Static void
   2141       1.5  augustss ehci_root_intr_abort(usbd_xfer_handle xfer)
   2142       1.5  augustss {
   2143       1.5  augustss 	int s;
   2144       1.5  augustss 
   2145       1.5  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2146       1.5  augustss 		DPRINTF(("ehci_root_intr_abort: remove\n"));
   2147       1.5  augustss 		xfer->pipe->intrxfer = NULL;
   2148       1.5  augustss 	}
   2149       1.5  augustss 	xfer->status = USBD_CANCELLED;
   2150       1.5  augustss 	s = splusb();
   2151       1.5  augustss 	usb_transfer_complete(xfer);
   2152       1.5  augustss 	splx(s);
   2153       1.5  augustss }
   2154       1.5  augustss 
   2155       1.5  augustss /* Close the root pipe. */
   2156       1.5  augustss Static void
   2157       1.5  augustss ehci_root_intr_close(usbd_pipe_handle pipe)
   2158       1.5  augustss {
   2159       1.5  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2160      1.33  augustss 
   2161       1.5  augustss 	DPRINTF(("ehci_root_intr_close\n"));
   2162       1.5  augustss 
   2163       1.5  augustss 	sc->sc_intrxfer = NULL;
   2164       1.5  augustss }
   2165       1.5  augustss 
   2166       1.5  augustss void
   2167       1.5  augustss ehci_root_ctrl_done(usbd_xfer_handle xfer)
   2168       1.5  augustss {
   2169  1.47.2.4     skrll 	xfer->hcpriv = NULL;
   2170       1.9  augustss }
   2171       1.9  augustss 
   2172       1.9  augustss /************************/
   2173       1.9  augustss 
   2174       1.9  augustss ehci_soft_qh_t *
   2175       1.9  augustss ehci_alloc_sqh(ehci_softc_t *sc)
   2176       1.9  augustss {
   2177       1.9  augustss 	ehci_soft_qh_t *sqh;
   2178       1.9  augustss 	usbd_status err;
   2179       1.9  augustss 	int i, offs;
   2180       1.9  augustss 	usb_dma_t dma;
   2181       1.9  augustss 
   2182       1.9  augustss 	if (sc->sc_freeqhs == NULL) {
   2183       1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
   2184       1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
   2185       1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2186      1.25  augustss #ifdef EHCI_DEBUG
   2187      1.25  augustss 		if (err)
   2188      1.25  augustss 			printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
   2189      1.25  augustss #endif
   2190       1.9  augustss 		if (err)
   2191      1.11  augustss 			return (NULL);
   2192       1.9  augustss 		for(i = 0; i < EHCI_SQH_CHUNK; i++) {
   2193       1.9  augustss 			offs = i * EHCI_SQH_SIZE;
   2194      1.30  augustss 			sqh = KERNADDR(&dma, offs);
   2195      1.31  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   2196       1.9  augustss 			sqh->next = sc->sc_freeqhs;
   2197       1.9  augustss 			sc->sc_freeqhs = sqh;
   2198       1.9  augustss 		}
   2199       1.9  augustss 	}
   2200       1.9  augustss 	sqh = sc->sc_freeqhs;
   2201       1.9  augustss 	sc->sc_freeqhs = sqh->next;
   2202       1.9  augustss 	memset(&sqh->qh, 0, sizeof(ehci_qh_t));
   2203      1.11  augustss 	sqh->next = NULL;
   2204       1.9  augustss 	return (sqh);
   2205       1.9  augustss }
   2206       1.9  augustss 
   2207       1.9  augustss void
   2208       1.9  augustss ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
   2209       1.9  augustss {
   2210       1.9  augustss 	sqh->next = sc->sc_freeqhs;
   2211       1.9  augustss 	sc->sc_freeqhs = sqh;
   2212       1.9  augustss }
   2213       1.9  augustss 
   2214       1.9  augustss ehci_soft_qtd_t *
   2215       1.9  augustss ehci_alloc_sqtd(ehci_softc_t *sc)
   2216       1.9  augustss {
   2217       1.9  augustss 	ehci_soft_qtd_t *sqtd;
   2218       1.9  augustss 	usbd_status err;
   2219       1.9  augustss 	int i, offs;
   2220       1.9  augustss 	usb_dma_t dma;
   2221       1.9  augustss 	int s;
   2222       1.9  augustss 
   2223       1.9  augustss 	if (sc->sc_freeqtds == NULL) {
   2224       1.9  augustss 		DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
   2225       1.9  augustss 		err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
   2226       1.9  augustss 			  EHCI_PAGE_SIZE, &dma);
   2227      1.25  augustss #ifdef EHCI_DEBUG
   2228      1.25  augustss 		if (err)
   2229      1.25  augustss 			printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
   2230      1.25  augustss #endif
   2231       1.9  augustss 		if (err)
   2232       1.9  augustss 			return (NULL);
   2233       1.9  augustss 		s = splusb();
   2234       1.9  augustss 		for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
   2235       1.9  augustss 			offs = i * EHCI_SQTD_SIZE;
   2236      1.30  augustss 			sqtd = KERNADDR(&dma, offs);
   2237      1.31  augustss 			sqtd->physaddr = DMAADDR(&dma, offs);
   2238       1.9  augustss 			sqtd->nextqtd = sc->sc_freeqtds;
   2239       1.9  augustss 			sc->sc_freeqtds = sqtd;
   2240       1.9  augustss 		}
   2241       1.9  augustss 		splx(s);
   2242       1.9  augustss 	}
   2243       1.9  augustss 
   2244       1.9  augustss 	s = splusb();
   2245       1.9  augustss 	sqtd = sc->sc_freeqtds;
   2246       1.9  augustss 	sc->sc_freeqtds = sqtd->nextqtd;
   2247       1.9  augustss 	memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
   2248       1.9  augustss 	sqtd->nextqtd = NULL;
   2249       1.9  augustss 	sqtd->xfer = NULL;
   2250       1.9  augustss 	splx(s);
   2251       1.9  augustss 
   2252       1.9  augustss 	return (sqtd);
   2253       1.9  augustss }
   2254       1.9  augustss 
   2255       1.9  augustss void
   2256       1.9  augustss ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
   2257       1.9  augustss {
   2258       1.9  augustss 	int s;
   2259       1.9  augustss 
   2260       1.9  augustss 	s = splusb();
   2261       1.9  augustss 	sqtd->nextqtd = sc->sc_freeqtds;
   2262       1.9  augustss 	sc->sc_freeqtds = sqtd;
   2263       1.9  augustss 	splx(s);
   2264       1.9  augustss }
   2265       1.9  augustss 
   2266      1.15  augustss usbd_status
   2267      1.25  augustss ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
   2268      1.15  augustss 		     int alen, int rd, usbd_xfer_handle xfer,
   2269      1.15  augustss 		     ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
   2270      1.15  augustss {
   2271      1.15  augustss 	ehci_soft_qtd_t *next, *cur;
   2272      1.22  augustss 	ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
   2273      1.15  augustss 	u_int32_t qtdstatus;
   2274  1.47.2.1     skrll 	int len, curlen, mps;
   2275  1.47.2.1     skrll 	int i, tog;
   2276      1.15  augustss 	usb_dma_t *dma = &xfer->dmabuf;
   2277  1.47.2.8     skrll 	u_int16_t flags = xfer->flags;
   2278      1.15  augustss 
   2279      1.25  augustss 	DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
   2280      1.15  augustss 
   2281      1.15  augustss 	len = alen;
   2282      1.31  augustss 	dataphys = DMAADDR(dma, 0);
   2283      1.22  augustss 	dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
   2284  1.47.2.1     skrll 	qtdstatus = EHCI_QTD_ACTIVE |
   2285      1.15  augustss 	    EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
   2286      1.15  augustss 	    EHCI_QTD_SET_CERR(3)
   2287      1.15  augustss 	    /* IOC set below */
   2288      1.15  augustss 	    /* BYTES set below */
   2289  1.47.2.1     skrll 	    ;
   2290  1.47.2.1     skrll 	mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
   2291  1.47.2.1     skrll 	tog = epipe->nexttoggle;
   2292  1.47.2.1     skrll 	qtdstatus |= EHCI_QTD_SET_TOGGLE(tog);
   2293      1.15  augustss 
   2294      1.15  augustss 	cur = ehci_alloc_sqtd(sc);
   2295      1.25  augustss 	*sp = cur;
   2296      1.15  augustss 	if (cur == NULL)
   2297      1.15  augustss 		goto nomem;
   2298      1.15  augustss 	for (;;) {
   2299      1.22  augustss 		dataphyspage = EHCI_PAGE(dataphys);
   2300      1.26  augustss 		/* The EHCI hardware can handle at most 5 pages. */
   2301      1.33  augustss 		if (dataphyslastpage - dataphyspage <
   2302      1.26  augustss 		    EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
   2303      1.15  augustss 			/* we can handle it in this QTD */
   2304      1.15  augustss 			curlen = len;
   2305      1.15  augustss 		} else {
   2306      1.15  augustss 			/* must use multiple TDs, fill as much as possible. */
   2307      1.33  augustss 			curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
   2308      1.22  augustss 				 EHCI_PAGE_OFFSET(dataphys);
   2309      1.25  augustss #ifdef DIAGNOSTIC
   2310      1.25  augustss 			if (curlen > len) {
   2311      1.26  augustss 				printf("ehci_alloc_sqtd_chain: curlen=0x%x "
   2312      1.26  augustss 				       "len=0x%x offs=0x%x\n", curlen, len,
   2313      1.26  augustss 				       EHCI_PAGE_OFFSET(dataphys));
   2314      1.26  augustss 				printf("lastpage=0x%x page=0x%x phys=0x%x\n",
   2315      1.26  augustss 				       dataphyslastpage, dataphyspage,
   2316      1.26  augustss 				       dataphys);
   2317      1.25  augustss 				curlen = len;
   2318      1.25  augustss 			}
   2319      1.25  augustss #endif
   2320      1.15  augustss 			/* the length must be a multiple of the max size */
   2321  1.47.2.1     skrll 			curlen -= curlen % mps;
   2322      1.25  augustss 			DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
   2323      1.25  augustss 				    "curlen=%d\n", curlen));
   2324      1.15  augustss #ifdef DIAGNOSTIC
   2325      1.15  augustss 			if (curlen == 0)
   2326  1.47.2.8     skrll 				panic("ehci_alloc_sqtd_chain: curlen == 0");
   2327      1.15  augustss #endif
   2328      1.15  augustss 		}
   2329      1.25  augustss 		DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
   2330      1.22  augustss 			    "dataphyslastpage=0x%08x len=%d curlen=%d\n",
   2331      1.22  augustss 			    dataphys, dataphyslastpage,
   2332      1.15  augustss 			    len, curlen));
   2333      1.15  augustss 		len -= curlen;
   2334      1.15  augustss 
   2335  1.47.2.8     skrll 		/*
   2336  1.47.2.8     skrll 		 * Allocate another transfer if there's more data left,
   2337  1.47.2.8     skrll 		 * or if force last short transfer flag is set and we're
   2338  1.47.2.8     skrll 		 * allocating a multiple of the max packet size.
   2339  1.47.2.8     skrll 		 */
   2340  1.47.2.8     skrll 		if (len != 0 ||
   2341  1.47.2.8     skrll 		    ((curlen % mps) == 0 && !rd && curlen != 0 &&
   2342  1.47.2.8     skrll 		     (flags & USBD_FORCE_SHORT_XFER))) {
   2343      1.15  augustss 			next = ehci_alloc_sqtd(sc);
   2344      1.15  augustss 			if (next == NULL)
   2345      1.15  augustss 				goto nomem;
   2346  1.47.2.1     skrll 			nextphys = htole32(next->physaddr);
   2347      1.15  augustss 		} else {
   2348      1.15  augustss 			next = NULL;
   2349      1.15  augustss 			nextphys = EHCI_NULL;
   2350      1.15  augustss 		}
   2351      1.15  augustss 
   2352  1.47.2.8     skrll 		for (i = 0; i * EHCI_PAGE_SIZE <
   2353  1.47.2.8     skrll 		            curlen + EHCI_PAGE_OFFSET(dataphys); i++) {
   2354      1.15  augustss 			ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
   2355      1.15  augustss 			if (i != 0) /* use offset only in first buffer */
   2356      1.15  augustss 				a = EHCI_PAGE(a);
   2357      1.15  augustss 			cur->qtd.qtd_buffer[i] = htole32(a);
   2358  1.47.2.1     skrll 			cur->qtd.qtd_buffer_hi[i] = 0;
   2359      1.25  augustss #ifdef DIAGNOSTIC
   2360      1.25  augustss 			if (i >= EHCI_QTD_NBUFFERS) {
   2361      1.25  augustss 				printf("ehci_alloc_sqtd_chain: i=%d\n", i);
   2362      1.25  augustss 				goto nomem;
   2363      1.25  augustss 			}
   2364      1.25  augustss #endif
   2365      1.15  augustss 		}
   2366      1.15  augustss 		cur->nextqtd = next;
   2367  1.47.2.1     skrll 		cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
   2368      1.15  augustss 		cur->qtd.qtd_status =
   2369  1.47.2.1     skrll 		    htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
   2370      1.15  augustss 		cur->xfer = xfer;
   2371      1.18  augustss 		cur->len = curlen;
   2372      1.29  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
   2373      1.29  augustss 			    dataphys, dataphys + curlen));
   2374  1.47.2.1     skrll 		/* adjust the toggle based on the number of packets in this
   2375  1.47.2.1     skrll 		   qtd */
   2376  1.47.2.1     skrll 		if (((curlen + mps - 1) / mps) & 1) {
   2377  1.47.2.1     skrll 			tog ^= 1;
   2378  1.47.2.1     skrll 			qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
   2379  1.47.2.1     skrll 		}
   2380  1.47.2.8     skrll 		if (next == NULL)
   2381      1.15  augustss 			break;
   2382      1.25  augustss 		DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
   2383      1.15  augustss 		dataphys += curlen;
   2384      1.15  augustss 		cur = next;
   2385      1.15  augustss 	}
   2386      1.15  augustss 	cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
   2387      1.15  augustss 	*ep = cur;
   2388  1.47.2.1     skrll 	epipe->nexttoggle = tog;
   2389      1.15  augustss 
   2390      1.29  augustss 	DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
   2391      1.29  augustss 		     *sp, *ep));
   2392      1.29  augustss 
   2393      1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2394      1.15  augustss 
   2395      1.15  augustss  nomem:
   2396      1.15  augustss 	/* XXX free chain */
   2397      1.25  augustss 	DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
   2398      1.15  augustss 	return (USBD_NOMEM);
   2399      1.15  augustss }
   2400      1.15  augustss 
   2401      1.18  augustss Static void
   2402      1.25  augustss ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
   2403      1.18  augustss 		    ehci_soft_qtd_t *sqtdend)
   2404      1.18  augustss {
   2405      1.18  augustss 	ehci_soft_qtd_t *p;
   2406      1.25  augustss 	int i;
   2407      1.18  augustss 
   2408      1.29  augustss 	DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
   2409      1.29  augustss 		     sqtd, sqtdend));
   2410      1.29  augustss 
   2411      1.25  augustss 	for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
   2412      1.18  augustss 		p = sqtd->nextqtd;
   2413      1.18  augustss 		ehci_free_sqtd(sc, sqtd);
   2414      1.18  augustss 	}
   2415      1.18  augustss }
   2416      1.18  augustss 
   2417      1.15  augustss /****************/
   2418      1.15  augustss 
   2419       1.9  augustss /*
   2420      1.10  augustss  * Close a reqular pipe.
   2421      1.10  augustss  * Assumes that there are no pending transactions.
   2422      1.10  augustss  */
   2423      1.10  augustss void
   2424      1.10  augustss ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
   2425      1.10  augustss {
   2426      1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   2427      1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2428      1.10  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2429      1.10  augustss 	int s;
   2430      1.10  augustss 
   2431      1.10  augustss 	s = splusb();
   2432      1.10  augustss 	ehci_rem_qh(sc, sqh, head);
   2433      1.10  augustss 	splx(s);
   2434      1.10  augustss 	ehci_free_sqh(sc, epipe->sqh);
   2435      1.10  augustss }
   2436      1.10  augustss 
   2437      1.33  augustss /*
   2438      1.10  augustss  * Abort a device request.
   2439      1.10  augustss  * If this routine is called at splusb() it guarantees that the request
   2440      1.10  augustss  * will be removed from the hardware scheduling and that the callback
   2441      1.10  augustss  * for it will be called with USBD_CANCELLED status.
   2442      1.10  augustss  * It's impossible to guarantee that the requested transfer will not
   2443      1.10  augustss  * have happened since the hardware runs concurrently.
   2444      1.10  augustss  * If the transaction has already happened we rely on the ordinary
   2445      1.10  augustss  * interrupt processing to process it.
   2446      1.26  augustss  * XXX This is most probably wrong.
   2447      1.10  augustss  */
   2448      1.10  augustss void
   2449      1.10  augustss ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2450      1.10  augustss {
   2451      1.26  augustss #define exfer EXFER(xfer)
   2452      1.10  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2453      1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2454      1.26  augustss 	ehci_soft_qh_t *sqh = epipe->sqh;
   2455      1.26  augustss 	ehci_soft_qtd_t *sqtd;
   2456      1.26  augustss 	ehci_physaddr_t cur;
   2457      1.26  augustss 	u_int32_t qhstatus;
   2458      1.11  augustss 	int s;
   2459      1.26  augustss 	int hit;
   2460  1.47.2.8     skrll 	int wake;
   2461      1.10  augustss 
   2462      1.24  augustss 	DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
   2463      1.10  augustss 
   2464      1.17  augustss 	if (sc->sc_dying) {
   2465      1.17  augustss 		/* If we're dying, just do the software part. */
   2466      1.17  augustss 		s = splusb();
   2467      1.17  augustss 		xfer->status = status;	/* make software ignore it */
   2468      1.17  augustss 		usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2469      1.17  augustss 		usb_transfer_complete(xfer);
   2470      1.17  augustss 		splx(s);
   2471      1.17  augustss 		return;
   2472      1.17  augustss 	}
   2473      1.17  augustss 
   2474      1.10  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2475      1.37    provos 		panic("ehci_abort_xfer: not in process context");
   2476      1.10  augustss 
   2477      1.11  augustss 	/*
   2478  1.47.2.8     skrll 	 * If an abort is already in progress then just wait for it to
   2479  1.47.2.8     skrll 	 * complete and return.
   2480  1.47.2.8     skrll 	 */
   2481  1.47.2.8     skrll 	if (xfer->hcflags & UXFER_ABORTING) {
   2482  1.47.2.8     skrll 		DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
   2483  1.47.2.8     skrll #ifdef DIAGNOSTIC
   2484  1.47.2.8     skrll 		if (status == USBD_TIMEOUT)
   2485  1.47.2.8     skrll 			printf("ehci_abort_xfer: TIMEOUT while aborting\n");
   2486  1.47.2.8     skrll #endif
   2487  1.47.2.8     skrll 		/* Override the status which might be USBD_TIMEOUT. */
   2488  1.47.2.8     skrll 		xfer->status = status;
   2489  1.47.2.8     skrll 		DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
   2490  1.47.2.8     skrll 		xfer->hcflags |= UXFER_ABORTWAIT;
   2491  1.47.2.8     skrll 		while (xfer->hcflags & UXFER_ABORTING)
   2492  1.47.2.8     skrll 			tsleep(&xfer->hcflags, PZERO, "ehciaw", 0);
   2493  1.47.2.8     skrll 		return;
   2494  1.47.2.8     skrll 	}
   2495  1.47.2.8     skrll 	xfer->hcflags |= UXFER_ABORTING;
   2496  1.47.2.8     skrll 
   2497  1.47.2.8     skrll 	/*
   2498      1.11  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2499      1.11  augustss 	 */
   2500      1.11  augustss 	s = splusb();
   2501      1.11  augustss 	xfer->status = status;	/* make software ignore it */
   2502      1.15  augustss 	usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
   2503      1.26  augustss 	qhstatus = sqh->qh.qh_qtd.qtd_status;
   2504      1.26  augustss 	sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
   2505      1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2506      1.26  augustss 		sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
   2507      1.26  augustss 		if (sqtd == exfer->sqtdend)
   2508      1.26  augustss 			break;
   2509      1.26  augustss 	}
   2510      1.11  augustss 	splx(s);
   2511      1.11  augustss 
   2512      1.33  augustss 	/*
   2513      1.11  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2514      1.11  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2515      1.11  augustss 	 * has run.
   2516      1.11  augustss 	 */
   2517      1.26  augustss 	ehci_sync_hc(sc);
   2518      1.29  augustss 	s = splusb();
   2519  1.47.2.4     skrll #ifdef USB_USE_SOFTINTR
   2520      1.29  augustss 	sc->sc_softwake = 1;
   2521  1.47.2.4     skrll #endif /* USB_USE_SOFTINTR */
   2522      1.29  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2523  1.47.2.4     skrll #ifdef USB_USE_SOFTINTR
   2524      1.29  augustss 	tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
   2525  1.47.2.4     skrll #endif /* USB_USE_SOFTINTR */
   2526      1.29  augustss 	splx(s);
   2527      1.33  augustss 
   2528      1.33  augustss 	/*
   2529      1.11  augustss 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2530      1.11  augustss 	 * The complication here is that the hardware may have executed
   2531      1.11  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2532      1.11  augustss 	 * the TDs of this xfer we check if the hardware points to
   2533      1.11  augustss 	 * any of them.
   2534      1.11  augustss 	 */
   2535      1.11  augustss 	s = splusb();		/* XXX why? */
   2536      1.26  augustss 	cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
   2537      1.26  augustss 	hit = 0;
   2538      1.26  augustss 	for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
   2539      1.26  augustss 		hit |= cur == sqtd->physaddr;
   2540      1.26  augustss 		if (sqtd == exfer->sqtdend)
   2541      1.26  augustss 			break;
   2542      1.26  augustss 	}
   2543      1.26  augustss 	sqtd = sqtd->nextqtd;
   2544      1.26  augustss 	/* Zap curqtd register if hardware pointed inside the xfer. */
   2545      1.26  augustss 	if (hit && sqtd != NULL) {
   2546      1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
   2547      1.26  augustss 		sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
   2548      1.26  augustss 		sqh->qh.qh_qtd.qtd_status = qhstatus;
   2549      1.26  augustss 	} else {
   2550      1.26  augustss 		DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
   2551      1.26  augustss 	}
   2552      1.11  augustss 
   2553      1.11  augustss 	/*
   2554      1.26  augustss 	 * Step 4: Execute callback.
   2555      1.11  augustss 	 */
   2556      1.18  augustss #ifdef DIAGNOSTIC
   2557      1.26  augustss 	exfer->isdone = 1;
   2558      1.18  augustss #endif
   2559  1.47.2.8     skrll 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2560  1.47.2.8     skrll 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2561      1.11  augustss 	usb_transfer_complete(xfer);
   2562  1.47.2.8     skrll 	if (wake)
   2563  1.47.2.8     skrll 		wakeup(&xfer->hcflags);
   2564      1.11  augustss 
   2565      1.11  augustss 	splx(s);
   2566      1.26  augustss #undef exfer
   2567      1.10  augustss }
   2568      1.10  augustss 
   2569      1.15  augustss void
   2570      1.15  augustss ehci_timeout(void *addr)
   2571      1.15  augustss {
   2572      1.15  augustss 	struct ehci_xfer *exfer = addr;
   2573      1.17  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
   2574      1.17  augustss 	ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
   2575      1.15  augustss 
   2576      1.15  augustss 	DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
   2577      1.22  augustss #ifdef USB_DEBUG
   2578      1.26  augustss 	if (ehcidebug > 1)
   2579      1.22  augustss 		usbd_dump_pipe(exfer->xfer.pipe);
   2580      1.22  augustss #endif
   2581      1.15  augustss 
   2582      1.17  augustss 	if (sc->sc_dying) {
   2583      1.17  augustss 		ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
   2584      1.17  augustss 		return;
   2585      1.17  augustss 	}
   2586      1.17  augustss 
   2587      1.15  augustss 	/* Execute the abort in a process context. */
   2588      1.15  augustss 	usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
   2589      1.15  augustss 	usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
   2590      1.15  augustss }
   2591      1.15  augustss 
   2592      1.15  augustss void
   2593      1.15  augustss ehci_timeout_task(void *addr)
   2594      1.15  augustss {
   2595      1.15  augustss 	usbd_xfer_handle xfer = addr;
   2596      1.15  augustss 	int s;
   2597      1.15  augustss 
   2598      1.15  augustss 	DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
   2599      1.15  augustss 
   2600      1.15  augustss 	s = splusb();
   2601      1.15  augustss 	ehci_abort_xfer(xfer, USBD_TIMEOUT);
   2602      1.15  augustss 	splx(s);
   2603      1.15  augustss }
   2604      1.15  augustss 
   2605       1.5  augustss /************************/
   2606       1.5  augustss 
   2607      1.10  augustss Static usbd_status
   2608      1.10  augustss ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2609      1.10  augustss {
   2610      1.10  augustss 	usbd_status err;
   2611      1.10  augustss 
   2612      1.10  augustss 	/* Insert last in queue. */
   2613      1.10  augustss 	err = usb_insert_transfer(xfer);
   2614      1.10  augustss 	if (err)
   2615      1.10  augustss 		return (err);
   2616      1.10  augustss 
   2617      1.10  augustss 	/* Pipe isn't running, start first */
   2618      1.10  augustss 	return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2619      1.10  augustss }
   2620      1.10  augustss 
   2621      1.12  augustss Static usbd_status
   2622      1.12  augustss ehci_device_ctrl_start(usbd_xfer_handle xfer)
   2623      1.12  augustss {
   2624      1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2625      1.15  augustss 	usbd_status err;
   2626      1.15  augustss 
   2627      1.15  augustss 	if (sc->sc_dying)
   2628      1.15  augustss 		return (USBD_IOERROR);
   2629      1.15  augustss 
   2630      1.15  augustss #ifdef DIAGNOSTIC
   2631      1.15  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2632      1.15  augustss 		/* XXX panic */
   2633      1.15  augustss 		printf("ehci_device_ctrl_transfer: not a request\n");
   2634      1.15  augustss 		return (USBD_INVAL);
   2635      1.15  augustss 	}
   2636      1.15  augustss #endif
   2637      1.15  augustss 
   2638      1.15  augustss 	err = ehci_device_request(xfer);
   2639      1.15  augustss 	if (err)
   2640      1.15  augustss 		return (err);
   2641      1.15  augustss 
   2642      1.15  augustss 	if (sc->sc_bus.use_polling)
   2643      1.15  augustss 		ehci_waitintr(sc, xfer);
   2644      1.15  augustss 	return (USBD_IN_PROGRESS);
   2645      1.12  augustss }
   2646      1.10  augustss 
   2647      1.10  augustss void
   2648      1.10  augustss ehci_device_ctrl_done(usbd_xfer_handle xfer)
   2649      1.10  augustss {
   2650      1.18  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   2651      1.18  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2652      1.25  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   2653      1.18  augustss 
   2654      1.10  augustss 	DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
   2655      1.10  augustss 
   2656      1.10  augustss #ifdef DIAGNOSTIC
   2657      1.10  augustss 	if (!(xfer->rqflags & URQ_REQUEST)) {
   2658      1.37    provos 		panic("ehci_ctrl_done: not a request");
   2659      1.10  augustss 	}
   2660      1.10  augustss #endif
   2661      1.18  augustss 
   2662      1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   2663      1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   2664      1.25  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   2665      1.25  augustss 	}
   2666      1.18  augustss 
   2667      1.25  augustss 	DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
   2668      1.10  augustss }
   2669      1.10  augustss 
   2670      1.10  augustss /* Abort a device control request. */
   2671      1.10  augustss Static void
   2672      1.10  augustss ehci_device_ctrl_abort(usbd_xfer_handle xfer)
   2673      1.10  augustss {
   2674      1.10  augustss 	DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
   2675      1.10  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2676      1.10  augustss }
   2677      1.10  augustss 
   2678      1.10  augustss /* Close a device control pipe. */
   2679      1.10  augustss Static void
   2680      1.10  augustss ehci_device_ctrl_close(usbd_pipe_handle pipe)
   2681      1.10  augustss {
   2682      1.10  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2683      1.10  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
   2684      1.10  augustss 
   2685      1.10  augustss 	DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
   2686      1.11  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2687      1.15  augustss }
   2688      1.15  augustss 
   2689      1.15  augustss usbd_status
   2690      1.15  augustss ehci_device_request(usbd_xfer_handle xfer)
   2691      1.15  augustss {
   2692      1.18  augustss #define exfer EXFER(xfer)
   2693      1.15  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2694      1.15  augustss 	usb_device_request_t *req = &xfer->request;
   2695      1.15  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2696      1.15  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2697      1.15  augustss 	int addr = dev->address;
   2698      1.15  augustss 	ehci_soft_qtd_t *setup, *stat, *next;
   2699      1.15  augustss 	ehci_soft_qh_t *sqh;
   2700      1.15  augustss 	int isread;
   2701      1.15  augustss 	int len;
   2702      1.15  augustss 	usbd_status err;
   2703      1.15  augustss 	int s;
   2704      1.15  augustss 
   2705      1.15  augustss 	isread = req->bmRequestType & UT_READ;
   2706      1.15  augustss 	len = UGETW(req->wLength);
   2707      1.15  augustss 
   2708  1.47.2.4     skrll 	DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
   2709      1.15  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2710      1.15  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2711      1.33  augustss 		    UGETW(req->wIndex), len, addr,
   2712      1.15  augustss 		    epipe->pipe.endpoint->edesc->bEndpointAddress));
   2713      1.15  augustss 
   2714      1.15  augustss 	setup = ehci_alloc_sqtd(sc);
   2715      1.15  augustss 	if (setup == NULL) {
   2716      1.15  augustss 		err = USBD_NOMEM;
   2717      1.15  augustss 		goto bad1;
   2718      1.15  augustss 	}
   2719      1.15  augustss 	stat = ehci_alloc_sqtd(sc);
   2720      1.15  augustss 	if (stat == NULL) {
   2721      1.15  augustss 		err = USBD_NOMEM;
   2722      1.15  augustss 		goto bad2;
   2723      1.15  augustss 	}
   2724      1.15  augustss 
   2725      1.15  augustss 	sqh = epipe->sqh;
   2726      1.15  augustss 	epipe->u.ctl.length = len;
   2727      1.15  augustss 
   2728  1.47.2.1     skrll 	/* Update device address and length since they may have changed
   2729  1.47.2.1     skrll 	   during the setup of the control pipe in usbd_new_device(). */
   2730      1.15  augustss 	/* XXX This only needs to be done once, but it's too early in open. */
   2731      1.15  augustss 	/* XXXX Should not touch ED here! */
   2732      1.33  augustss 	sqh->qh.qh_endp =
   2733  1.47.2.1     skrll 	    (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
   2734      1.15  augustss 	    htole32(
   2735      1.15  augustss 	     EHCI_QH_SET_ADDR(addr) |
   2736      1.15  augustss 	     EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
   2737      1.15  augustss 	    );
   2738      1.15  augustss 
   2739      1.15  augustss 	/* Set up data transaction */
   2740      1.15  augustss 	if (len != 0) {
   2741      1.15  augustss 		ehci_soft_qtd_t *end;
   2742      1.15  augustss 
   2743  1.47.2.1     skrll 		/* Start toggle at 1. */
   2744  1.47.2.1     skrll 		epipe->nexttoggle = 1;
   2745      1.25  augustss 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   2746      1.15  augustss 			  &next, &end);
   2747      1.15  augustss 		if (err)
   2748      1.15  augustss 			goto bad3;
   2749  1.47.2.4     skrll 		end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
   2750      1.15  augustss 		end->nextqtd = stat;
   2751      1.33  augustss 		end->qtd.qtd_next =
   2752      1.15  augustss 		end->qtd.qtd_altnext = htole32(stat->physaddr);
   2753      1.15  augustss 	} else {
   2754      1.15  augustss 		next = stat;
   2755      1.15  augustss 	}
   2756      1.15  augustss 
   2757      1.30  augustss 	memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
   2758      1.15  augustss 
   2759  1.47.2.1     skrll 	/* Clear toggle */
   2760      1.15  augustss 	setup->qtd.qtd_status = htole32(
   2761      1.26  augustss 	    EHCI_QTD_ACTIVE |
   2762      1.15  augustss 	    EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
   2763      1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2764  1.47.2.1     skrll 	    EHCI_QTD_SET_TOGGLE(0) |
   2765      1.15  augustss 	    EHCI_QTD_SET_BYTES(sizeof *req)
   2766      1.15  augustss 	    );
   2767      1.31  augustss 	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
   2768  1.47.2.1     skrll 	setup->qtd.qtd_buffer_hi[0] = 0;
   2769      1.15  augustss 	setup->nextqtd = next;
   2770      1.15  augustss 	setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
   2771      1.15  augustss 	setup->xfer = xfer;
   2772      1.18  augustss 	setup->len = sizeof *req;
   2773      1.15  augustss 
   2774      1.15  augustss 	stat->qtd.qtd_status = htole32(
   2775      1.26  augustss 	    EHCI_QTD_ACTIVE |
   2776      1.15  augustss 	    EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
   2777      1.15  augustss 	    EHCI_QTD_SET_CERR(3) |
   2778  1.47.2.1     skrll 	    EHCI_QTD_SET_TOGGLE(1) |
   2779      1.15  augustss 	    EHCI_QTD_IOC
   2780      1.15  augustss 	    );
   2781      1.15  augustss 	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
   2782  1.47.2.1     skrll 	stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
   2783      1.15  augustss 	stat->nextqtd = NULL;
   2784      1.15  augustss 	stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
   2785      1.15  augustss 	stat->xfer = xfer;
   2786      1.18  augustss 	stat->len = 0;
   2787      1.15  augustss 
   2788      1.15  augustss #ifdef EHCI_DEBUG
   2789      1.23  augustss 	if (ehcidebug > 5) {
   2790      1.15  augustss 		DPRINTF(("ehci_device_request:\n"));
   2791      1.15  augustss 		ehci_dump_sqh(sqh);
   2792      1.15  augustss 		ehci_dump_sqtds(setup);
   2793      1.15  augustss 	}
   2794      1.15  augustss #endif
   2795      1.15  augustss 
   2796      1.18  augustss 	exfer->sqtdstart = setup;
   2797      1.18  augustss 	exfer->sqtdend = stat;
   2798      1.18  augustss #ifdef DIAGNOSTIC
   2799      1.18  augustss 	if (!exfer->isdone) {
   2800      1.18  augustss 		printf("ehci_device_request: not done, exfer=%p\n", exfer);
   2801      1.18  augustss 	}
   2802      1.18  augustss 	exfer->isdone = 0;
   2803      1.18  augustss #endif
   2804      1.18  augustss 
   2805      1.15  augustss 	/* Insert qTD in QH list. */
   2806      1.15  augustss 	s = splusb();
   2807      1.23  augustss 	ehci_set_qh_qtd(sqh, setup);
   2808      1.15  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2809      1.45   tsutsui                 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2810      1.15  augustss 			    ehci_timeout, xfer);
   2811      1.15  augustss 	}
   2812      1.18  augustss 	ehci_add_intr_list(sc, exfer);
   2813      1.18  augustss 	xfer->status = USBD_IN_PROGRESS;
   2814      1.15  augustss 	splx(s);
   2815      1.15  augustss 
   2816      1.17  augustss #ifdef EHCI_DEBUG
   2817      1.15  augustss 	if (ehcidebug > 10) {
   2818      1.15  augustss 		DPRINTF(("ehci_device_request: status=%x\n",
   2819      1.15  augustss 			 EOREAD4(sc, EHCI_USBSTS)));
   2820      1.23  augustss 		delay(10000);
   2821      1.18  augustss 		ehci_dump_regs(sc);
   2822      1.15  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2823      1.15  augustss 		ehci_dump_sqh(sqh);
   2824      1.15  augustss 		ehci_dump_sqtds(setup);
   2825      1.15  augustss 	}
   2826      1.15  augustss #endif
   2827      1.15  augustss 
   2828      1.15  augustss 	return (USBD_NORMAL_COMPLETION);
   2829      1.15  augustss 
   2830      1.15  augustss  bad3:
   2831      1.15  augustss 	ehci_free_sqtd(sc, stat);
   2832      1.15  augustss  bad2:
   2833      1.15  augustss 	ehci_free_sqtd(sc, setup);
   2834      1.15  augustss  bad1:
   2835      1.25  augustss 	DPRINTFN(-1,("ehci_device_request: no memory\n"));
   2836      1.25  augustss 	xfer->status = err;
   2837      1.25  augustss 	usb_transfer_complete(xfer);
   2838      1.15  augustss 	return (err);
   2839      1.18  augustss #undef exfer
   2840      1.10  augustss }
   2841      1.10  augustss 
   2842      1.10  augustss /************************/
   2843       1.5  augustss 
   2844      1.19  augustss Static usbd_status
   2845      1.19  augustss ehci_device_bulk_transfer(usbd_xfer_handle xfer)
   2846      1.19  augustss {
   2847      1.19  augustss 	usbd_status err;
   2848      1.19  augustss 
   2849      1.19  augustss 	/* Insert last in queue. */
   2850      1.19  augustss 	err = usb_insert_transfer(xfer);
   2851      1.19  augustss 	if (err)
   2852      1.19  augustss 		return (err);
   2853      1.19  augustss 
   2854      1.19  augustss 	/* Pipe isn't running, start first */
   2855      1.19  augustss 	return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2856      1.19  augustss }
   2857      1.19  augustss 
   2858      1.19  augustss usbd_status
   2859      1.19  augustss ehci_device_bulk_start(usbd_xfer_handle xfer)
   2860      1.19  augustss {
   2861      1.19  augustss #define exfer EXFER(xfer)
   2862      1.19  augustss 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   2863      1.19  augustss 	usbd_device_handle dev = epipe->pipe.device;
   2864      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   2865      1.19  augustss 	ehci_soft_qtd_t *data, *dataend;
   2866      1.19  augustss 	ehci_soft_qh_t *sqh;
   2867      1.19  augustss 	usbd_status err;
   2868      1.19  augustss 	int len, isread, endpt;
   2869      1.19  augustss 	int s;
   2870      1.19  augustss 
   2871  1.47.2.4     skrll 	DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
   2872      1.19  augustss 		     xfer, xfer->length, xfer->flags));
   2873      1.19  augustss 
   2874      1.19  augustss 	if (sc->sc_dying)
   2875      1.19  augustss 		return (USBD_IOERROR);
   2876      1.19  augustss 
   2877      1.19  augustss #ifdef DIAGNOSTIC
   2878      1.19  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2879  1.47.2.4     skrll 		panic("ehci_device_bulk_start: a request");
   2880      1.19  augustss #endif
   2881      1.19  augustss 
   2882      1.19  augustss 	len = xfer->length;
   2883      1.19  augustss 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   2884      1.19  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2885      1.19  augustss 	sqh = epipe->sqh;
   2886      1.19  augustss 
   2887      1.19  augustss 	epipe->u.bulk.length = len;
   2888      1.19  augustss 
   2889      1.25  augustss 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   2890      1.19  augustss 				   &dataend);
   2891      1.25  augustss 	if (err) {
   2892      1.25  augustss 		DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
   2893      1.25  augustss 		xfer->status = err;
   2894      1.25  augustss 		usb_transfer_complete(xfer);
   2895      1.19  augustss 		return (err);
   2896      1.25  augustss 	}
   2897      1.19  augustss 
   2898      1.19  augustss #ifdef EHCI_DEBUG
   2899      1.23  augustss 	if (ehcidebug > 5) {
   2900  1.47.2.4     skrll 		DPRINTF(("ehci_device_bulk_start: data(1)\n"));
   2901      1.23  augustss 		ehci_dump_sqh(sqh);
   2902      1.19  augustss 		ehci_dump_sqtds(data);
   2903      1.19  augustss 	}
   2904      1.19  augustss #endif
   2905      1.19  augustss 
   2906      1.19  augustss 	/* Set up interrupt info. */
   2907      1.19  augustss 	exfer->sqtdstart = data;
   2908      1.19  augustss 	exfer->sqtdend = dataend;
   2909      1.19  augustss #ifdef DIAGNOSTIC
   2910      1.19  augustss 	if (!exfer->isdone) {
   2911  1.47.2.4     skrll 		printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
   2912      1.19  augustss 	}
   2913      1.19  augustss 	exfer->isdone = 0;
   2914      1.19  augustss #endif
   2915      1.19  augustss 
   2916      1.19  augustss 	s = splusb();
   2917      1.23  augustss 	ehci_set_qh_qtd(sqh, data);
   2918      1.19  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2919      1.45   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2920      1.19  augustss 			    ehci_timeout, xfer);
   2921      1.19  augustss 	}
   2922      1.19  augustss 	ehci_add_intr_list(sc, exfer);
   2923      1.19  augustss 	xfer->status = USBD_IN_PROGRESS;
   2924      1.19  augustss 	splx(s);
   2925      1.19  augustss 
   2926      1.19  augustss #ifdef EHCI_DEBUG
   2927      1.19  augustss 	if (ehcidebug > 10) {
   2928  1.47.2.4     skrll 		DPRINTF(("ehci_device_bulk_start: data(2)\n"));
   2929      1.23  augustss 		delay(10000);
   2930  1.47.2.4     skrll 		DPRINTF(("ehci_device_bulk_start: data(3)\n"));
   2931      1.23  augustss 		ehci_dump_regs(sc);
   2932      1.29  augustss #if 0
   2933      1.29  augustss 		printf("async_head:\n");
   2934      1.23  augustss 		ehci_dump_sqh(sc->sc_async_head);
   2935      1.29  augustss #endif
   2936      1.29  augustss 		printf("sqh:\n");
   2937      1.23  augustss 		ehci_dump_sqh(sqh);
   2938      1.19  augustss 		ehci_dump_sqtds(data);
   2939      1.19  augustss 	}
   2940      1.19  augustss #endif
   2941      1.19  augustss 
   2942      1.19  augustss 	if (sc->sc_bus.use_polling)
   2943      1.19  augustss 		ehci_waitintr(sc, xfer);
   2944      1.19  augustss 
   2945      1.19  augustss 	return (USBD_IN_PROGRESS);
   2946      1.19  augustss #undef exfer
   2947      1.19  augustss }
   2948      1.19  augustss 
   2949      1.19  augustss Static void
   2950      1.19  augustss ehci_device_bulk_abort(usbd_xfer_handle xfer)
   2951      1.19  augustss {
   2952      1.19  augustss 	DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
   2953      1.19  augustss 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   2954      1.19  augustss }
   2955      1.19  augustss 
   2956      1.33  augustss /*
   2957      1.19  augustss  * Close a device bulk pipe.
   2958      1.19  augustss  */
   2959      1.19  augustss Static void
   2960      1.19  augustss ehci_device_bulk_close(usbd_pipe_handle pipe)
   2961      1.19  augustss {
   2962      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   2963      1.19  augustss 
   2964      1.19  augustss 	DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
   2965      1.19  augustss 	ehci_close_pipe(pipe, sc->sc_async_head);
   2966      1.19  augustss }
   2967      1.19  augustss 
   2968      1.19  augustss void
   2969      1.19  augustss ehci_device_bulk_done(usbd_xfer_handle xfer)
   2970      1.19  augustss {
   2971      1.19  augustss 	struct ehci_xfer *ex = EXFER(xfer);
   2972      1.19  augustss 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   2973      1.19  augustss 	/*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
   2974      1.19  augustss 
   2975      1.33  augustss 	DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
   2976      1.19  augustss 		     xfer, xfer->actlen));
   2977      1.19  augustss 
   2978      1.44  augustss 	if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   2979      1.25  augustss 		ehci_del_intr_list(ex);	/* remove from active list */
   2980      1.44  augustss 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   2981      1.25  augustss 	}
   2982      1.19  augustss 
   2983      1.19  augustss 	DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
   2984      1.19  augustss }
   2985       1.5  augustss 
   2986      1.10  augustss /************************/
   2987      1.10  augustss 
   2988  1.47.2.4     skrll Static usbd_status
   2989  1.47.2.4     skrll ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
   2990  1.47.2.4     skrll {
   2991  1.47.2.4     skrll 	struct ehci_soft_islot *isp;
   2992  1.47.2.4     skrll 	int islot, lev;
   2993  1.47.2.4     skrll 
   2994  1.47.2.4     skrll 	/* Find a poll rate that is large enough. */
   2995  1.47.2.4     skrll 	for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
   2996  1.47.2.4     skrll 		if (EHCI_ILEV_IVAL(lev) <= ival)
   2997  1.47.2.4     skrll 			break;
   2998  1.47.2.4     skrll 
   2999  1.47.2.4     skrll 	/* Pick an interrupt slot at the right level. */
   3000  1.47.2.4     skrll 	/* XXX could do better than picking at random */
   3001  1.47.2.4     skrll 	sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
   3002  1.47.2.4     skrll 	islot = EHCI_IQHIDX(lev, sc->sc_rand);
   3003  1.47.2.4     skrll 
   3004  1.47.2.4     skrll 	sqh->islot = islot;
   3005  1.47.2.4     skrll 	isp = &sc->sc_islots[islot];
   3006  1.47.2.4     skrll 	ehci_add_qh(sqh, isp->sqh);
   3007  1.47.2.4     skrll 
   3008  1.47.2.4     skrll 	return (USBD_NORMAL_COMPLETION);
   3009  1.47.2.4     skrll }
   3010  1.47.2.4     skrll 
   3011  1.47.2.4     skrll Static usbd_status
   3012  1.47.2.4     skrll ehci_device_intr_transfer(usbd_xfer_handle xfer)
   3013  1.47.2.4     skrll {
   3014  1.47.2.4     skrll 	usbd_status err;
   3015  1.47.2.4     skrll 
   3016  1.47.2.4     skrll 	/* Insert last in queue. */
   3017  1.47.2.4     skrll 	err = usb_insert_transfer(xfer);
   3018  1.47.2.4     skrll 	if (err)
   3019  1.47.2.4     skrll 		return (err);
   3020  1.47.2.4     skrll 
   3021  1.47.2.4     skrll 	/*
   3022  1.47.2.4     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3023  1.47.2.4     skrll 	 * so start it first.
   3024  1.47.2.4     skrll 	 */
   3025  1.47.2.4     skrll 	return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3026  1.47.2.4     skrll }
   3027  1.47.2.4     skrll 
   3028  1.47.2.4     skrll Static usbd_status
   3029  1.47.2.4     skrll ehci_device_intr_start(usbd_xfer_handle xfer)
   3030  1.47.2.4     skrll {
   3031  1.47.2.4     skrll #define exfer EXFER(xfer)
   3032  1.47.2.4     skrll 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3033  1.47.2.4     skrll 	usbd_device_handle dev = xfer->pipe->device;
   3034  1.47.2.4     skrll 	ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
   3035  1.47.2.4     skrll 	ehci_soft_qtd_t *data, *dataend;
   3036  1.47.2.4     skrll 	ehci_soft_qh_t *sqh;
   3037  1.47.2.4     skrll 	usbd_status err;
   3038  1.47.2.4     skrll 	int len, isread, endpt;
   3039  1.47.2.4     skrll 	int s;
   3040  1.47.2.4     skrll 
   3041  1.47.2.4     skrll 	DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
   3042  1.47.2.4     skrll 	    xfer, xfer->length, xfer->flags));
   3043  1.47.2.4     skrll 
   3044  1.47.2.4     skrll 	if (sc->sc_dying)
   3045  1.47.2.4     skrll 		return (USBD_IOERROR);
   3046  1.47.2.4     skrll 
   3047  1.47.2.4     skrll #ifdef DIAGNOSTIC
   3048  1.47.2.4     skrll 	if (xfer->rqflags & URQ_REQUEST)
   3049  1.47.2.4     skrll 		panic("ehci_device_intr_start: a request");
   3050  1.47.2.4     skrll #endif
   3051  1.47.2.4     skrll 
   3052  1.47.2.4     skrll 	len = xfer->length;
   3053  1.47.2.4     skrll 	endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3054  1.47.2.4     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3055  1.47.2.4     skrll 	sqh = epipe->sqh;
   3056  1.47.2.4     skrll 
   3057  1.47.2.4     skrll 	epipe->u.intr.length = len;
   3058  1.47.2.4     skrll 
   3059  1.47.2.4     skrll 	err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
   3060  1.47.2.4     skrll 	    &dataend);
   3061  1.47.2.4     skrll 	if (err) {
   3062  1.47.2.4     skrll 		DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
   3063  1.47.2.4     skrll 		xfer->status = err;
   3064  1.47.2.4     skrll 		usb_transfer_complete(xfer);
   3065  1.47.2.4     skrll 		return (err);
   3066  1.47.2.4     skrll 	}
   3067  1.47.2.4     skrll 
   3068  1.47.2.4     skrll #ifdef EHCI_DEBUG
   3069  1.47.2.4     skrll 	if (ehcidebug > 5) {
   3070  1.47.2.4     skrll 		DPRINTF(("ehci_device_intr_start: data(1)\n"));
   3071  1.47.2.4     skrll 		ehci_dump_sqh(sqh);
   3072  1.47.2.4     skrll 		ehci_dump_sqtds(data);
   3073  1.47.2.4     skrll 	}
   3074  1.47.2.4     skrll #endif
   3075  1.47.2.4     skrll 
   3076  1.47.2.4     skrll 	/* Set up interrupt info. */
   3077  1.47.2.4     skrll 	exfer->sqtdstart = data;
   3078  1.47.2.4     skrll 	exfer->sqtdend = dataend;
   3079  1.47.2.4     skrll #ifdef DIAGNOSTIC
   3080  1.47.2.4     skrll 	if (!exfer->isdone) {
   3081  1.47.2.4     skrll 		printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
   3082  1.47.2.4     skrll 	}
   3083  1.47.2.4     skrll 	exfer->isdone = 0;
   3084  1.47.2.4     skrll #endif
   3085  1.47.2.4     skrll 
   3086  1.47.2.4     skrll 	s = splusb();
   3087  1.47.2.4     skrll 	ehci_set_qh_qtd(sqh, data);
   3088  1.47.2.4     skrll 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   3089  1.47.2.4     skrll 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   3090  1.47.2.4     skrll 		    ehci_timeout, xfer);
   3091  1.47.2.4     skrll 	}
   3092  1.47.2.4     skrll 	ehci_add_intr_list(sc, exfer);
   3093  1.47.2.4     skrll 	xfer->status = USBD_IN_PROGRESS;
   3094  1.47.2.4     skrll 	splx(s);
   3095  1.47.2.4     skrll 
   3096  1.47.2.4     skrll #ifdef EHCI_DEBUG
   3097  1.47.2.4     skrll 	if (ehcidebug > 10) {
   3098  1.47.2.4     skrll 		DPRINTF(("ehci_device_intr_start: data(2)\n"));
   3099  1.47.2.4     skrll 		delay(10000);
   3100  1.47.2.4     skrll 		DPRINTF(("ehci_device_intr_start: data(3)\n"));
   3101  1.47.2.4     skrll 		ehci_dump_regs(sc);
   3102  1.47.2.4     skrll 		printf("sqh:\n");
   3103  1.47.2.4     skrll 		ehci_dump_sqh(sqh);
   3104  1.47.2.4     skrll 		ehci_dump_sqtds(data);
   3105  1.47.2.4     skrll 	}
   3106  1.47.2.4     skrll #endif
   3107  1.47.2.4     skrll 
   3108  1.47.2.4     skrll 	if (sc->sc_bus.use_polling)
   3109  1.47.2.4     skrll 		ehci_waitintr(sc, xfer);
   3110  1.47.2.4     skrll 
   3111  1.47.2.4     skrll 	return (USBD_IN_PROGRESS);
   3112  1.47.2.4     skrll #undef exfer
   3113  1.47.2.4     skrll }
   3114  1.47.2.4     skrll 
   3115  1.47.2.4     skrll Static void
   3116  1.47.2.4     skrll ehci_device_intr_abort(usbd_xfer_handle xfer)
   3117  1.47.2.4     skrll {
   3118  1.47.2.4     skrll 	DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
   3119  1.47.2.4     skrll 	if (xfer->pipe->intrxfer == xfer) {
   3120  1.47.2.4     skrll 		DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
   3121  1.47.2.4     skrll 		xfer->pipe->intrxfer = NULL;
   3122  1.47.2.4     skrll 	}
   3123  1.47.2.4     skrll 	ehci_abort_xfer(xfer, USBD_CANCELLED);
   3124  1.47.2.4     skrll }
   3125  1.47.2.4     skrll 
   3126  1.47.2.4     skrll Static void
   3127  1.47.2.4     skrll ehci_device_intr_close(usbd_pipe_handle pipe)
   3128  1.47.2.4     skrll {
   3129  1.47.2.4     skrll 	ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
   3130  1.47.2.4     skrll 	struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
   3131  1.47.2.4     skrll 	struct ehci_soft_islot *isp;
   3132  1.47.2.4     skrll 
   3133  1.47.2.4     skrll 	isp = &sc->sc_islots[epipe->sqh->islot];
   3134  1.47.2.4     skrll 	ehci_close_pipe(pipe, isp->sqh);
   3135  1.47.2.4     skrll }
   3136  1.47.2.4     skrll 
   3137  1.47.2.4     skrll Static void
   3138  1.47.2.4     skrll ehci_device_intr_done(usbd_xfer_handle xfer)
   3139  1.47.2.4     skrll {
   3140  1.47.2.4     skrll #define exfer EXFER(xfer)
   3141  1.47.2.4     skrll 	struct ehci_xfer *ex = EXFER(xfer);
   3142  1.47.2.4     skrll 	ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
   3143  1.47.2.4     skrll 	struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
   3144  1.47.2.4     skrll 	ehci_soft_qtd_t *data, *dataend;
   3145  1.47.2.4     skrll 	ehci_soft_qh_t *sqh;
   3146  1.47.2.4     skrll 	usbd_status err;
   3147  1.47.2.4     skrll 	int len, isread, endpt, s;
   3148  1.47.2.4     skrll 
   3149  1.47.2.4     skrll 	DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
   3150  1.47.2.4     skrll 	    xfer, xfer->actlen));
   3151  1.47.2.4     skrll 
   3152  1.47.2.4     skrll 	if (xfer->pipe->repeat) {
   3153  1.47.2.4     skrll 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3154  1.47.2.4     skrll 
   3155  1.47.2.4     skrll 		len = epipe->u.intr.length;
   3156  1.47.2.4     skrll 		xfer->length = len;
   3157  1.47.2.4     skrll 		endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
   3158  1.47.2.4     skrll 		isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3159  1.47.2.4     skrll 		sqh = epipe->sqh;
   3160  1.47.2.4     skrll 
   3161  1.47.2.4     skrll 		err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
   3162  1.47.2.4     skrll 		    &data, &dataend);
   3163  1.47.2.4     skrll 		if (err) {
   3164  1.47.2.4     skrll 			DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
   3165  1.47.2.4     skrll 			xfer->status = err;
   3166  1.47.2.4     skrll 			return;
   3167  1.47.2.4     skrll 		}
   3168  1.47.2.4     skrll 
   3169  1.47.2.4     skrll 		/* Set up interrupt info. */
   3170  1.47.2.4     skrll 		exfer->sqtdstart = data;
   3171  1.47.2.4     skrll 		exfer->sqtdend = dataend;
   3172  1.47.2.4     skrll #ifdef DIAGNOSTIC
   3173  1.47.2.4     skrll 		if (!exfer->isdone) {
   3174  1.47.2.4     skrll 			printf("ehci_device_intr_done: not done, ex=%p\n",
   3175  1.47.2.4     skrll 			    exfer);
   3176  1.47.2.4     skrll 		}
   3177  1.47.2.4     skrll 		exfer->isdone = 0;
   3178  1.47.2.4     skrll #endif
   3179  1.47.2.4     skrll 
   3180  1.47.2.4     skrll 		s = splusb();
   3181  1.47.2.4     skrll 		ehci_set_qh_qtd(sqh, data);
   3182  1.47.2.4     skrll 		if (xfer->timeout && !sc->sc_bus.use_polling) {
   3183  1.47.2.4     skrll 			usb_callout(xfer->timeout_handle,
   3184  1.47.2.4     skrll 			    mstohz(xfer->timeout), ehci_timeout, xfer);
   3185  1.47.2.4     skrll 		}
   3186  1.47.2.4     skrll 		splx(s);
   3187  1.47.2.4     skrll 
   3188  1.47.2.4     skrll 		xfer->status = USBD_IN_PROGRESS;
   3189  1.47.2.4     skrll 	} else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
   3190  1.47.2.4     skrll 		ehci_del_intr_list(ex); /* remove from active list */
   3191  1.47.2.4     skrll 		ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
   3192  1.47.2.4     skrll 	}
   3193  1.47.2.4     skrll #undef exfer
   3194  1.47.2.4     skrll }
   3195      1.10  augustss 
   3196      1.10  augustss /************************/
   3197       1.5  augustss 
   3198       1.5  augustss Static usbd_status	ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   3199       1.5  augustss Static usbd_status	ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
   3200       1.5  augustss Static void		ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
   3201       1.5  augustss Static void		ehci_device_isoc_close(usbd_pipe_handle pipe) { }
   3202       1.5  augustss Static void		ehci_device_isoc_done(usbd_xfer_handle xfer) { }
   3203